src/gallium/drivers/r300/r300_screen.c

   1 /*
   2  * Copyright 2008 Corbin Simpson <MostAwesomeDude@gmail.com>
   3  * Copyright 2010 Marek Olšák <maraeo@gmail.com>
   4  *
   5  * Permission is hereby granted, free of charge, to any person obtaining a
   6  * copy of this software and associated documentation files (the "Software"),
   7  * to deal in the Software without restriction, including without limitation
   8  * on the rights to use, copy, modify, merge, publish, distribute, sub
   9  * license, and/or sell copies of the Software, and to permit persons to whom
  10  * the Software is furnished to do so, subject to the following conditions:
  11  *
  12  * The above copyright notice and this permission notice (including the next
  13  * paragraph) shall be included in all copies or substantial portions of the
  14  * Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  19  * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
  20  * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
  21  * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
  22  * USE OR OTHER DEALINGS IN THE SOFTWARE. */
  23
  24 #include "util/u_format.h"
  25 #include "util/u_format_s3tc.h"
  26 #include "util/u_memory.h"
  27 #include "os/os_time.h"
  28 #include "vl/vl_decoder.h"
  29 #include "vl/vl_video_buffer.h"
  30
  31 #include "r300_context.h"
  32 #include "r300_texture.h"
  33 #include "r300_screen_buffer.h"
  34 #include "r300_state_inlines.h"
  35 #include "r300_public.h"
  36
  37 #include "draw/draw_context.h"
  38
  39 /* Return the identifier behind whom the brave coders responsible for this
  40  * amalgamation of code, sweat, and duct tape, routinely obscure their names.
  41  *
  42  * ...I should have just put "Corbin Simpson", but I'm not that cool.
  43  *
  44  * (Or egotistical. Yet.) */
  45 static const char* r300_get_vendor(struct pipe_screen* pscreen)
  46 {
  47     return "X.Org R300 Project";
  48 }
  49
  50 static const char* r300_get_device_vendor(struct pipe_screen* pscreen)
  51 {
  52     return "ATI";
  53 }
  54
  55 static const char* chip_families[] = {
  56     "unknown",
  57     "ATI R300",
  58     "ATI R350",
  59     "ATI RV350",
  60     "ATI RV370",
  61     "ATI RV380",
  62     "ATI RS400",
  63     "ATI RC410",
  64     "ATI RS480",
  65     "ATI R420",
  66     "ATI R423",
  67     "ATI R430",
  68     "ATI R480",
  69     "ATI R481",
  70     "ATI RV410",
  71     "ATI RS600",
  72     "ATI RS690",
  73     "ATI RS740",
  74     "ATI RV515",
  75     "ATI R520",
  76     "ATI RV530",
  77     "ATI R580",
  78     "ATI RV560",
  79     "ATI RV570"
  80 };
  81
  82 static const char* r300_get_name(struct pipe_screen* pscreen)
  83 {
  84     struct r300_screen* r300screen = r300_screen(pscreen);
  85
  86     return chip_families[r300screen->caps.family];
  87 }
  88
  89 static int r300_get_param(struct pipe_screen* pscreen, enum pipe_cap param)
  90 {
  91     struct r300_screen* r300screen = r300_screen(pscreen);
  92     boolean is_r500 = r300screen->caps.is_r500;
  93
  94     switch (param) {
  95         /* Supported features (boolean caps). */
  96         case PIPE_CAP_NPOT_TEXTURES:
  97         case PIPE_CAP_MIXED_FRAMEBUFFER_SIZES:
  98         case PIPE_CAP_MIXED_COLOR_DEPTH_BITS:
  99         case PIPE_CAP_TWO_SIDED_STENCIL:
 100         case PIPE_CAP_ANISOTROPIC_FILTER:
 101         case PIPE_CAP_POINT_SPRITE:
 102         case PIPE_CAP_OCCLUSION_QUERY:
 103         case PIPE_CAP_TEXTURE_SHADOW_MAP:
 104         case PIPE_CAP_TEXTURE_MIRROR_CLAMP:
 105         case PIPE_CAP_BLEND_EQUATION_SEPARATE:
 106         case PIPE_CAP_VERTEX_ELEMENT_INSTANCE_DIVISOR:
 107         case PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT:
 108         case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER:
 109         case PIPE_CAP_CONDITIONAL_RENDER:
 110         case PIPE_CAP_TEXTURE_BARRIER:
 111         case PIPE_CAP_TGSI_CAN_COMPACT_CONSTANTS:
 112         case PIPE_CAP_USER_CONSTANT_BUFFERS:
 113         case PIPE_CAP_PREFER_BLIT_BASED_TEXTURE_TRANSFER:
 114         case PIPE_CAP_BUFFER_MAP_PERSISTENT_COHERENT:
 115         case PIPE_CAP_CLIP_HALFZ:
 116             return 1;
 117
 118         case PIPE_CAP_MIN_MAP_BUFFER_ALIGNMENT:
 119             return R300_BUFFER_ALIGNMENT;
 120
 121         case PIPE_CAP_CONSTANT_BUFFER_OFFSET_ALIGNMENT:
 122             return 16;
 123
 124         case PIPE_CAP_GLSL_FEATURE_LEVEL:
 125             return 120;
 126
 127         /* r300 cannot do swizzling of compressed textures. Supported otherwise. */
 128         case PIPE_CAP_TEXTURE_SWIZZLE:
 129             return util_format_s3tc_enabled ? r300screen->caps.dxtc_swizzle : 1;
 130
 131         /* We don't support color clamping on r500, so that we can use color
 132          * intepolators for generic varyings. */
 133         case PIPE_CAP_VERTEX_COLOR_CLAMPED:
 134             return !is_r500;
 135
 136         /* Supported on r500 only. */
 137         case PIPE_CAP_VERTEX_COLOR_UNCLAMPED:
 138         case PIPE_CAP_MIXED_COLORBUFFER_FORMATS:
 139         case PIPE_CAP_SM3:
 140             return is_r500 ? 1 : 0;
 141
 142         /* Unsupported features. */
 143         case PIPE_CAP_QUERY_TIME_ELAPSED:
 144         case PIPE_CAP_QUERY_PIPELINE_STATISTICS:
 145         case PIPE_CAP_MAX_DUAL_SOURCE_RENDER_TARGETS:
 146         case PIPE_CAP_INDEP_BLEND_ENABLE:
 147         case PIPE_CAP_INDEP_BLEND_FUNC:
 148         case PIPE_CAP_DEPTH_CLIP_DISABLE:
 149         case PIPE_CAP_SHADER_STENCIL_EXPORT:
 150         case PIPE_CAP_MAX_TEXTURE_ARRAY_LAYERS:
 151         case PIPE_CAP_TGSI_INSTANCEID:
 152         case PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT:
 153         case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER:
 154         case PIPE_CAP_SEAMLESS_CUBE_MAP:
 155         case PIPE_CAP_SEAMLESS_CUBE_MAP_PER_TEXTURE:
 156         case PIPE_CAP_MIN_TEXEL_OFFSET:
 157         case PIPE_CAP_MAX_TEXEL_OFFSET:
 158         case PIPE_CAP_MIN_TEXTURE_GATHER_OFFSET:
 159         case PIPE_CAP_MAX_TEXTURE_GATHER_OFFSET:
 160         case PIPE_CAP_MAX_STREAM_OUTPUT_BUFFERS:
 161         case PIPE_CAP_MAX_STREAM_OUTPUT_SEPARATE_COMPONENTS:
 162         case PIPE_CAP_MAX_STREAM_OUTPUT_INTERLEAVED_COMPONENTS:
 163         case PIPE_CAP_MAX_GEOMETRY_OUTPUT_VERTICES:
 164         case PIPE_CAP_MAX_GEOMETRY_TOTAL_OUTPUT_COMPONENTS:
 165         case PIPE_CAP_MAX_VERTEX_STREAMS:
 166         case PIPE_CAP_STREAM_OUTPUT_PAUSE_RESUME:
 167         case PIPE_CAP_STREAM_OUTPUT_INTERLEAVE_BUFFERS:
 168         case PIPE_CAP_FRAGMENT_COLOR_CLAMPED:
 169         case PIPE_CAP_QUADS_FOLLOW_PROVOKING_VERTEX_CONVENTION:
 170         case PIPE_CAP_COMPUTE:
 171         case PIPE_CAP_START_INSTANCE:
 172         case PIPE_CAP_QUERY_TIMESTAMP:
 173         case PIPE_CAP_TEXTURE_MULTISAMPLE:
 174         case PIPE_CAP_CUBE_MAP_ARRAY:
 175         case PIPE_CAP_TEXTURE_BUFFER_OBJECTS:
 176         case PIPE_CAP_TEXTURE_BUFFER_OFFSET_ALIGNMENT:
 177         case PIPE_CAP_TEXTURE_BORDER_COLOR_QUIRK:
 178         case PIPE_CAP_MAX_TEXTURE_BUFFER_SIZE:
 179         case PIPE_CAP_TGSI_VS_LAYER_VIEWPORT:
 180         case PIPE_CAP_MAX_TEXTURE_GATHER_COMPONENTS:
 181         case PIPE_CAP_TEXTURE_GATHER_SM5:
 182         case PIPE_CAP_TEXTURE_QUERY_LOD:
 183         case PIPE_CAP_FAKE_SW_MSAA:
 184         case PIPE_CAP_SAMPLE_SHADING:
 185         case PIPE_CAP_TEXTURE_GATHER_OFFSETS:
 186         case PIPE_CAP_DRAW_INDIRECT:
 187         case PIPE_CAP_MULTI_DRAW_INDIRECT:
 188         case PIPE_CAP_MULTI_DRAW_INDIRECT_PARAMS:
 189         case PIPE_CAP_TGSI_FS_FINE_DERIVATIVE:
 190         case PIPE_CAP_CONDITIONAL_RENDER_INVERTED:
 191         case PIPE_CAP_SAMPLER_VIEW_TARGET:
 192         case PIPE_CAP_VERTEXID_NOBASE:
 193         case PIPE_CAP_POLYGON_OFFSET_CLAMP:
 194         case PIPE_CAP_MULTISAMPLE_Z_RESOLVE:
 195         case PIPE_CAP_RESOURCE_FROM_USER_MEMORY:
 196         case PIPE_CAP_DEVICE_RESET_STATUS_QUERY:
 197         case PIPE_CAP_MAX_SHADER_PATCH_VARYINGS:
 198         case PIPE_CAP_TEXTURE_FLOAT_LINEAR:
 199         case PIPE_CAP_TEXTURE_HALF_FLOAT_LINEAR:
 200         case PIPE_CAP_DEPTH_BOUNDS_TEST:
 201         case PIPE_CAP_TGSI_TXQS:
 202         case PIPE_CAP_FORCE_PERSAMPLE_INTERP:
 203         case PIPE_CAP_SHAREABLE_SHADERS:
 204         case PIPE_CAP_COPY_BETWEEN_COMPRESSED_AND_PLAIN_FORMATS:
 205         case PIPE_CAP_CLEAR_TEXTURE:
 206         case PIPE_CAP_DRAW_PARAMETERS:
 207         case PIPE_CAP_TGSI_PACK_HALF_FLOAT:
 208         case PIPE_CAP_TGSI_FS_POSITION_IS_SYSVAL:
 209         case PIPE_CAP_TGSI_FS_FACE_IS_INTEGER_SYSVAL:
 210         case PIPE_CAP_SHADER_BUFFER_OFFSET_ALIGNMENT:
 211         case PIPE_CAP_INVALIDATE_BUFFER:
 212         case PIPE_CAP_GENERATE_MIPMAP:
 213         case PIPE_CAP_STRING_MARKER:
 214         case PIPE_CAP_BUFFER_SAMPLER_VIEW_RGBA_ONLY:
 215         case PIPE_CAP_SURFACE_REINTERPRET_BLOCKS:
 216         case PIPE_CAP_QUERY_BUFFER_OBJECT:
 217         case PIPE_CAP_QUERY_MEMORY_INFO:
 218         case PIPE_CAP_FRAMEBUFFER_NO_ATTACHMENT:
 219         case PIPE_CAP_ROBUST_BUFFER_ACCESS_BEHAVIOR:
 220         case PIPE_CAP_CULL_DISTANCE:
 221         case PIPE_CAP_PRIMITIVE_RESTART_FOR_PATCHES:
 222         case PIPE_CAP_TGSI_VOTE:
 223         case PIPE_CAP_MAX_WINDOW_RECTANGLES:
 224         case PIPE_CAP_POLYGON_OFFSET_UNITS_UNSCALED:
 225         case PIPE_CAP_VIEWPORT_SUBPIXEL_BITS:
 226         case PIPE_CAP_TGSI_ARRAY_COMPONENTS:
 227         case PIPE_CAP_TGSI_CAN_READ_OUTPUTS:
 228         case PIPE_CAP_NATIVE_FENCE_FD:
 229         case PIPE_CAP_GLSL_OPTIMIZE_CONSERVATIVELY:
 230         case PIPE_CAP_TGSI_FS_FBFETCH:
 231         case PIPE_CAP_TGSI_MUL_ZERO_WINS:
 232         case PIPE_CAP_DOUBLES:
 233         case PIPE_CAP_INT64:
 234         case PIPE_CAP_INT64_DIVMOD:
 235         case PIPE_CAP_TGSI_TEX_TXF_LZ:
 236         case PIPE_CAP_TGSI_CLOCK:
 237             return 0;
 238
 239         /* SWTCL-only features. */
 240         case PIPE_CAP_PRIMITIVE_RESTART:
 241         case PIPE_CAP_USER_VERTEX_BUFFERS:
 242         case PIPE_CAP_TGSI_VS_WINDOW_SPACE_POSITION:
 243             return !r300screen->caps.has_tcl;
 244
 245         /* HWTCL-only features / limitations. */
 246         case PIPE_CAP_VERTEX_BUFFER_OFFSET_4BYTE_ALIGNED_ONLY:
 247         case PIPE_CAP_VERTEX_BUFFER_STRIDE_4BYTE_ALIGNED_ONLY:
 248         case PIPE_CAP_VERTEX_ELEMENT_SRC_OFFSET_4BYTE_ALIGNED_ONLY:
 249             return r300screen->caps.has_tcl;
 250         case PIPE_CAP_TGSI_TEXCOORD:
 251             return 0;
 252
 253         /* Texturing. */
 254         case PIPE_CAP_MAX_TEXTURE_2D_LEVELS:
 255         case PIPE_CAP_MAX_TEXTURE_3D_LEVELS:
 256         case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS:
 257             /* 13 == 4096, 12 == 2048 */
 258             return is_r500 ? 13 : 12;
 259
 260         /* Render targets. */
 261         case PIPE_CAP_MAX_RENDER_TARGETS:
 262             return 4;
 263         case PIPE_CAP_ENDIANNESS:
 264             return PIPE_ENDIAN_LITTLE;
 265
 266         case PIPE_CAP_MAX_VIEWPORTS:
 267             return 1;
 268
 269         case PIPE_CAP_MAX_VERTEX_ATTRIB_STRIDE:
 270             return 2048;
 271
 272         case PIPE_CAP_VENDOR_ID:
 273                 return 0x1002;
 274         case PIPE_CAP_DEVICE_ID:
 275                 return r300screen->info.pci_id;
 276         case PIPE_CAP_ACCELERATED:
 277                 return 1;
 278         case PIPE_CAP_VIDEO_MEMORY:
 279                 return r300screen->info.vram_size >> 20;
 280         case PIPE_CAP_UMA:
 281                 return 0;
 282         case PIPE_CAP_PCI_GROUP:
 283             return r300screen->info.pci_domain;
 284         case PIPE_CAP_PCI_BUS:
 285             return r300screen->info.pci_bus;
 286         case PIPE_CAP_PCI_DEVICE:
 287             return r300screen->info.pci_dev;
 288         case PIPE_CAP_PCI_FUNCTION:
 289             return r300screen->info.pci_func;
 290     }
 291     return 0;
 292 }
 293
 294 static int r300_get_shader_param(struct pipe_screen *pscreen,
 295                                  enum pipe_shader_type shader,
 296                                  enum pipe_shader_cap param)
 297 {
 298    struct r300_screen* r300screen = r300_screen(pscreen);
 299    boolean is_r400 = r300screen->caps.is_r400;
 300    boolean is_r500 = r300screen->caps.is_r500;
 301
 302    switch (shader) {
 303     case PIPE_SHADER_FRAGMENT:
 304         switch (param)
 305         {
 306         case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
 307             return is_r500 || is_r400 ? 512 : 96;
 308         case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
 309             return is_r500 || is_r400 ? 512 : 64;
 310         case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
 311             return is_r500 || is_r400 ? 512 : 32;
 312         case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
 313             return is_r500 ? 511 : 4;
 314         case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:
 315             return is_r500 ? 64 : 0; /* Actually unlimited on r500. */
 316             /* Fragment shader limits. */
 317         case PIPE_SHADER_CAP_MAX_INPUTS:
 318             /* 2 colors + 8 texcoords are always supported
 319              * (minus fog and wpos).
 320              *
 321              * R500 has the ability to turn 3rd and 4th color into
 322              * additional texcoords but there is no two-sided color
 323              * selection then. However the facing bit can be used instead. */
 324             return 10;
 325         case PIPE_SHADER_CAP_MAX_OUTPUTS:
 326             return 4;
 327         case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE:
 328             return (is_r500 ? 256 : 32) * sizeof(float[4]);
 329         case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
 330         case PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE:
 331             return 1;
 332         case PIPE_SHADER_CAP_MAX_TEMPS:
 333             return is_r500 ? 128 : is_r400 ? 64 : 32;
 334         case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
 335         case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS:
 336            return r300screen->caps.num_tex_units;
 337         case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
 338         case PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED:
 339         case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
 340         case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
 341         case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
 342         case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
 343         case PIPE_SHADER_CAP_SUBROUTINES:
 344         case PIPE_SHADER_CAP_INTEGERS:
 345         case PIPE_SHADER_CAP_TGSI_DROUND_SUPPORTED:
 346         case PIPE_SHADER_CAP_TGSI_DFRACEXP_DLDEXP_SUPPORTED:
 347         case PIPE_SHADER_CAP_TGSI_FMA_SUPPORTED:
 348         case PIPE_SHADER_CAP_MAX_SHADER_BUFFERS:
 349         case PIPE_SHADER_CAP_MAX_SHADER_IMAGES:
 350         case PIPE_SHADER_CAP_LOWER_IF_THRESHOLD:
 351             return 0;
 352         case PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT:
 353             return 32;
 354         case PIPE_SHADER_CAP_PREFERRED_IR:
 355             return PIPE_SHADER_IR_TGSI;
 356         case PIPE_SHADER_CAP_SUPPORTED_IRS:
 357             return 0;
 358         }
 359         break;
 360     case PIPE_SHADER_VERTEX:
 361         switch (param)
 362         {
 363         case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
 364         case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS:
 365         case PIPE_SHADER_CAP_SUBROUTINES:
 366             return 0;
 367         default:;
 368         }
 369
 370         if (!r300screen->caps.has_tcl) {
 371             return draw_get_shader_param(shader, param);
 372         }
 373
 374         switch (param)
 375         {
 376         case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
 377         case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
 378             return is_r500 ? 1024 : 256;
 379         case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:
 380             return is_r500 ? 4 : 0; /* For loops; not sure about conditionals. */
 381         case PIPE_SHADER_CAP_MAX_INPUTS:
 382             return 16;
 383         case PIPE_SHADER_CAP_MAX_OUTPUTS:
 384             return 10;
 385         case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE:
 386             return 256 * sizeof(float[4]);
 387         case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
 388             return 1;
 389         case PIPE_SHADER_CAP_MAX_TEMPS:
 390             return 32;
 391         case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
 392         case PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE:
 393             return 1;
 394         case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
 395         case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
 396         case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
 397         case PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED:
 398         case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
 399         case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
 400         case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
 401         case PIPE_SHADER_CAP_SUBROUTINES:
 402         case PIPE_SHADER_CAP_INTEGERS:
 403         case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
 404         case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS:
 405         case PIPE_SHADER_CAP_TGSI_DROUND_SUPPORTED:
 406         case PIPE_SHADER_CAP_TGSI_DFRACEXP_DLDEXP_SUPPORTED:
 407         case PIPE_SHADER_CAP_TGSI_FMA_SUPPORTED:
 408         case PIPE_SHADER_CAP_MAX_SHADER_BUFFERS:
 409         case PIPE_SHADER_CAP_MAX_SHADER_IMAGES:
 410         case PIPE_SHADER_CAP_LOWER_IF_THRESHOLD:
 411             return 0;
 412         case PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT:
 413             return 32;
 414         case PIPE_SHADER_CAP_PREFERRED_IR:
 415             return PIPE_SHADER_IR_TGSI;
 416         case PIPE_SHADER_CAP_SUPPORTED_IRS:
 417             return 0;
 418         }
 419         break;
 420     default:
 421         ; /* nothing */
 422     }
 423     return 0;
 424 }
 425
 426 static float r300_get_paramf(struct pipe_screen* pscreen,
 427                              enum pipe_capf param)
 428 {
 429     struct r300_screen* r300screen = r300_screen(pscreen);
 430
 431     switch (param) {
 432         case PIPE_CAPF_MAX_LINE_WIDTH:
 433         case PIPE_CAPF_MAX_LINE_WIDTH_AA:
 434         case PIPE_CAPF_MAX_POINT_WIDTH:
 435         case PIPE_CAPF_MAX_POINT_WIDTH_AA:
 436             /* The maximum dimensions of the colorbuffer are our practical
 437              * rendering limits. 2048 pixels should be enough for anybody. */
 438             if (r300screen->caps.is_r500) {
 439                 return 4096.0f;
 440             } else if (r300screen->caps.is_r400) {
 441                 return 4021.0f;
 442             } else {
 443                 return 2560.0f;
 444             }
 445         case PIPE_CAPF_MAX_TEXTURE_ANISOTROPY:
 446             return 16.0f;
 447         case PIPE_CAPF_MAX_TEXTURE_LOD_BIAS:
 448             return 16.0f;
 449         case PIPE_CAPF_GUARD_BAND_LEFT:
 450         case PIPE_CAPF_GUARD_BAND_TOP:
 451         case PIPE_CAPF_GUARD_BAND_RIGHT:
 452         case PIPE_CAPF_GUARD_BAND_BOTTOM:
 453             return 0.0f;
 454         default:
 455             debug_printf("r300: Warning: Unknown CAP %d in get_paramf.\n",
 456                          param);
 457             return 0.0f;
 458     }
 459 }
 460
 461 static int r300_get_video_param(struct pipe_screen *screen,
 462                                 enum pipe_video_profile profile,
 463                                 enum pipe_video_entrypoint entrypoint,
 464                                 enum pipe_video_cap param)
 465 {
 466    switch (param) {
 467       case PIPE_VIDEO_CAP_SUPPORTED:
 468          return vl_profile_supported(screen, profile, entrypoint);
 469       case PIPE_VIDEO_CAP_NPOT_TEXTURES:
 470          return 0;
 471       case PIPE_VIDEO_CAP_MAX_WIDTH:
 472       case PIPE_VIDEO_CAP_MAX_HEIGHT:
 473          return vl_video_buffer_max_size(screen);
 474       case PIPE_VIDEO_CAP_PREFERED_FORMAT:
 475          return PIPE_FORMAT_NV12;
 476       case PIPE_VIDEO_CAP_PREFERS_INTERLACED:
 477          return false;
 478       case PIPE_VIDEO_CAP_SUPPORTS_INTERLACED:
 479          return false;
 480       case PIPE_VIDEO_CAP_SUPPORTS_PROGRESSIVE:
 481          return true;
 482       case PIPE_VIDEO_CAP_MAX_LEVEL:
 483          return vl_level_supported(screen, profile);
 484       default:
 485          return 0;
 486    }
 487 }
 488
 489 /**
 490  * Whether the format matches:
 491  *   PIPE_FORMAT_?10?10?10?2_UNORM
 492  */
 493 static inline boolean
 494 util_format_is_rgba1010102_variant(const struct util_format_description *desc)
 495 {
 496    static const unsigned size[4] = {10, 10, 10, 2};
 497    unsigned chan;
 498
 499    if (desc->block.width != 1 ||
 500        desc->block.height != 1 ||
 501        desc->block.bits != 32)
 502       return FALSE;
 503
 504    for (chan = 0; chan < 4; ++chan) {
 505       if(desc->channel[chan].type != UTIL_FORMAT_TYPE_UNSIGNED &&
 506          desc->channel[chan].type != UTIL_FORMAT_TYPE_VOID)
 507          return FALSE;
 508       if (desc->channel[chan].size != size[chan])
 509          return FALSE;
 510    }
 511
 512    return TRUE;
 513 }
 514
 515 static bool r300_is_blending_supported(struct r300_screen *rscreen,
 516                                        enum pipe_format format)
 517 {
 518     int c;
 519     const struct util_format_description *desc =
 520         util_format_description(format);
 521
 522     if (desc->layout != UTIL_FORMAT_LAYOUT_PLAIN)
 523         return false;
 524
 525     c = util_format_get_first_non_void_channel(format);
 526
 527     /* RGBA16F */
 528     if (rscreen->caps.is_r500 &&
 529         desc->nr_channels == 4 &&
 530         desc->channel[c].size == 16 &&
 531         desc->channel[c].type == UTIL_FORMAT_TYPE_FLOAT)
 532         return true;
 533
 534     if (desc->channel[c].normalized &&
 535         desc->channel[c].type == UTIL_FORMAT_TYPE_UNSIGNED &&
 536         desc->channel[c].size >= 4 &&
 537         desc->channel[c].size <= 10) {
 538         /* RGB10_A2, RGBA8, RGB5_A1, RGBA4, RGB565 */
 539         if (desc->nr_channels >= 3)
 540             return true;
 541
 542         if (format == PIPE_FORMAT_R8G8_UNORM)
 543             return true;
 544
 545         /* R8, I8, L8, A8 */
 546         if (desc->nr_channels == 1)
 547             return true;
 548     }
 549
 550     return false;
 551 }
 552
 553 static boolean r300_is_format_supported(struct pipe_screen* screen,
 554                                         enum pipe_format format,
 555                                         enum pipe_texture_target target,
 556                                         unsigned sample_count,
 557                                         unsigned usage)
 558 {
 559     uint32_t retval = 0;
 560     boolean is_r500 = r300_screen(screen)->caps.is_r500;
 561     boolean is_r400 = r300_screen(screen)->caps.is_r400;
 562     boolean is_color2101010 = format == PIPE_FORMAT_R10G10B10A2_UNORM ||
 563                               format == PIPE_FORMAT_R10G10B10X2_SNORM ||
 564                               format == PIPE_FORMAT_B10G10R10A2_UNORM ||
 565                               format == PIPE_FORMAT_B10G10R10X2_UNORM ||
 566                               format == PIPE_FORMAT_R10SG10SB10SA2U_NORM;
 567     boolean is_ati1n = format == PIPE_FORMAT_RGTC1_UNORM ||
 568                        format == PIPE_FORMAT_RGTC1_SNORM ||
 569                        format == PIPE_FORMAT_LATC1_UNORM ||
 570                        format == PIPE_FORMAT_LATC1_SNORM;
 571     boolean is_ati2n = format == PIPE_FORMAT_RGTC2_UNORM ||
 572                        format == PIPE_FORMAT_RGTC2_SNORM ||
 573                        format == PIPE_FORMAT_LATC2_UNORM ||
 574                        format == PIPE_FORMAT_LATC2_SNORM;
 575     boolean is_half_float = format == PIPE_FORMAT_R16_FLOAT ||
 576                             format == PIPE_FORMAT_R16G16_FLOAT ||
 577                             format == PIPE_FORMAT_R16G16B16_FLOAT ||
 578                             format == PIPE_FORMAT_R16G16B16A16_FLOAT ||
 579                             format == PIPE_FORMAT_R16G16B16X16_FLOAT;
 580     const struct util_format_description *desc;
 581
 582     if (!util_format_is_supported(format, usage))
 583        return FALSE;
 584
 585     /* Check multisampling support. */
 586     switch (sample_count) {
 587         case 0:
 588         case 1:
 589             break;
 590         case 2:
 591         case 4:
 592         case 6:
 593             /* No texturing and scanout. */
 594             if (usage & (PIPE_BIND_SAMPLER_VIEW |
 595                          PIPE_BIND_DISPLAY_TARGET |
 596                          PIPE_BIND_SCANOUT)) {
 597                 return FALSE;
 598             }
 599
 600             desc = util_format_description(format);
 601
 602             if (is_r500) {
 603                 /* Only allow depth/stencil, RGBA8, RGBA1010102, RGBA16F. */
 604                 if (!util_format_is_depth_or_stencil(format) &&
 605                     !util_format_is_rgba8_variant(desc) &&
 606                     !util_format_is_rgba1010102_variant(desc) &&
 607                     format != PIPE_FORMAT_R16G16B16A16_FLOAT &&
 608                     format != PIPE_FORMAT_R16G16B16X16_FLOAT) {
 609                     return FALSE;
 610                 }
 611             } else {
 612                 /* Only allow depth/stencil, RGBA8. */
 613                 if (!util_format_is_depth_or_stencil(format) &&
 614                     !util_format_is_rgba8_variant(desc)) {
 615                     return FALSE;
 616                 }
 617             }
 618             break;
 619         default:
 620             return FALSE;
 621     }
 622
 623     /* Check sampler format support. */
 624     if ((usage & PIPE_BIND_SAMPLER_VIEW) &&
 625         /* these two are broken for an unknown reason */
 626         format != PIPE_FORMAT_R8G8B8X8_SNORM &&
 627         format != PIPE_FORMAT_R16G16B16X16_SNORM &&
 628         /* ATI1N is r5xx-only. */
 629         (is_r500 || !is_ati1n) &&
 630         /* ATI2N is supported on r4xx-r5xx. */
 631         (is_r400 || is_r500 || !is_ati2n) &&
 632         r300_is_sampler_format_supported(format)) {
 633         retval |= PIPE_BIND_SAMPLER_VIEW;
 634     }
 635
 636     /* Check colorbuffer format support. */
 637     if ((usage & (PIPE_BIND_RENDER_TARGET |
 638                   PIPE_BIND_DISPLAY_TARGET |
 639                   PIPE_BIND_SCANOUT |
 640                   PIPE_BIND_SHARED |
 641                   PIPE_BIND_BLENDABLE)) &&
 642         /* 2101010 cannot be rendered to on non-r5xx. */
 643         (!is_color2101010 || is_r500) &&
 644         r300_is_colorbuffer_format_supported(format)) {
 645         retval |= usage &
 646             (PIPE_BIND_RENDER_TARGET |
 647              PIPE_BIND_DISPLAY_TARGET |
 648              PIPE_BIND_SCANOUT |
 649              PIPE_BIND_SHARED);
 650
 651         if (r300_is_blending_supported(r300_screen(screen), format)) {
 652             retval |= usage & PIPE_BIND_BLENDABLE;
 653         }
 654     }
 655
 656     /* Check depth-stencil format support. */
 657     if (usage & PIPE_BIND_DEPTH_STENCIL &&
 658         r300_is_zs_format_supported(format)) {
 659         retval |= PIPE_BIND_DEPTH_STENCIL;
 660     }
 661
 662     /* Check vertex buffer format support. */
 663     if (usage & PIPE_BIND_VERTEX_BUFFER) {
 664         if (r300_screen(screen)->caps.has_tcl) {
 665             /* Half float is supported on >= R400. */
 666             if ((is_r400 || is_r500 || !is_half_float) &&
 667                 r300_translate_vertex_data_type(format) != R300_INVALID_FORMAT) {
 668                 retval |= PIPE_BIND_VERTEX_BUFFER;
 669             }
 670         } else {
 671             /* SW TCL */
 672             if (!util_format_is_pure_integer(format)) {
 673                 retval |= PIPE_BIND_VERTEX_BUFFER;
 674             }
 675         }
 676     }
 677
 678     return retval == usage;
 679 }
 680
 681 static void r300_destroy_screen(struct pipe_screen* pscreen)
 682 {
 683     struct r300_screen* r300screen = r300_screen(pscreen);
 684     struct radeon_winsys *rws = radeon_winsys(pscreen);
 685
 686     if (rws && !rws->unref(rws))
 687       return;
 688
 689     mtx_destroy(&r300screen->cmask_mutex);
 690     slab_destroy_parent(&r300screen->pool_transfers);
 691
 692     if (rws)
 693       rws->destroy(rws);
 694
 695     FREE(r300screen);
 696 }
 697
 698 static void r300_fence_reference(struct pipe_screen *screen,
 699                                  struct pipe_fence_handle **ptr,
 700                                  struct pipe_fence_handle *fence)
 701 {
 702     struct radeon_winsys *rws = r300_screen(screen)->rws;
 703
 704     rws->fence_reference(ptr, fence);
 705 }
 706
 707 static boolean r300_fence_finish(struct pipe_screen *screen,
 708                                  struct pipe_context *ctx,
 709                                  struct pipe_fence_handle *fence,
 710                                  uint64_t timeout)
 711 {
 712     struct radeon_winsys *rws = r300_screen(screen)->rws;
 713
 714     return rws->fence_wait(rws, fence, timeout);
 715 }
 716
 717 struct pipe_screen* r300_screen_create(struct radeon_winsys *rws)
 718 {
 719     struct r300_screen *r300screen = CALLOC_STRUCT(r300_screen);
 720
 721     if (!r300screen) {
 722         FREE(r300screen);
 723         return NULL;
 724     }
 725
 726     rws->query_info(rws, &r300screen->info);
 727
 728     r300_init_debug(r300screen);
 729     r300_parse_chipset(r300screen->info.pci_id, &r300screen->caps);
 730
 731     if (SCREEN_DBG_ON(r300screen, DBG_NO_ZMASK))
 732         r300screen->caps.zmask_ram = 0;
 733     if (SCREEN_DBG_ON(r300screen, DBG_NO_HIZ))
 734         r300screen->caps.hiz_ram = 0;
 735
 736     r300screen->rws = rws;
 737     r300screen->screen.destroy = r300_destroy_screen;
 738     r300screen->screen.get_name = r300_get_name;
 739     r300screen->screen.get_vendor = r300_get_vendor;
 740     r300screen->screen.get_device_vendor = r300_get_device_vendor;
 741     r300screen->screen.get_param = r300_get_param;
 742     r300screen->screen.get_shader_param = r300_get_shader_param;
 743     r300screen->screen.get_paramf = r300_get_paramf;
 744     r300screen->screen.get_video_param = r300_get_video_param;
 745     r300screen->screen.is_format_supported = r300_is_format_supported;
 746     r300screen->screen.is_video_format_supported = vl_video_buffer_is_format_supported;
 747     r300screen->screen.context_create = r300_create_context;
 748     r300screen->screen.fence_reference = r300_fence_reference;
 749     r300screen->screen.fence_finish = r300_fence_finish;
 750
 751     r300_init_screen_resource_functions(r300screen);
 752
 753     slab_create_parent(&r300screen->pool_transfers, sizeof(struct pipe_transfer), 64);
 754
 755     util_format_s3tc_init();
 756     (void) mtx_init(&r300screen->cmask_mutex, mtx_plain);
 757
 758     return &r300screen->screen;
 759 }