src/gallium/drivers/r300/r300_screen.c

   1 /*
   2  * Copyright 2008 Corbin Simpson <MostAwesomeDude@gmail.com>
   3  * Copyright 2010 Marek Olšák <maraeo@gmail.com>
   4  *
   5  * Permission is hereby granted, free of charge, to any person obtaining a
   6  * copy of this software and associated documentation files (the "Software"),
   7  * to deal in the Software without restriction, including without limitation
   8  * on the rights to use, copy, modify, merge, publish, distribute, sub
   9  * license, and/or sell copies of the Software, and to permit persons to whom
  10  * the Software is furnished to do so, subject to the following conditions:
  11  *
  12  * The above copyright notice and this permission notice (including the next
  13  * paragraph) shall be included in all copies or substantial portions of the
  14  * Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  19  * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
  20  * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
  21  * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
  22  * USE OR OTHER DEALINGS IN THE SOFTWARE. */
  23
  24 #include "util/u_format.h"
  25 #include "util/u_format_s3tc.h"
  26 #include "util/u_memory.h"
  27 #include "util/os_time.h"
  28 #include "vl/vl_decoder.h"
  29 #include "vl/vl_video_buffer.h"
  30
  31 #include "r300_context.h"
  32 #include "r300_texture.h"
  33 #include "r300_screen_buffer.h"
  34 #include "r300_state_inlines.h"
  35 #include "r300_public.h"
  36
  37 #include "draw/draw_context.h"
  38
  39 /* Return the identifier behind whom the brave coders responsible for this
  40  * amalgamation of code, sweat, and duct tape, routinely obscure their names.
  41  *
  42  * ...I should have just put "Corbin Simpson", but I'm not that cool.
  43  *
  44  * (Or egotistical. Yet.) */
  45 static const char* r300_get_vendor(struct pipe_screen* pscreen)
  46 {
  47     return "X.Org R300 Project";
  48 }
  49
  50 static const char* r300_get_device_vendor(struct pipe_screen* pscreen)
  51 {
  52     return "ATI";
  53 }
  54
  55 static const char* chip_families[] = {
  56     "unknown",
  57     "ATI R300",
  58     "ATI R350",
  59     "ATI RV350",
  60     "ATI RV370",
  61     "ATI RV380",
  62     "ATI RS400",
  63     "ATI RC410",
  64     "ATI RS480",
  65     "ATI R420",
  66     "ATI R423",
  67     "ATI R430",
  68     "ATI R480",
  69     "ATI R481",
  70     "ATI RV410",
  71     "ATI RS600",
  72     "ATI RS690",
  73     "ATI RS740",
  74     "ATI RV515",
  75     "ATI R520",
  76     "ATI RV530",
  77     "ATI R580",
  78     "ATI RV560",
  79     "ATI RV570"
  80 };
  81
  82 static const char* r300_get_name(struct pipe_screen* pscreen)
  83 {
  84     struct r300_screen* r300screen = r300_screen(pscreen);
  85
  86     return chip_families[r300screen->caps.family];
  87 }
  88
  89 static int r300_get_param(struct pipe_screen* pscreen, enum pipe_cap param)
  90 {
  91     struct r300_screen* r300screen = r300_screen(pscreen);
  92     boolean is_r500 = r300screen->caps.is_r500;
  93
  94     switch (param) {
  95         /* Supported features (boolean caps). */
  96         case PIPE_CAP_NPOT_TEXTURES:
  97         case PIPE_CAP_MIXED_FRAMEBUFFER_SIZES:
  98         case PIPE_CAP_MIXED_COLOR_DEPTH_BITS:
  99         case PIPE_CAP_ANISOTROPIC_FILTER:
 100         case PIPE_CAP_POINT_SPRITE:
 101         case PIPE_CAP_OCCLUSION_QUERY:
 102         case PIPE_CAP_TEXTURE_MIRROR_CLAMP:
 103         case PIPE_CAP_BLEND_EQUATION_SEPARATE:
 104         case PIPE_CAP_VERTEX_ELEMENT_INSTANCE_DIVISOR:
 105         case PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT:
 106         case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER:
 107         case PIPE_CAP_CONDITIONAL_RENDER:
 108         case PIPE_CAP_TEXTURE_BARRIER:
 109         case PIPE_CAP_TGSI_CAN_COMPACT_CONSTANTS:
 110         case PIPE_CAP_PREFER_BLIT_BASED_TEXTURE_TRANSFER:
 111         case PIPE_CAP_BUFFER_MAP_PERSISTENT_COHERENT:
 112         case PIPE_CAP_CLIP_HALFZ:
 113         case PIPE_CAP_ALLOW_MAPPED_BUFFERS_DURING_EXECUTION:
 114             return 1;
 115
 116         case PIPE_CAP_MIN_MAP_BUFFER_ALIGNMENT:
 117             return R300_BUFFER_ALIGNMENT;
 118
 119         case PIPE_CAP_CONSTANT_BUFFER_OFFSET_ALIGNMENT:
 120             return 16;
 121
 122         case PIPE_CAP_GLSL_FEATURE_LEVEL:
 123         case PIPE_CAP_GLSL_FEATURE_LEVEL_COMPATIBILITY:
 124             return 120;
 125
 126         /* r300 cannot do swizzling of compressed textures. Supported otherwise. */
 127         case PIPE_CAP_TEXTURE_SWIZZLE:
 128             return r300screen->caps.dxtc_swizzle;
 129
 130         /* We don't support color clamping on r500, so that we can use color
 131          * intepolators for generic varyings. */
 132         case PIPE_CAP_VERTEX_COLOR_CLAMPED:
 133             return !is_r500;
 134
 135         /* Supported on r500 only. */
 136         case PIPE_CAP_VERTEX_COLOR_UNCLAMPED:
 137         case PIPE_CAP_MIXED_COLORBUFFER_FORMATS:
 138         case PIPE_CAP_SM3:
 139             return is_r500 ? 1 : 0;
 140
 141         /* Unsupported features. */
 142         case PIPE_CAP_QUERY_TIME_ELAPSED:
 143         case PIPE_CAP_QUERY_PIPELINE_STATISTICS:
 144         case PIPE_CAP_MAX_DUAL_SOURCE_RENDER_TARGETS:
 145         case PIPE_CAP_INDEP_BLEND_ENABLE:
 146         case PIPE_CAP_INDEP_BLEND_FUNC:
 147         case PIPE_CAP_DEPTH_CLIP_DISABLE:
 148         case PIPE_CAP_SHADER_STENCIL_EXPORT:
 149         case PIPE_CAP_MAX_TEXTURE_ARRAY_LAYERS:
 150         case PIPE_CAP_TGSI_INSTANCEID:
 151         case PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT:
 152         case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER:
 153         case PIPE_CAP_SEAMLESS_CUBE_MAP:
 154         case PIPE_CAP_SEAMLESS_CUBE_MAP_PER_TEXTURE:
 155         case PIPE_CAP_MIN_TEXEL_OFFSET:
 156         case PIPE_CAP_MAX_TEXEL_OFFSET:
 157         case PIPE_CAP_MIN_TEXTURE_GATHER_OFFSET:
 158         case PIPE_CAP_MAX_TEXTURE_GATHER_OFFSET:
 159         case PIPE_CAP_MAX_STREAM_OUTPUT_BUFFERS:
 160         case PIPE_CAP_MAX_STREAM_OUTPUT_SEPARATE_COMPONENTS:
 161         case PIPE_CAP_MAX_STREAM_OUTPUT_INTERLEAVED_COMPONENTS:
 162         case PIPE_CAP_MAX_GEOMETRY_OUTPUT_VERTICES:
 163         case PIPE_CAP_MAX_GEOMETRY_TOTAL_OUTPUT_COMPONENTS:
 164         case PIPE_CAP_MAX_VERTEX_STREAMS:
 165         case PIPE_CAP_STREAM_OUTPUT_PAUSE_RESUME:
 166         case PIPE_CAP_STREAM_OUTPUT_INTERLEAVE_BUFFERS:
 167         case PIPE_CAP_FRAGMENT_COLOR_CLAMPED:
 168         case PIPE_CAP_QUADS_FOLLOW_PROVOKING_VERTEX_CONVENTION:
 169         case PIPE_CAP_COMPUTE:
 170         case PIPE_CAP_START_INSTANCE:
 171         case PIPE_CAP_QUERY_TIMESTAMP:
 172         case PIPE_CAP_TEXTURE_MULTISAMPLE:
 173         case PIPE_CAP_CUBE_MAP_ARRAY:
 174         case PIPE_CAP_TEXTURE_BUFFER_OBJECTS:
 175         case PIPE_CAP_TEXTURE_BUFFER_OFFSET_ALIGNMENT:
 176         case PIPE_CAP_TEXTURE_BORDER_COLOR_QUIRK:
 177         case PIPE_CAP_MAX_TEXTURE_BUFFER_SIZE:
 178         case PIPE_CAP_TGSI_VS_LAYER_VIEWPORT:
 179         case PIPE_CAP_MAX_TEXTURE_GATHER_COMPONENTS:
 180         case PIPE_CAP_TEXTURE_GATHER_SM5:
 181         case PIPE_CAP_TEXTURE_QUERY_LOD:
 182         case PIPE_CAP_FAKE_SW_MSAA:
 183         case PIPE_CAP_SAMPLE_SHADING:
 184         case PIPE_CAP_TEXTURE_GATHER_OFFSETS:
 185         case PIPE_CAP_DRAW_INDIRECT:
 186         case PIPE_CAP_MULTI_DRAW_INDIRECT:
 187         case PIPE_CAP_MULTI_DRAW_INDIRECT_PARAMS:
 188         case PIPE_CAP_TGSI_FS_FINE_DERIVATIVE:
 189         case PIPE_CAP_CONDITIONAL_RENDER_INVERTED:
 190         case PIPE_CAP_SAMPLER_VIEW_TARGET:
 191         case PIPE_CAP_VERTEXID_NOBASE:
 192         case PIPE_CAP_POLYGON_OFFSET_CLAMP:
 193         case PIPE_CAP_MULTISAMPLE_Z_RESOLVE:
 194         case PIPE_CAP_RESOURCE_FROM_USER_MEMORY:
 195         case PIPE_CAP_DEVICE_RESET_STATUS_QUERY:
 196         case PIPE_CAP_MAX_SHADER_PATCH_VARYINGS:
 197         case PIPE_CAP_TEXTURE_FLOAT_LINEAR:
 198         case PIPE_CAP_TEXTURE_HALF_FLOAT_LINEAR:
 199         case PIPE_CAP_DEPTH_BOUNDS_TEST:
 200         case PIPE_CAP_TGSI_TXQS:
 201         case PIPE_CAP_FORCE_PERSAMPLE_INTERP:
 202         case PIPE_CAP_SHAREABLE_SHADERS:
 203         case PIPE_CAP_COPY_BETWEEN_COMPRESSED_AND_PLAIN_FORMATS:
 204         case PIPE_CAP_CLEAR_TEXTURE:
 205         case PIPE_CAP_DRAW_PARAMETERS:
 206         case PIPE_CAP_TGSI_PACK_HALF_FLOAT:
 207         case PIPE_CAP_TGSI_FS_POSITION_IS_SYSVAL:
 208         case PIPE_CAP_TGSI_FS_FACE_IS_INTEGER_SYSVAL:
 209         case PIPE_CAP_SHADER_BUFFER_OFFSET_ALIGNMENT:
 210         case PIPE_CAP_INVALIDATE_BUFFER:
 211         case PIPE_CAP_GENERATE_MIPMAP:
 212         case PIPE_CAP_STRING_MARKER:
 213         case PIPE_CAP_BUFFER_SAMPLER_VIEW_RGBA_ONLY:
 214         case PIPE_CAP_SURFACE_REINTERPRET_BLOCKS:
 215         case PIPE_CAP_QUERY_BUFFER_OBJECT:
 216         case PIPE_CAP_QUERY_MEMORY_INFO:
 217         case PIPE_CAP_FRAMEBUFFER_NO_ATTACHMENT:
 218         case PIPE_CAP_ROBUST_BUFFER_ACCESS_BEHAVIOR:
 219         case PIPE_CAP_CULL_DISTANCE:
 220         case PIPE_CAP_PRIMITIVE_RESTART_FOR_PATCHES:
 221         case PIPE_CAP_TGSI_VOTE:
 222         case PIPE_CAP_MAX_WINDOW_RECTANGLES:
 223         case PIPE_CAP_POLYGON_OFFSET_UNITS_UNSCALED:
 224         case PIPE_CAP_VIEWPORT_SUBPIXEL_BITS:
 225         case PIPE_CAP_TGSI_ARRAY_COMPONENTS:
 226         case PIPE_CAP_TGSI_CAN_READ_OUTPUTS:
 227         case PIPE_CAP_NATIVE_FENCE_FD:
 228         case PIPE_CAP_GLSL_OPTIMIZE_CONSERVATIVELY:
 229         case PIPE_CAP_TGSI_FS_FBFETCH:
 230         case PIPE_CAP_TGSI_MUL_ZERO_WINS:
 231         case PIPE_CAP_DOUBLES:
 232         case PIPE_CAP_INT64:
 233         case PIPE_CAP_INT64_DIVMOD:
 234         case PIPE_CAP_TGSI_TEX_TXF_LZ:
 235         case PIPE_CAP_TGSI_CLOCK:
 236         case PIPE_CAP_POLYGON_MODE_FILL_RECTANGLE:
 237         case PIPE_CAP_SPARSE_BUFFER_PAGE_SIZE:
 238         case PIPE_CAP_TGSI_BALLOT:
 239         case PIPE_CAP_TGSI_TES_LAYER_VIEWPORT:
 240         case PIPE_CAP_CAN_BIND_CONST_BUFFER_AS_VERTEX:
 241         case PIPE_CAP_POST_DEPTH_COVERAGE:
 242         case PIPE_CAP_BINDLESS_TEXTURE:
 243         case PIPE_CAP_NIR_SAMPLERS_AS_DEREF:
 244         case PIPE_CAP_QUERY_SO_OVERFLOW:
 245         case PIPE_CAP_MEMOBJ:
 246         case PIPE_CAP_LOAD_CONSTBUF:
 247         case PIPE_CAP_TGSI_ANY_REG_AS_ADDRESS:
 248         case PIPE_CAP_TILE_RASTER_ORDER:
 249         case PIPE_CAP_MAX_COMBINED_SHADER_OUTPUT_RESOURCES:
 250         case PIPE_CAP_SIGNED_VERTEX_BUFFER_OFFSET:
 251         case PIPE_CAP_CONTEXT_PRIORITY_MASK:
 252         case PIPE_CAP_FENCE_SIGNAL:
 253         case PIPE_CAP_CONSTBUF0_FLAGS:
 254         case PIPE_CAP_PACKED_UNIFORMS:
 255         case PIPE_CAP_CONSERVATIVE_RASTER_POST_SNAP_TRIANGLES:
 256         case PIPE_CAP_CONSERVATIVE_RASTER_POST_SNAP_POINTS_LINES:
 257         case PIPE_CAP_CONSERVATIVE_RASTER_PRE_SNAP_TRIANGLES:
 258         case PIPE_CAP_CONSERVATIVE_RASTER_PRE_SNAP_POINTS_LINES:
 259         case PIPE_CAP_CONSERVATIVE_RASTER_POST_DEPTH_COVERAGE:
 260         case PIPE_CAP_MAX_CONSERVATIVE_RASTER_SUBPIXEL_PRECISION_BIAS:
 261             return 0;
 262
 263         /* SWTCL-only features. */
 264         case PIPE_CAP_PRIMITIVE_RESTART:
 265         case PIPE_CAP_USER_VERTEX_BUFFERS:
 266         case PIPE_CAP_TGSI_VS_WINDOW_SPACE_POSITION:
 267             return !r300screen->caps.has_tcl;
 268
 269         /* HWTCL-only features / limitations. */
 270         case PIPE_CAP_VERTEX_BUFFER_OFFSET_4BYTE_ALIGNED_ONLY:
 271         case PIPE_CAP_VERTEX_BUFFER_STRIDE_4BYTE_ALIGNED_ONLY:
 272         case PIPE_CAP_VERTEX_ELEMENT_SRC_OFFSET_4BYTE_ALIGNED_ONLY:
 273             return r300screen->caps.has_tcl;
 274         case PIPE_CAP_TGSI_TEXCOORD:
 275             return 0;
 276
 277         /* Texturing. */
 278         case PIPE_CAP_MAX_TEXTURE_2D_LEVELS:
 279         case PIPE_CAP_MAX_TEXTURE_3D_LEVELS:
 280         case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS:
 281             /* 13 == 4096, 12 == 2048 */
 282             return is_r500 ? 13 : 12;
 283
 284         /* Render targets. */
 285         case PIPE_CAP_MAX_RENDER_TARGETS:
 286             return 4;
 287         case PIPE_CAP_ENDIANNESS:
 288             return PIPE_ENDIAN_LITTLE;
 289
 290         case PIPE_CAP_MAX_VIEWPORTS:
 291             return 1;
 292
 293         case PIPE_CAP_MAX_VERTEX_ATTRIB_STRIDE:
 294             return 2048;
 295
 296         case PIPE_CAP_VENDOR_ID:
 297                 return 0x1002;
 298         case PIPE_CAP_DEVICE_ID:
 299                 return r300screen->info.pci_id;
 300         case PIPE_CAP_ACCELERATED:
 301                 return 1;
 302         case PIPE_CAP_VIDEO_MEMORY:
 303                 return r300screen->info.vram_size >> 20;
 304         case PIPE_CAP_UMA:
 305                 return 0;
 306         case PIPE_CAP_PCI_GROUP:
 307             return r300screen->info.pci_domain;
 308         case PIPE_CAP_PCI_BUS:
 309             return r300screen->info.pci_bus;
 310         case PIPE_CAP_PCI_DEVICE:
 311             return r300screen->info.pci_dev;
 312         case PIPE_CAP_PCI_FUNCTION:
 313             return r300screen->info.pci_func;
 314     }
 315     return 0;
 316 }
 317
 318 static int r300_get_shader_param(struct pipe_screen *pscreen,
 319                                  enum pipe_shader_type shader,
 320                                  enum pipe_shader_cap param)
 321 {
 322    struct r300_screen* r300screen = r300_screen(pscreen);
 323    boolean is_r400 = r300screen->caps.is_r400;
 324    boolean is_r500 = r300screen->caps.is_r500;
 325
 326    switch (shader) {
 327     case PIPE_SHADER_FRAGMENT:
 328         switch (param)
 329         {
 330         case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
 331             return is_r500 || is_r400 ? 512 : 96;
 332         case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
 333             return is_r500 || is_r400 ? 512 : 64;
 334         case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
 335             return is_r500 || is_r400 ? 512 : 32;
 336         case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
 337             return is_r500 ? 511 : 4;
 338         case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:
 339             return is_r500 ? 64 : 0; /* Actually unlimited on r500. */
 340             /* Fragment shader limits. */
 341         case PIPE_SHADER_CAP_MAX_INPUTS:
 342             /* 2 colors + 8 texcoords are always supported
 343              * (minus fog and wpos).
 344              *
 345              * R500 has the ability to turn 3rd and 4th color into
 346              * additional texcoords but there is no two-sided color
 347              * selection then. However the facing bit can be used instead. */
 348             return 10;
 349         case PIPE_SHADER_CAP_MAX_OUTPUTS:
 350             return 4;
 351         case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE:
 352             return (is_r500 ? 256 : 32) * sizeof(float[4]);
 353         case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
 354         case PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE:
 355             return 1;
 356         case PIPE_SHADER_CAP_MAX_TEMPS:
 357             return is_r500 ? 128 : is_r400 ? 64 : 32;
 358         case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
 359         case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS:
 360            return r300screen->caps.num_tex_units;
 361         case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
 362         case PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED:
 363         case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
 364         case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
 365         case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
 366         case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
 367         case PIPE_SHADER_CAP_SUBROUTINES:
 368         case PIPE_SHADER_CAP_INTEGERS:
 369         case PIPE_SHADER_CAP_INT64_ATOMICS:
 370         case PIPE_SHADER_CAP_FP16:
 371         case PIPE_SHADER_CAP_TGSI_DROUND_SUPPORTED:
 372         case PIPE_SHADER_CAP_TGSI_DFRACEXP_DLDEXP_SUPPORTED:
 373         case PIPE_SHADER_CAP_TGSI_LDEXP_SUPPORTED:
 374         case PIPE_SHADER_CAP_TGSI_FMA_SUPPORTED:
 375         case PIPE_SHADER_CAP_MAX_SHADER_BUFFERS:
 376         case PIPE_SHADER_CAP_MAX_SHADER_IMAGES:
 377         case PIPE_SHADER_CAP_LOWER_IF_THRESHOLD:
 378         case PIPE_SHADER_CAP_TGSI_SKIP_MERGE_REGISTERS:
 379         case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTERS:
 380         case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTER_BUFFERS:
 381             return 0;
 382         case PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT:
 383             return 32;
 384         case PIPE_SHADER_CAP_PREFERRED_IR:
 385             return PIPE_SHADER_IR_TGSI;
 386         case PIPE_SHADER_CAP_SUPPORTED_IRS:
 387             return 0;
 388         }
 389         break;
 390     case PIPE_SHADER_VERTEX:
 391         switch (param)
 392         {
 393         case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
 394         case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS:
 395         case PIPE_SHADER_CAP_SUBROUTINES:
 396             return 0;
 397         default:;
 398         }
 399
 400         if (!r300screen->caps.has_tcl) {
 401             return draw_get_shader_param(shader, param);
 402         }
 403
 404         switch (param)
 405         {
 406         case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
 407         case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
 408             return is_r500 ? 1024 : 256;
 409         case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:
 410             return is_r500 ? 4 : 0; /* For loops; not sure about conditionals. */
 411         case PIPE_SHADER_CAP_MAX_INPUTS:
 412             return 16;
 413         case PIPE_SHADER_CAP_MAX_OUTPUTS:
 414             return 10;
 415         case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE:
 416             return 256 * sizeof(float[4]);
 417         case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
 418             return 1;
 419         case PIPE_SHADER_CAP_MAX_TEMPS:
 420             return 32;
 421         case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
 422         case PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE:
 423             return 1;
 424         case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
 425         case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
 426         case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
 427         case PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED:
 428         case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
 429         case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
 430         case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
 431         case PIPE_SHADER_CAP_SUBROUTINES:
 432         case PIPE_SHADER_CAP_INTEGERS:
 433         case PIPE_SHADER_CAP_FP16:
 434         case PIPE_SHADER_CAP_INT64_ATOMICS:
 435         case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
 436         case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS:
 437         case PIPE_SHADER_CAP_TGSI_DROUND_SUPPORTED:
 438         case PIPE_SHADER_CAP_TGSI_DFRACEXP_DLDEXP_SUPPORTED:
 439         case PIPE_SHADER_CAP_TGSI_LDEXP_SUPPORTED:
 440         case PIPE_SHADER_CAP_TGSI_FMA_SUPPORTED:
 441         case PIPE_SHADER_CAP_MAX_SHADER_BUFFERS:
 442         case PIPE_SHADER_CAP_MAX_SHADER_IMAGES:
 443         case PIPE_SHADER_CAP_LOWER_IF_THRESHOLD:
 444         case PIPE_SHADER_CAP_TGSI_SKIP_MERGE_REGISTERS:
 445         case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTERS:
 446         case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTER_BUFFERS:
 447             return 0;
 448         case PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT:
 449             return 32;
 450         case PIPE_SHADER_CAP_PREFERRED_IR:
 451             return PIPE_SHADER_IR_TGSI;
 452         case PIPE_SHADER_CAP_SUPPORTED_IRS:
 453             return 0;
 454         }
 455         break;
 456     default:
 457         ; /* nothing */
 458     }
 459     return 0;
 460 }
 461
 462 static float r300_get_paramf(struct pipe_screen* pscreen,
 463                              enum pipe_capf param)
 464 {
 465     struct r300_screen* r300screen = r300_screen(pscreen);
 466
 467     switch (param) {
 468         case PIPE_CAPF_MAX_LINE_WIDTH:
 469         case PIPE_CAPF_MAX_LINE_WIDTH_AA:
 470         case PIPE_CAPF_MAX_POINT_WIDTH:
 471         case PIPE_CAPF_MAX_POINT_WIDTH_AA:
 472             /* The maximum dimensions of the colorbuffer are our practical
 473              * rendering limits. 2048 pixels should be enough for anybody. */
 474             if (r300screen->caps.is_r500) {
 475                 return 4096.0f;
 476             } else if (r300screen->caps.is_r400) {
 477                 return 4021.0f;
 478             } else {
 479                 return 2560.0f;
 480             }
 481         case PIPE_CAPF_MAX_TEXTURE_ANISOTROPY:
 482             return 16.0f;
 483         case PIPE_CAPF_MAX_TEXTURE_LOD_BIAS:
 484             return 16.0f;
 485         case PIPE_CAPF_MIN_CONSERVATIVE_RASTER_DILATE:
 486         case PIPE_CAPF_MAX_CONSERVATIVE_RASTER_DILATE:
 487         case PIPE_CAPF_CONSERVATIVE_RASTER_DILATE_GRANULARITY:
 488             return 0.0f;
 489         default:
 490             debug_printf("r300: Warning: Unknown CAP %d in get_paramf.\n",
 491                          param);
 492             return 0.0f;
 493     }
 494 }
 495
 496 static int r300_get_video_param(struct pipe_screen *screen,
 497                                 enum pipe_video_profile profile,
 498                                 enum pipe_video_entrypoint entrypoint,
 499                                 enum pipe_video_cap param)
 500 {
 501    switch (param) {
 502       case PIPE_VIDEO_CAP_SUPPORTED:
 503          return vl_profile_supported(screen, profile, entrypoint);
 504       case PIPE_VIDEO_CAP_NPOT_TEXTURES:
 505          return 0;
 506       case PIPE_VIDEO_CAP_MAX_WIDTH:
 507       case PIPE_VIDEO_CAP_MAX_HEIGHT:
 508          return vl_video_buffer_max_size(screen);
 509       case PIPE_VIDEO_CAP_PREFERED_FORMAT:
 510          return PIPE_FORMAT_NV12;
 511       case PIPE_VIDEO_CAP_PREFERS_INTERLACED:
 512          return false;
 513       case PIPE_VIDEO_CAP_SUPPORTS_INTERLACED:
 514          return false;
 515       case PIPE_VIDEO_CAP_SUPPORTS_PROGRESSIVE:
 516          return true;
 517       case PIPE_VIDEO_CAP_MAX_LEVEL:
 518          return vl_level_supported(screen, profile);
 519       default:
 520          return 0;
 521    }
 522 }
 523
 524 /**
 525  * Whether the format matches:
 526  *   PIPE_FORMAT_?10?10?10?2_UNORM
 527  */
 528 static inline boolean
 529 util_format_is_rgba1010102_variant(const struct util_format_description *desc)
 530 {
 531    static const unsigned size[4] = {10, 10, 10, 2};
 532    unsigned chan;
 533
 534    if (desc->block.width != 1 ||
 535        desc->block.height != 1 ||
 536        desc->block.bits != 32)
 537       return FALSE;
 538
 539    for (chan = 0; chan < 4; ++chan) {
 540       if(desc->channel[chan].type != UTIL_FORMAT_TYPE_UNSIGNED &&
 541          desc->channel[chan].type != UTIL_FORMAT_TYPE_VOID)
 542          return FALSE;
 543       if (desc->channel[chan].size != size[chan])
 544          return FALSE;
 545    }
 546
 547    return TRUE;
 548 }
 549
 550 static bool r300_is_blending_supported(struct r300_screen *rscreen,
 551                                        enum pipe_format format)
 552 {
 553     int c;
 554     const struct util_format_description *desc =
 555         util_format_description(format);
 556
 557     if (desc->layout != UTIL_FORMAT_LAYOUT_PLAIN)
 558         return false;
 559
 560     c = util_format_get_first_non_void_channel(format);
 561
 562     /* RGBA16F */
 563     if (rscreen->caps.is_r500 &&
 564         desc->nr_channels == 4 &&
 565         desc->channel[c].size == 16 &&
 566         desc->channel[c].type == UTIL_FORMAT_TYPE_FLOAT)
 567         return true;
 568
 569     if (desc->channel[c].normalized &&
 570         desc->channel[c].type == UTIL_FORMAT_TYPE_UNSIGNED &&
 571         desc->channel[c].size >= 4 &&
 572         desc->channel[c].size <= 10) {
 573         /* RGB10_A2, RGBA8, RGB5_A1, RGBA4, RGB565 */
 574         if (desc->nr_channels >= 3)
 575             return true;
 576
 577         if (format == PIPE_FORMAT_R8G8_UNORM)
 578             return true;
 579
 580         /* R8, I8, L8, A8 */
 581         if (desc->nr_channels == 1)
 582             return true;
 583     }
 584
 585     return false;
 586 }
 587
 588 static boolean r300_is_format_supported(struct pipe_screen* screen,
 589                                         enum pipe_format format,
 590                                         enum pipe_texture_target target,
 591                                         unsigned sample_count,
 592                                         unsigned usage)
 593 {
 594     uint32_t retval = 0;
 595     boolean is_r500 = r300_screen(screen)->caps.is_r500;
 596     boolean is_r400 = r300_screen(screen)->caps.is_r400;
 597     boolean is_color2101010 = format == PIPE_FORMAT_R10G10B10A2_UNORM ||
 598                               format == PIPE_FORMAT_R10G10B10X2_SNORM ||
 599                               format == PIPE_FORMAT_B10G10R10A2_UNORM ||
 600                               format == PIPE_FORMAT_B10G10R10X2_UNORM ||
 601                               format == PIPE_FORMAT_R10SG10SB10SA2U_NORM;
 602     boolean is_ati1n = format == PIPE_FORMAT_RGTC1_UNORM ||
 603                        format == PIPE_FORMAT_RGTC1_SNORM ||
 604                        format == PIPE_FORMAT_LATC1_UNORM ||
 605                        format == PIPE_FORMAT_LATC1_SNORM;
 606     boolean is_ati2n = format == PIPE_FORMAT_RGTC2_UNORM ||
 607                        format == PIPE_FORMAT_RGTC2_SNORM ||
 608                        format == PIPE_FORMAT_LATC2_UNORM ||
 609                        format == PIPE_FORMAT_LATC2_SNORM;
 610     boolean is_half_float = format == PIPE_FORMAT_R16_FLOAT ||
 611                             format == PIPE_FORMAT_R16G16_FLOAT ||
 612                             format == PIPE_FORMAT_R16G16B16_FLOAT ||
 613                             format == PIPE_FORMAT_R16G16B16A16_FLOAT ||
 614                             format == PIPE_FORMAT_R16G16B16X16_FLOAT;
 615     const struct util_format_description *desc;
 616
 617     if (!util_format_is_supported(format, usage))
 618        return FALSE;
 619
 620     /* Check multisampling support. */
 621     switch (sample_count) {
 622         case 0:
 623         case 1:
 624             break;
 625         case 2:
 626         case 4:
 627         case 6:
 628             /* No texturing and scanout. */
 629             if (usage & (PIPE_BIND_SAMPLER_VIEW |
 630                          PIPE_BIND_DISPLAY_TARGET |
 631                          PIPE_BIND_SCANOUT)) {
 632                 return FALSE;
 633             }
 634
 635             desc = util_format_description(format);
 636
 637             if (is_r500) {
 638                 /* Only allow depth/stencil, RGBA8, RGBA1010102, RGBA16F. */
 639                 if (!util_format_is_depth_or_stencil(format) &&
 640                     !util_format_is_rgba8_variant(desc) &&
 641                     !util_format_is_rgba1010102_variant(desc) &&
 642                     format != PIPE_FORMAT_R16G16B16A16_FLOAT &&
 643                     format != PIPE_FORMAT_R16G16B16X16_FLOAT) {
 644                     return FALSE;
 645                 }
 646             } else {
 647                 /* Only allow depth/stencil, RGBA8. */
 648                 if (!util_format_is_depth_or_stencil(format) &&
 649                     !util_format_is_rgba8_variant(desc)) {
 650                     return FALSE;
 651                 }
 652             }
 653             break;
 654         default:
 655             return FALSE;
 656     }
 657
 658     /* Check sampler format support. */
 659     if ((usage & PIPE_BIND_SAMPLER_VIEW) &&
 660         /* these two are broken for an unknown reason */
 661         format != PIPE_FORMAT_R8G8B8X8_SNORM &&
 662         format != PIPE_FORMAT_R16G16B16X16_SNORM &&
 663         /* ATI1N is r5xx-only. */
 664         (is_r500 || !is_ati1n) &&
 665         /* ATI2N is supported on r4xx-r5xx. */
 666         (is_r400 || is_r500 || !is_ati2n) &&
 667         r300_is_sampler_format_supported(format)) {
 668         retval |= PIPE_BIND_SAMPLER_VIEW;
 669     }
 670
 671     /* Check colorbuffer format support. */
 672     if ((usage & (PIPE_BIND_RENDER_TARGET |
 673                   PIPE_BIND_DISPLAY_TARGET |
 674                   PIPE_BIND_SCANOUT |
 675                   PIPE_BIND_SHARED |
 676                   PIPE_BIND_BLENDABLE)) &&
 677         /* 2101010 cannot be rendered to on non-r5xx. */
 678         (!is_color2101010 || is_r500) &&
 679         r300_is_colorbuffer_format_supported(format)) {
 680         retval |= usage &
 681             (PIPE_BIND_RENDER_TARGET |
 682              PIPE_BIND_DISPLAY_TARGET |
 683              PIPE_BIND_SCANOUT |
 684              PIPE_BIND_SHARED);
 685
 686         if (r300_is_blending_supported(r300_screen(screen), format)) {
 687             retval |= usage & PIPE_BIND_BLENDABLE;
 688         }
 689     }
 690
 691     /* Check depth-stencil format support. */
 692     if (usage & PIPE_BIND_DEPTH_STENCIL &&
 693         r300_is_zs_format_supported(format)) {
 694         retval |= PIPE_BIND_DEPTH_STENCIL;
 695     }
 696
 697     /* Check vertex buffer format support. */
 698     if (usage & PIPE_BIND_VERTEX_BUFFER) {
 699         if (r300_screen(screen)->caps.has_tcl) {
 700             /* Half float is supported on >= R400. */
 701             if ((is_r400 || is_r500 || !is_half_float) &&
 702                 r300_translate_vertex_data_type(format) != R300_INVALID_FORMAT) {
 703                 retval |= PIPE_BIND_VERTEX_BUFFER;
 704             }
 705         } else {
 706             /* SW TCL */
 707             if (!util_format_is_pure_integer(format)) {
 708                 retval |= PIPE_BIND_VERTEX_BUFFER;
 709             }
 710         }
 711     }
 712
 713     return retval == usage;
 714 }
 715
 716 static void r300_destroy_screen(struct pipe_screen* pscreen)
 717 {
 718     struct r300_screen* r300screen = r300_screen(pscreen);
 719     struct radeon_winsys *rws = radeon_winsys(pscreen);
 720
 721     if (rws && !rws->unref(rws))
 722       return;
 723
 724     mtx_destroy(&r300screen->cmask_mutex);
 725     slab_destroy_parent(&r300screen->pool_transfers);
 726
 727     if (rws)
 728       rws->destroy(rws);
 729
 730     FREE(r300screen);
 731 }
 732
 733 static void r300_fence_reference(struct pipe_screen *screen,
 734                                  struct pipe_fence_handle **ptr,
 735                                  struct pipe_fence_handle *fence)
 736 {
 737     struct radeon_winsys *rws = r300_screen(screen)->rws;
 738
 739     rws->fence_reference(ptr, fence);
 740 }
 741
 742 static boolean r300_fence_finish(struct pipe_screen *screen,
 743                                  struct pipe_context *ctx,
 744                                  struct pipe_fence_handle *fence,
 745                                  uint64_t timeout)
 746 {
 747     struct radeon_winsys *rws = r300_screen(screen)->rws;
 748
 749     return rws->fence_wait(rws, fence, timeout);
 750 }
 751
 752 struct pipe_screen* r300_screen_create(struct radeon_winsys *rws,
 753                                        const struct pipe_screen_config *config)
 754 {
 755     struct r300_screen *r300screen = CALLOC_STRUCT(r300_screen);
 756
 757     if (!r300screen) {
 758         FREE(r300screen);
 759         return NULL;
 760     }
 761
 762     rws->query_info(rws, &r300screen->info);
 763
 764     r300_init_debug(r300screen);
 765     r300_parse_chipset(r300screen->info.pci_id, &r300screen->caps);
 766
 767     if (SCREEN_DBG_ON(r300screen, DBG_NO_ZMASK))
 768         r300screen->caps.zmask_ram = 0;
 769     if (SCREEN_DBG_ON(r300screen, DBG_NO_HIZ))
 770         r300screen->caps.hiz_ram = 0;
 771
 772     r300screen->rws = rws;
 773     r300screen->screen.destroy = r300_destroy_screen;
 774     r300screen->screen.get_name = r300_get_name;
 775     r300screen->screen.get_vendor = r300_get_vendor;
 776     r300screen->screen.get_device_vendor = r300_get_device_vendor;
 777     r300screen->screen.get_param = r300_get_param;
 778     r300screen->screen.get_shader_param = r300_get_shader_param;
 779     r300screen->screen.get_paramf = r300_get_paramf;
 780     r300screen->screen.get_video_param = r300_get_video_param;
 781     r300screen->screen.is_format_supported = r300_is_format_supported;
 782     r300screen->screen.is_video_format_supported = vl_video_buffer_is_format_supported;
 783     r300screen->screen.context_create = r300_create_context;
 784     r300screen->screen.fence_reference = r300_fence_reference;
 785     r300screen->screen.fence_finish = r300_fence_finish;
 786
 787     r300_init_screen_resource_functions(r300screen);
 788
 789     slab_create_parent(&r300screen->pool_transfers, sizeof(struct pipe_transfer), 64);
 790
 791     (void) mtx_init(&r300screen->cmask_mutex, mtx_plain);
 792
 793     return &r300screen->screen;
 794 }