radeon/vce: disable VCE dual instance for harvest part
[mesa.git] / src / gallium / drivers / r300 / r300_screen.c
1 /*
2 * Copyright 2008 Corbin Simpson <MostAwesomeDude@gmail.com>
3 * Copyright 2010 Marek Olšák <maraeo@gmail.com>
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * on the rights to use, copy, modify, merge, publish, distribute, sub
9 * license, and/or sell copies of the Software, and to permit persons to whom
10 * the Software is furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
14 * Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
20 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
21 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
22 * USE OR OTHER DEALINGS IN THE SOFTWARE. */
23
24 #include "util/u_format.h"
25 #include "util/u_format_s3tc.h"
26 #include "util/u_memory.h"
27 #include "os/os_time.h"
28 #include "vl/vl_decoder.h"
29 #include "vl/vl_video_buffer.h"
30
31 #include "r300_context.h"
32 #include "r300_texture.h"
33 #include "r300_screen_buffer.h"
34 #include "r300_state_inlines.h"
35 #include "r300_public.h"
36
37 #include "draw/draw_context.h"
38
39 /* Return the identifier behind whom the brave coders responsible for this
40 * amalgamation of code, sweat, and duct tape, routinely obscure their names.
41 *
42 * ...I should have just put "Corbin Simpson", but I'm not that cool.
43 *
44 * (Or egotistical. Yet.) */
45 static const char* r300_get_vendor(struct pipe_screen* pscreen)
46 {
47 return "X.Org R300 Project";
48 }
49
50 static const char* r300_get_device_vendor(struct pipe_screen* pscreen)
51 {
52 return "ATI";
53 }
54
55 static const char* chip_families[] = {
56 "unknown",
57 "ATI R300",
58 "ATI R350",
59 "ATI RV350",
60 "ATI RV370",
61 "ATI RV380",
62 "ATI RS400",
63 "ATI RC410",
64 "ATI RS480",
65 "ATI R420",
66 "ATI R423",
67 "ATI R430",
68 "ATI R480",
69 "ATI R481",
70 "ATI RV410",
71 "ATI RS600",
72 "ATI RS690",
73 "ATI RS740",
74 "ATI RV515",
75 "ATI R520",
76 "ATI RV530",
77 "ATI R580",
78 "ATI RV560",
79 "ATI RV570"
80 };
81
82 static const char* r300_get_name(struct pipe_screen* pscreen)
83 {
84 struct r300_screen* r300screen = r300_screen(pscreen);
85
86 return chip_families[r300screen->caps.family];
87 }
88
89 static int r300_get_param(struct pipe_screen* pscreen, enum pipe_cap param)
90 {
91 struct r300_screen* r300screen = r300_screen(pscreen);
92 boolean is_r500 = r300screen->caps.is_r500;
93
94 switch (param) {
95 /* Supported features (boolean caps). */
96 case PIPE_CAP_NPOT_TEXTURES:
97 case PIPE_CAP_MIXED_FRAMEBUFFER_SIZES:
98 case PIPE_CAP_TWO_SIDED_STENCIL:
99 case PIPE_CAP_ANISOTROPIC_FILTER:
100 case PIPE_CAP_POINT_SPRITE:
101 case PIPE_CAP_OCCLUSION_QUERY:
102 case PIPE_CAP_TEXTURE_SHADOW_MAP:
103 case PIPE_CAP_TEXTURE_MIRROR_CLAMP:
104 case PIPE_CAP_BLEND_EQUATION_SEPARATE:
105 case PIPE_CAP_VERTEX_ELEMENT_INSTANCE_DIVISOR:
106 case PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT:
107 case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER:
108 case PIPE_CAP_CONDITIONAL_RENDER:
109 case PIPE_CAP_TEXTURE_BARRIER:
110 case PIPE_CAP_TGSI_CAN_COMPACT_CONSTANTS:
111 case PIPE_CAP_USER_INDEX_BUFFERS:
112 case PIPE_CAP_USER_CONSTANT_BUFFERS:
113 case PIPE_CAP_PREFER_BLIT_BASED_TEXTURE_TRANSFER:
114 case PIPE_CAP_BUFFER_MAP_PERSISTENT_COHERENT:
115 case PIPE_CAP_CLIP_HALFZ:
116 return 1;
117
118 case PIPE_CAP_MIN_MAP_BUFFER_ALIGNMENT:
119 return R300_BUFFER_ALIGNMENT;
120
121 case PIPE_CAP_CONSTANT_BUFFER_OFFSET_ALIGNMENT:
122 return 16;
123
124 case PIPE_CAP_GLSL_FEATURE_LEVEL:
125 return 120;
126
127 /* r300 cannot do swizzling of compressed textures. Supported otherwise. */
128 case PIPE_CAP_TEXTURE_SWIZZLE:
129 return util_format_s3tc_enabled ? r300screen->caps.dxtc_swizzle : 1;
130
131 /* We don't support color clamping on r500, so that we can use color
132 * intepolators for generic varyings. */
133 case PIPE_CAP_VERTEX_COLOR_CLAMPED:
134 return !is_r500;
135
136 /* Supported on r500 only. */
137 case PIPE_CAP_VERTEX_COLOR_UNCLAMPED:
138 case PIPE_CAP_MIXED_COLORBUFFER_FORMATS:
139 case PIPE_CAP_SM3:
140 return is_r500 ? 1 : 0;
141
142 /* Unsupported features. */
143 case PIPE_CAP_QUERY_TIME_ELAPSED:
144 case PIPE_CAP_QUERY_PIPELINE_STATISTICS:
145 case PIPE_CAP_MAX_DUAL_SOURCE_RENDER_TARGETS:
146 case PIPE_CAP_INDEP_BLEND_ENABLE:
147 case PIPE_CAP_INDEP_BLEND_FUNC:
148 case PIPE_CAP_DEPTH_CLIP_DISABLE:
149 case PIPE_CAP_SHADER_STENCIL_EXPORT:
150 case PIPE_CAP_MAX_TEXTURE_ARRAY_LAYERS:
151 case PIPE_CAP_TGSI_INSTANCEID:
152 case PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT:
153 case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER:
154 case PIPE_CAP_SEAMLESS_CUBE_MAP:
155 case PIPE_CAP_SEAMLESS_CUBE_MAP_PER_TEXTURE:
156 case PIPE_CAP_MIN_TEXEL_OFFSET:
157 case PIPE_CAP_MAX_TEXEL_OFFSET:
158 case PIPE_CAP_MIN_TEXTURE_GATHER_OFFSET:
159 case PIPE_CAP_MAX_TEXTURE_GATHER_OFFSET:
160 case PIPE_CAP_MAX_STREAM_OUTPUT_BUFFERS:
161 case PIPE_CAP_MAX_STREAM_OUTPUT_SEPARATE_COMPONENTS:
162 case PIPE_CAP_MAX_STREAM_OUTPUT_INTERLEAVED_COMPONENTS:
163 case PIPE_CAP_MAX_GEOMETRY_OUTPUT_VERTICES:
164 case PIPE_CAP_MAX_GEOMETRY_TOTAL_OUTPUT_COMPONENTS:
165 case PIPE_CAP_MAX_VERTEX_STREAMS:
166 case PIPE_CAP_STREAM_OUTPUT_PAUSE_RESUME:
167 case PIPE_CAP_FRAGMENT_COLOR_CLAMPED:
168 case PIPE_CAP_QUADS_FOLLOW_PROVOKING_VERTEX_CONVENTION:
169 case PIPE_CAP_COMPUTE:
170 case PIPE_CAP_START_INSTANCE:
171 case PIPE_CAP_QUERY_TIMESTAMP:
172 case PIPE_CAP_TEXTURE_MULTISAMPLE:
173 case PIPE_CAP_CUBE_MAP_ARRAY:
174 case PIPE_CAP_TEXTURE_BUFFER_OBJECTS:
175 case PIPE_CAP_TEXTURE_BUFFER_OFFSET_ALIGNMENT:
176 case PIPE_CAP_TEXTURE_BORDER_COLOR_QUIRK:
177 case PIPE_CAP_MAX_TEXTURE_BUFFER_SIZE:
178 case PIPE_CAP_TGSI_VS_LAYER_VIEWPORT:
179 case PIPE_CAP_MAX_TEXTURE_GATHER_COMPONENTS:
180 case PIPE_CAP_TEXTURE_GATHER_SM5:
181 case PIPE_CAP_TEXTURE_QUERY_LOD:
182 case PIPE_CAP_FAKE_SW_MSAA:
183 case PIPE_CAP_SAMPLE_SHADING:
184 case PIPE_CAP_TEXTURE_GATHER_OFFSETS:
185 case PIPE_CAP_DRAW_INDIRECT:
186 case PIPE_CAP_TGSI_FS_FINE_DERIVATIVE:
187 case PIPE_CAP_CONDITIONAL_RENDER_INVERTED:
188 case PIPE_CAP_SAMPLER_VIEW_TARGET:
189 case PIPE_CAP_VERTEXID_NOBASE:
190 case PIPE_CAP_POLYGON_OFFSET_CLAMP:
191 case PIPE_CAP_MULTISAMPLE_Z_RESOLVE:
192 case PIPE_CAP_RESOURCE_FROM_USER_MEMORY:
193 case PIPE_CAP_DEVICE_RESET_STATUS_QUERY:
194 case PIPE_CAP_MAX_SHADER_PATCH_VARYINGS:
195 case PIPE_CAP_TEXTURE_FLOAT_LINEAR:
196 case PIPE_CAP_TEXTURE_HALF_FLOAT_LINEAR:
197 case PIPE_CAP_DEPTH_BOUNDS_TEST:
198 return 0;
199
200 /* SWTCL-only features. */
201 case PIPE_CAP_PRIMITIVE_RESTART:
202 case PIPE_CAP_USER_VERTEX_BUFFERS:
203 case PIPE_CAP_TGSI_VS_WINDOW_SPACE_POSITION:
204 return !r300screen->caps.has_tcl;
205
206 /* HWTCL-only features / limitations. */
207 case PIPE_CAP_VERTEX_BUFFER_OFFSET_4BYTE_ALIGNED_ONLY:
208 case PIPE_CAP_VERTEX_BUFFER_STRIDE_4BYTE_ALIGNED_ONLY:
209 case PIPE_CAP_VERTEX_ELEMENT_SRC_OFFSET_4BYTE_ALIGNED_ONLY:
210 return r300screen->caps.has_tcl;
211 case PIPE_CAP_TGSI_TEXCOORD:
212 return 0;
213
214 /* Texturing. */
215 case PIPE_CAP_MAX_TEXTURE_2D_LEVELS:
216 case PIPE_CAP_MAX_TEXTURE_3D_LEVELS:
217 case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS:
218 /* 13 == 4096, 12 == 2048 */
219 return is_r500 ? 13 : 12;
220
221 /* Render targets. */
222 case PIPE_CAP_MAX_RENDER_TARGETS:
223 return 4;
224 case PIPE_CAP_ENDIANNESS:
225 return PIPE_ENDIAN_LITTLE;
226
227 case PIPE_CAP_MAX_VIEWPORTS:
228 return 1;
229
230 case PIPE_CAP_MAX_VERTEX_ATTRIB_STRIDE:
231 return 2048;
232
233 case PIPE_CAP_VENDOR_ID:
234 return 0x1002;
235 case PIPE_CAP_DEVICE_ID:
236 return r300screen->info.pci_id;
237 case PIPE_CAP_ACCELERATED:
238 return 1;
239 case PIPE_CAP_VIDEO_MEMORY:
240 return r300screen->info.vram_size >> 20;
241 case PIPE_CAP_UMA:
242 return 0;
243 }
244 return 0;
245 }
246
247 static int r300_get_shader_param(struct pipe_screen *pscreen, unsigned shader, enum pipe_shader_cap param)
248 {
249 struct r300_screen* r300screen = r300_screen(pscreen);
250 boolean is_r400 = r300screen->caps.is_r400;
251 boolean is_r500 = r300screen->caps.is_r500;
252
253 switch (shader) {
254 case PIPE_SHADER_FRAGMENT:
255 switch (param)
256 {
257 case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
258 return is_r500 || is_r400 ? 512 : 96;
259 case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
260 return is_r500 || is_r400 ? 512 : 64;
261 case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
262 return is_r500 || is_r400 ? 512 : 32;
263 case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
264 return is_r500 ? 511 : 4;
265 case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:
266 return is_r500 ? 64 : 0; /* Actually unlimited on r500. */
267 /* Fragment shader limits. */
268 case PIPE_SHADER_CAP_MAX_INPUTS:
269 /* 2 colors + 8 texcoords are always supported
270 * (minus fog and wpos).
271 *
272 * R500 has the ability to turn 3rd and 4th color into
273 * additional texcoords but there is no two-sided color
274 * selection then. However the facing bit can be used instead. */
275 return 10;
276 case PIPE_SHADER_CAP_MAX_OUTPUTS:
277 return 4;
278 case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE:
279 return (is_r500 ? 256 : 32) * sizeof(float[4]);
280 case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
281 case PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE:
282 return 1;
283 case PIPE_SHADER_CAP_MAX_TEMPS:
284 return is_r500 ? 128 : is_r400 ? 64 : 32;
285 case PIPE_SHADER_CAP_MAX_PREDS:
286 return 0; /* unused */
287 case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
288 case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS:
289 return r300screen->caps.num_tex_units;
290 case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
291 case PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED:
292 case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
293 case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
294 case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
295 case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
296 case PIPE_SHADER_CAP_SUBROUTINES:
297 case PIPE_SHADER_CAP_INTEGERS:
298 case PIPE_SHADER_CAP_DOUBLES:
299 case PIPE_SHADER_CAP_TGSI_DROUND_SUPPORTED:
300 case PIPE_SHADER_CAP_TGSI_DFRACEXP_DLDEXP_SUPPORTED:
301 case PIPE_SHADER_CAP_TGSI_FMA_SUPPORTED:
302 return 0;
303 case PIPE_SHADER_CAP_PREFERRED_IR:
304 return PIPE_SHADER_IR_TGSI;
305 }
306 break;
307 case PIPE_SHADER_VERTEX:
308 switch (param)
309 {
310 case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
311 case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS:
312 case PIPE_SHADER_CAP_SUBROUTINES:
313 return 0;
314 default:;
315 }
316
317 if (!r300screen->caps.has_tcl) {
318 return draw_get_shader_param(shader, param);
319 }
320
321 switch (param)
322 {
323 case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
324 case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
325 return is_r500 ? 1024 : 256;
326 case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:
327 return is_r500 ? 4 : 0; /* For loops; not sure about conditionals. */
328 case PIPE_SHADER_CAP_MAX_INPUTS:
329 return 16;
330 case PIPE_SHADER_CAP_MAX_OUTPUTS:
331 return 10;
332 case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE:
333 return 256 * sizeof(float[4]);
334 case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
335 return 1;
336 case PIPE_SHADER_CAP_MAX_TEMPS:
337 return 32;
338 case PIPE_SHADER_CAP_MAX_PREDS:
339 return 0; /* unused */
340 case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
341 case PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE:
342 return 1;
343 case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
344 case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
345 case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
346 case PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED:
347 case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
348 case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
349 case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
350 case PIPE_SHADER_CAP_SUBROUTINES:
351 case PIPE_SHADER_CAP_INTEGERS:
352 case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
353 case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS:
354 case PIPE_SHADER_CAP_DOUBLES:
355 case PIPE_SHADER_CAP_TGSI_DROUND_SUPPORTED:
356 case PIPE_SHADER_CAP_TGSI_DFRACEXP_DLDEXP_SUPPORTED:
357 case PIPE_SHADER_CAP_TGSI_FMA_SUPPORTED:
358 return 0;
359 case PIPE_SHADER_CAP_PREFERRED_IR:
360 return PIPE_SHADER_IR_TGSI;
361 }
362 break;
363 }
364 return 0;
365 }
366
367 static float r300_get_paramf(struct pipe_screen* pscreen,
368 enum pipe_capf param)
369 {
370 struct r300_screen* r300screen = r300_screen(pscreen);
371
372 switch (param) {
373 case PIPE_CAPF_MAX_LINE_WIDTH:
374 case PIPE_CAPF_MAX_LINE_WIDTH_AA:
375 case PIPE_CAPF_MAX_POINT_WIDTH:
376 case PIPE_CAPF_MAX_POINT_WIDTH_AA:
377 /* The maximum dimensions of the colorbuffer are our practical
378 * rendering limits. 2048 pixels should be enough for anybody. */
379 if (r300screen->caps.is_r500) {
380 return 4096.0f;
381 } else if (r300screen->caps.is_r400) {
382 return 4021.0f;
383 } else {
384 return 2560.0f;
385 }
386 case PIPE_CAPF_MAX_TEXTURE_ANISOTROPY:
387 return 16.0f;
388 case PIPE_CAPF_MAX_TEXTURE_LOD_BIAS:
389 return 16.0f;
390 case PIPE_CAPF_GUARD_BAND_LEFT:
391 case PIPE_CAPF_GUARD_BAND_TOP:
392 case PIPE_CAPF_GUARD_BAND_RIGHT:
393 case PIPE_CAPF_GUARD_BAND_BOTTOM:
394 return 0.0f;
395 default:
396 debug_printf("r300: Warning: Unknown CAP %d in get_paramf.\n",
397 param);
398 return 0.0f;
399 }
400 }
401
402 static int r300_get_video_param(struct pipe_screen *screen,
403 enum pipe_video_profile profile,
404 enum pipe_video_entrypoint entrypoint,
405 enum pipe_video_cap param)
406 {
407 switch (param) {
408 case PIPE_VIDEO_CAP_SUPPORTED:
409 return vl_profile_supported(screen, profile, entrypoint);
410 case PIPE_VIDEO_CAP_NPOT_TEXTURES:
411 return 0;
412 case PIPE_VIDEO_CAP_MAX_WIDTH:
413 case PIPE_VIDEO_CAP_MAX_HEIGHT:
414 return vl_video_buffer_max_size(screen);
415 case PIPE_VIDEO_CAP_PREFERED_FORMAT:
416 return PIPE_FORMAT_NV12;
417 case PIPE_VIDEO_CAP_PREFERS_INTERLACED:
418 return false;
419 case PIPE_VIDEO_CAP_SUPPORTS_INTERLACED:
420 return false;
421 case PIPE_VIDEO_CAP_SUPPORTS_PROGRESSIVE:
422 return true;
423 case PIPE_VIDEO_CAP_MAX_LEVEL:
424 return vl_level_supported(screen, profile);
425 default:
426 return 0;
427 }
428 }
429
430 /**
431 * Whether the format matches:
432 * PIPE_FORMAT_?10?10?10?2_UNORM
433 */
434 static inline boolean
435 util_format_is_rgba1010102_variant(const struct util_format_description *desc)
436 {
437 static const unsigned size[4] = {10, 10, 10, 2};
438 unsigned chan;
439
440 if (desc->block.width != 1 ||
441 desc->block.height != 1 ||
442 desc->block.bits != 32)
443 return FALSE;
444
445 for (chan = 0; chan < 4; ++chan) {
446 if(desc->channel[chan].type != UTIL_FORMAT_TYPE_UNSIGNED &&
447 desc->channel[chan].type != UTIL_FORMAT_TYPE_VOID)
448 return FALSE;
449 if (desc->channel[chan].size != size[chan])
450 return FALSE;
451 }
452
453 return TRUE;
454 }
455
456 static bool r300_is_blending_supported(struct r300_screen *rscreen,
457 enum pipe_format format)
458 {
459 int c;
460 const struct util_format_description *desc =
461 util_format_description(format);
462
463 if (desc->layout != UTIL_FORMAT_LAYOUT_PLAIN)
464 return false;
465
466 c = util_format_get_first_non_void_channel(format);
467
468 /* RGBA16F */
469 if (rscreen->caps.is_r500 &&
470 desc->nr_channels == 4 &&
471 desc->channel[c].size == 16 &&
472 desc->channel[c].type == UTIL_FORMAT_TYPE_FLOAT)
473 return true;
474
475 if (desc->channel[c].normalized &&
476 desc->channel[c].type == UTIL_FORMAT_TYPE_UNSIGNED &&
477 desc->channel[c].size >= 4 &&
478 desc->channel[c].size <= 10) {
479 /* RGB10_A2, RGBA8, RGB5_A1, RGBA4, RGB565 */
480 if (desc->nr_channels >= 3)
481 return true;
482
483 if (format == PIPE_FORMAT_R8G8_UNORM)
484 return true;
485
486 /* R8, I8, L8, A8 */
487 if (desc->nr_channels == 1)
488 return true;
489 }
490
491 return false;
492 }
493
494 static boolean r300_is_format_supported(struct pipe_screen* screen,
495 enum pipe_format format,
496 enum pipe_texture_target target,
497 unsigned sample_count,
498 unsigned usage)
499 {
500 uint32_t retval = 0;
501 boolean drm_2_8_0 = r300_screen(screen)->info.drm_minor >= 8;
502 boolean is_r500 = r300_screen(screen)->caps.is_r500;
503 boolean is_r400 = r300_screen(screen)->caps.is_r400;
504 boolean is_color2101010 = format == PIPE_FORMAT_R10G10B10A2_UNORM ||
505 format == PIPE_FORMAT_R10G10B10X2_SNORM ||
506 format == PIPE_FORMAT_B10G10R10A2_UNORM ||
507 format == PIPE_FORMAT_B10G10R10X2_UNORM ||
508 format == PIPE_FORMAT_R10SG10SB10SA2U_NORM;
509 boolean is_ati1n = format == PIPE_FORMAT_RGTC1_UNORM ||
510 format == PIPE_FORMAT_RGTC1_SNORM ||
511 format == PIPE_FORMAT_LATC1_UNORM ||
512 format == PIPE_FORMAT_LATC1_SNORM;
513 boolean is_ati2n = format == PIPE_FORMAT_RGTC2_UNORM ||
514 format == PIPE_FORMAT_RGTC2_SNORM ||
515 format == PIPE_FORMAT_LATC2_UNORM ||
516 format == PIPE_FORMAT_LATC2_SNORM;
517 boolean is_x16f_xy16f = format == PIPE_FORMAT_R16_FLOAT ||
518 format == PIPE_FORMAT_R16G16_FLOAT ||
519 format == PIPE_FORMAT_A16_FLOAT ||
520 format == PIPE_FORMAT_L16_FLOAT ||
521 format == PIPE_FORMAT_L16A16_FLOAT ||
522 format == PIPE_FORMAT_R16A16_FLOAT ||
523 format == PIPE_FORMAT_I16_FLOAT;
524 boolean is_half_float = format == PIPE_FORMAT_R16_FLOAT ||
525 format == PIPE_FORMAT_R16G16_FLOAT ||
526 format == PIPE_FORMAT_R16G16B16_FLOAT ||
527 format == PIPE_FORMAT_R16G16B16A16_FLOAT ||
528 format == PIPE_FORMAT_R16G16B16X16_FLOAT;
529 const struct util_format_description *desc;
530
531 if (!util_format_is_supported(format, usage))
532 return FALSE;
533
534 /* Check multisampling support. */
535 switch (sample_count) {
536 case 0:
537 case 1:
538 break;
539 case 2:
540 case 4:
541 case 6:
542 /* We need DRM 2.8.0. */
543 if (!drm_2_8_0) {
544 return FALSE;
545 }
546 /* No texturing and scanout. */
547 if (usage & (PIPE_BIND_SAMPLER_VIEW |
548 PIPE_BIND_DISPLAY_TARGET |
549 PIPE_BIND_SCANOUT)) {
550 return FALSE;
551 }
552
553 desc = util_format_description(format);
554
555 if (is_r500) {
556 /* Only allow depth/stencil, RGBA8, RGBA1010102, RGBA16F. */
557 if (!util_format_is_depth_or_stencil(format) &&
558 !util_format_is_rgba8_variant(desc) &&
559 !util_format_is_rgba1010102_variant(desc) &&
560 format != PIPE_FORMAT_R16G16B16A16_FLOAT &&
561 format != PIPE_FORMAT_R16G16B16X16_FLOAT) {
562 return FALSE;
563 }
564 } else {
565 /* Only allow depth/stencil, RGBA8. */
566 if (!util_format_is_depth_or_stencil(format) &&
567 !util_format_is_rgba8_variant(desc)) {
568 return FALSE;
569 }
570 }
571 break;
572 default:
573 return FALSE;
574 }
575
576 /* Check sampler format support. */
577 if ((usage & PIPE_BIND_SAMPLER_VIEW) &&
578 /* these two are broken for an unknown reason */
579 format != PIPE_FORMAT_R8G8B8X8_SNORM &&
580 format != PIPE_FORMAT_R16G16B16X16_SNORM &&
581 /* ATI1N is r5xx-only. */
582 (is_r500 || !is_ati1n) &&
583 /* ATI2N is supported on r4xx-r5xx. */
584 (is_r400 || is_r500 || !is_ati2n) &&
585 /* R16F and RG16F texture support was added in as late as DRM 2.8.0 */
586 (drm_2_8_0 || !is_x16f_xy16f) &&
587 r300_is_sampler_format_supported(format)) {
588 retval |= PIPE_BIND_SAMPLER_VIEW;
589 }
590
591 /* Check colorbuffer format support. */
592 if ((usage & (PIPE_BIND_RENDER_TARGET |
593 PIPE_BIND_DISPLAY_TARGET |
594 PIPE_BIND_SCANOUT |
595 PIPE_BIND_SHARED |
596 PIPE_BIND_BLENDABLE)) &&
597 /* 2101010 cannot be rendered to on non-r5xx. */
598 (!is_color2101010 || (is_r500 && drm_2_8_0)) &&
599 r300_is_colorbuffer_format_supported(format)) {
600 retval |= usage &
601 (PIPE_BIND_RENDER_TARGET |
602 PIPE_BIND_DISPLAY_TARGET |
603 PIPE_BIND_SCANOUT |
604 PIPE_BIND_SHARED);
605
606 if (r300_is_blending_supported(r300_screen(screen), format)) {
607 retval |= usage & PIPE_BIND_BLENDABLE;
608 }
609 }
610
611 /* Check depth-stencil format support. */
612 if (usage & PIPE_BIND_DEPTH_STENCIL &&
613 r300_is_zs_format_supported(format)) {
614 retval |= PIPE_BIND_DEPTH_STENCIL;
615 }
616
617 /* Check vertex buffer format support. */
618 if (usage & PIPE_BIND_VERTEX_BUFFER) {
619 if (r300_screen(screen)->caps.has_tcl) {
620 /* Half float is supported on >= R400. */
621 if ((is_r400 || is_r500 || !is_half_float) &&
622 r300_translate_vertex_data_type(format) != R300_INVALID_FORMAT) {
623 retval |= PIPE_BIND_VERTEX_BUFFER;
624 }
625 } else {
626 /* SW TCL */
627 if (!util_format_is_pure_integer(format)) {
628 retval |= PIPE_BIND_VERTEX_BUFFER;
629 }
630 }
631 }
632
633 /* Transfers are always supported. */
634 if (usage & PIPE_BIND_TRANSFER_READ)
635 retval |= PIPE_BIND_TRANSFER_READ;
636 if (usage & PIPE_BIND_TRANSFER_WRITE)
637 retval |= PIPE_BIND_TRANSFER_WRITE;
638
639 return retval == usage;
640 }
641
642 static void r300_destroy_screen(struct pipe_screen* pscreen)
643 {
644 struct r300_screen* r300screen = r300_screen(pscreen);
645 struct radeon_winsys *rws = radeon_winsys(pscreen);
646
647 if (rws && !rws->unref(rws))
648 return;
649
650 pipe_mutex_destroy(r300screen->cmask_mutex);
651
652 if (rws)
653 rws->destroy(rws);
654
655 FREE(r300screen);
656 }
657
658 static void r300_fence_reference(struct pipe_screen *screen,
659 struct pipe_fence_handle **ptr,
660 struct pipe_fence_handle *fence)
661 {
662 struct radeon_winsys *rws = r300_screen(screen)->rws;
663
664 rws->fence_reference(ptr, fence);
665 }
666
667 static boolean r300_fence_finish(struct pipe_screen *screen,
668 struct pipe_fence_handle *fence,
669 uint64_t timeout)
670 {
671 struct radeon_winsys *rws = r300_screen(screen)->rws;
672
673 return rws->fence_wait(rws, fence, timeout);
674 }
675
676 struct pipe_screen* r300_screen_create(struct radeon_winsys *rws)
677 {
678 struct r300_screen *r300screen = CALLOC_STRUCT(r300_screen);
679
680 if (!r300screen) {
681 FREE(r300screen);
682 return NULL;
683 }
684
685 rws->query_info(rws, &r300screen->info);
686
687 r300_init_debug(r300screen);
688 r300_parse_chipset(r300screen->info.pci_id, &r300screen->caps);
689
690 if (SCREEN_DBG_ON(r300screen, DBG_NO_ZMASK))
691 r300screen->caps.zmask_ram = 0;
692 if (SCREEN_DBG_ON(r300screen, DBG_NO_HIZ))
693 r300screen->caps.hiz_ram = 0;
694
695 if (r300screen->info.drm_minor < 8)
696 r300screen->caps.has_us_format = FALSE;
697
698 r300screen->rws = rws;
699 r300screen->screen.destroy = r300_destroy_screen;
700 r300screen->screen.get_name = r300_get_name;
701 r300screen->screen.get_vendor = r300_get_vendor;
702 r300screen->screen.get_device_vendor = r300_get_device_vendor;
703 r300screen->screen.get_param = r300_get_param;
704 r300screen->screen.get_shader_param = r300_get_shader_param;
705 r300screen->screen.get_paramf = r300_get_paramf;
706 r300screen->screen.get_video_param = r300_get_video_param;
707 r300screen->screen.is_format_supported = r300_is_format_supported;
708 r300screen->screen.is_video_format_supported = vl_video_buffer_is_format_supported;
709 r300screen->screen.context_create = r300_create_context;
710 r300screen->screen.fence_reference = r300_fence_reference;
711 r300screen->screen.fence_finish = r300_fence_finish;
712
713 r300_init_screen_resource_functions(r300screen);
714
715 util_format_s3tc_init();
716 pipe_mutex_init(r300screen->cmask_mutex);
717
718 return &r300screen->screen;
719 }