src/gallium/drivers/r300/r300_screen.c

   1 /*
   2  * Copyright 2008 Corbin Simpson <MostAwesomeDude@gmail.com>
   3  * Copyright 2010 Marek Olšák <maraeo@gmail.com>
   4  *
   5  * Permission is hereby granted, free of charge, to any person obtaining a
   6  * copy of this software and associated documentation files (the "Software"),
   7  * to deal in the Software without restriction, including without limitation
   8  * on the rights to use, copy, modify, merge, publish, distribute, sub
   9  * license, and/or sell copies of the Software, and to permit persons to whom
  10  * the Software is furnished to do so, subject to the following conditions:
  11  *
  12  * The above copyright notice and this permission notice (including the next
  13  * paragraph) shall be included in all copies or substantial portions of the
  14  * Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  19  * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
  20  * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
  21  * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
  22  * USE OR OTHER DEALINGS IN THE SOFTWARE. */
  23
  24 #include "util/u_format.h"
  25 #include "util/u_format_s3tc.h"
  26 #include "util/u_screen.h"
  27 #include "util/u_memory.h"
  28 #include "util/os_time.h"
  29 #include "vl/vl_decoder.h"
  30 #include "vl/vl_video_buffer.h"
  31
  32 #include "r300_context.h"
  33 #include "r300_texture.h"
  34 #include "r300_screen_buffer.h"
  35 #include "r300_state_inlines.h"
  36 #include "r300_public.h"
  37
  38 #include "draw/draw_context.h"
  39
  40 /* Return the identifier behind whom the brave coders responsible for this
  41  * amalgamation of code, sweat, and duct tape, routinely obscure their names.
  42  *
  43  * ...I should have just put "Corbin Simpson", but I'm not that cool.
  44  *
  45  * (Or egotistical. Yet.) */
  46 static const char* r300_get_vendor(struct pipe_screen* pscreen)
  47 {
  48     return "X.Org R300 Project";
  49 }
  50
  51 static const char* r300_get_device_vendor(struct pipe_screen* pscreen)
  52 {
  53     return "ATI";
  54 }
  55
  56 static const char* chip_families[] = {
  57     "unknown",
  58     "ATI R300",
  59     "ATI R350",
  60     "ATI RV350",
  61     "ATI RV370",
  62     "ATI RV380",
  63     "ATI RS400",
  64     "ATI RC410",
  65     "ATI RS480",
  66     "ATI R420",
  67     "ATI R423",
  68     "ATI R430",
  69     "ATI R480",
  70     "ATI R481",
  71     "ATI RV410",
  72     "ATI RS600",
  73     "ATI RS690",
  74     "ATI RS740",
  75     "ATI RV515",
  76     "ATI R520",
  77     "ATI RV530",
  78     "ATI R580",
  79     "ATI RV560",
  80     "ATI RV570"
  81 };
  82
  83 static const char* r300_get_family_name(struct r300_screen* r300screen)
  84 {
  85     return chip_families[r300screen->caps.family];
  86 }
  87
  88 static const char* r300_get_name(struct pipe_screen* pscreen)
  89 {
  90     struct r300_screen* r300screen = r300_screen(pscreen);
  91
  92     return r300_get_family_name(r300screen);
  93 }
  94
  95 static void r300_disk_cache_create(struct r300_screen* r300screen)
  96 {
  97     struct mesa_sha1 ctx;
  98     unsigned char sha1[20];
  99     char cache_id[20 * 2 + 1];
 100
 101     _mesa_sha1_init(&ctx);
 102     if (!disk_cache_get_function_identifier(r300_disk_cache_create,
 103                                             &ctx))
 104         return;
 105
 106     _mesa_sha1_final(&ctx, sha1);
 107     disk_cache_format_hex_id(cache_id, sha1, 20 * 2);
 108
 109     r300screen->disk_shader_cache =
 110                     disk_cache_create(r300_get_family_name(r300screen),
 111                                       cache_id,
 112                                       r300screen->debug);
 113 }
 114
 115 static struct disk_cache* r300_get_disk_shader_cache(struct pipe_screen* pscreen)
 116 {
 117         struct r300_screen* r300screen = r300_screen(pscreen);
 118         return r300screen->disk_shader_cache;
 119 }
 120
 121 static int r300_get_param(struct pipe_screen* pscreen, enum pipe_cap param)
 122 {
 123     struct r300_screen* r300screen = r300_screen(pscreen);
 124     boolean is_r500 = r300screen->caps.is_r500;
 125
 126     switch (param) {
 127         /* Supported features (boolean caps). */
 128         case PIPE_CAP_NPOT_TEXTURES:
 129         case PIPE_CAP_MIXED_FRAMEBUFFER_SIZES:
 130         case PIPE_CAP_MIXED_COLOR_DEPTH_BITS:
 131         case PIPE_CAP_ANISOTROPIC_FILTER:
 132         case PIPE_CAP_POINT_SPRITE:
 133         case PIPE_CAP_OCCLUSION_QUERY:
 134         case PIPE_CAP_TEXTURE_MIRROR_CLAMP:
 135         case PIPE_CAP_TEXTURE_MIRROR_CLAMP_TO_EDGE:
 136         case PIPE_CAP_BLEND_EQUATION_SEPARATE:
 137         case PIPE_CAP_VERTEX_ELEMENT_INSTANCE_DIVISOR:
 138         case PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT:
 139         case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER:
 140         case PIPE_CAP_CONDITIONAL_RENDER:
 141         case PIPE_CAP_TEXTURE_BARRIER:
 142         case PIPE_CAP_TGSI_CAN_COMPACT_CONSTANTS:
 143         case PIPE_CAP_PREFER_BLIT_BASED_TEXTURE_TRANSFER:
 144         case PIPE_CAP_BUFFER_MAP_PERSISTENT_COHERENT:
 145         case PIPE_CAP_CLIP_HALFZ:
 146         case PIPE_CAP_ALLOW_MAPPED_BUFFERS_DURING_EXECUTION:
 147             return 1;
 148
 149         case PIPE_CAP_MIN_MAP_BUFFER_ALIGNMENT:
 150             return R300_BUFFER_ALIGNMENT;
 151
 152         case PIPE_CAP_CONSTANT_BUFFER_OFFSET_ALIGNMENT:
 153             return 16;
 154
 155         case PIPE_CAP_GLSL_FEATURE_LEVEL:
 156         case PIPE_CAP_GLSL_FEATURE_LEVEL_COMPATIBILITY:
 157             return 120;
 158
 159         /* r300 cannot do swizzling of compressed textures. Supported otherwise. */
 160         case PIPE_CAP_TEXTURE_SWIZZLE:
 161             return r300screen->caps.dxtc_swizzle;
 162
 163         /* We don't support color clamping on r500, so that we can use color
 164          * intepolators for generic varyings. */
 165         case PIPE_CAP_VERTEX_COLOR_CLAMPED:
 166             return !is_r500;
 167
 168         /* Supported on r500 only. */
 169         case PIPE_CAP_VERTEX_COLOR_UNCLAMPED:
 170         case PIPE_CAP_MIXED_COLORBUFFER_FORMATS:
 171         case PIPE_CAP_FRAGMENT_SHADER_TEXTURE_LOD:
 172         case PIPE_CAP_FRAGMENT_SHADER_DERIVATIVES:
 173         case PIPE_CAP_VERTEX_SHADER_SATURATE:
 174             return is_r500 ? 1 : 0;
 175
 176         /* Unsupported features. */
 177         case PIPE_CAP_QUERY_TIME_ELAPSED:
 178         case PIPE_CAP_QUERY_PIPELINE_STATISTICS:
 179         case PIPE_CAP_MAX_DUAL_SOURCE_RENDER_TARGETS:
 180         case PIPE_CAP_INDEP_BLEND_ENABLE:
 181         case PIPE_CAP_INDEP_BLEND_FUNC:
 182         case PIPE_CAP_DEPTH_CLIP_DISABLE:
 183         case PIPE_CAP_DEPTH_CLIP_DISABLE_SEPARATE:
 184         case PIPE_CAP_SHADER_STENCIL_EXPORT:
 185         case PIPE_CAP_MAX_TEXTURE_ARRAY_LAYERS:
 186         case PIPE_CAP_TGSI_INSTANCEID:
 187         case PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT:
 188         case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER:
 189         case PIPE_CAP_SEAMLESS_CUBE_MAP:
 190         case PIPE_CAP_SEAMLESS_CUBE_MAP_PER_TEXTURE:
 191         case PIPE_CAP_MIN_TEXEL_OFFSET:
 192         case PIPE_CAP_MAX_TEXEL_OFFSET:
 193         case PIPE_CAP_MIN_TEXTURE_GATHER_OFFSET:
 194         case PIPE_CAP_MAX_TEXTURE_GATHER_OFFSET:
 195         case PIPE_CAP_MAX_STREAM_OUTPUT_BUFFERS:
 196         case PIPE_CAP_MAX_STREAM_OUTPUT_SEPARATE_COMPONENTS:
 197         case PIPE_CAP_MAX_STREAM_OUTPUT_INTERLEAVED_COMPONENTS:
 198         case PIPE_CAP_MAX_GEOMETRY_OUTPUT_VERTICES:
 199         case PIPE_CAP_MAX_GEOMETRY_TOTAL_OUTPUT_COMPONENTS:
 200         case PIPE_CAP_MAX_VERTEX_STREAMS:
 201         case PIPE_CAP_STREAM_OUTPUT_PAUSE_RESUME:
 202         case PIPE_CAP_STREAM_OUTPUT_INTERLEAVE_BUFFERS:
 203         case PIPE_CAP_FRAGMENT_COLOR_CLAMPED:
 204         case PIPE_CAP_QUADS_FOLLOW_PROVOKING_VERTEX_CONVENTION:
 205         case PIPE_CAP_COMPUTE:
 206         case PIPE_CAP_START_INSTANCE:
 207         case PIPE_CAP_QUERY_TIMESTAMP:
 208         case PIPE_CAP_TEXTURE_MULTISAMPLE:
 209         case PIPE_CAP_CUBE_MAP_ARRAY:
 210         case PIPE_CAP_TEXTURE_BUFFER_OBJECTS:
 211         case PIPE_CAP_TEXTURE_BUFFER_OFFSET_ALIGNMENT:
 212         case PIPE_CAP_TEXTURE_BORDER_COLOR_QUIRK:
 213         case PIPE_CAP_MAX_TEXTURE_BUFFER_SIZE:
 214         case PIPE_CAP_TGSI_VS_LAYER_VIEWPORT:
 215         case PIPE_CAP_MAX_TEXTURE_GATHER_COMPONENTS:
 216         case PIPE_CAP_TEXTURE_GATHER_SM5:
 217         case PIPE_CAP_TEXTURE_QUERY_LOD:
 218         case PIPE_CAP_FAKE_SW_MSAA:
 219         case PIPE_CAP_SAMPLE_SHADING:
 220         case PIPE_CAP_TEXTURE_GATHER_OFFSETS:
 221         case PIPE_CAP_DRAW_INDIRECT:
 222         case PIPE_CAP_MULTI_DRAW_INDIRECT:
 223         case PIPE_CAP_MULTI_DRAW_INDIRECT_PARAMS:
 224         case PIPE_CAP_TGSI_FS_FINE_DERIVATIVE:
 225         case PIPE_CAP_CONDITIONAL_RENDER_INVERTED:
 226         case PIPE_CAP_SAMPLER_VIEW_TARGET:
 227         case PIPE_CAP_VERTEXID_NOBASE:
 228         case PIPE_CAP_POLYGON_OFFSET_CLAMP:
 229         case PIPE_CAP_MULTISAMPLE_Z_RESOLVE:
 230         case PIPE_CAP_RESOURCE_FROM_USER_MEMORY:
 231         case PIPE_CAP_DEVICE_RESET_STATUS_QUERY:
 232         case PIPE_CAP_MAX_SHADER_PATCH_VARYINGS:
 233         case PIPE_CAP_TEXTURE_FLOAT_LINEAR:
 234         case PIPE_CAP_TEXTURE_HALF_FLOAT_LINEAR:
 235         case PIPE_CAP_DEPTH_BOUNDS_TEST:
 236         case PIPE_CAP_TGSI_TXQS:
 237         case PIPE_CAP_FORCE_PERSAMPLE_INTERP:
 238         case PIPE_CAP_SHAREABLE_SHADERS:
 239         case PIPE_CAP_COPY_BETWEEN_COMPRESSED_AND_PLAIN_FORMATS:
 240         case PIPE_CAP_CLEAR_TEXTURE:
 241         case PIPE_CAP_DRAW_PARAMETERS:
 242         case PIPE_CAP_TGSI_PACK_HALF_FLOAT:
 243         case PIPE_CAP_TGSI_FS_POSITION_IS_SYSVAL:
 244         case PIPE_CAP_TGSI_FS_FACE_IS_INTEGER_SYSVAL:
 245         case PIPE_CAP_SHADER_BUFFER_OFFSET_ALIGNMENT:
 246         case PIPE_CAP_INVALIDATE_BUFFER:
 247         case PIPE_CAP_GENERATE_MIPMAP:
 248         case PIPE_CAP_STRING_MARKER:
 249         case PIPE_CAP_BUFFER_SAMPLER_VIEW_RGBA_ONLY:
 250         case PIPE_CAP_SURFACE_REINTERPRET_BLOCKS:
 251         case PIPE_CAP_QUERY_BUFFER_OBJECT:
 252         case PIPE_CAP_QUERY_MEMORY_INFO:
 253         case PIPE_CAP_FRAMEBUFFER_NO_ATTACHMENT:
 254         case PIPE_CAP_ROBUST_BUFFER_ACCESS_BEHAVIOR:
 255         case PIPE_CAP_CULL_DISTANCE:
 256         case PIPE_CAP_PRIMITIVE_RESTART_FOR_PATCHES:
 257         case PIPE_CAP_TGSI_VOTE:
 258         case PIPE_CAP_MAX_WINDOW_RECTANGLES:
 259         case PIPE_CAP_POLYGON_OFFSET_UNITS_UNSCALED:
 260         case PIPE_CAP_VIEWPORT_SUBPIXEL_BITS:
 261         case PIPE_CAP_TGSI_ARRAY_COMPONENTS:
 262         case PIPE_CAP_TGSI_CAN_READ_OUTPUTS:
 263         case PIPE_CAP_NATIVE_FENCE_FD:
 264         case PIPE_CAP_GLSL_OPTIMIZE_CONSERVATIVELY:
 265         case PIPE_CAP_FBFETCH:
 266         case PIPE_CAP_TGSI_MUL_ZERO_WINS:
 267         case PIPE_CAP_DOUBLES:
 268         case PIPE_CAP_INT64:
 269         case PIPE_CAP_INT64_DIVMOD:
 270         case PIPE_CAP_TGSI_TEX_TXF_LZ:
 271         case PIPE_CAP_TGSI_CLOCK:
 272         case PIPE_CAP_POLYGON_MODE_FILL_RECTANGLE:
 273         case PIPE_CAP_SPARSE_BUFFER_PAGE_SIZE:
 274         case PIPE_CAP_TGSI_BALLOT:
 275         case PIPE_CAP_TGSI_TES_LAYER_VIEWPORT:
 276         case PIPE_CAP_CAN_BIND_CONST_BUFFER_AS_VERTEX:
 277         case PIPE_CAP_POST_DEPTH_COVERAGE:
 278         case PIPE_CAP_BINDLESS_TEXTURE:
 279         case PIPE_CAP_NIR_SAMPLERS_AS_DEREF:
 280         case PIPE_CAP_QUERY_SO_OVERFLOW:
 281         case PIPE_CAP_MEMOBJ:
 282         case PIPE_CAP_LOAD_CONSTBUF:
 283         case PIPE_CAP_TGSI_ANY_REG_AS_ADDRESS:
 284         case PIPE_CAP_TILE_RASTER_ORDER:
 285         case PIPE_CAP_MAX_COMBINED_SHADER_OUTPUT_RESOURCES:
 286         case PIPE_CAP_FRAMEBUFFER_MSAA_CONSTRAINTS:
 287         case PIPE_CAP_SIGNED_VERTEX_BUFFER_OFFSET:
 288         case PIPE_CAP_CONTEXT_PRIORITY_MASK:
 289         case PIPE_CAP_FENCE_SIGNAL:
 290         case PIPE_CAP_CONSTBUF0_FLAGS:
 291         case PIPE_CAP_PACKED_UNIFORMS:
 292         case PIPE_CAP_CONSERVATIVE_RASTER_POST_SNAP_TRIANGLES:
 293         case PIPE_CAP_CONSERVATIVE_RASTER_POST_SNAP_POINTS_LINES:
 294         case PIPE_CAP_CONSERVATIVE_RASTER_PRE_SNAP_TRIANGLES:
 295         case PIPE_CAP_CONSERVATIVE_RASTER_PRE_SNAP_POINTS_LINES:
 296         case PIPE_CAP_CONSERVATIVE_RASTER_POST_DEPTH_COVERAGE:
 297         case PIPE_CAP_MAX_CONSERVATIVE_RASTER_SUBPIXEL_PRECISION_BIAS:
 298         case PIPE_CAP_PROGRAMMABLE_SAMPLE_LOCATIONS:
 299         case PIPE_CAP_MAX_TEXTURE_UPLOAD_MEMORY_BUDGET:
 300             return 0;
 301
 302         case PIPE_CAP_MAX_GS_INVOCATIONS:
 303             return 32;
 304        case PIPE_CAP_MAX_SHADER_BUFFER_SIZE:
 305             return 1 << 27;
 306
 307         /* SWTCL-only features. */
 308         case PIPE_CAP_PRIMITIVE_RESTART:
 309         case PIPE_CAP_USER_VERTEX_BUFFERS:
 310         case PIPE_CAP_TGSI_VS_WINDOW_SPACE_POSITION:
 311             return !r300screen->caps.has_tcl;
 312
 313         /* HWTCL-only features / limitations. */
 314         case PIPE_CAP_VERTEX_BUFFER_OFFSET_4BYTE_ALIGNED_ONLY:
 315         case PIPE_CAP_VERTEX_BUFFER_STRIDE_4BYTE_ALIGNED_ONLY:
 316         case PIPE_CAP_VERTEX_ELEMENT_SRC_OFFSET_4BYTE_ALIGNED_ONLY:
 317             return r300screen->caps.has_tcl;
 318         case PIPE_CAP_TGSI_TEXCOORD:
 319             return 0;
 320
 321         /* Texturing. */
 322         case PIPE_CAP_MAX_TEXTURE_2D_SIZE:
 323             return is_r500 ? 4096 : 2048;
 324         case PIPE_CAP_MAX_TEXTURE_3D_LEVELS:
 325         case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS:
 326             /* 13 == 4096, 12 == 2048 */
 327             return is_r500 ? 13 : 12;
 328
 329         /* Render targets. */
 330         case PIPE_CAP_MAX_RENDER_TARGETS:
 331             return 4;
 332         case PIPE_CAP_ENDIANNESS:
 333             return PIPE_ENDIAN_LITTLE;
 334
 335         case PIPE_CAP_MAX_VIEWPORTS:
 336             return 1;
 337
 338         case PIPE_CAP_MAX_VERTEX_ATTRIB_STRIDE:
 339             return 2048;
 340
 341         case PIPE_CAP_MAX_VARYINGS:
 342             return 10;
 343
 344         case PIPE_CAP_VENDOR_ID:
 345                 return 0x1002;
 346         case PIPE_CAP_DEVICE_ID:
 347                 return r300screen->info.pci_id;
 348         case PIPE_CAP_ACCELERATED:
 349                 return 1;
 350         case PIPE_CAP_VIDEO_MEMORY:
 351                 return r300screen->info.vram_size >> 20;
 352         case PIPE_CAP_UMA:
 353                 return 0;
 354         case PIPE_CAP_PCI_GROUP:
 355             return r300screen->info.pci_domain;
 356         case PIPE_CAP_PCI_BUS:
 357             return r300screen->info.pci_bus;
 358         case PIPE_CAP_PCI_DEVICE:
 359             return r300screen->info.pci_dev;
 360         case PIPE_CAP_PCI_FUNCTION:
 361             return r300screen->info.pci_func;
 362         default:
 363             return u_pipe_screen_get_param_defaults(pscreen, param);
 364     }
 365 }
 366
 367 static int r300_get_shader_param(struct pipe_screen *pscreen,
 368                                  enum pipe_shader_type shader,
 369                                  enum pipe_shader_cap param)
 370 {
 371    struct r300_screen* r300screen = r300_screen(pscreen);
 372    boolean is_r400 = r300screen->caps.is_r400;
 373    boolean is_r500 = r300screen->caps.is_r500;
 374
 375    switch (shader) {
 376     case PIPE_SHADER_FRAGMENT:
 377         switch (param)
 378         {
 379         case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
 380             return is_r500 || is_r400 ? 512 : 96;
 381         case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
 382             return is_r500 || is_r400 ? 512 : 64;
 383         case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
 384             return is_r500 || is_r400 ? 512 : 32;
 385         case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
 386             return is_r500 ? 511 : 4;
 387         case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:
 388             return is_r500 ? 64 : 0; /* Actually unlimited on r500. */
 389             /* Fragment shader limits. */
 390         case PIPE_SHADER_CAP_MAX_INPUTS:
 391             /* 2 colors + 8 texcoords are always supported
 392              * (minus fog and wpos).
 393              *
 394              * R500 has the ability to turn 3rd and 4th color into
 395              * additional texcoords but there is no two-sided color
 396              * selection then. However the facing bit can be used instead. */
 397             return 10;
 398         case PIPE_SHADER_CAP_MAX_OUTPUTS:
 399             return 4;
 400         case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE:
 401             return (is_r500 ? 256 : 32) * sizeof(float[4]);
 402         case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
 403         case PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE:
 404             return 1;
 405         case PIPE_SHADER_CAP_MAX_TEMPS:
 406             return is_r500 ? 128 : is_r400 ? 64 : 32;
 407         case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
 408         case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS:
 409            return r300screen->caps.num_tex_units;
 410         case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
 411         case PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED:
 412         case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
 413         case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
 414         case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
 415         case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
 416         case PIPE_SHADER_CAP_SUBROUTINES:
 417         case PIPE_SHADER_CAP_INTEGERS:
 418         case PIPE_SHADER_CAP_INT64_ATOMICS:
 419         case PIPE_SHADER_CAP_FP16:
 420         case PIPE_SHADER_CAP_TGSI_DROUND_SUPPORTED:
 421         case PIPE_SHADER_CAP_TGSI_DFRACEXP_DLDEXP_SUPPORTED:
 422         case PIPE_SHADER_CAP_TGSI_LDEXP_SUPPORTED:
 423         case PIPE_SHADER_CAP_TGSI_FMA_SUPPORTED:
 424         case PIPE_SHADER_CAP_MAX_SHADER_BUFFERS:
 425         case PIPE_SHADER_CAP_MAX_SHADER_IMAGES:
 426         case PIPE_SHADER_CAP_LOWER_IF_THRESHOLD:
 427         case PIPE_SHADER_CAP_TGSI_SKIP_MERGE_REGISTERS:
 428         case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTERS:
 429         case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTER_BUFFERS:
 430             return 0;
 431         case PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT:
 432             return 32;
 433         case PIPE_SHADER_CAP_PREFERRED_IR:
 434             return PIPE_SHADER_IR_TGSI;
 435         case PIPE_SHADER_CAP_SUPPORTED_IRS:
 436             return 0;
 437         case PIPE_SHADER_CAP_SCALAR_ISA:
 438             return 0;
 439         }
 440         break;
 441     case PIPE_SHADER_VERTEX:
 442         switch (param)
 443         {
 444         case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
 445         case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS:
 446         case PIPE_SHADER_CAP_SUBROUTINES:
 447             return 0;
 448         default:;
 449         }
 450
 451         if (!r300screen->caps.has_tcl) {
 452             return draw_get_shader_param(shader, param);
 453         }
 454
 455         switch (param)
 456         {
 457         case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
 458         case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
 459             return is_r500 ? 1024 : 256;
 460         case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:
 461             return is_r500 ? 4 : 0; /* For loops; not sure about conditionals. */
 462         case PIPE_SHADER_CAP_MAX_INPUTS:
 463             return 16;
 464         case PIPE_SHADER_CAP_MAX_OUTPUTS:
 465             return 10;
 466         case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE:
 467             return 256 * sizeof(float[4]);
 468         case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
 469             return 1;
 470         case PIPE_SHADER_CAP_MAX_TEMPS:
 471             return 32;
 472         case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
 473         case PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE:
 474             return 1;
 475         case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
 476         case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
 477         case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
 478         case PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED:
 479         case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
 480         case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
 481         case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
 482         case PIPE_SHADER_CAP_SUBROUTINES:
 483         case PIPE_SHADER_CAP_INTEGERS:
 484         case PIPE_SHADER_CAP_FP16:
 485         case PIPE_SHADER_CAP_INT64_ATOMICS:
 486         case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
 487         case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS:
 488         case PIPE_SHADER_CAP_TGSI_DROUND_SUPPORTED:
 489         case PIPE_SHADER_CAP_TGSI_DFRACEXP_DLDEXP_SUPPORTED:
 490         case PIPE_SHADER_CAP_TGSI_LDEXP_SUPPORTED:
 491         case PIPE_SHADER_CAP_TGSI_FMA_SUPPORTED:
 492         case PIPE_SHADER_CAP_MAX_SHADER_BUFFERS:
 493         case PIPE_SHADER_CAP_MAX_SHADER_IMAGES:
 494         case PIPE_SHADER_CAP_LOWER_IF_THRESHOLD:
 495         case PIPE_SHADER_CAP_TGSI_SKIP_MERGE_REGISTERS:
 496         case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTERS:
 497         case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTER_BUFFERS:
 498             return 0;
 499         case PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT:
 500             return 32;
 501         case PIPE_SHADER_CAP_PREFERRED_IR:
 502             return PIPE_SHADER_IR_TGSI;
 503         case PIPE_SHADER_CAP_SUPPORTED_IRS:
 504             return 0;
 505         case PIPE_SHADER_CAP_SCALAR_ISA:
 506             return 0;
 507         }
 508         break;
 509     default:
 510         ; /* nothing */
 511     }
 512     return 0;
 513 }
 514
 515 static float r300_get_paramf(struct pipe_screen* pscreen,
 516                              enum pipe_capf param)
 517 {
 518     struct r300_screen* r300screen = r300_screen(pscreen);
 519
 520     switch (param) {
 521         case PIPE_CAPF_MAX_LINE_WIDTH:
 522         case PIPE_CAPF_MAX_LINE_WIDTH_AA:
 523         case PIPE_CAPF_MAX_POINT_WIDTH:
 524         case PIPE_CAPF_MAX_POINT_WIDTH_AA:
 525             /* The maximum dimensions of the colorbuffer are our practical
 526              * rendering limits. 2048 pixels should be enough for anybody. */
 527             if (r300screen->caps.is_r500) {
 528                 return 4096.0f;
 529             } else if (r300screen->caps.is_r400) {
 530                 return 4021.0f;
 531             } else {
 532                 return 2560.0f;
 533             }
 534         case PIPE_CAPF_MAX_TEXTURE_ANISOTROPY:
 535             return 16.0f;
 536         case PIPE_CAPF_MAX_TEXTURE_LOD_BIAS:
 537             return 16.0f;
 538         case PIPE_CAPF_MIN_CONSERVATIVE_RASTER_DILATE:
 539         case PIPE_CAPF_MAX_CONSERVATIVE_RASTER_DILATE:
 540         case PIPE_CAPF_CONSERVATIVE_RASTER_DILATE_GRANULARITY:
 541             return 0.0f;
 542         default:
 543             debug_printf("r300: Warning: Unknown CAP %d in get_paramf.\n",
 544                          param);
 545             return 0.0f;
 546     }
 547 }
 548
 549 static int r300_get_video_param(struct pipe_screen *screen,
 550                                 enum pipe_video_profile profile,
 551                                 enum pipe_video_entrypoint entrypoint,
 552                                 enum pipe_video_cap param)
 553 {
 554    switch (param) {
 555       case PIPE_VIDEO_CAP_SUPPORTED:
 556          return vl_profile_supported(screen, profile, entrypoint);
 557       case PIPE_VIDEO_CAP_NPOT_TEXTURES:
 558          return 0;
 559       case PIPE_VIDEO_CAP_MAX_WIDTH:
 560       case PIPE_VIDEO_CAP_MAX_HEIGHT:
 561          return vl_video_buffer_max_size(screen);
 562       case PIPE_VIDEO_CAP_PREFERED_FORMAT:
 563          return PIPE_FORMAT_NV12;
 564       case PIPE_VIDEO_CAP_PREFERS_INTERLACED:
 565          return false;
 566       case PIPE_VIDEO_CAP_SUPPORTS_INTERLACED:
 567          return false;
 568       case PIPE_VIDEO_CAP_SUPPORTS_PROGRESSIVE:
 569          return true;
 570       case PIPE_VIDEO_CAP_MAX_LEVEL:
 571          return vl_level_supported(screen, profile);
 572       default:
 573          return 0;
 574    }
 575 }
 576
 577 /**
 578  * Whether the format matches:
 579  *   PIPE_FORMAT_?10?10?10?2_UNORM
 580  */
 581 static inline boolean
 582 util_format_is_rgba1010102_variant(const struct util_format_description *desc)
 583 {
 584    static const unsigned size[4] = {10, 10, 10, 2};
 585    unsigned chan;
 586
 587    if (desc->block.width != 1 ||
 588        desc->block.height != 1 ||
 589        desc->block.bits != 32)
 590       return FALSE;
 591
 592    for (chan = 0; chan < 4; ++chan) {
 593       if(desc->channel[chan].type != UTIL_FORMAT_TYPE_UNSIGNED &&
 594          desc->channel[chan].type != UTIL_FORMAT_TYPE_VOID)
 595          return FALSE;
 596       if (desc->channel[chan].size != size[chan])
 597          return FALSE;
 598    }
 599
 600    return TRUE;
 601 }
 602
 603 static bool r300_is_blending_supported(struct r300_screen *rscreen,
 604                                        enum pipe_format format)
 605 {
 606     int c;
 607     const struct util_format_description *desc =
 608         util_format_description(format);
 609
 610     if (desc->layout != UTIL_FORMAT_LAYOUT_PLAIN)
 611         return false;
 612
 613     c = util_format_get_first_non_void_channel(format);
 614
 615     /* RGBA16F */
 616     if (rscreen->caps.is_r500 &&
 617         desc->nr_channels == 4 &&
 618         desc->channel[c].size == 16 &&
 619         desc->channel[c].type == UTIL_FORMAT_TYPE_FLOAT)
 620         return true;
 621
 622     if (desc->channel[c].normalized &&
 623         desc->channel[c].type == UTIL_FORMAT_TYPE_UNSIGNED &&
 624         desc->channel[c].size >= 4 &&
 625         desc->channel[c].size <= 10) {
 626         /* RGB10_A2, RGBA8, RGB5_A1, RGBA4, RGB565 */
 627         if (desc->nr_channels >= 3)
 628             return true;
 629
 630         if (format == PIPE_FORMAT_R8G8_UNORM)
 631             return true;
 632
 633         /* R8, I8, L8, A8 */
 634         if (desc->nr_channels == 1)
 635             return true;
 636     }
 637
 638     return false;
 639 }
 640
 641 static bool r300_is_format_supported(struct pipe_screen* screen,
 642                                      enum pipe_format format,
 643                                      enum pipe_texture_target target,
 644                                      unsigned sample_count,
 645                                      unsigned storage_sample_count,
 646                                      unsigned usage)
 647 {
 648     uint32_t retval = 0;
 649     boolean is_r500 = r300_screen(screen)->caps.is_r500;
 650     boolean is_r400 = r300_screen(screen)->caps.is_r400;
 651     boolean is_color2101010 = format == PIPE_FORMAT_R10G10B10A2_UNORM ||
 652                               format == PIPE_FORMAT_R10G10B10X2_SNORM ||
 653                               format == PIPE_FORMAT_B10G10R10A2_UNORM ||
 654                               format == PIPE_FORMAT_B10G10R10X2_UNORM ||
 655                               format == PIPE_FORMAT_R10SG10SB10SA2U_NORM;
 656     boolean is_ati1n = format == PIPE_FORMAT_RGTC1_UNORM ||
 657                        format == PIPE_FORMAT_RGTC1_SNORM ||
 658                        format == PIPE_FORMAT_LATC1_UNORM ||
 659                        format == PIPE_FORMAT_LATC1_SNORM;
 660     boolean is_ati2n = format == PIPE_FORMAT_RGTC2_UNORM ||
 661                        format == PIPE_FORMAT_RGTC2_SNORM ||
 662                        format == PIPE_FORMAT_LATC2_UNORM ||
 663                        format == PIPE_FORMAT_LATC2_SNORM;
 664     boolean is_half_float = format == PIPE_FORMAT_R16_FLOAT ||
 665                             format == PIPE_FORMAT_R16G16_FLOAT ||
 666                             format == PIPE_FORMAT_R16G16B16_FLOAT ||
 667                             format == PIPE_FORMAT_R16G16B16A16_FLOAT ||
 668                             format == PIPE_FORMAT_R16G16B16X16_FLOAT;
 669     const struct util_format_description *desc;
 670
 671     if (MAX2(1, sample_count) != MAX2(1, storage_sample_count))
 672         return false;
 673
 674     /* Check multisampling support. */
 675     switch (sample_count) {
 676         case 0:
 677         case 1:
 678             break;
 679         case 2:
 680         case 4:
 681         case 6:
 682             /* No texturing and scanout. */
 683             if (usage & (PIPE_BIND_SAMPLER_VIEW |
 684                          PIPE_BIND_DISPLAY_TARGET |
 685                          PIPE_BIND_SCANOUT)) {
 686                 return false;
 687             }
 688
 689             desc = util_format_description(format);
 690
 691             if (is_r500) {
 692                 /* Only allow depth/stencil, RGBA8, RGBA1010102, RGBA16F. */
 693                 if (!util_format_is_depth_or_stencil(format) &&
 694                     !util_format_is_rgba8_variant(desc) &&
 695                     !util_format_is_rgba1010102_variant(desc) &&
 696                     format != PIPE_FORMAT_R16G16B16A16_FLOAT &&
 697                     format != PIPE_FORMAT_R16G16B16X16_FLOAT) {
 698                     return false;
 699                 }
 700             } else {
 701                 /* Only allow depth/stencil, RGBA8. */
 702                 if (!util_format_is_depth_or_stencil(format) &&
 703                     !util_format_is_rgba8_variant(desc)) {
 704                     return false;
 705                 }
 706             }
 707             break;
 708         default:
 709             return false;
 710     }
 711
 712     /* Check sampler format support. */
 713     if ((usage & PIPE_BIND_SAMPLER_VIEW) &&
 714         /* these two are broken for an unknown reason */
 715         format != PIPE_FORMAT_R8G8B8X8_SNORM &&
 716         format != PIPE_FORMAT_R16G16B16X16_SNORM &&
 717         /* ATI1N is r5xx-only. */
 718         (is_r500 || !is_ati1n) &&
 719         /* ATI2N is supported on r4xx-r5xx. */
 720         (is_r400 || is_r500 || !is_ati2n) &&
 721         r300_is_sampler_format_supported(format)) {
 722         retval |= PIPE_BIND_SAMPLER_VIEW;
 723     }
 724
 725     /* Check colorbuffer format support. */
 726     if ((usage & (PIPE_BIND_RENDER_TARGET |
 727                   PIPE_BIND_DISPLAY_TARGET |
 728                   PIPE_BIND_SCANOUT |
 729                   PIPE_BIND_SHARED |
 730                   PIPE_BIND_BLENDABLE)) &&
 731         /* 2101010 cannot be rendered to on non-r5xx. */
 732         (!is_color2101010 || is_r500) &&
 733         r300_is_colorbuffer_format_supported(format)) {
 734         retval |= usage &
 735             (PIPE_BIND_RENDER_TARGET |
 736              PIPE_BIND_DISPLAY_TARGET |
 737              PIPE_BIND_SCANOUT |
 738              PIPE_BIND_SHARED);
 739
 740         if (r300_is_blending_supported(r300_screen(screen), format)) {
 741             retval |= usage & PIPE_BIND_BLENDABLE;
 742         }
 743     }
 744
 745     /* Check depth-stencil format support. */
 746     if (usage & PIPE_BIND_DEPTH_STENCIL &&
 747         r300_is_zs_format_supported(format)) {
 748         retval |= PIPE_BIND_DEPTH_STENCIL;
 749     }
 750
 751     /* Check vertex buffer format support. */
 752     if (usage & PIPE_BIND_VERTEX_BUFFER) {
 753         if (r300_screen(screen)->caps.has_tcl) {
 754             /* Half float is supported on >= R400. */
 755             if ((is_r400 || is_r500 || !is_half_float) &&
 756                 r300_translate_vertex_data_type(format) != R300_INVALID_FORMAT) {
 757                 retval |= PIPE_BIND_VERTEX_BUFFER;
 758             }
 759         } else {
 760             /* SW TCL */
 761             if (!util_format_is_pure_integer(format)) {
 762                 retval |= PIPE_BIND_VERTEX_BUFFER;
 763             }
 764         }
 765     }
 766
 767     return retval == usage;
 768 }
 769
 770 static void r300_destroy_screen(struct pipe_screen* pscreen)
 771 {
 772     struct r300_screen* r300screen = r300_screen(pscreen);
 773     struct radeon_winsys *rws = radeon_winsys(pscreen);
 774
 775     if (rws && !rws->unref(rws))
 776       return;
 777
 778     mtx_destroy(&r300screen->cmask_mutex);
 779     slab_destroy_parent(&r300screen->pool_transfers);
 780
 781     disk_cache_destroy(r300screen->disk_shader_cache);
 782
 783     if (rws)
 784       rws->destroy(rws);
 785
 786     FREE(r300screen);
 787 }
 788
 789 static void r300_fence_reference(struct pipe_screen *screen,
 790                                  struct pipe_fence_handle **ptr,
 791                                  struct pipe_fence_handle *fence)
 792 {
 793     struct radeon_winsys *rws = r300_screen(screen)->rws;
 794
 795     rws->fence_reference(ptr, fence);
 796 }
 797
 798 static bool r300_fence_finish(struct pipe_screen *screen,
 799                               struct pipe_context *ctx,
 800                               struct pipe_fence_handle *fence,
 801                               uint64_t timeout)
 802 {
 803     struct radeon_winsys *rws = r300_screen(screen)->rws;
 804
 805     return rws->fence_wait(rws, fence, timeout);
 806 }
 807
 808 struct pipe_screen* r300_screen_create(struct radeon_winsys *rws,
 809                                        const struct pipe_screen_config *config)
 810 {
 811     struct r300_screen *r300screen = CALLOC_STRUCT(r300_screen);
 812
 813     if (!r300screen) {
 814         FREE(r300screen);
 815         return NULL;
 816     }
 817
 818     rws->query_info(rws, &r300screen->info);
 819
 820     r300_init_debug(r300screen);
 821     r300_parse_chipset(r300screen->info.pci_id, &r300screen->caps);
 822
 823     if (SCREEN_DBG_ON(r300screen, DBG_NO_ZMASK))
 824         r300screen->caps.zmask_ram = 0;
 825     if (SCREEN_DBG_ON(r300screen, DBG_NO_HIZ))
 826         r300screen->caps.hiz_ram = 0;
 827
 828     r300screen->rws = rws;
 829     r300screen->screen.destroy = r300_destroy_screen;
 830     r300screen->screen.get_name = r300_get_name;
 831     r300screen->screen.get_vendor = r300_get_vendor;
 832     r300screen->screen.get_device_vendor = r300_get_device_vendor;
 833     r300screen->screen.get_disk_shader_cache = r300_get_disk_shader_cache;
 834     r300screen->screen.get_param = r300_get_param;
 835     r300screen->screen.get_shader_param = r300_get_shader_param;
 836     r300screen->screen.get_paramf = r300_get_paramf;
 837     r300screen->screen.get_video_param = r300_get_video_param;
 838     r300screen->screen.is_format_supported = r300_is_format_supported;
 839     r300screen->screen.is_video_format_supported = vl_video_buffer_is_format_supported;
 840     r300screen->screen.context_create = r300_create_context;
 841     r300screen->screen.fence_reference = r300_fence_reference;
 842     r300screen->screen.fence_finish = r300_fence_finish;
 843
 844     r300_init_screen_resource_functions(r300screen);
 845
 846     r300_disk_cache_create(r300screen);
 847
 848     slab_create_parent(&r300screen->pool_transfers, sizeof(struct pipe_transfer), 64);
 849
 850     (void) mtx_init(&r300screen->cmask_mutex, mtx_plain);
 851
 852     return &r300screen->screen;
 853 }