6b3b6c1cccfe02773fc4c0da453229371534f346
[mesa.git] / src / gallium / drivers / r300 / r300_screen.c
1 /*
2 * Copyright 2008 Corbin Simpson <MostAwesomeDude@gmail.com>
3 * Copyright 2010 Marek Olšák <maraeo@gmail.com>
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * on the rights to use, copy, modify, merge, publish, distribute, sub
9 * license, and/or sell copies of the Software, and to permit persons to whom
10 * the Software is furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
14 * Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
20 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
21 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
22 * USE OR OTHER DEALINGS IN THE SOFTWARE. */
23
24 #include "util/u_format.h"
25 #include "util/u_format_s3tc.h"
26 #include "util/u_memory.h"
27 #include "os/os_time.h"
28 #include "vl/vl_decoder.h"
29 #include "vl/vl_video_buffer.h"
30
31 #include "r300_context.h"
32 #include "r300_texture.h"
33 #include "r300_screen_buffer.h"
34 #include "r300_state_inlines.h"
35 #include "r300_public.h"
36
37 #include "draw/draw_context.h"
38
39 /* Return the identifier behind whom the brave coders responsible for this
40 * amalgamation of code, sweat, and duct tape, routinely obscure their names.
41 *
42 * ...I should have just put "Corbin Simpson", but I'm not that cool.
43 *
44 * (Or egotistical. Yet.) */
45 static const char* r300_get_vendor(struct pipe_screen* pscreen)
46 {
47 return "X.Org R300 Project";
48 }
49
50 static const char* chip_families[] = {
51 "ATI R300",
52 "ATI R350",
53 "ATI RV350",
54 "ATI RV370",
55 "ATI RV380",
56 "ATI RS400",
57 "ATI RC410",
58 "ATI RS480",
59 "ATI R420",
60 "ATI R423",
61 "ATI R430",
62 "ATI R480",
63 "ATI R481",
64 "ATI RV410",
65 "ATI RS600",
66 "ATI RS690",
67 "ATI RS740",
68 "ATI RV515",
69 "ATI R520",
70 "ATI RV530",
71 "ATI R580",
72 "ATI RV560",
73 "ATI RV570"
74 };
75
76 static const char* r300_get_name(struct pipe_screen* pscreen)
77 {
78 struct r300_screen* r300screen = r300_screen(pscreen);
79
80 return chip_families[r300screen->caps.family];
81 }
82
83 static int r300_get_param(struct pipe_screen* pscreen, enum pipe_cap param)
84 {
85 struct r300_screen* r300screen = r300_screen(pscreen);
86 boolean is_r500 = r300screen->caps.is_r500;
87
88 switch (param) {
89 /* Supported features (boolean caps). */
90 case PIPE_CAP_NPOT_TEXTURES:
91 case PIPE_CAP_TWO_SIDED_STENCIL:
92 case PIPE_CAP_ANISOTROPIC_FILTER:
93 case PIPE_CAP_POINT_SPRITE:
94 case PIPE_CAP_OCCLUSION_QUERY:
95 case PIPE_CAP_TEXTURE_SHADOW_MAP:
96 case PIPE_CAP_TEXTURE_MIRROR_CLAMP:
97 case PIPE_CAP_BLEND_EQUATION_SEPARATE:
98 case PIPE_CAP_VERTEX_ELEMENT_INSTANCE_DIVISOR:
99 case PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT:
100 case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER:
101 case PIPE_CAP_CONDITIONAL_RENDER:
102 case PIPE_CAP_TEXTURE_BARRIER:
103 case PIPE_CAP_TGSI_CAN_COMPACT_VARYINGS:
104 case PIPE_CAP_TGSI_CAN_COMPACT_CONSTANTS:
105 case PIPE_CAP_VERTEX_COLOR_CLAMPED:
106 return 1;
107
108 case PIPE_CAP_GLSL_FEATURE_LEVEL:
109 return 120;
110
111 /* r300 cannot do swizzling of compressed textures. Supported otherwise. */
112 case PIPE_CAP_TEXTURE_SWIZZLE:
113 return util_format_s3tc_enabled ? r300screen->caps.dxtc_swizzle : 1;
114
115 /* Supported on r500 only. */
116 case PIPE_CAP_VERTEX_COLOR_UNCLAMPED:
117 case PIPE_CAP_MIXED_COLORBUFFER_FORMATS:
118 case PIPE_CAP_SM3:
119 return is_r500 ? 1 : 0;
120
121 /* Unsupported features. */
122 case PIPE_CAP_TIMER_QUERY:
123 case PIPE_CAP_DUAL_SOURCE_BLEND:
124 case PIPE_CAP_INDEP_BLEND_ENABLE:
125 case PIPE_CAP_INDEP_BLEND_FUNC:
126 case PIPE_CAP_DEPTH_CLIP_DISABLE:
127 case PIPE_CAP_DEPTHSTENCIL_CLEAR_SEPARATE:
128 case PIPE_CAP_SHADER_STENCIL_EXPORT:
129 case PIPE_CAP_MAX_TEXTURE_ARRAY_LAYERS:
130 case PIPE_CAP_TGSI_INSTANCEID:
131 case PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT:
132 case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER:
133 case PIPE_CAP_SEAMLESS_CUBE_MAP:
134 case PIPE_CAP_SEAMLESS_CUBE_MAP_PER_TEXTURE:
135 case PIPE_CAP_SCALED_RESOLVE:
136 case PIPE_CAP_MIN_TEXEL_OFFSET:
137 case PIPE_CAP_MAX_TEXEL_OFFSET:
138 case PIPE_CAP_MAX_STREAM_OUTPUT_BUFFERS:
139 case PIPE_CAP_MAX_STREAM_OUTPUT_SEPARATE_COMPONENTS:
140 case PIPE_CAP_MAX_STREAM_OUTPUT_INTERLEAVED_COMPONENTS:
141 case PIPE_CAP_STREAM_OUTPUT_PAUSE_RESUME:
142 case PIPE_CAP_FRAGMENT_COLOR_CLAMPED:
143 case PIPE_CAP_QUADS_FOLLOW_PROVOKING_VERTEX_CONVENTION:
144 return 0;
145
146 /* SWTCL-only features. */
147 case PIPE_CAP_PRIMITIVE_RESTART:
148 return !r300screen->caps.has_tcl;
149
150 /* Texturing. */
151 case PIPE_CAP_MAX_COMBINED_SAMPLERS:
152 return r300screen->caps.num_tex_units;
153 case PIPE_CAP_MAX_TEXTURE_2D_LEVELS:
154 case PIPE_CAP_MAX_TEXTURE_3D_LEVELS:
155 case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS:
156 /* 13 == 4096, 12 == 2048 */
157 return is_r500 ? 13 : 12;
158
159 /* Render targets. */
160 case PIPE_CAP_MAX_RENDER_TARGETS:
161 return 4;
162 }
163 return 0;
164 }
165
166 static int r300_get_shader_param(struct pipe_screen *pscreen, unsigned shader, enum pipe_shader_cap param)
167 {
168 struct r300_screen* r300screen = r300_screen(pscreen);
169 boolean is_r400 = r300screen->caps.is_r400;
170 boolean is_r500 = r300screen->caps.is_r500;
171
172 switch (shader) {
173 case PIPE_SHADER_FRAGMENT:
174 switch (param)
175 {
176 case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
177 return is_r500 || is_r400 ? 512 : 96;
178 case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
179 return is_r500 || is_r400 ? 512 : 64;
180 case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
181 return is_r500 || is_r400 ? 512 : 32;
182 case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
183 return is_r500 ? 511 : 4;
184 case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:
185 return is_r500 ? 64 : 0; /* Actually unlimited on r500. */
186 /* Fragment shader limits. */
187 case PIPE_SHADER_CAP_MAX_INPUTS:
188 /* 2 colors + 8 texcoords are always supported
189 * (minus fog and wpos).
190 *
191 * R500 has the ability to turn 3rd and 4th color into
192 * additional texcoords but there is no two-sided color
193 * selection then. However the facing bit can be used instead. */
194 return 10;
195 case PIPE_SHADER_CAP_MAX_CONSTS:
196 return is_r500 ? 256 : 32;
197 case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
198 return 1;
199 case PIPE_SHADER_CAP_MAX_TEMPS:
200 return is_r500 ? 128 : is_r400 ? 64 : 32;
201 case PIPE_SHADER_CAP_MAX_PREDS:
202 return is_r500 ? 1 : 0;
203 case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
204 return r300screen->caps.num_tex_units;
205 case PIPE_SHADER_CAP_MAX_ADDRS:
206 case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
207 case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
208 case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
209 case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
210 case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
211 case PIPE_SHADER_CAP_SUBROUTINES:
212 case PIPE_SHADER_CAP_INTEGERS:
213 case PIPE_SHADER_CAP_OUTPUT_READ:
214 return 0;
215 }
216 break;
217 case PIPE_SHADER_VERTEX:
218 switch (param)
219 {
220 case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
221 return 0;
222 default:;
223 }
224
225 if (!r300screen->caps.has_tcl) {
226 return draw_get_shader_param(shader, param);
227 }
228
229 switch (param)
230 {
231 case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
232 case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
233 return is_r500 ? 1024 : 256;
234 case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:
235 return is_r500 ? 4 : 0; /* For loops; not sure about conditionals. */
236 case PIPE_SHADER_CAP_MAX_INPUTS:
237 return 16;
238 case PIPE_SHADER_CAP_MAX_CONSTS:
239 return 256;
240 case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
241 return 1;
242 case PIPE_SHADER_CAP_MAX_TEMPS:
243 return 32;
244 case PIPE_SHADER_CAP_MAX_ADDRS:
245 return 1; /* XXX guessed */
246 case PIPE_SHADER_CAP_MAX_PREDS:
247 return is_r500 ? 4 : 0; /* XXX guessed. */
248 case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
249 return 1;
250 case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
251 case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
252 case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
253 case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
254 case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
255 case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
256 case PIPE_SHADER_CAP_SUBROUTINES:
257 case PIPE_SHADER_CAP_INTEGERS:
258 case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
259 case PIPE_SHADER_CAP_OUTPUT_READ:
260 return 0;
261 }
262 break;
263 }
264 return 0;
265 }
266
267 static float r300_get_paramf(struct pipe_screen* pscreen,
268 enum pipe_capf param)
269 {
270 struct r300_screen* r300screen = r300_screen(pscreen);
271
272 switch (param) {
273 case PIPE_CAPF_MAX_LINE_WIDTH:
274 case PIPE_CAPF_MAX_LINE_WIDTH_AA:
275 case PIPE_CAPF_MAX_POINT_WIDTH:
276 case PIPE_CAPF_MAX_POINT_WIDTH_AA:
277 /* The maximum dimensions of the colorbuffer are our practical
278 * rendering limits. 2048 pixels should be enough for anybody. */
279 if (r300screen->caps.is_r500) {
280 return 4096.0f;
281 } else if (r300screen->caps.is_r400) {
282 return 4021.0f;
283 } else {
284 return 2560.0f;
285 }
286 case PIPE_CAPF_MAX_TEXTURE_ANISOTROPY:
287 return 16.0f;
288 case PIPE_CAPF_MAX_TEXTURE_LOD_BIAS:
289 return 16.0f;
290 case PIPE_CAPF_GUARD_BAND_LEFT:
291 case PIPE_CAPF_GUARD_BAND_TOP:
292 case PIPE_CAPF_GUARD_BAND_RIGHT:
293 case PIPE_CAPF_GUARD_BAND_BOTTOM:
294 /* XXX I don't know what these should be but the least we can do is
295 * silence the potential error message */
296 return 0.0f;
297 default:
298 debug_printf("r300: Warning: Unknown CAP %d in get_paramf.\n",
299 param);
300 return 0.0f;
301 }
302 }
303
304 static int r300_get_video_param(struct pipe_screen *screen,
305 enum pipe_video_profile profile,
306 enum pipe_video_cap param)
307 {
308 switch (param) {
309 case PIPE_VIDEO_CAP_SUPPORTED:
310 return vl_profile_supported(screen, profile);
311 case PIPE_VIDEO_CAP_NPOT_TEXTURES:
312 return 0;
313 case PIPE_VIDEO_CAP_MAX_WIDTH:
314 case PIPE_VIDEO_CAP_MAX_HEIGHT:
315 return vl_video_buffer_max_size(screen);
316 case PIPE_VIDEO_CAP_PREFERED_FORMAT:
317 return PIPE_FORMAT_NV12;
318 case PIPE_VIDEO_CAP_PREFERS_INTERLACED:
319 return false;
320 case PIPE_VIDEO_CAP_SUPPORTS_INTERLACED:
321 return false;
322 case PIPE_VIDEO_CAP_SUPPORTS_PROGRESSIVE:
323 return true;
324 default:
325 return 0;
326 }
327 }
328
329 static boolean r300_is_format_supported(struct pipe_screen* screen,
330 enum pipe_format format,
331 enum pipe_texture_target target,
332 unsigned sample_count,
333 unsigned usage)
334 {
335 uint32_t retval = 0;
336 boolean drm_2_8_0 = r300_screen(screen)->info.drm_minor >= 8;
337 boolean is_r500 = r300_screen(screen)->caps.is_r500;
338 boolean is_r400 = r300_screen(screen)->caps.is_r400;
339 boolean is_color2101010 = format == PIPE_FORMAT_R10G10B10A2_UNORM ||
340 format == PIPE_FORMAT_R10G10B10X2_SNORM ||
341 format == PIPE_FORMAT_B10G10R10A2_UNORM ||
342 format == PIPE_FORMAT_R10SG10SB10SA2U_NORM;
343 boolean is_ati1n = format == PIPE_FORMAT_RGTC1_UNORM ||
344 format == PIPE_FORMAT_RGTC1_SNORM ||
345 format == PIPE_FORMAT_LATC1_UNORM ||
346 format == PIPE_FORMAT_LATC1_SNORM;
347 boolean is_ati2n = format == PIPE_FORMAT_RGTC2_UNORM ||
348 format == PIPE_FORMAT_RGTC2_SNORM ||
349 format == PIPE_FORMAT_LATC2_UNORM ||
350 format == PIPE_FORMAT_LATC2_SNORM;
351 boolean is_x16f_xy16f = format == PIPE_FORMAT_R16_FLOAT ||
352 format == PIPE_FORMAT_R16G16_FLOAT ||
353 format == PIPE_FORMAT_A16_FLOAT ||
354 format == PIPE_FORMAT_L16_FLOAT ||
355 format == PIPE_FORMAT_L16A16_FLOAT ||
356 format == PIPE_FORMAT_I16_FLOAT;
357 boolean is_half_float = format == PIPE_FORMAT_R16_FLOAT ||
358 format == PIPE_FORMAT_R16G16_FLOAT ||
359 format == PIPE_FORMAT_R16G16B16_FLOAT ||
360 format == PIPE_FORMAT_R16G16B16A16_FLOAT;
361 boolean is_fixed = format == PIPE_FORMAT_R32_FIXED ||
362 format == PIPE_FORMAT_R32G32_FIXED ||
363 format == PIPE_FORMAT_R32G32B32_FIXED ||
364 format == PIPE_FORMAT_R32G32B32A32_FIXED;
365
366 if (!util_format_is_supported(format, usage))
367 return FALSE;
368
369 /* Check multisampling support. */
370 switch (sample_count) {
371 case 0:
372 case 1:
373 break;
374 case 2:
375 case 3:
376 case 4:
377 case 6:
378 return FALSE;
379 #if 0
380 if (usage != PIPE_BIND_RENDER_TARGET ||
381 !util_format_is_rgba8_variant(
382 util_format_description(format))) {
383 return FALSE;
384 }
385 #endif
386 break;
387 default:
388 return FALSE;
389 }
390
391 /* Check sampler format support. */
392 if ((usage & PIPE_BIND_SAMPLER_VIEW) &&
393 /* ATI1N is r5xx-only. */
394 (is_r500 || !is_ati1n) &&
395 /* ATI2N is supported on r4xx-r5xx. */
396 (is_r400 || is_r500 || !is_ati2n) &&
397 /* R16F and RG16F texture support was added in as late as DRM 2.8.0 */
398 (drm_2_8_0 || !is_x16f_xy16f) &&
399 r300_is_sampler_format_supported(format)) {
400 retval |= PIPE_BIND_SAMPLER_VIEW;
401 }
402
403 /* Check colorbuffer format support. */
404 if ((usage & (PIPE_BIND_RENDER_TARGET |
405 PIPE_BIND_DISPLAY_TARGET |
406 PIPE_BIND_SCANOUT |
407 PIPE_BIND_SHARED)) &&
408 /* 2101010 cannot be rendered to on non-r5xx. */
409 (!is_color2101010 || (is_r500 && drm_2_8_0)) &&
410 r300_is_colorbuffer_format_supported(format)) {
411 retval |= usage &
412 (PIPE_BIND_RENDER_TARGET |
413 PIPE_BIND_DISPLAY_TARGET |
414 PIPE_BIND_SCANOUT |
415 PIPE_BIND_SHARED);
416 }
417
418 /* Check depth-stencil format support. */
419 if (usage & PIPE_BIND_DEPTH_STENCIL &&
420 r300_is_zs_format_supported(format)) {
421 retval |= PIPE_BIND_DEPTH_STENCIL;
422 }
423
424 /* Check vertex buffer format support. */
425 if (usage & PIPE_BIND_VERTEX_BUFFER &&
426 /* Half float is supported on >= R400. */
427 (is_r400 || is_r500 || !is_half_float) &&
428 /* We have a fallback for FIXED. */
429 (is_fixed || r300_translate_vertex_data_type(format) != R300_INVALID_FORMAT)) {
430 retval |= PIPE_BIND_VERTEX_BUFFER;
431 }
432
433 /* Transfers are always supported. */
434 if (usage & PIPE_BIND_TRANSFER_READ)
435 retval |= PIPE_BIND_TRANSFER_READ;
436 if (usage & PIPE_BIND_TRANSFER_WRITE)
437 retval |= PIPE_BIND_TRANSFER_WRITE;
438
439 return retval == usage;
440 }
441
442 static void r300_destroy_screen(struct pipe_screen* pscreen)
443 {
444 struct r300_screen* r300screen = r300_screen(pscreen);
445 struct radeon_winsys *rws = radeon_winsys(pscreen);
446
447 util_slab_destroy(&r300screen->pool_buffers);
448 pipe_mutex_destroy(r300screen->num_contexts_mutex);
449
450 if (rws)
451 rws->destroy(rws);
452
453 FREE(r300screen);
454 }
455
456 static void r300_fence_reference(struct pipe_screen *screen,
457 struct pipe_fence_handle **ptr,
458 struct pipe_fence_handle *fence)
459 {
460 pb_reference((struct pb_buffer**)ptr,
461 (struct pb_buffer*)fence);
462 }
463
464 static boolean r300_fence_signalled(struct pipe_screen *screen,
465 struct pipe_fence_handle *fence)
466 {
467 struct radeon_winsys *rws = r300_screen(screen)->rws;
468 struct pb_buffer *rfence = (struct pb_buffer*)fence;
469
470 return !rws->buffer_is_busy(rfence, RADEON_USAGE_READWRITE);
471 }
472
473 static boolean r300_fence_finish(struct pipe_screen *screen,
474 struct pipe_fence_handle *fence,
475 uint64_t timeout)
476 {
477 struct radeon_winsys *rws = r300_screen(screen)->rws;
478 struct pb_buffer *rfence = (struct pb_buffer*)fence;
479
480 if (timeout != PIPE_TIMEOUT_INFINITE) {
481 int64_t start_time = os_time_get();
482
483 /* Convert to microseconds. */
484 timeout /= 1000;
485
486 /* Wait in a loop. */
487 while (rws->buffer_is_busy(rfence, RADEON_USAGE_READWRITE)) {
488 if (os_time_get() - start_time >= timeout) {
489 return FALSE;
490 }
491 os_time_sleep(10);
492 }
493 return TRUE;
494 }
495
496 rws->buffer_wait(rfence, RADEON_USAGE_READWRITE);
497 return TRUE;
498 }
499
500 struct pipe_screen* r300_screen_create(struct radeon_winsys *rws)
501 {
502 struct r300_screen *r300screen = CALLOC_STRUCT(r300_screen);
503
504 if (!r300screen) {
505 FREE(r300screen);
506 return NULL;
507 }
508
509 rws->query_info(rws, &r300screen->info);
510
511 r300_init_debug(r300screen);
512 r300_parse_chipset(r300screen->info.pci_id, &r300screen->caps);
513
514 if (SCREEN_DBG_ON(r300screen, DBG_NO_ZMASK))
515 r300screen->caps.zmask_ram = 0;
516 if (SCREEN_DBG_ON(r300screen, DBG_NO_HIZ))
517 r300screen->caps.hiz_ram = 0;
518
519 if (r300screen->info.drm_minor < 8)
520 r300screen->caps.has_us_format = FALSE;
521
522 pipe_mutex_init(r300screen->num_contexts_mutex);
523
524 util_slab_create(&r300screen->pool_buffers,
525 sizeof(struct r300_resource), 64,
526 UTIL_SLAB_SINGLETHREADED);
527
528 r300screen->rws = rws;
529 r300screen->screen.winsys = (struct pipe_winsys*)rws;
530 r300screen->screen.destroy = r300_destroy_screen;
531 r300screen->screen.get_name = r300_get_name;
532 r300screen->screen.get_vendor = r300_get_vendor;
533 r300screen->screen.get_param = r300_get_param;
534 r300screen->screen.get_shader_param = r300_get_shader_param;
535 r300screen->screen.get_paramf = r300_get_paramf;
536 r300screen->screen.get_video_param = r300_get_video_param;
537 r300screen->screen.is_format_supported = r300_is_format_supported;
538 r300screen->screen.is_video_format_supported = vl_video_buffer_is_format_supported;
539 r300screen->screen.context_create = r300_create_context;
540 r300screen->screen.fence_reference = r300_fence_reference;
541 r300screen->screen.fence_signalled = r300_fence_signalled;
542 r300screen->screen.fence_finish = r300_fence_finish;
543
544 r300_init_screen_resource_functions(r300screen);
545
546 util_format_s3tc_init();
547
548 return &r300screen->screen;
549 }