src/gallium/drivers/r300/r300_screen.c

   1 /*
   2  * Copyright 2008 Corbin Simpson <MostAwesomeDude@gmail.com>
   3  * Copyright 2010 Marek Olšák <maraeo@gmail.com>
   4  *
   5  * Permission is hereby granted, free of charge, to any person obtaining a
   6  * copy of this software and associated documentation files (the "Software"),
   7  * to deal in the Software without restriction, including without limitation
   8  * on the rights to use, copy, modify, merge, publish, distribute, sub
   9  * license, and/or sell copies of the Software, and to permit persons to whom
  10  * the Software is furnished to do so, subject to the following conditions:
  11  *
  12  * The above copyright notice and this permission notice (including the next
  13  * paragraph) shall be included in all copies or substantial portions of the
  14  * Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  19  * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
  20  * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
  21  * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
  22  * USE OR OTHER DEALINGS IN THE SOFTWARE. */
  23
  24 #include "util/u_format.h"
  25 #include "util/u_format_s3tc.h"
  26 #include "util/u_memory.h"
  27 #include "os/os_time.h"
  28 #include "vl/vl_decoder.h"
  29 #include "vl/vl_video_buffer.h"
  30
  31 #include "r300_context.h"
  32 #include "r300_texture.h"
  33 #include "r300_screen_buffer.h"
  34 #include "r300_state_inlines.h"
  35 #include "r300_public.h"
  36
  37 #include "draw/draw_context.h"
  38
  39 /* Return the identifier behind whom the brave coders responsible for this
  40  * amalgamation of code, sweat, and duct tape, routinely obscure their names.
  41  *
  42  * ...I should have just put "Corbin Simpson", but I'm not that cool.
  43  *
  44  * (Or egotistical. Yet.) */
  45 static const char* r300_get_vendor(struct pipe_screen* pscreen)
  46 {
  47     return "X.Org R300 Project";
  48 }
  49
  50 static const char* r300_get_device_vendor(struct pipe_screen* pscreen)
  51 {
  52     return "ATI";
  53 }
  54
  55 static const char* chip_families[] = {
  56     "unknown",
  57     "ATI R300",
  58     "ATI R350",
  59     "ATI RV350",
  60     "ATI RV370",
  61     "ATI RV380",
  62     "ATI RS400",
  63     "ATI RC410",
  64     "ATI RS480",
  65     "ATI R420",
  66     "ATI R423",
  67     "ATI R430",
  68     "ATI R480",
  69     "ATI R481",
  70     "ATI RV410",
  71     "ATI RS600",
  72     "ATI RS690",
  73     "ATI RS740",
  74     "ATI RV515",
  75     "ATI R520",
  76     "ATI RV530",
  77     "ATI R580",
  78     "ATI RV560",
  79     "ATI RV570"
  80 };
  81
  82 static const char* r300_get_name(struct pipe_screen* pscreen)
  83 {
  84     struct r300_screen* r300screen = r300_screen(pscreen);
  85
  86     return chip_families[r300screen->caps.family];
  87 }
  88
  89 static int r300_get_param(struct pipe_screen* pscreen, enum pipe_cap param)
  90 {
  91     struct r300_screen* r300screen = r300_screen(pscreen);
  92     boolean is_r500 = r300screen->caps.is_r500;
  93
  94     switch (param) {
  95         /* Supported features (boolean caps). */
  96         case PIPE_CAP_NPOT_TEXTURES:
  97         case PIPE_CAP_MIXED_FRAMEBUFFER_SIZES:
  98         case PIPE_CAP_MIXED_COLOR_DEPTH_BITS:
  99         case PIPE_CAP_TWO_SIDED_STENCIL:
 100         case PIPE_CAP_ANISOTROPIC_FILTER:
 101         case PIPE_CAP_POINT_SPRITE:
 102         case PIPE_CAP_OCCLUSION_QUERY:
 103         case PIPE_CAP_TEXTURE_SHADOW_MAP:
 104         case PIPE_CAP_TEXTURE_MIRROR_CLAMP:
 105         case PIPE_CAP_BLEND_EQUATION_SEPARATE:
 106         case PIPE_CAP_VERTEX_ELEMENT_INSTANCE_DIVISOR:
 107         case PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT:
 108         case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER:
 109         case PIPE_CAP_CONDITIONAL_RENDER:
 110         case PIPE_CAP_TEXTURE_BARRIER:
 111         case PIPE_CAP_TGSI_CAN_COMPACT_CONSTANTS:
 112         case PIPE_CAP_USER_INDEX_BUFFERS:
 113         case PIPE_CAP_USER_CONSTANT_BUFFERS:
 114         case PIPE_CAP_PREFER_BLIT_BASED_TEXTURE_TRANSFER:
 115         case PIPE_CAP_BUFFER_MAP_PERSISTENT_COHERENT:
 116         case PIPE_CAP_CLIP_HALFZ:
 117             return 1;
 118
 119         case PIPE_CAP_MIN_MAP_BUFFER_ALIGNMENT:
 120             return R300_BUFFER_ALIGNMENT;
 121
 122         case PIPE_CAP_CONSTANT_BUFFER_OFFSET_ALIGNMENT:
 123             return 16;
 124
 125         case PIPE_CAP_GLSL_FEATURE_LEVEL:
 126             return 120;
 127
 128         /* r300 cannot do swizzling of compressed textures. Supported otherwise. */
 129         case PIPE_CAP_TEXTURE_SWIZZLE:
 130             return util_format_s3tc_enabled ? r300screen->caps.dxtc_swizzle : 1;
 131
 132         /* We don't support color clamping on r500, so that we can use color
 133          * intepolators for generic varyings. */
 134         case PIPE_CAP_VERTEX_COLOR_CLAMPED:
 135             return !is_r500;
 136
 137         /* Supported on r500 only. */
 138         case PIPE_CAP_VERTEX_COLOR_UNCLAMPED:
 139         case PIPE_CAP_MIXED_COLORBUFFER_FORMATS:
 140         case PIPE_CAP_SM3:
 141             return is_r500 ? 1 : 0;
 142
 143         /* Unsupported features. */
 144         case PIPE_CAP_QUERY_TIME_ELAPSED:
 145         case PIPE_CAP_QUERY_PIPELINE_STATISTICS:
 146         case PIPE_CAP_MAX_DUAL_SOURCE_RENDER_TARGETS:
 147         case PIPE_CAP_INDEP_BLEND_ENABLE:
 148         case PIPE_CAP_INDEP_BLEND_FUNC:
 149         case PIPE_CAP_DEPTH_CLIP_DISABLE:
 150         case PIPE_CAP_SHADER_STENCIL_EXPORT:
 151         case PIPE_CAP_MAX_TEXTURE_ARRAY_LAYERS:
 152         case PIPE_CAP_TGSI_INSTANCEID:
 153         case PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT:
 154         case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER:
 155         case PIPE_CAP_SEAMLESS_CUBE_MAP:
 156         case PIPE_CAP_SEAMLESS_CUBE_MAP_PER_TEXTURE:
 157         case PIPE_CAP_MIN_TEXEL_OFFSET:
 158         case PIPE_CAP_MAX_TEXEL_OFFSET:
 159         case PIPE_CAP_MIN_TEXTURE_GATHER_OFFSET:
 160         case PIPE_CAP_MAX_TEXTURE_GATHER_OFFSET:
 161         case PIPE_CAP_MAX_STREAM_OUTPUT_BUFFERS:
 162         case PIPE_CAP_MAX_STREAM_OUTPUT_SEPARATE_COMPONENTS:
 163         case PIPE_CAP_MAX_STREAM_OUTPUT_INTERLEAVED_COMPONENTS:
 164         case PIPE_CAP_MAX_GEOMETRY_OUTPUT_VERTICES:
 165         case PIPE_CAP_MAX_GEOMETRY_TOTAL_OUTPUT_COMPONENTS:
 166         case PIPE_CAP_MAX_VERTEX_STREAMS:
 167         case PIPE_CAP_STREAM_OUTPUT_PAUSE_RESUME:
 168         case PIPE_CAP_STREAM_OUTPUT_INTERLEAVE_BUFFERS:
 169         case PIPE_CAP_FRAGMENT_COLOR_CLAMPED:
 170         case PIPE_CAP_QUADS_FOLLOW_PROVOKING_VERTEX_CONVENTION:
 171         case PIPE_CAP_COMPUTE:
 172         case PIPE_CAP_START_INSTANCE:
 173         case PIPE_CAP_QUERY_TIMESTAMP:
 174         case PIPE_CAP_TEXTURE_MULTISAMPLE:
 175         case PIPE_CAP_CUBE_MAP_ARRAY:
 176         case PIPE_CAP_TEXTURE_BUFFER_OBJECTS:
 177         case PIPE_CAP_TEXTURE_BUFFER_OFFSET_ALIGNMENT:
 178         case PIPE_CAP_TEXTURE_BORDER_COLOR_QUIRK:
 179         case PIPE_CAP_MAX_TEXTURE_BUFFER_SIZE:
 180         case PIPE_CAP_TGSI_VS_LAYER_VIEWPORT:
 181         case PIPE_CAP_MAX_TEXTURE_GATHER_COMPONENTS:
 182         case PIPE_CAP_TEXTURE_GATHER_SM5:
 183         case PIPE_CAP_TEXTURE_QUERY_LOD:
 184         case PIPE_CAP_FAKE_SW_MSAA:
 185         case PIPE_CAP_SAMPLE_SHADING:
 186         case PIPE_CAP_TEXTURE_GATHER_OFFSETS:
 187         case PIPE_CAP_DRAW_INDIRECT:
 188         case PIPE_CAP_MULTI_DRAW_INDIRECT:
 189         case PIPE_CAP_MULTI_DRAW_INDIRECT_PARAMS:
 190         case PIPE_CAP_TGSI_FS_FINE_DERIVATIVE:
 191         case PIPE_CAP_CONDITIONAL_RENDER_INVERTED:
 192         case PIPE_CAP_SAMPLER_VIEW_TARGET:
 193         case PIPE_CAP_VERTEXID_NOBASE:
 194         case PIPE_CAP_POLYGON_OFFSET_CLAMP:
 195         case PIPE_CAP_MULTISAMPLE_Z_RESOLVE:
 196         case PIPE_CAP_RESOURCE_FROM_USER_MEMORY:
 197         case PIPE_CAP_DEVICE_RESET_STATUS_QUERY:
 198         case PIPE_CAP_MAX_SHADER_PATCH_VARYINGS:
 199         case PIPE_CAP_TEXTURE_FLOAT_LINEAR:
 200         case PIPE_CAP_TEXTURE_HALF_FLOAT_LINEAR:
 201         case PIPE_CAP_DEPTH_BOUNDS_TEST:
 202         case PIPE_CAP_TGSI_TXQS:
 203         case PIPE_CAP_FORCE_PERSAMPLE_INTERP:
 204         case PIPE_CAP_SHAREABLE_SHADERS:
 205         case PIPE_CAP_COPY_BETWEEN_COMPRESSED_AND_PLAIN_FORMATS:
 206         case PIPE_CAP_CLEAR_TEXTURE:
 207         case PIPE_CAP_DRAW_PARAMETERS:
 208         case PIPE_CAP_TGSI_PACK_HALF_FLOAT:
 209         case PIPE_CAP_TGSI_FS_POSITION_IS_SYSVAL:
 210         case PIPE_CAP_TGSI_FS_FACE_IS_INTEGER_SYSVAL:
 211         case PIPE_CAP_SHADER_BUFFER_OFFSET_ALIGNMENT:
 212         case PIPE_CAP_INVALIDATE_BUFFER:
 213         case PIPE_CAP_GENERATE_MIPMAP:
 214         case PIPE_CAP_STRING_MARKER:
 215         case PIPE_CAP_BUFFER_SAMPLER_VIEW_RGBA_ONLY:
 216         case PIPE_CAP_SURFACE_REINTERPRET_BLOCKS:
 217         case PIPE_CAP_QUERY_BUFFER_OBJECT:
 218         case PIPE_CAP_QUERY_MEMORY_INFO:
 219         case PIPE_CAP_FRAMEBUFFER_NO_ATTACHMENT:
 220         case PIPE_CAP_ROBUST_BUFFER_ACCESS_BEHAVIOR:
 221         case PIPE_CAP_CULL_DISTANCE:
 222         case PIPE_CAP_PRIMITIVE_RESTART_FOR_PATCHES:
 223         case PIPE_CAP_TGSI_VOTE:
 224         case PIPE_CAP_MAX_WINDOW_RECTANGLES:
 225         case PIPE_CAP_POLYGON_OFFSET_UNITS_UNSCALED:
 226         case PIPE_CAP_VIEWPORT_SUBPIXEL_BITS:
 227         case PIPE_CAP_TGSI_ARRAY_COMPONENTS:
 228         case PIPE_CAP_TGSI_CAN_READ_OUTPUTS:
 229         case PIPE_CAP_NATIVE_FENCE_FD:
 230         case PIPE_CAP_GLSL_OPTIMIZE_CONSERVATIVELY:
 231         case PIPE_CAP_TGSI_FS_FBFETCH:
 232         case PIPE_CAP_TGSI_MUL_ZERO_WINS:
 233         case PIPE_CAP_DOUBLES:
 234         case PIPE_CAP_INT64:
 235         case PIPE_CAP_INT64_DIVMOD:
 236             return 0;
 237
 238         /* SWTCL-only features. */
 239         case PIPE_CAP_PRIMITIVE_RESTART:
 240         case PIPE_CAP_USER_VERTEX_BUFFERS:
 241         case PIPE_CAP_TGSI_VS_WINDOW_SPACE_POSITION:
 242             return !r300screen->caps.has_tcl;
 243
 244         /* HWTCL-only features / limitations. */
 245         case PIPE_CAP_VERTEX_BUFFER_OFFSET_4BYTE_ALIGNED_ONLY:
 246         case PIPE_CAP_VERTEX_BUFFER_STRIDE_4BYTE_ALIGNED_ONLY:
 247         case PIPE_CAP_VERTEX_ELEMENT_SRC_OFFSET_4BYTE_ALIGNED_ONLY:
 248             return r300screen->caps.has_tcl;
 249         case PIPE_CAP_TGSI_TEXCOORD:
 250             return 0;
 251
 252         /* Texturing. */
 253         case PIPE_CAP_MAX_TEXTURE_2D_LEVELS:
 254         case PIPE_CAP_MAX_TEXTURE_3D_LEVELS:
 255         case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS:
 256             /* 13 == 4096, 12 == 2048 */
 257             return is_r500 ? 13 : 12;
 258
 259         /* Render targets. */
 260         case PIPE_CAP_MAX_RENDER_TARGETS:
 261             return 4;
 262         case PIPE_CAP_ENDIANNESS:
 263             return PIPE_ENDIAN_LITTLE;
 264
 265         case PIPE_CAP_MAX_VIEWPORTS:
 266             return 1;
 267
 268         case PIPE_CAP_MAX_VERTEX_ATTRIB_STRIDE:
 269             return 2048;
 270
 271         case PIPE_CAP_VENDOR_ID:
 272                 return 0x1002;
 273         case PIPE_CAP_DEVICE_ID:
 274                 return r300screen->info.pci_id;
 275         case PIPE_CAP_ACCELERATED:
 276                 return 1;
 277         case PIPE_CAP_VIDEO_MEMORY:
 278                 return r300screen->info.vram_size >> 20;
 279         case PIPE_CAP_UMA:
 280                 return 0;
 281         case PIPE_CAP_PCI_GROUP:
 282             return r300screen->info.pci_domain;
 283         case PIPE_CAP_PCI_BUS:
 284             return r300screen->info.pci_bus;
 285         case PIPE_CAP_PCI_DEVICE:
 286             return r300screen->info.pci_dev;
 287         case PIPE_CAP_PCI_FUNCTION:
 288             return r300screen->info.pci_func;
 289     }
 290     return 0;
 291 }
 292
 293 static int r300_get_shader_param(struct pipe_screen *pscreen, unsigned shader, enum pipe_shader_cap param)
 294 {
 295    struct r300_screen* r300screen = r300_screen(pscreen);
 296    boolean is_r400 = r300screen->caps.is_r400;
 297    boolean is_r500 = r300screen->caps.is_r500;
 298
 299    switch (shader) {
 300     case PIPE_SHADER_FRAGMENT:
 301         switch (param)
 302         {
 303         case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
 304             return is_r500 || is_r400 ? 512 : 96;
 305         case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
 306             return is_r500 || is_r400 ? 512 : 64;
 307         case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
 308             return is_r500 || is_r400 ? 512 : 32;
 309         case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
 310             return is_r500 ? 511 : 4;
 311         case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:
 312             return is_r500 ? 64 : 0; /* Actually unlimited on r500. */
 313             /* Fragment shader limits. */
 314         case PIPE_SHADER_CAP_MAX_INPUTS:
 315             /* 2 colors + 8 texcoords are always supported
 316              * (minus fog and wpos).
 317              *
 318              * R500 has the ability to turn 3rd and 4th color into
 319              * additional texcoords but there is no two-sided color
 320              * selection then. However the facing bit can be used instead. */
 321             return 10;
 322         case PIPE_SHADER_CAP_MAX_OUTPUTS:
 323             return 4;
 324         case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE:
 325             return (is_r500 ? 256 : 32) * sizeof(float[4]);
 326         case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
 327         case PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE:
 328             return 1;
 329         case PIPE_SHADER_CAP_MAX_TEMPS:
 330             return is_r500 ? 128 : is_r400 ? 64 : 32;
 331         case PIPE_SHADER_CAP_MAX_PREDS:
 332             return 0; /* unused */
 333         case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
 334         case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS:
 335            return r300screen->caps.num_tex_units;
 336         case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
 337         case PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED:
 338         case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
 339         case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
 340         case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
 341         case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
 342         case PIPE_SHADER_CAP_SUBROUTINES:
 343         case PIPE_SHADER_CAP_INTEGERS:
 344         case PIPE_SHADER_CAP_TGSI_DROUND_SUPPORTED:
 345         case PIPE_SHADER_CAP_TGSI_DFRACEXP_DLDEXP_SUPPORTED:
 346         case PIPE_SHADER_CAP_TGSI_FMA_SUPPORTED:
 347         case PIPE_SHADER_CAP_MAX_SHADER_BUFFERS:
 348         case PIPE_SHADER_CAP_MAX_SHADER_IMAGES:
 349         case PIPE_SHADER_CAP_LOWER_IF_THRESHOLD:
 350             return 0;
 351         case PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT:
 352             return 32;
 353         case PIPE_SHADER_CAP_PREFERRED_IR:
 354             return PIPE_SHADER_IR_TGSI;
 355         case PIPE_SHADER_CAP_SUPPORTED_IRS:
 356             return 0;
 357         }
 358         break;
 359     case PIPE_SHADER_VERTEX:
 360         switch (param)
 361         {
 362         case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
 363         case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS:
 364         case PIPE_SHADER_CAP_SUBROUTINES:
 365             return 0;
 366         default:;
 367         }
 368
 369         if (!r300screen->caps.has_tcl) {
 370             return draw_get_shader_param(shader, param);
 371         }
 372
 373         switch (param)
 374         {
 375         case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
 376         case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
 377             return is_r500 ? 1024 : 256;
 378         case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:
 379             return is_r500 ? 4 : 0; /* For loops; not sure about conditionals. */
 380         case PIPE_SHADER_CAP_MAX_INPUTS:
 381             return 16;
 382         case PIPE_SHADER_CAP_MAX_OUTPUTS:
 383             return 10;
 384         case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE:
 385             return 256 * sizeof(float[4]);
 386         case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
 387             return 1;
 388         case PIPE_SHADER_CAP_MAX_TEMPS:
 389             return 32;
 390         case PIPE_SHADER_CAP_MAX_PREDS:
 391             return 0; /* unused */
 392         case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
 393         case PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE:
 394             return 1;
 395         case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
 396         case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
 397         case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
 398         case PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED:
 399         case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
 400         case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
 401         case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
 402         case PIPE_SHADER_CAP_SUBROUTINES:
 403         case PIPE_SHADER_CAP_INTEGERS:
 404         case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
 405         case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS:
 406         case PIPE_SHADER_CAP_TGSI_DROUND_SUPPORTED:
 407         case PIPE_SHADER_CAP_TGSI_DFRACEXP_DLDEXP_SUPPORTED:
 408         case PIPE_SHADER_CAP_TGSI_FMA_SUPPORTED:
 409         case PIPE_SHADER_CAP_MAX_SHADER_BUFFERS:
 410         case PIPE_SHADER_CAP_MAX_SHADER_IMAGES:
 411         case PIPE_SHADER_CAP_LOWER_IF_THRESHOLD:
 412             return 0;
 413         case PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT:
 414             return 32;
 415         case PIPE_SHADER_CAP_PREFERRED_IR:
 416             return PIPE_SHADER_IR_TGSI;
 417         case PIPE_SHADER_CAP_SUPPORTED_IRS:
 418             return 0;
 419         }
 420         break;
 421     }
 422     return 0;
 423 }
 424
 425 static float r300_get_paramf(struct pipe_screen* pscreen,
 426                              enum pipe_capf param)
 427 {
 428     struct r300_screen* r300screen = r300_screen(pscreen);
 429
 430     switch (param) {
 431         case PIPE_CAPF_MAX_LINE_WIDTH:
 432         case PIPE_CAPF_MAX_LINE_WIDTH_AA:
 433         case PIPE_CAPF_MAX_POINT_WIDTH:
 434         case PIPE_CAPF_MAX_POINT_WIDTH_AA:
 435             /* The maximum dimensions of the colorbuffer are our practical
 436              * rendering limits. 2048 pixels should be enough for anybody. */
 437             if (r300screen->caps.is_r500) {
 438                 return 4096.0f;
 439             } else if (r300screen->caps.is_r400) {
 440                 return 4021.0f;
 441             } else {
 442                 return 2560.0f;
 443             }
 444         case PIPE_CAPF_MAX_TEXTURE_ANISOTROPY:
 445             return 16.0f;
 446         case PIPE_CAPF_MAX_TEXTURE_LOD_BIAS:
 447             return 16.0f;
 448         case PIPE_CAPF_GUARD_BAND_LEFT:
 449         case PIPE_CAPF_GUARD_BAND_TOP:
 450         case PIPE_CAPF_GUARD_BAND_RIGHT:
 451         case PIPE_CAPF_GUARD_BAND_BOTTOM:
 452             return 0.0f;
 453         default:
 454             debug_printf("r300: Warning: Unknown CAP %d in get_paramf.\n",
 455                          param);
 456             return 0.0f;
 457     }
 458 }
 459
 460 static int r300_get_video_param(struct pipe_screen *screen,
 461                                 enum pipe_video_profile profile,
 462                                 enum pipe_video_entrypoint entrypoint,
 463                                 enum pipe_video_cap param)
 464 {
 465    switch (param) {
 466       case PIPE_VIDEO_CAP_SUPPORTED:
 467          return vl_profile_supported(screen, profile, entrypoint);
 468       case PIPE_VIDEO_CAP_NPOT_TEXTURES:
 469          return 0;
 470       case PIPE_VIDEO_CAP_MAX_WIDTH:
 471       case PIPE_VIDEO_CAP_MAX_HEIGHT:
 472          return vl_video_buffer_max_size(screen);
 473       case PIPE_VIDEO_CAP_PREFERED_FORMAT:
 474          return PIPE_FORMAT_NV12;
 475       case PIPE_VIDEO_CAP_PREFERS_INTERLACED:
 476          return false;
 477       case PIPE_VIDEO_CAP_SUPPORTS_INTERLACED:
 478          return false;
 479       case PIPE_VIDEO_CAP_SUPPORTS_PROGRESSIVE:
 480          return true;
 481       case PIPE_VIDEO_CAP_MAX_LEVEL:
 482          return vl_level_supported(screen, profile);
 483       default:
 484          return 0;
 485    }
 486 }
 487
 488 /**
 489  * Whether the format matches:
 490  *   PIPE_FORMAT_?10?10?10?2_UNORM
 491  */
 492 static inline boolean
 493 util_format_is_rgba1010102_variant(const struct util_format_description *desc)
 494 {
 495    static const unsigned size[4] = {10, 10, 10, 2};
 496    unsigned chan;
 497
 498    if (desc->block.width != 1 ||
 499        desc->block.height != 1 ||
 500        desc->block.bits != 32)
 501       return FALSE;
 502
 503    for (chan = 0; chan < 4; ++chan) {
 504       if(desc->channel[chan].type != UTIL_FORMAT_TYPE_UNSIGNED &&
 505          desc->channel[chan].type != UTIL_FORMAT_TYPE_VOID)
 506          return FALSE;
 507       if (desc->channel[chan].size != size[chan])
 508          return FALSE;
 509    }
 510
 511    return TRUE;
 512 }
 513
 514 static bool r300_is_blending_supported(struct r300_screen *rscreen,
 515                                        enum pipe_format format)
 516 {
 517     int c;
 518     const struct util_format_description *desc =
 519         util_format_description(format);
 520
 521     if (desc->layout != UTIL_FORMAT_LAYOUT_PLAIN)
 522         return false;
 523
 524     c = util_format_get_first_non_void_channel(format);
 525
 526     /* RGBA16F */
 527     if (rscreen->caps.is_r500 &&
 528         desc->nr_channels == 4 &&
 529         desc->channel[c].size == 16 &&
 530         desc->channel[c].type == UTIL_FORMAT_TYPE_FLOAT)
 531         return true;
 532
 533     if (desc->channel[c].normalized &&
 534         desc->channel[c].type == UTIL_FORMAT_TYPE_UNSIGNED &&
 535         desc->channel[c].size >= 4 &&
 536         desc->channel[c].size <= 10) {
 537         /* RGB10_A2, RGBA8, RGB5_A1, RGBA4, RGB565 */
 538         if (desc->nr_channels >= 3)
 539             return true;
 540
 541         if (format == PIPE_FORMAT_R8G8_UNORM)
 542             return true;
 543
 544         /* R8, I8, L8, A8 */
 545         if (desc->nr_channels == 1)
 546             return true;
 547     }
 548
 549     return false;
 550 }
 551
 552 static boolean r300_is_format_supported(struct pipe_screen* screen,
 553                                         enum pipe_format format,
 554                                         enum pipe_texture_target target,
 555                                         unsigned sample_count,
 556                                         unsigned usage)
 557 {
 558     uint32_t retval = 0;
 559     boolean is_r500 = r300_screen(screen)->caps.is_r500;
 560     boolean is_r400 = r300_screen(screen)->caps.is_r400;
 561     boolean is_color2101010 = format == PIPE_FORMAT_R10G10B10A2_UNORM ||
 562                               format == PIPE_FORMAT_R10G10B10X2_SNORM ||
 563                               format == PIPE_FORMAT_B10G10R10A2_UNORM ||
 564                               format == PIPE_FORMAT_B10G10R10X2_UNORM ||
 565                               format == PIPE_FORMAT_R10SG10SB10SA2U_NORM;
 566     boolean is_ati1n = format == PIPE_FORMAT_RGTC1_UNORM ||
 567                        format == PIPE_FORMAT_RGTC1_SNORM ||
 568                        format == PIPE_FORMAT_LATC1_UNORM ||
 569                        format == PIPE_FORMAT_LATC1_SNORM;
 570     boolean is_ati2n = format == PIPE_FORMAT_RGTC2_UNORM ||
 571                        format == PIPE_FORMAT_RGTC2_SNORM ||
 572                        format == PIPE_FORMAT_LATC2_UNORM ||
 573                        format == PIPE_FORMAT_LATC2_SNORM;
 574     boolean is_half_float = format == PIPE_FORMAT_R16_FLOAT ||
 575                             format == PIPE_FORMAT_R16G16_FLOAT ||
 576                             format == PIPE_FORMAT_R16G16B16_FLOAT ||
 577                             format == PIPE_FORMAT_R16G16B16A16_FLOAT ||
 578                             format == PIPE_FORMAT_R16G16B16X16_FLOAT;
 579     const struct util_format_description *desc;
 580
 581     if (!util_format_is_supported(format, usage))
 582        return FALSE;
 583
 584     /* Check multisampling support. */
 585     switch (sample_count) {
 586         case 0:
 587         case 1:
 588             break;
 589         case 2:
 590         case 4:
 591         case 6:
 592             /* No texturing and scanout. */
 593             if (usage & (PIPE_BIND_SAMPLER_VIEW |
 594                          PIPE_BIND_DISPLAY_TARGET |
 595                          PIPE_BIND_SCANOUT)) {
 596                 return FALSE;
 597             }
 598
 599             desc = util_format_description(format);
 600
 601             if (is_r500) {
 602                 /* Only allow depth/stencil, RGBA8, RGBA1010102, RGBA16F. */
 603                 if (!util_format_is_depth_or_stencil(format) &&
 604                     !util_format_is_rgba8_variant(desc) &&
 605                     !util_format_is_rgba1010102_variant(desc) &&
 606                     format != PIPE_FORMAT_R16G16B16A16_FLOAT &&
 607                     format != PIPE_FORMAT_R16G16B16X16_FLOAT) {
 608                     return FALSE;
 609                 }
 610             } else {
 611                 /* Only allow depth/stencil, RGBA8. */
 612                 if (!util_format_is_depth_or_stencil(format) &&
 613                     !util_format_is_rgba8_variant(desc)) {
 614                     return FALSE;
 615                 }
 616             }
 617             break;
 618         default:
 619             return FALSE;
 620     }
 621
 622     /* Check sampler format support. */
 623     if ((usage & PIPE_BIND_SAMPLER_VIEW) &&
 624         /* these two are broken for an unknown reason */
 625         format != PIPE_FORMAT_R8G8B8X8_SNORM &&
 626         format != PIPE_FORMAT_R16G16B16X16_SNORM &&
 627         /* ATI1N is r5xx-only. */
 628         (is_r500 || !is_ati1n) &&
 629         /* ATI2N is supported on r4xx-r5xx. */
 630         (is_r400 || is_r500 || !is_ati2n) &&
 631         r300_is_sampler_format_supported(format)) {
 632         retval |= PIPE_BIND_SAMPLER_VIEW;
 633     }
 634
 635     /* Check colorbuffer format support. */
 636     if ((usage & (PIPE_BIND_RENDER_TARGET |
 637                   PIPE_BIND_DISPLAY_TARGET |
 638                   PIPE_BIND_SCANOUT |
 639                   PIPE_BIND_SHARED |
 640                   PIPE_BIND_BLENDABLE)) &&
 641         /* 2101010 cannot be rendered to on non-r5xx. */
 642         (!is_color2101010 || is_r500) &&
 643         r300_is_colorbuffer_format_supported(format)) {
 644         retval |= usage &
 645             (PIPE_BIND_RENDER_TARGET |
 646              PIPE_BIND_DISPLAY_TARGET |
 647              PIPE_BIND_SCANOUT |
 648              PIPE_BIND_SHARED);
 649
 650         if (r300_is_blending_supported(r300_screen(screen), format)) {
 651             retval |= usage & PIPE_BIND_BLENDABLE;
 652         }
 653     }
 654
 655     /* Check depth-stencil format support. */
 656     if (usage & PIPE_BIND_DEPTH_STENCIL &&
 657         r300_is_zs_format_supported(format)) {
 658         retval |= PIPE_BIND_DEPTH_STENCIL;
 659     }
 660
 661     /* Check vertex buffer format support. */
 662     if (usage & PIPE_BIND_VERTEX_BUFFER) {
 663         if (r300_screen(screen)->caps.has_tcl) {
 664             /* Half float is supported on >= R400. */
 665             if ((is_r400 || is_r500 || !is_half_float) &&
 666                 r300_translate_vertex_data_type(format) != R300_INVALID_FORMAT) {
 667                 retval |= PIPE_BIND_VERTEX_BUFFER;
 668             }
 669         } else {
 670             /* SW TCL */
 671             if (!util_format_is_pure_integer(format)) {
 672                 retval |= PIPE_BIND_VERTEX_BUFFER;
 673             }
 674         }
 675     }
 676
 677     return retval == usage;
 678 }
 679
 680 static void r300_destroy_screen(struct pipe_screen* pscreen)
 681 {
 682     struct r300_screen* r300screen = r300_screen(pscreen);
 683     struct radeon_winsys *rws = radeon_winsys(pscreen);
 684
 685     if (rws && !rws->unref(rws))
 686       return;
 687
 688     pipe_mutex_destroy(r300screen->cmask_mutex);
 689     slab_destroy_parent(&r300screen->pool_transfers);
 690
 691     if (rws)
 692       rws->destroy(rws);
 693
 694     FREE(r300screen);
 695 }
 696
 697 static void r300_fence_reference(struct pipe_screen *screen,
 698                                  struct pipe_fence_handle **ptr,
 699                                  struct pipe_fence_handle *fence)
 700 {
 701     struct radeon_winsys *rws = r300_screen(screen)->rws;
 702
 703     rws->fence_reference(ptr, fence);
 704 }
 705
 706 static boolean r300_fence_finish(struct pipe_screen *screen,
 707                                  struct pipe_context *ctx,
 708                                  struct pipe_fence_handle *fence,
 709                                  uint64_t timeout)
 710 {
 711     struct radeon_winsys *rws = r300_screen(screen)->rws;
 712
 713     return rws->fence_wait(rws, fence, timeout);
 714 }
 715
 716 struct pipe_screen* r300_screen_create(struct radeon_winsys *rws)
 717 {
 718     struct r300_screen *r300screen = CALLOC_STRUCT(r300_screen);
 719
 720     if (!r300screen) {
 721         FREE(r300screen);
 722         return NULL;
 723     }
 724
 725     rws->query_info(rws, &r300screen->info);
 726
 727     r300_init_debug(r300screen);
 728     r300_parse_chipset(r300screen->info.pci_id, &r300screen->caps);
 729
 730     if (SCREEN_DBG_ON(r300screen, DBG_NO_ZMASK))
 731         r300screen->caps.zmask_ram = 0;
 732     if (SCREEN_DBG_ON(r300screen, DBG_NO_HIZ))
 733         r300screen->caps.hiz_ram = 0;
 734
 735     r300screen->rws = rws;
 736     r300screen->screen.destroy = r300_destroy_screen;
 737     r300screen->screen.get_name = r300_get_name;
 738     r300screen->screen.get_vendor = r300_get_vendor;
 739     r300screen->screen.get_device_vendor = r300_get_device_vendor;
 740     r300screen->screen.get_param = r300_get_param;
 741     r300screen->screen.get_shader_param = r300_get_shader_param;
 742     r300screen->screen.get_paramf = r300_get_paramf;
 743     r300screen->screen.get_video_param = r300_get_video_param;
 744     r300screen->screen.is_format_supported = r300_is_format_supported;
 745     r300screen->screen.is_video_format_supported = vl_video_buffer_is_format_supported;
 746     r300screen->screen.context_create = r300_create_context;
 747     r300screen->screen.fence_reference = r300_fence_reference;
 748     r300screen->screen.fence_finish = r300_fence_finish;
 749
 750     r300_init_screen_resource_functions(r300screen);
 751
 752     slab_create_parent(&r300screen->pool_transfers, sizeof(struct pipe_transfer), 64);
 753
 754     util_format_s3tc_init();
 755     pipe_mutex_init(r300screen->cmask_mutex);
 756
 757     return &r300screen->screen;
 758 }