src/gallium/drivers/r300/r300_screen.c

   1 /*
   2  * Copyright 2008 Corbin Simpson <MostAwesomeDude@gmail.com>
   3  * Copyright 2010 Marek Olšák <maraeo@gmail.com>
   4  *
   5  * Permission is hereby granted, free of charge, to any person obtaining a
   6  * copy of this software and associated documentation files (the "Software"),
   7  * to deal in the Software without restriction, including without limitation
   8  * on the rights to use, copy, modify, merge, publish, distribute, sub
   9  * license, and/or sell copies of the Software, and to permit persons to whom
  10  * the Software is furnished to do so, subject to the following conditions:
  11  *
  12  * The above copyright notice and this permission notice (including the next
  13  * paragraph) shall be included in all copies or substantial portions of the
  14  * Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  19  * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
  20  * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
  21  * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
  22  * USE OR OTHER DEALINGS IN THE SOFTWARE. */
  23
  24 #include "util/u_format.h"
  25 #include "util/u_format_s3tc.h"
  26 #include "util/u_screen.h"
  27 #include "util/u_memory.h"
  28 #include "util/os_time.h"
  29 #include "vl/vl_decoder.h"
  30 #include "vl/vl_video_buffer.h"
  31
  32 #include "r300_context.h"
  33 #include "r300_texture.h"
  34 #include "r300_screen_buffer.h"
  35 #include "r300_state_inlines.h"
  36 #include "r300_public.h"
  37
  38 #include "draw/draw_context.h"
  39
  40 /* Return the identifier behind whom the brave coders responsible for this
  41  * amalgamation of code, sweat, and duct tape, routinely obscure their names.
  42  *
  43  * ...I should have just put "Corbin Simpson", but I'm not that cool.
  44  *
  45  * (Or egotistical. Yet.) */
  46 static const char* r300_get_vendor(struct pipe_screen* pscreen)
  47 {
  48     return "X.Org R300 Project";
  49 }
  50
  51 static const char* r300_get_device_vendor(struct pipe_screen* pscreen)
  52 {
  53     return "ATI";
  54 }
  55
  56 static const char* chip_families[] = {
  57     "unknown",
  58     "ATI R300",
  59     "ATI R350",
  60     "ATI RV350",
  61     "ATI RV370",
  62     "ATI RV380",
  63     "ATI RS400",
  64     "ATI RC410",
  65     "ATI RS480",
  66     "ATI R420",
  67     "ATI R423",
  68     "ATI R430",
  69     "ATI R480",
  70     "ATI R481",
  71     "ATI RV410",
  72     "ATI RS600",
  73     "ATI RS690",
  74     "ATI RS740",
  75     "ATI RV515",
  76     "ATI R520",
  77     "ATI RV530",
  78     "ATI R580",
  79     "ATI RV560",
  80     "ATI RV570"
  81 };
  82
  83 static const char* r300_get_family_name(struct r300_screen* r300screen)
  84 {
  85     return chip_families[r300screen->caps.family];
  86 }
  87
  88 static const char* r300_get_name(struct pipe_screen* pscreen)
  89 {
  90     struct r300_screen* r300screen = r300_screen(pscreen);
  91
  92     return r300_get_family_name(r300screen);
  93 }
  94
  95 static void r300_disk_cache_create(struct r300_screen* r300screen)
  96 {
  97     struct mesa_sha1 ctx;
  98     unsigned char sha1[20];
  99     char cache_id[20 * 2 + 1];
 100
 101     _mesa_sha1_init(&ctx);
 102     if (!disk_cache_get_function_identifier(r300_disk_cache_create,
 103                                             &ctx))
 104         return;
 105
 106     _mesa_sha1_final(&ctx, sha1);
 107     disk_cache_format_hex_id(cache_id, sha1, 20 * 2);
 108
 109     r300screen->disk_shader_cache =
 110                     disk_cache_create(r300_get_family_name(r300screen),
 111                                       cache_id,
 112                                       r300screen->debug);
 113 }
 114
 115 static struct disk_cache* r300_get_disk_shader_cache(struct pipe_screen* pscreen)
 116 {
 117         struct r300_screen* r300screen = r300_screen(pscreen);
 118         return r300screen->disk_shader_cache;
 119 }
 120
 121 static int r300_get_param(struct pipe_screen* pscreen, enum pipe_cap param)
 122 {
 123     struct r300_screen* r300screen = r300_screen(pscreen);
 124     boolean is_r500 = r300screen->caps.is_r500;
 125
 126     switch (param) {
 127         /* Supported features (boolean caps). */
 128         case PIPE_CAP_NPOT_TEXTURES:
 129         case PIPE_CAP_MIXED_FRAMEBUFFER_SIZES:
 130         case PIPE_CAP_MIXED_COLOR_DEPTH_BITS:
 131         case PIPE_CAP_ANISOTROPIC_FILTER:
 132         case PIPE_CAP_POINT_SPRITE:
 133         case PIPE_CAP_OCCLUSION_QUERY:
 134         case PIPE_CAP_TEXTURE_MIRROR_CLAMP:
 135         case PIPE_CAP_TEXTURE_MIRROR_CLAMP_TO_EDGE:
 136         case PIPE_CAP_BLEND_EQUATION_SEPARATE:
 137         case PIPE_CAP_VERTEX_ELEMENT_INSTANCE_DIVISOR:
 138         case PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT:
 139         case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER:
 140         case PIPE_CAP_CONDITIONAL_RENDER:
 141         case PIPE_CAP_TEXTURE_BARRIER:
 142         case PIPE_CAP_TGSI_CAN_COMPACT_CONSTANTS:
 143         case PIPE_CAP_PREFER_BLIT_BASED_TEXTURE_TRANSFER:
 144         case PIPE_CAP_BUFFER_MAP_PERSISTENT_COHERENT:
 145         case PIPE_CAP_CLIP_HALFZ:
 146         case PIPE_CAP_ALLOW_MAPPED_BUFFERS_DURING_EXECUTION:
 147             return 1;
 148
 149         case PIPE_CAP_MIN_MAP_BUFFER_ALIGNMENT:
 150             return R300_BUFFER_ALIGNMENT;
 151
 152         case PIPE_CAP_CONSTANT_BUFFER_OFFSET_ALIGNMENT:
 153             return 16;
 154
 155         case PIPE_CAP_GLSL_FEATURE_LEVEL:
 156         case PIPE_CAP_GLSL_FEATURE_LEVEL_COMPATIBILITY:
 157             return 120;
 158
 159         /* r300 cannot do swizzling of compressed textures. Supported otherwise. */
 160         case PIPE_CAP_TEXTURE_SWIZZLE:
 161             return r300screen->caps.dxtc_swizzle;
 162
 163         /* We don't support color clamping on r500, so that we can use color
 164          * intepolators for generic varyings. */
 165         case PIPE_CAP_VERTEX_COLOR_CLAMPED:
 166             return !is_r500;
 167
 168         /* Supported on r500 only. */
 169         case PIPE_CAP_VERTEX_COLOR_UNCLAMPED:
 170         case PIPE_CAP_MIXED_COLORBUFFER_FORMATS:
 171         case PIPE_CAP_SM3:
 172             return is_r500 ? 1 : 0;
 173
 174         /* Unsupported features. */
 175         case PIPE_CAP_QUERY_TIME_ELAPSED:
 176         case PIPE_CAP_QUERY_PIPELINE_STATISTICS:
 177         case PIPE_CAP_MAX_DUAL_SOURCE_RENDER_TARGETS:
 178         case PIPE_CAP_INDEP_BLEND_ENABLE:
 179         case PIPE_CAP_INDEP_BLEND_FUNC:
 180         case PIPE_CAP_DEPTH_CLIP_DISABLE:
 181         case PIPE_CAP_DEPTH_CLIP_DISABLE_SEPARATE:
 182         case PIPE_CAP_SHADER_STENCIL_EXPORT:
 183         case PIPE_CAP_MAX_TEXTURE_ARRAY_LAYERS:
 184         case PIPE_CAP_TGSI_INSTANCEID:
 185         case PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT:
 186         case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER:
 187         case PIPE_CAP_SEAMLESS_CUBE_MAP:
 188         case PIPE_CAP_SEAMLESS_CUBE_MAP_PER_TEXTURE:
 189         case PIPE_CAP_MIN_TEXEL_OFFSET:
 190         case PIPE_CAP_MAX_TEXEL_OFFSET:
 191         case PIPE_CAP_MIN_TEXTURE_GATHER_OFFSET:
 192         case PIPE_CAP_MAX_TEXTURE_GATHER_OFFSET:
 193         case PIPE_CAP_MAX_STREAM_OUTPUT_BUFFERS:
 194         case PIPE_CAP_MAX_STREAM_OUTPUT_SEPARATE_COMPONENTS:
 195         case PIPE_CAP_MAX_STREAM_OUTPUT_INTERLEAVED_COMPONENTS:
 196         case PIPE_CAP_MAX_GEOMETRY_OUTPUT_VERTICES:
 197         case PIPE_CAP_MAX_GEOMETRY_TOTAL_OUTPUT_COMPONENTS:
 198         case PIPE_CAP_MAX_VERTEX_STREAMS:
 199         case PIPE_CAP_STREAM_OUTPUT_PAUSE_RESUME:
 200         case PIPE_CAP_STREAM_OUTPUT_INTERLEAVE_BUFFERS:
 201         case PIPE_CAP_FRAGMENT_COLOR_CLAMPED:
 202         case PIPE_CAP_QUADS_FOLLOW_PROVOKING_VERTEX_CONVENTION:
 203         case PIPE_CAP_COMPUTE:
 204         case PIPE_CAP_START_INSTANCE:
 205         case PIPE_CAP_QUERY_TIMESTAMP:
 206         case PIPE_CAP_TEXTURE_MULTISAMPLE:
 207         case PIPE_CAP_CUBE_MAP_ARRAY:
 208         case PIPE_CAP_TEXTURE_BUFFER_OBJECTS:
 209         case PIPE_CAP_TEXTURE_BUFFER_OFFSET_ALIGNMENT:
 210         case PIPE_CAP_TEXTURE_BORDER_COLOR_QUIRK:
 211         case PIPE_CAP_MAX_TEXTURE_BUFFER_SIZE:
 212         case PIPE_CAP_TGSI_VS_LAYER_VIEWPORT:
 213         case PIPE_CAP_MAX_TEXTURE_GATHER_COMPONENTS:
 214         case PIPE_CAP_TEXTURE_GATHER_SM5:
 215         case PIPE_CAP_TEXTURE_QUERY_LOD:
 216         case PIPE_CAP_FAKE_SW_MSAA:
 217         case PIPE_CAP_SAMPLE_SHADING:
 218         case PIPE_CAP_TEXTURE_GATHER_OFFSETS:
 219         case PIPE_CAP_DRAW_INDIRECT:
 220         case PIPE_CAP_MULTI_DRAW_INDIRECT:
 221         case PIPE_CAP_MULTI_DRAW_INDIRECT_PARAMS:
 222         case PIPE_CAP_TGSI_FS_FINE_DERIVATIVE:
 223         case PIPE_CAP_CONDITIONAL_RENDER_INVERTED:
 224         case PIPE_CAP_SAMPLER_VIEW_TARGET:
 225         case PIPE_CAP_VERTEXID_NOBASE:
 226         case PIPE_CAP_POLYGON_OFFSET_CLAMP:
 227         case PIPE_CAP_MULTISAMPLE_Z_RESOLVE:
 228         case PIPE_CAP_RESOURCE_FROM_USER_MEMORY:
 229         case PIPE_CAP_DEVICE_RESET_STATUS_QUERY:
 230         case PIPE_CAP_MAX_SHADER_PATCH_VARYINGS:
 231         case PIPE_CAP_TEXTURE_FLOAT_LINEAR:
 232         case PIPE_CAP_TEXTURE_HALF_FLOAT_LINEAR:
 233         case PIPE_CAP_DEPTH_BOUNDS_TEST:
 234         case PIPE_CAP_TGSI_TXQS:
 235         case PIPE_CAP_FORCE_PERSAMPLE_INTERP:
 236         case PIPE_CAP_SHAREABLE_SHADERS:
 237         case PIPE_CAP_COPY_BETWEEN_COMPRESSED_AND_PLAIN_FORMATS:
 238         case PIPE_CAP_CLEAR_TEXTURE:
 239         case PIPE_CAP_DRAW_PARAMETERS:
 240         case PIPE_CAP_TGSI_PACK_HALF_FLOAT:
 241         case PIPE_CAP_TGSI_FS_POSITION_IS_SYSVAL:
 242         case PIPE_CAP_TGSI_FS_FACE_IS_INTEGER_SYSVAL:
 243         case PIPE_CAP_SHADER_BUFFER_OFFSET_ALIGNMENT:
 244         case PIPE_CAP_INVALIDATE_BUFFER:
 245         case PIPE_CAP_GENERATE_MIPMAP:
 246         case PIPE_CAP_STRING_MARKER:
 247         case PIPE_CAP_BUFFER_SAMPLER_VIEW_RGBA_ONLY:
 248         case PIPE_CAP_SURFACE_REINTERPRET_BLOCKS:
 249         case PIPE_CAP_QUERY_BUFFER_OBJECT:
 250         case PIPE_CAP_QUERY_MEMORY_INFO:
 251         case PIPE_CAP_FRAMEBUFFER_NO_ATTACHMENT:
 252         case PIPE_CAP_ROBUST_BUFFER_ACCESS_BEHAVIOR:
 253         case PIPE_CAP_CULL_DISTANCE:
 254         case PIPE_CAP_PRIMITIVE_RESTART_FOR_PATCHES:
 255         case PIPE_CAP_TGSI_VOTE:
 256         case PIPE_CAP_MAX_WINDOW_RECTANGLES:
 257         case PIPE_CAP_POLYGON_OFFSET_UNITS_UNSCALED:
 258         case PIPE_CAP_VIEWPORT_SUBPIXEL_BITS:
 259         case PIPE_CAP_TGSI_ARRAY_COMPONENTS:
 260         case PIPE_CAP_TGSI_CAN_READ_OUTPUTS:
 261         case PIPE_CAP_NATIVE_FENCE_FD:
 262         case PIPE_CAP_GLSL_OPTIMIZE_CONSERVATIVELY:
 263         case PIPE_CAP_FBFETCH:
 264         case PIPE_CAP_TGSI_MUL_ZERO_WINS:
 265         case PIPE_CAP_DOUBLES:
 266         case PIPE_CAP_INT64:
 267         case PIPE_CAP_INT64_DIVMOD:
 268         case PIPE_CAP_TGSI_TEX_TXF_LZ:
 269         case PIPE_CAP_TGSI_CLOCK:
 270         case PIPE_CAP_POLYGON_MODE_FILL_RECTANGLE:
 271         case PIPE_CAP_SPARSE_BUFFER_PAGE_SIZE:
 272         case PIPE_CAP_TGSI_BALLOT:
 273         case PIPE_CAP_TGSI_TES_LAYER_VIEWPORT:
 274         case PIPE_CAP_CAN_BIND_CONST_BUFFER_AS_VERTEX:
 275         case PIPE_CAP_POST_DEPTH_COVERAGE:
 276         case PIPE_CAP_BINDLESS_TEXTURE:
 277         case PIPE_CAP_NIR_SAMPLERS_AS_DEREF:
 278         case PIPE_CAP_QUERY_SO_OVERFLOW:
 279         case PIPE_CAP_MEMOBJ:
 280         case PIPE_CAP_LOAD_CONSTBUF:
 281         case PIPE_CAP_TGSI_ANY_REG_AS_ADDRESS:
 282         case PIPE_CAP_TILE_RASTER_ORDER:
 283         case PIPE_CAP_MAX_COMBINED_SHADER_OUTPUT_RESOURCES:
 284         case PIPE_CAP_FRAMEBUFFER_MSAA_CONSTRAINTS:
 285         case PIPE_CAP_SIGNED_VERTEX_BUFFER_OFFSET:
 286         case PIPE_CAP_CONTEXT_PRIORITY_MASK:
 287         case PIPE_CAP_FENCE_SIGNAL:
 288         case PIPE_CAP_CONSTBUF0_FLAGS:
 289         case PIPE_CAP_PACKED_UNIFORMS:
 290         case PIPE_CAP_CONSERVATIVE_RASTER_POST_SNAP_TRIANGLES:
 291         case PIPE_CAP_CONSERVATIVE_RASTER_POST_SNAP_POINTS_LINES:
 292         case PIPE_CAP_CONSERVATIVE_RASTER_PRE_SNAP_TRIANGLES:
 293         case PIPE_CAP_CONSERVATIVE_RASTER_PRE_SNAP_POINTS_LINES:
 294         case PIPE_CAP_CONSERVATIVE_RASTER_POST_DEPTH_COVERAGE:
 295         case PIPE_CAP_MAX_CONSERVATIVE_RASTER_SUBPIXEL_PRECISION_BIAS:
 296         case PIPE_CAP_PROGRAMMABLE_SAMPLE_LOCATIONS:
 297         case PIPE_CAP_MAX_TEXTURE_UPLOAD_MEMORY_BUDGET:
 298             return 0;
 299
 300         case PIPE_CAP_MAX_GS_INVOCATIONS:
 301             return 32;
 302        case PIPE_CAP_MAX_SHADER_BUFFER_SIZE:
 303             return 1 << 27;
 304
 305         /* SWTCL-only features. */
 306         case PIPE_CAP_PRIMITIVE_RESTART:
 307         case PIPE_CAP_USER_VERTEX_BUFFERS:
 308         case PIPE_CAP_TGSI_VS_WINDOW_SPACE_POSITION:
 309             return !r300screen->caps.has_tcl;
 310
 311         /* HWTCL-only features / limitations. */
 312         case PIPE_CAP_VERTEX_BUFFER_OFFSET_4BYTE_ALIGNED_ONLY:
 313         case PIPE_CAP_VERTEX_BUFFER_STRIDE_4BYTE_ALIGNED_ONLY:
 314         case PIPE_CAP_VERTEX_ELEMENT_SRC_OFFSET_4BYTE_ALIGNED_ONLY:
 315             return r300screen->caps.has_tcl;
 316         case PIPE_CAP_TGSI_TEXCOORD:
 317             return 0;
 318
 319         /* Texturing. */
 320         case PIPE_CAP_MAX_TEXTURE_2D_SIZE:
 321             return is_r500 ? 4096 : 2048;
 322         case PIPE_CAP_MAX_TEXTURE_3D_LEVELS:
 323         case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS:
 324             /* 13 == 4096, 12 == 2048 */
 325             return is_r500 ? 13 : 12;
 326
 327         /* Render targets. */
 328         case PIPE_CAP_MAX_RENDER_TARGETS:
 329             return 4;
 330         case PIPE_CAP_ENDIANNESS:
 331             return PIPE_ENDIAN_LITTLE;
 332
 333         case PIPE_CAP_MAX_VIEWPORTS:
 334             return 1;
 335
 336         case PIPE_CAP_MAX_VERTEX_ATTRIB_STRIDE:
 337             return 2048;
 338
 339         case PIPE_CAP_MAX_VARYINGS:
 340             return 10;
 341
 342         case PIPE_CAP_VENDOR_ID:
 343                 return 0x1002;
 344         case PIPE_CAP_DEVICE_ID:
 345                 return r300screen->info.pci_id;
 346         case PIPE_CAP_ACCELERATED:
 347                 return 1;
 348         case PIPE_CAP_VIDEO_MEMORY:
 349                 return r300screen->info.vram_size >> 20;
 350         case PIPE_CAP_UMA:
 351                 return 0;
 352         case PIPE_CAP_PCI_GROUP:
 353             return r300screen->info.pci_domain;
 354         case PIPE_CAP_PCI_BUS:
 355             return r300screen->info.pci_bus;
 356         case PIPE_CAP_PCI_DEVICE:
 357             return r300screen->info.pci_dev;
 358         case PIPE_CAP_PCI_FUNCTION:
 359             return r300screen->info.pci_func;
 360         default:
 361             return u_pipe_screen_get_param_defaults(pscreen, param);
 362     }
 363 }
 364
 365 static int r300_get_shader_param(struct pipe_screen *pscreen,
 366                                  enum pipe_shader_type shader,
 367                                  enum pipe_shader_cap param)
 368 {
 369    struct r300_screen* r300screen = r300_screen(pscreen);
 370    boolean is_r400 = r300screen->caps.is_r400;
 371    boolean is_r500 = r300screen->caps.is_r500;
 372
 373    switch (shader) {
 374     case PIPE_SHADER_FRAGMENT:
 375         switch (param)
 376         {
 377         case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
 378             return is_r500 || is_r400 ? 512 : 96;
 379         case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
 380             return is_r500 || is_r400 ? 512 : 64;
 381         case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
 382             return is_r500 || is_r400 ? 512 : 32;
 383         case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
 384             return is_r500 ? 511 : 4;
 385         case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:
 386             return is_r500 ? 64 : 0; /* Actually unlimited on r500. */
 387             /* Fragment shader limits. */
 388         case PIPE_SHADER_CAP_MAX_INPUTS:
 389             /* 2 colors + 8 texcoords are always supported
 390              * (minus fog and wpos).
 391              *
 392              * R500 has the ability to turn 3rd and 4th color into
 393              * additional texcoords but there is no two-sided color
 394              * selection then. However the facing bit can be used instead. */
 395             return 10;
 396         case PIPE_SHADER_CAP_MAX_OUTPUTS:
 397             return 4;
 398         case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE:
 399             return (is_r500 ? 256 : 32) * sizeof(float[4]);
 400         case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
 401         case PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE:
 402             return 1;
 403         case PIPE_SHADER_CAP_MAX_TEMPS:
 404             return is_r500 ? 128 : is_r400 ? 64 : 32;
 405         case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
 406         case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS:
 407            return r300screen->caps.num_tex_units;
 408         case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
 409         case PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED:
 410         case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
 411         case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
 412         case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
 413         case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
 414         case PIPE_SHADER_CAP_SUBROUTINES:
 415         case PIPE_SHADER_CAP_INTEGERS:
 416         case PIPE_SHADER_CAP_INT64_ATOMICS:
 417         case PIPE_SHADER_CAP_FP16:
 418         case PIPE_SHADER_CAP_TGSI_DROUND_SUPPORTED:
 419         case PIPE_SHADER_CAP_TGSI_DFRACEXP_DLDEXP_SUPPORTED:
 420         case PIPE_SHADER_CAP_TGSI_LDEXP_SUPPORTED:
 421         case PIPE_SHADER_CAP_TGSI_FMA_SUPPORTED:
 422         case PIPE_SHADER_CAP_MAX_SHADER_BUFFERS:
 423         case PIPE_SHADER_CAP_MAX_SHADER_IMAGES:
 424         case PIPE_SHADER_CAP_LOWER_IF_THRESHOLD:
 425         case PIPE_SHADER_CAP_TGSI_SKIP_MERGE_REGISTERS:
 426         case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTERS:
 427         case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTER_BUFFERS:
 428             return 0;
 429         case PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT:
 430             return 32;
 431         case PIPE_SHADER_CAP_PREFERRED_IR:
 432             return PIPE_SHADER_IR_TGSI;
 433         case PIPE_SHADER_CAP_SUPPORTED_IRS:
 434             return 0;
 435         case PIPE_SHADER_CAP_SCALAR_ISA:
 436             return 0;
 437         }
 438         break;
 439     case PIPE_SHADER_VERTEX:
 440         switch (param)
 441         {
 442         case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
 443         case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS:
 444         case PIPE_SHADER_CAP_SUBROUTINES:
 445             return 0;
 446         default:;
 447         }
 448
 449         if (!r300screen->caps.has_tcl) {
 450             return draw_get_shader_param(shader, param);
 451         }
 452
 453         switch (param)
 454         {
 455         case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
 456         case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
 457             return is_r500 ? 1024 : 256;
 458         case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:
 459             return is_r500 ? 4 : 0; /* For loops; not sure about conditionals. */
 460         case PIPE_SHADER_CAP_MAX_INPUTS:
 461             return 16;
 462         case PIPE_SHADER_CAP_MAX_OUTPUTS:
 463             return 10;
 464         case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE:
 465             return 256 * sizeof(float[4]);
 466         case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
 467             return 1;
 468         case PIPE_SHADER_CAP_MAX_TEMPS:
 469             return 32;
 470         case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
 471         case PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE:
 472             return 1;
 473         case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
 474         case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
 475         case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
 476         case PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED:
 477         case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
 478         case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
 479         case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
 480         case PIPE_SHADER_CAP_SUBROUTINES:
 481         case PIPE_SHADER_CAP_INTEGERS:
 482         case PIPE_SHADER_CAP_FP16:
 483         case PIPE_SHADER_CAP_INT64_ATOMICS:
 484         case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
 485         case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS:
 486         case PIPE_SHADER_CAP_TGSI_DROUND_SUPPORTED:
 487         case PIPE_SHADER_CAP_TGSI_DFRACEXP_DLDEXP_SUPPORTED:
 488         case PIPE_SHADER_CAP_TGSI_LDEXP_SUPPORTED:
 489         case PIPE_SHADER_CAP_TGSI_FMA_SUPPORTED:
 490         case PIPE_SHADER_CAP_MAX_SHADER_BUFFERS:
 491         case PIPE_SHADER_CAP_MAX_SHADER_IMAGES:
 492         case PIPE_SHADER_CAP_LOWER_IF_THRESHOLD:
 493         case PIPE_SHADER_CAP_TGSI_SKIP_MERGE_REGISTERS:
 494         case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTERS:
 495         case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTER_BUFFERS:
 496             return 0;
 497         case PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT:
 498             return 32;
 499         case PIPE_SHADER_CAP_PREFERRED_IR:
 500             return PIPE_SHADER_IR_TGSI;
 501         case PIPE_SHADER_CAP_SUPPORTED_IRS:
 502             return 0;
 503         case PIPE_SHADER_CAP_SCALAR_ISA:
 504             return 0;
 505         }
 506         break;
 507     default:
 508         ; /* nothing */
 509     }
 510     return 0;
 511 }
 512
 513 static float r300_get_paramf(struct pipe_screen* pscreen,
 514                              enum pipe_capf param)
 515 {
 516     struct r300_screen* r300screen = r300_screen(pscreen);
 517
 518     switch (param) {
 519         case PIPE_CAPF_MAX_LINE_WIDTH:
 520         case PIPE_CAPF_MAX_LINE_WIDTH_AA:
 521         case PIPE_CAPF_MAX_POINT_WIDTH:
 522         case PIPE_CAPF_MAX_POINT_WIDTH_AA:
 523             /* The maximum dimensions of the colorbuffer are our practical
 524              * rendering limits. 2048 pixels should be enough for anybody. */
 525             if (r300screen->caps.is_r500) {
 526                 return 4096.0f;
 527             } else if (r300screen->caps.is_r400) {
 528                 return 4021.0f;
 529             } else {
 530                 return 2560.0f;
 531             }
 532         case PIPE_CAPF_MAX_TEXTURE_ANISOTROPY:
 533             return 16.0f;
 534         case PIPE_CAPF_MAX_TEXTURE_LOD_BIAS:
 535             return 16.0f;
 536         case PIPE_CAPF_MIN_CONSERVATIVE_RASTER_DILATE:
 537         case PIPE_CAPF_MAX_CONSERVATIVE_RASTER_DILATE:
 538         case PIPE_CAPF_CONSERVATIVE_RASTER_DILATE_GRANULARITY:
 539             return 0.0f;
 540         default:
 541             debug_printf("r300: Warning: Unknown CAP %d in get_paramf.\n",
 542                          param);
 543             return 0.0f;
 544     }
 545 }
 546
 547 static int r300_get_video_param(struct pipe_screen *screen,
 548                                 enum pipe_video_profile profile,
 549                                 enum pipe_video_entrypoint entrypoint,
 550                                 enum pipe_video_cap param)
 551 {
 552    switch (param) {
 553       case PIPE_VIDEO_CAP_SUPPORTED:
 554          return vl_profile_supported(screen, profile, entrypoint);
 555       case PIPE_VIDEO_CAP_NPOT_TEXTURES:
 556          return 0;
 557       case PIPE_VIDEO_CAP_MAX_WIDTH:
 558       case PIPE_VIDEO_CAP_MAX_HEIGHT:
 559          return vl_video_buffer_max_size(screen);
 560       case PIPE_VIDEO_CAP_PREFERED_FORMAT:
 561          return PIPE_FORMAT_NV12;
 562       case PIPE_VIDEO_CAP_PREFERS_INTERLACED:
 563          return false;
 564       case PIPE_VIDEO_CAP_SUPPORTS_INTERLACED:
 565          return false;
 566       case PIPE_VIDEO_CAP_SUPPORTS_PROGRESSIVE:
 567          return true;
 568       case PIPE_VIDEO_CAP_MAX_LEVEL:
 569          return vl_level_supported(screen, profile);
 570       default:
 571          return 0;
 572    }
 573 }
 574
 575 /**
 576  * Whether the format matches:
 577  *   PIPE_FORMAT_?10?10?10?2_UNORM
 578  */
 579 static inline boolean
 580 util_format_is_rgba1010102_variant(const struct util_format_description *desc)
 581 {
 582    static const unsigned size[4] = {10, 10, 10, 2};
 583    unsigned chan;
 584
 585    if (desc->block.width != 1 ||
 586        desc->block.height != 1 ||
 587        desc->block.bits != 32)
 588       return FALSE;
 589
 590    for (chan = 0; chan < 4; ++chan) {
 591       if(desc->channel[chan].type != UTIL_FORMAT_TYPE_UNSIGNED &&
 592          desc->channel[chan].type != UTIL_FORMAT_TYPE_VOID)
 593          return FALSE;
 594       if (desc->channel[chan].size != size[chan])
 595          return FALSE;
 596    }
 597
 598    return TRUE;
 599 }
 600
 601 static bool r300_is_blending_supported(struct r300_screen *rscreen,
 602                                        enum pipe_format format)
 603 {
 604     int c;
 605     const struct util_format_description *desc =
 606         util_format_description(format);
 607
 608     if (desc->layout != UTIL_FORMAT_LAYOUT_PLAIN)
 609         return false;
 610
 611     c = util_format_get_first_non_void_channel(format);
 612
 613     /* RGBA16F */
 614     if (rscreen->caps.is_r500 &&
 615         desc->nr_channels == 4 &&
 616         desc->channel[c].size == 16 &&
 617         desc->channel[c].type == UTIL_FORMAT_TYPE_FLOAT)
 618         return true;
 619
 620     if (desc->channel[c].normalized &&
 621         desc->channel[c].type == UTIL_FORMAT_TYPE_UNSIGNED &&
 622         desc->channel[c].size >= 4 &&
 623         desc->channel[c].size <= 10) {
 624         /* RGB10_A2, RGBA8, RGB5_A1, RGBA4, RGB565 */
 625         if (desc->nr_channels >= 3)
 626             return true;
 627
 628         if (format == PIPE_FORMAT_R8G8_UNORM)
 629             return true;
 630
 631         /* R8, I8, L8, A8 */
 632         if (desc->nr_channels == 1)
 633             return true;
 634     }
 635
 636     return false;
 637 }
 638
 639 static boolean r300_is_format_supported(struct pipe_screen* screen,
 640                                         enum pipe_format format,
 641                                         enum pipe_texture_target target,
 642                                         unsigned sample_count,
 643                                         unsigned storage_sample_count,
 644                                         unsigned usage)
 645 {
 646     uint32_t retval = 0;
 647     boolean is_r500 = r300_screen(screen)->caps.is_r500;
 648     boolean is_r400 = r300_screen(screen)->caps.is_r400;
 649     boolean is_color2101010 = format == PIPE_FORMAT_R10G10B10A2_UNORM ||
 650                               format == PIPE_FORMAT_R10G10B10X2_SNORM ||
 651                               format == PIPE_FORMAT_B10G10R10A2_UNORM ||
 652                               format == PIPE_FORMAT_B10G10R10X2_UNORM ||
 653                               format == PIPE_FORMAT_R10SG10SB10SA2U_NORM;
 654     boolean is_ati1n = format == PIPE_FORMAT_RGTC1_UNORM ||
 655                        format == PIPE_FORMAT_RGTC1_SNORM ||
 656                        format == PIPE_FORMAT_LATC1_UNORM ||
 657                        format == PIPE_FORMAT_LATC1_SNORM;
 658     boolean is_ati2n = format == PIPE_FORMAT_RGTC2_UNORM ||
 659                        format == PIPE_FORMAT_RGTC2_SNORM ||
 660                        format == PIPE_FORMAT_LATC2_UNORM ||
 661                        format == PIPE_FORMAT_LATC2_SNORM;
 662     boolean is_half_float = format == PIPE_FORMAT_R16_FLOAT ||
 663                             format == PIPE_FORMAT_R16G16_FLOAT ||
 664                             format == PIPE_FORMAT_R16G16B16_FLOAT ||
 665                             format == PIPE_FORMAT_R16G16B16A16_FLOAT ||
 666                             format == PIPE_FORMAT_R16G16B16X16_FLOAT;
 667     const struct util_format_description *desc;
 668
 669     if (MAX2(1, sample_count) != MAX2(1, storage_sample_count))
 670         return false;
 671
 672     /* Check multisampling support. */
 673     switch (sample_count) {
 674         case 0:
 675         case 1:
 676             break;
 677         case 2:
 678         case 4:
 679         case 6:
 680             /* No texturing and scanout. */
 681             if (usage & (PIPE_BIND_SAMPLER_VIEW |
 682                          PIPE_BIND_DISPLAY_TARGET |
 683                          PIPE_BIND_SCANOUT)) {
 684                 return FALSE;
 685             }
 686
 687             desc = util_format_description(format);
 688
 689             if (is_r500) {
 690                 /* Only allow depth/stencil, RGBA8, RGBA1010102, RGBA16F. */
 691                 if (!util_format_is_depth_or_stencil(format) &&
 692                     !util_format_is_rgba8_variant(desc) &&
 693                     !util_format_is_rgba1010102_variant(desc) &&
 694                     format != PIPE_FORMAT_R16G16B16A16_FLOAT &&
 695                     format != PIPE_FORMAT_R16G16B16X16_FLOAT) {
 696                     return FALSE;
 697                 }
 698             } else {
 699                 /* Only allow depth/stencil, RGBA8. */
 700                 if (!util_format_is_depth_or_stencil(format) &&
 701                     !util_format_is_rgba8_variant(desc)) {
 702                     return FALSE;
 703                 }
 704             }
 705             break;
 706         default:
 707             return FALSE;
 708     }
 709
 710     /* Check sampler format support. */
 711     if ((usage & PIPE_BIND_SAMPLER_VIEW) &&
 712         /* these two are broken for an unknown reason */
 713         format != PIPE_FORMAT_R8G8B8X8_SNORM &&
 714         format != PIPE_FORMAT_R16G16B16X16_SNORM &&
 715         /* ATI1N is r5xx-only. */
 716         (is_r500 || !is_ati1n) &&
 717         /* ATI2N is supported on r4xx-r5xx. */
 718         (is_r400 || is_r500 || !is_ati2n) &&
 719         r300_is_sampler_format_supported(format)) {
 720         retval |= PIPE_BIND_SAMPLER_VIEW;
 721     }
 722
 723     /* Check colorbuffer format support. */
 724     if ((usage & (PIPE_BIND_RENDER_TARGET |
 725                   PIPE_BIND_DISPLAY_TARGET |
 726                   PIPE_BIND_SCANOUT |
 727                   PIPE_BIND_SHARED |
 728                   PIPE_BIND_BLENDABLE)) &&
 729         /* 2101010 cannot be rendered to on non-r5xx. */
 730         (!is_color2101010 || is_r500) &&
 731         r300_is_colorbuffer_format_supported(format)) {
 732         retval |= usage &
 733             (PIPE_BIND_RENDER_TARGET |
 734              PIPE_BIND_DISPLAY_TARGET |
 735              PIPE_BIND_SCANOUT |
 736              PIPE_BIND_SHARED);
 737
 738         if (r300_is_blending_supported(r300_screen(screen), format)) {
 739             retval |= usage & PIPE_BIND_BLENDABLE;
 740         }
 741     }
 742
 743     /* Check depth-stencil format support. */
 744     if (usage & PIPE_BIND_DEPTH_STENCIL &&
 745         r300_is_zs_format_supported(format)) {
 746         retval |= PIPE_BIND_DEPTH_STENCIL;
 747     }
 748
 749     /* Check vertex buffer format support. */
 750     if (usage & PIPE_BIND_VERTEX_BUFFER) {
 751         if (r300_screen(screen)->caps.has_tcl) {
 752             /* Half float is supported on >= R400. */
 753             if ((is_r400 || is_r500 || !is_half_float) &&
 754                 r300_translate_vertex_data_type(format) != R300_INVALID_FORMAT) {
 755                 retval |= PIPE_BIND_VERTEX_BUFFER;
 756             }
 757         } else {
 758             /* SW TCL */
 759             if (!util_format_is_pure_integer(format)) {
 760                 retval |= PIPE_BIND_VERTEX_BUFFER;
 761             }
 762         }
 763     }
 764
 765     return retval == usage;
 766 }
 767
 768 static void r300_destroy_screen(struct pipe_screen* pscreen)
 769 {
 770     struct r300_screen* r300screen = r300_screen(pscreen);
 771     struct radeon_winsys *rws = radeon_winsys(pscreen);
 772
 773     if (rws && !rws->unref(rws))
 774       return;
 775
 776     mtx_destroy(&r300screen->cmask_mutex);
 777     slab_destroy_parent(&r300screen->pool_transfers);
 778
 779     disk_cache_destroy(r300screen->disk_shader_cache);
 780
 781     if (rws)
 782       rws->destroy(rws);
 783
 784     FREE(r300screen);
 785 }
 786
 787 static void r300_fence_reference(struct pipe_screen *screen,
 788                                  struct pipe_fence_handle **ptr,
 789                                  struct pipe_fence_handle *fence)
 790 {
 791     struct radeon_winsys *rws = r300_screen(screen)->rws;
 792
 793     rws->fence_reference(ptr, fence);
 794 }
 795
 796 static boolean r300_fence_finish(struct pipe_screen *screen,
 797                                  struct pipe_context *ctx,
 798                                  struct pipe_fence_handle *fence,
 799                                  uint64_t timeout)
 800 {
 801     struct radeon_winsys *rws = r300_screen(screen)->rws;
 802
 803     return rws->fence_wait(rws, fence, timeout);
 804 }
 805
 806 struct pipe_screen* r300_screen_create(struct radeon_winsys *rws,
 807                                        const struct pipe_screen_config *config)
 808 {
 809     struct r300_screen *r300screen = CALLOC_STRUCT(r300_screen);
 810
 811     if (!r300screen) {
 812         FREE(r300screen);
 813         return NULL;
 814     }
 815
 816     rws->query_info(rws, &r300screen->info);
 817
 818     r300_init_debug(r300screen);
 819     r300_parse_chipset(r300screen->info.pci_id, &r300screen->caps);
 820
 821     if (SCREEN_DBG_ON(r300screen, DBG_NO_ZMASK))
 822         r300screen->caps.zmask_ram = 0;
 823     if (SCREEN_DBG_ON(r300screen, DBG_NO_HIZ))
 824         r300screen->caps.hiz_ram = 0;
 825
 826     r300screen->rws = rws;
 827     r300screen->screen.destroy = r300_destroy_screen;
 828     r300screen->screen.get_name = r300_get_name;
 829     r300screen->screen.get_vendor = r300_get_vendor;
 830     r300screen->screen.get_device_vendor = r300_get_device_vendor;
 831     r300screen->screen.get_disk_shader_cache = r300_get_disk_shader_cache;
 832     r300screen->screen.get_param = r300_get_param;
 833     r300screen->screen.get_shader_param = r300_get_shader_param;
 834     r300screen->screen.get_paramf = r300_get_paramf;
 835     r300screen->screen.get_video_param = r300_get_video_param;
 836     r300screen->screen.is_format_supported = r300_is_format_supported;
 837     r300screen->screen.is_video_format_supported = vl_video_buffer_is_format_supported;
 838     r300screen->screen.context_create = r300_create_context;
 839     r300screen->screen.fence_reference = r300_fence_reference;
 840     r300screen->screen.fence_finish = r300_fence_finish;
 841
 842     r300_init_screen_resource_functions(r300screen);
 843
 844     r300_disk_cache_create(r300screen);
 845
 846     slab_create_parent(&r300screen->pool_transfers, sizeof(struct pipe_transfer), 64);
 847
 848     (void) mtx_init(&r300screen->cmask_mutex, mtx_plain);
 849
 850     return &r300screen->screen;
 851 }