src/gallium/drivers/r300/r300_screen.c

   1 /*
   2  * Copyright 2008 Corbin Simpson <MostAwesomeDude@gmail.com>
   3  * Copyright 2010 Marek Olšák <maraeo@gmail.com>
   4  *
   5  * Permission is hereby granted, free of charge, to any person obtaining a
   6  * copy of this software and associated documentation files (the "Software"),
   7  * to deal in the Software without restriction, including without limitation
   8  * on the rights to use, copy, modify, merge, publish, distribute, sub
   9  * license, and/or sell copies of the Software, and to permit persons to whom
  10  * the Software is furnished to do so, subject to the following conditions:
  11  *
  12  * The above copyright notice and this permission notice (including the next
  13  * paragraph) shall be included in all copies or substantial portions of the
  14  * Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  19  * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
  20  * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
  21  * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
  22  * USE OR OTHER DEALINGS IN THE SOFTWARE. */
  23
  24 #include "util/u_format.h"
  25 #include "util/u_format_s3tc.h"
  26 #include "util/u_memory.h"
  27 #include "os/os_time.h"
  28 #include "vl/vl_decoder.h"
  29 #include "vl/vl_video_buffer.h"
  30
  31 #include "r300_context.h"
  32 #include "r300_texture.h"
  33 #include "r300_screen_buffer.h"
  34 #include "r300_state_inlines.h"
  35 #include "r300_public.h"
  36
  37 #include "draw/draw_context.h"
  38
  39 /* Return the identifier behind whom the brave coders responsible for this
  40  * amalgamation of code, sweat, and duct tape, routinely obscure their names.
  41  *
  42  * ...I should have just put "Corbin Simpson", but I'm not that cool.
  43  *
  44  * (Or egotistical. Yet.) */
  45 static const char* r300_get_vendor(struct pipe_screen* pscreen)
  46 {
  47     return "X.Org R300 Project";
  48 }
  49
  50 static const char* r300_get_device_vendor(struct pipe_screen* pscreen)
  51 {
  52     return "ATI";
  53 }
  54
  55 static const char* chip_families[] = {
  56     "unknown",
  57     "ATI R300",
  58     "ATI R350",
  59     "ATI RV350",
  60     "ATI RV370",
  61     "ATI RV380",
  62     "ATI RS400",
  63     "ATI RC410",
  64     "ATI RS480",
  65     "ATI R420",
  66     "ATI R423",
  67     "ATI R430",
  68     "ATI R480",
  69     "ATI R481",
  70     "ATI RV410",
  71     "ATI RS600",
  72     "ATI RS690",
  73     "ATI RS740",
  74     "ATI RV515",
  75     "ATI R520",
  76     "ATI RV530",
  77     "ATI R580",
  78     "ATI RV560",
  79     "ATI RV570"
  80 };
  81
  82 static const char* r300_get_name(struct pipe_screen* pscreen)
  83 {
  84     struct r300_screen* r300screen = r300_screen(pscreen);
  85
  86     return chip_families[r300screen->caps.family];
  87 }
  88
  89 static int r300_get_param(struct pipe_screen* pscreen, enum pipe_cap param)
  90 {
  91     struct r300_screen* r300screen = r300_screen(pscreen);
  92     boolean is_r500 = r300screen->caps.is_r500;
  93
  94     switch (param) {
  95         /* Supported features (boolean caps). */
  96         case PIPE_CAP_NPOT_TEXTURES:
  97         case PIPE_CAP_MIXED_FRAMEBUFFER_SIZES:
  98         case PIPE_CAP_TWO_SIDED_STENCIL:
  99         case PIPE_CAP_ANISOTROPIC_FILTER:
 100         case PIPE_CAP_POINT_SPRITE:
 101         case PIPE_CAP_OCCLUSION_QUERY:
 102         case PIPE_CAP_TEXTURE_SHADOW_MAP:
 103         case PIPE_CAP_TEXTURE_MIRROR_CLAMP:
 104         case PIPE_CAP_BLEND_EQUATION_SEPARATE:
 105         case PIPE_CAP_VERTEX_ELEMENT_INSTANCE_DIVISOR:
 106         case PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT:
 107         case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER:
 108         case PIPE_CAP_CONDITIONAL_RENDER:
 109         case PIPE_CAP_TEXTURE_BARRIER:
 110         case PIPE_CAP_TGSI_CAN_COMPACT_CONSTANTS:
 111         case PIPE_CAP_USER_INDEX_BUFFERS:
 112         case PIPE_CAP_USER_CONSTANT_BUFFERS:
 113         case PIPE_CAP_PREFER_BLIT_BASED_TEXTURE_TRANSFER:
 114         case PIPE_CAP_BUFFER_MAP_PERSISTENT_COHERENT:
 115         case PIPE_CAP_CLIP_HALFZ:
 116             return 1;
 117
 118         case PIPE_CAP_MIN_MAP_BUFFER_ALIGNMENT:
 119             return R300_BUFFER_ALIGNMENT;
 120
 121         case PIPE_CAP_CONSTANT_BUFFER_OFFSET_ALIGNMENT:
 122             return 16;
 123
 124         case PIPE_CAP_GLSL_FEATURE_LEVEL:
 125             return 120;
 126
 127         /* r300 cannot do swizzling of compressed textures. Supported otherwise. */
 128         case PIPE_CAP_TEXTURE_SWIZZLE:
 129             return util_format_s3tc_enabled ? r300screen->caps.dxtc_swizzle : 1;
 130
 131         /* We don't support color clamping on r500, so that we can use color
 132          * intepolators for generic varyings. */
 133         case PIPE_CAP_VERTEX_COLOR_CLAMPED:
 134             return !is_r500;
 135
 136         /* Supported on r500 only. */
 137         case PIPE_CAP_VERTEX_COLOR_UNCLAMPED:
 138         case PIPE_CAP_MIXED_COLORBUFFER_FORMATS:
 139         case PIPE_CAP_SM3:
 140             return is_r500 ? 1 : 0;
 141
 142         /* Unsupported features. */
 143         case PIPE_CAP_QUERY_TIME_ELAPSED:
 144         case PIPE_CAP_QUERY_PIPELINE_STATISTICS:
 145         case PIPE_CAP_MAX_DUAL_SOURCE_RENDER_TARGETS:
 146         case PIPE_CAP_INDEP_BLEND_ENABLE:
 147         case PIPE_CAP_INDEP_BLEND_FUNC:
 148         case PIPE_CAP_DEPTH_CLIP_DISABLE:
 149         case PIPE_CAP_SHADER_STENCIL_EXPORT:
 150         case PIPE_CAP_MAX_TEXTURE_ARRAY_LAYERS:
 151         case PIPE_CAP_TGSI_INSTANCEID:
 152         case PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT:
 153         case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER:
 154         case PIPE_CAP_SEAMLESS_CUBE_MAP:
 155         case PIPE_CAP_SEAMLESS_CUBE_MAP_PER_TEXTURE:
 156         case PIPE_CAP_MIN_TEXEL_OFFSET:
 157         case PIPE_CAP_MAX_TEXEL_OFFSET:
 158         case PIPE_CAP_MIN_TEXTURE_GATHER_OFFSET:
 159         case PIPE_CAP_MAX_TEXTURE_GATHER_OFFSET:
 160         case PIPE_CAP_MAX_STREAM_OUTPUT_BUFFERS:
 161         case PIPE_CAP_MAX_STREAM_OUTPUT_SEPARATE_COMPONENTS:
 162         case PIPE_CAP_MAX_STREAM_OUTPUT_INTERLEAVED_COMPONENTS:
 163         case PIPE_CAP_MAX_GEOMETRY_OUTPUT_VERTICES:
 164         case PIPE_CAP_MAX_GEOMETRY_TOTAL_OUTPUT_COMPONENTS:
 165         case PIPE_CAP_MAX_VERTEX_STREAMS:
 166         case PIPE_CAP_STREAM_OUTPUT_PAUSE_RESUME:
 167         case PIPE_CAP_FRAGMENT_COLOR_CLAMPED:
 168         case PIPE_CAP_QUADS_FOLLOW_PROVOKING_VERTEX_CONVENTION:
 169         case PIPE_CAP_COMPUTE:
 170         case PIPE_CAP_START_INSTANCE:
 171         case PIPE_CAP_QUERY_TIMESTAMP:
 172         case PIPE_CAP_TEXTURE_MULTISAMPLE:
 173         case PIPE_CAP_CUBE_MAP_ARRAY:
 174         case PIPE_CAP_TEXTURE_BUFFER_OBJECTS:
 175         case PIPE_CAP_TEXTURE_BUFFER_OFFSET_ALIGNMENT:
 176         case PIPE_CAP_TEXTURE_BORDER_COLOR_QUIRK:
 177         case PIPE_CAP_MAX_TEXTURE_BUFFER_SIZE:
 178         case PIPE_CAP_TGSI_VS_LAYER_VIEWPORT:
 179         case PIPE_CAP_MAX_TEXTURE_GATHER_COMPONENTS:
 180         case PIPE_CAP_TEXTURE_GATHER_SM5:
 181         case PIPE_CAP_TEXTURE_QUERY_LOD:
 182         case PIPE_CAP_FAKE_SW_MSAA:
 183         case PIPE_CAP_SAMPLE_SHADING:
 184         case PIPE_CAP_TEXTURE_GATHER_OFFSETS:
 185         case PIPE_CAP_DRAW_INDIRECT:
 186         case PIPE_CAP_MULTI_DRAW_INDIRECT:
 187         case PIPE_CAP_MULTI_DRAW_INDIRECT_PARAMS:
 188         case PIPE_CAP_TGSI_FS_FINE_DERIVATIVE:
 189         case PIPE_CAP_CONDITIONAL_RENDER_INVERTED:
 190         case PIPE_CAP_SAMPLER_VIEW_TARGET:
 191         case PIPE_CAP_VERTEXID_NOBASE:
 192         case PIPE_CAP_POLYGON_OFFSET_CLAMP:
 193         case PIPE_CAP_MULTISAMPLE_Z_RESOLVE:
 194         case PIPE_CAP_RESOURCE_FROM_USER_MEMORY:
 195         case PIPE_CAP_DEVICE_RESET_STATUS_QUERY:
 196         case PIPE_CAP_MAX_SHADER_PATCH_VARYINGS:
 197         case PIPE_CAP_TEXTURE_FLOAT_LINEAR:
 198         case PIPE_CAP_TEXTURE_HALF_FLOAT_LINEAR:
 199         case PIPE_CAP_DEPTH_BOUNDS_TEST:
 200         case PIPE_CAP_TGSI_TXQS:
 201         case PIPE_CAP_FORCE_PERSAMPLE_INTERP:
 202         case PIPE_CAP_SHAREABLE_SHADERS:
 203         case PIPE_CAP_COPY_BETWEEN_COMPRESSED_AND_PLAIN_FORMATS:
 204         case PIPE_CAP_CLEAR_TEXTURE:
 205         case PIPE_CAP_DRAW_PARAMETERS:
 206         case PIPE_CAP_TGSI_PACK_HALF_FLOAT:
 207         case PIPE_CAP_TGSI_FS_POSITION_IS_SYSVAL:
 208         case PIPE_CAP_TGSI_FS_FACE_IS_INTEGER_SYSVAL:
 209         case PIPE_CAP_SHADER_BUFFER_OFFSET_ALIGNMENT:
 210         case PIPE_CAP_INVALIDATE_BUFFER:
 211         case PIPE_CAP_GENERATE_MIPMAP:
 212         case PIPE_CAP_STRING_MARKER:
 213         case PIPE_CAP_BUFFER_SAMPLER_VIEW_RGBA_ONLY:
 214         case PIPE_CAP_SURFACE_REINTERPRET_BLOCKS:
 215         case PIPE_CAP_QUERY_BUFFER_OBJECT:
 216         case PIPE_CAP_QUERY_MEMORY_INFO:
 217         case PIPE_CAP_FRAMEBUFFER_NO_ATTACHMENT:
 218         case PIPE_CAP_ROBUST_BUFFER_ACCESS_BEHAVIOR:
 219         case PIPE_CAP_CULL_DISTANCE:
 220         case PIPE_CAP_PRIMITIVE_RESTART_FOR_PATCHES:
 221             return 0;
 222
 223         /* SWTCL-only features. */
 224         case PIPE_CAP_PRIMITIVE_RESTART:
 225         case PIPE_CAP_USER_VERTEX_BUFFERS:
 226         case PIPE_CAP_TGSI_VS_WINDOW_SPACE_POSITION:
 227             return !r300screen->caps.has_tcl;
 228
 229         /* HWTCL-only features / limitations. */
 230         case PIPE_CAP_VERTEX_BUFFER_OFFSET_4BYTE_ALIGNED_ONLY:
 231         case PIPE_CAP_VERTEX_BUFFER_STRIDE_4BYTE_ALIGNED_ONLY:
 232         case PIPE_CAP_VERTEX_ELEMENT_SRC_OFFSET_4BYTE_ALIGNED_ONLY:
 233             return r300screen->caps.has_tcl;
 234         case PIPE_CAP_TGSI_TEXCOORD:
 235             return 0;
 236
 237         /* Texturing. */
 238         case PIPE_CAP_MAX_TEXTURE_2D_LEVELS:
 239         case PIPE_CAP_MAX_TEXTURE_3D_LEVELS:
 240         case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS:
 241             /* 13 == 4096, 12 == 2048 */
 242             return is_r500 ? 13 : 12;
 243
 244         /* Render targets. */
 245         case PIPE_CAP_MAX_RENDER_TARGETS:
 246             return 4;
 247         case PIPE_CAP_ENDIANNESS:
 248             return PIPE_ENDIAN_LITTLE;
 249
 250         case PIPE_CAP_MAX_VIEWPORTS:
 251             return 1;
 252
 253         case PIPE_CAP_MAX_VERTEX_ATTRIB_STRIDE:
 254             return 2048;
 255
 256         case PIPE_CAP_VENDOR_ID:
 257                 return 0x1002;
 258         case PIPE_CAP_DEVICE_ID:
 259                 return r300screen->info.pci_id;
 260         case PIPE_CAP_ACCELERATED:
 261                 return 1;
 262         case PIPE_CAP_VIDEO_MEMORY:
 263                 return r300screen->info.vram_size >> 20;
 264         case PIPE_CAP_UMA:
 265                 return 0;
 266         case PIPE_CAP_PCI_GROUP:
 267             return r300screen->info.pci_domain;
 268         case PIPE_CAP_PCI_BUS:
 269             return r300screen->info.pci_bus;
 270         case PIPE_CAP_PCI_DEVICE:
 271             return r300screen->info.pci_dev;
 272         case PIPE_CAP_PCI_FUNCTION:
 273             return r300screen->info.pci_func;
 274     }
 275     return 0;
 276 }
 277
 278 static int r300_get_shader_param(struct pipe_screen *pscreen, unsigned shader, enum pipe_shader_cap param)
 279 {
 280    struct r300_screen* r300screen = r300_screen(pscreen);
 281    boolean is_r400 = r300screen->caps.is_r400;
 282    boolean is_r500 = r300screen->caps.is_r500;
 283
 284    switch (shader) {
 285     case PIPE_SHADER_FRAGMENT:
 286         switch (param)
 287         {
 288         case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
 289             return is_r500 || is_r400 ? 512 : 96;
 290         case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
 291             return is_r500 || is_r400 ? 512 : 64;
 292         case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
 293             return is_r500 || is_r400 ? 512 : 32;
 294         case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
 295             return is_r500 ? 511 : 4;
 296         case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:
 297             return is_r500 ? 64 : 0; /* Actually unlimited on r500. */
 298             /* Fragment shader limits. */
 299         case PIPE_SHADER_CAP_MAX_INPUTS:
 300             /* 2 colors + 8 texcoords are always supported
 301              * (minus fog and wpos).
 302              *
 303              * R500 has the ability to turn 3rd and 4th color into
 304              * additional texcoords but there is no two-sided color
 305              * selection then. However the facing bit can be used instead. */
 306             return 10;
 307         case PIPE_SHADER_CAP_MAX_OUTPUTS:
 308             return 4;
 309         case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE:
 310             return (is_r500 ? 256 : 32) * sizeof(float[4]);
 311         case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
 312         case PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE:
 313             return 1;
 314         case PIPE_SHADER_CAP_MAX_TEMPS:
 315             return is_r500 ? 128 : is_r400 ? 64 : 32;
 316         case PIPE_SHADER_CAP_MAX_PREDS:
 317             return 0; /* unused */
 318         case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
 319         case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS:
 320            return r300screen->caps.num_tex_units;
 321         case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
 322         case PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED:
 323         case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
 324         case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
 325         case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
 326         case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
 327         case PIPE_SHADER_CAP_SUBROUTINES:
 328         case PIPE_SHADER_CAP_INTEGERS:
 329         case PIPE_SHADER_CAP_DOUBLES:
 330         case PIPE_SHADER_CAP_TGSI_DROUND_SUPPORTED:
 331         case PIPE_SHADER_CAP_TGSI_DFRACEXP_DLDEXP_SUPPORTED:
 332         case PIPE_SHADER_CAP_TGSI_FMA_SUPPORTED:
 333         case PIPE_SHADER_CAP_MAX_SHADER_BUFFERS:
 334         case PIPE_SHADER_CAP_MAX_SHADER_IMAGES:
 335             return 0;
 336         case PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT:
 337             return 32;
 338         case PIPE_SHADER_CAP_PREFERRED_IR:
 339             return PIPE_SHADER_IR_TGSI;
 340         case PIPE_SHADER_CAP_SUPPORTED_IRS:
 341             return 0;
 342         }
 343         break;
 344     case PIPE_SHADER_VERTEX:
 345         switch (param)
 346         {
 347         case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
 348         case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS:
 349         case PIPE_SHADER_CAP_SUBROUTINES:
 350             return 0;
 351         default:;
 352         }
 353
 354         if (!r300screen->caps.has_tcl) {
 355             return draw_get_shader_param(shader, param);
 356         }
 357
 358         switch (param)
 359         {
 360         case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
 361         case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
 362             return is_r500 ? 1024 : 256;
 363         case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:
 364             return is_r500 ? 4 : 0; /* For loops; not sure about conditionals. */
 365         case PIPE_SHADER_CAP_MAX_INPUTS:
 366             return 16;
 367         case PIPE_SHADER_CAP_MAX_OUTPUTS:
 368             return 10;
 369         case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE:
 370             return 256 * sizeof(float[4]);
 371         case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
 372             return 1;
 373         case PIPE_SHADER_CAP_MAX_TEMPS:
 374             return 32;
 375         case PIPE_SHADER_CAP_MAX_PREDS:
 376             return 0; /* unused */
 377         case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
 378         case PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE:
 379             return 1;
 380         case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
 381         case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
 382         case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
 383         case PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED:
 384         case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
 385         case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
 386         case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
 387         case PIPE_SHADER_CAP_SUBROUTINES:
 388         case PIPE_SHADER_CAP_INTEGERS:
 389         case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
 390         case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS:
 391         case PIPE_SHADER_CAP_DOUBLES:
 392         case PIPE_SHADER_CAP_TGSI_DROUND_SUPPORTED:
 393         case PIPE_SHADER_CAP_TGSI_DFRACEXP_DLDEXP_SUPPORTED:
 394         case PIPE_SHADER_CAP_TGSI_FMA_SUPPORTED:
 395         case PIPE_SHADER_CAP_MAX_SHADER_BUFFERS:
 396         case PIPE_SHADER_CAP_MAX_SHADER_IMAGES:
 397             return 0;
 398         case PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT:
 399             return 32;
 400         case PIPE_SHADER_CAP_PREFERRED_IR:
 401             return PIPE_SHADER_IR_TGSI;
 402         case PIPE_SHADER_CAP_SUPPORTED_IRS:
 403             return 0;
 404         }
 405         break;
 406     }
 407     return 0;
 408 }
 409
 410 static float r300_get_paramf(struct pipe_screen* pscreen,
 411                              enum pipe_capf param)
 412 {
 413     struct r300_screen* r300screen = r300_screen(pscreen);
 414
 415     switch (param) {
 416         case PIPE_CAPF_MAX_LINE_WIDTH:
 417         case PIPE_CAPF_MAX_LINE_WIDTH_AA:
 418         case PIPE_CAPF_MAX_POINT_WIDTH:
 419         case PIPE_CAPF_MAX_POINT_WIDTH_AA:
 420             /* The maximum dimensions of the colorbuffer are our practical
 421              * rendering limits. 2048 pixels should be enough for anybody. */
 422             if (r300screen->caps.is_r500) {
 423                 return 4096.0f;
 424             } else if (r300screen->caps.is_r400) {
 425                 return 4021.0f;
 426             } else {
 427                 return 2560.0f;
 428             }
 429         case PIPE_CAPF_MAX_TEXTURE_ANISOTROPY:
 430             return 16.0f;
 431         case PIPE_CAPF_MAX_TEXTURE_LOD_BIAS:
 432             return 16.0f;
 433         case PIPE_CAPF_GUARD_BAND_LEFT:
 434         case PIPE_CAPF_GUARD_BAND_TOP:
 435         case PIPE_CAPF_GUARD_BAND_RIGHT:
 436         case PIPE_CAPF_GUARD_BAND_BOTTOM:
 437             return 0.0f;
 438         default:
 439             debug_printf("r300: Warning: Unknown CAP %d in get_paramf.\n",
 440                          param);
 441             return 0.0f;
 442     }
 443 }
 444
 445 static int r300_get_video_param(struct pipe_screen *screen,
 446                                 enum pipe_video_profile profile,
 447                                 enum pipe_video_entrypoint entrypoint,
 448                                 enum pipe_video_cap param)
 449 {
 450    switch (param) {
 451       case PIPE_VIDEO_CAP_SUPPORTED:
 452          return vl_profile_supported(screen, profile, entrypoint);
 453       case PIPE_VIDEO_CAP_NPOT_TEXTURES:
 454          return 0;
 455       case PIPE_VIDEO_CAP_MAX_WIDTH:
 456       case PIPE_VIDEO_CAP_MAX_HEIGHT:
 457          return vl_video_buffer_max_size(screen);
 458       case PIPE_VIDEO_CAP_PREFERED_FORMAT:
 459          return PIPE_FORMAT_NV12;
 460       case PIPE_VIDEO_CAP_PREFERS_INTERLACED:
 461          return false;
 462       case PIPE_VIDEO_CAP_SUPPORTS_INTERLACED:
 463          return false;
 464       case PIPE_VIDEO_CAP_SUPPORTS_PROGRESSIVE:
 465          return true;
 466       case PIPE_VIDEO_CAP_MAX_LEVEL:
 467          return vl_level_supported(screen, profile);
 468       default:
 469          return 0;
 470    }
 471 }
 472
 473 /**
 474  * Whether the format matches:
 475  *   PIPE_FORMAT_?10?10?10?2_UNORM
 476  */
 477 static inline boolean
 478 util_format_is_rgba1010102_variant(const struct util_format_description *desc)
 479 {
 480    static const unsigned size[4] = {10, 10, 10, 2};
 481    unsigned chan;
 482
 483    if (desc->block.width != 1 ||
 484        desc->block.height != 1 ||
 485        desc->block.bits != 32)
 486       return FALSE;
 487
 488    for (chan = 0; chan < 4; ++chan) {
 489       if(desc->channel[chan].type != UTIL_FORMAT_TYPE_UNSIGNED &&
 490          desc->channel[chan].type != UTIL_FORMAT_TYPE_VOID)
 491          return FALSE;
 492       if (desc->channel[chan].size != size[chan])
 493          return FALSE;
 494    }
 495
 496    return TRUE;
 497 }
 498
 499 static bool r300_is_blending_supported(struct r300_screen *rscreen,
 500                                        enum pipe_format format)
 501 {
 502     int c;
 503     const struct util_format_description *desc =
 504         util_format_description(format);
 505
 506     if (desc->layout != UTIL_FORMAT_LAYOUT_PLAIN)
 507         return false;
 508
 509     c = util_format_get_first_non_void_channel(format);
 510
 511     /* RGBA16F */
 512     if (rscreen->caps.is_r500 &&
 513         desc->nr_channels == 4 &&
 514         desc->channel[c].size == 16 &&
 515         desc->channel[c].type == UTIL_FORMAT_TYPE_FLOAT)
 516         return true;
 517
 518     if (desc->channel[c].normalized &&
 519         desc->channel[c].type == UTIL_FORMAT_TYPE_UNSIGNED &&
 520         desc->channel[c].size >= 4 &&
 521         desc->channel[c].size <= 10) {
 522         /* RGB10_A2, RGBA8, RGB5_A1, RGBA4, RGB565 */
 523         if (desc->nr_channels >= 3)
 524             return true;
 525
 526         if (format == PIPE_FORMAT_R8G8_UNORM)
 527             return true;
 528
 529         /* R8, I8, L8, A8 */
 530         if (desc->nr_channels == 1)
 531             return true;
 532     }
 533
 534     return false;
 535 }
 536
 537 static boolean r300_is_format_supported(struct pipe_screen* screen,
 538                                         enum pipe_format format,
 539                                         enum pipe_texture_target target,
 540                                         unsigned sample_count,
 541                                         unsigned usage)
 542 {
 543     uint32_t retval = 0;
 544     boolean is_r500 = r300_screen(screen)->caps.is_r500;
 545     boolean is_r400 = r300_screen(screen)->caps.is_r400;
 546     boolean is_color2101010 = format == PIPE_FORMAT_R10G10B10A2_UNORM ||
 547                               format == PIPE_FORMAT_R10G10B10X2_SNORM ||
 548                               format == PIPE_FORMAT_B10G10R10A2_UNORM ||
 549                               format == PIPE_FORMAT_B10G10R10X2_UNORM ||
 550                               format == PIPE_FORMAT_R10SG10SB10SA2U_NORM;
 551     boolean is_ati1n = format == PIPE_FORMAT_RGTC1_UNORM ||
 552                        format == PIPE_FORMAT_RGTC1_SNORM ||
 553                        format == PIPE_FORMAT_LATC1_UNORM ||
 554                        format == PIPE_FORMAT_LATC1_SNORM;
 555     boolean is_ati2n = format == PIPE_FORMAT_RGTC2_UNORM ||
 556                        format == PIPE_FORMAT_RGTC2_SNORM ||
 557                        format == PIPE_FORMAT_LATC2_UNORM ||
 558                        format == PIPE_FORMAT_LATC2_SNORM;
 559     boolean is_half_float = format == PIPE_FORMAT_R16_FLOAT ||
 560                             format == PIPE_FORMAT_R16G16_FLOAT ||
 561                             format == PIPE_FORMAT_R16G16B16_FLOAT ||
 562                             format == PIPE_FORMAT_R16G16B16A16_FLOAT ||
 563                             format == PIPE_FORMAT_R16G16B16X16_FLOAT;
 564     const struct util_format_description *desc;
 565
 566     if (!util_format_is_supported(format, usage))
 567        return FALSE;
 568
 569     /* Check multisampling support. */
 570     switch (sample_count) {
 571         case 0:
 572         case 1:
 573             break;
 574         case 2:
 575         case 4:
 576         case 6:
 577             /* No texturing and scanout. */
 578             if (usage & (PIPE_BIND_SAMPLER_VIEW |
 579                          PIPE_BIND_DISPLAY_TARGET |
 580                          PIPE_BIND_SCANOUT)) {
 581                 return FALSE;
 582             }
 583
 584             desc = util_format_description(format);
 585
 586             if (is_r500) {
 587                 /* Only allow depth/stencil, RGBA8, RGBA1010102, RGBA16F. */
 588                 if (!util_format_is_depth_or_stencil(format) &&
 589                     !util_format_is_rgba8_variant(desc) &&
 590                     !util_format_is_rgba1010102_variant(desc) &&
 591                     format != PIPE_FORMAT_R16G16B16A16_FLOAT &&
 592                     format != PIPE_FORMAT_R16G16B16X16_FLOAT) {
 593                     return FALSE;
 594                 }
 595             } else {
 596                 /* Only allow depth/stencil, RGBA8. */
 597                 if (!util_format_is_depth_or_stencil(format) &&
 598                     !util_format_is_rgba8_variant(desc)) {
 599                     return FALSE;
 600                 }
 601             }
 602             break;
 603         default:
 604             return FALSE;
 605     }
 606
 607     /* Check sampler format support. */
 608     if ((usage & PIPE_BIND_SAMPLER_VIEW) &&
 609         /* these two are broken for an unknown reason */
 610         format != PIPE_FORMAT_R8G8B8X8_SNORM &&
 611         format != PIPE_FORMAT_R16G16B16X16_SNORM &&
 612         /* ATI1N is r5xx-only. */
 613         (is_r500 || !is_ati1n) &&
 614         /* ATI2N is supported on r4xx-r5xx. */
 615         (is_r400 || is_r500 || !is_ati2n) &&
 616         r300_is_sampler_format_supported(format)) {
 617         retval |= PIPE_BIND_SAMPLER_VIEW;
 618     }
 619
 620     /* Check colorbuffer format support. */
 621     if ((usage & (PIPE_BIND_RENDER_TARGET |
 622                   PIPE_BIND_DISPLAY_TARGET |
 623                   PIPE_BIND_SCANOUT |
 624                   PIPE_BIND_SHARED |
 625                   PIPE_BIND_BLENDABLE)) &&
 626         /* 2101010 cannot be rendered to on non-r5xx. */
 627         (!is_color2101010 || is_r500) &&
 628         r300_is_colorbuffer_format_supported(format)) {
 629         retval |= usage &
 630             (PIPE_BIND_RENDER_TARGET |
 631              PIPE_BIND_DISPLAY_TARGET |
 632              PIPE_BIND_SCANOUT |
 633              PIPE_BIND_SHARED);
 634
 635         if (r300_is_blending_supported(r300_screen(screen), format)) {
 636             retval |= usage & PIPE_BIND_BLENDABLE;
 637         }
 638     }
 639
 640     /* Check depth-stencil format support. */
 641     if (usage & PIPE_BIND_DEPTH_STENCIL &&
 642         r300_is_zs_format_supported(format)) {
 643         retval |= PIPE_BIND_DEPTH_STENCIL;
 644     }
 645
 646     /* Check vertex buffer format support. */
 647     if (usage & PIPE_BIND_VERTEX_BUFFER) {
 648         if (r300_screen(screen)->caps.has_tcl) {
 649             /* Half float is supported on >= R400. */
 650             if ((is_r400 || is_r500 || !is_half_float) &&
 651                 r300_translate_vertex_data_type(format) != R300_INVALID_FORMAT) {
 652                 retval |= PIPE_BIND_VERTEX_BUFFER;
 653             }
 654         } else {
 655             /* SW TCL */
 656             if (!util_format_is_pure_integer(format)) {
 657                 retval |= PIPE_BIND_VERTEX_BUFFER;
 658             }
 659         }
 660     }
 661
 662     /* Transfers are always supported. */
 663     if (usage & PIPE_BIND_TRANSFER_READ)
 664         retval |= PIPE_BIND_TRANSFER_READ;
 665     if (usage & PIPE_BIND_TRANSFER_WRITE)
 666         retval |= PIPE_BIND_TRANSFER_WRITE;
 667
 668     return retval == usage;
 669 }
 670
 671 static void r300_destroy_screen(struct pipe_screen* pscreen)
 672 {
 673     struct r300_screen* r300screen = r300_screen(pscreen);
 674     struct radeon_winsys *rws = radeon_winsys(pscreen);
 675
 676     if (rws && !rws->unref(rws))
 677       return;
 678
 679     pipe_mutex_destroy(r300screen->cmask_mutex);
 680
 681     if (rws)
 682       rws->destroy(rws);
 683
 684     FREE(r300screen);
 685 }
 686
 687 static void r300_fence_reference(struct pipe_screen *screen,
 688                                  struct pipe_fence_handle **ptr,
 689                                  struct pipe_fence_handle *fence)
 690 {
 691     struct radeon_winsys *rws = r300_screen(screen)->rws;
 692
 693     rws->fence_reference(ptr, fence);
 694 }
 695
 696 static boolean r300_fence_finish(struct pipe_screen *screen,
 697                                  struct pipe_fence_handle *fence,
 698                                  uint64_t timeout)
 699 {
 700     struct radeon_winsys *rws = r300_screen(screen)->rws;
 701
 702     return rws->fence_wait(rws, fence, timeout);
 703 }
 704
 705 struct pipe_screen* r300_screen_create(struct radeon_winsys *rws)
 706 {
 707     struct r300_screen *r300screen = CALLOC_STRUCT(r300_screen);
 708
 709     if (!r300screen) {
 710         FREE(r300screen);
 711         return NULL;
 712     }
 713
 714     rws->query_info(rws, &r300screen->info);
 715
 716     r300_init_debug(r300screen);
 717     r300_parse_chipset(r300screen->info.pci_id, &r300screen->caps);
 718
 719     if (SCREEN_DBG_ON(r300screen, DBG_NO_ZMASK))
 720         r300screen->caps.zmask_ram = 0;
 721     if (SCREEN_DBG_ON(r300screen, DBG_NO_HIZ))
 722         r300screen->caps.hiz_ram = 0;
 723
 724     r300screen->rws = rws;
 725     r300screen->screen.destroy = r300_destroy_screen;
 726     r300screen->screen.get_name = r300_get_name;
 727     r300screen->screen.get_vendor = r300_get_vendor;
 728     r300screen->screen.get_device_vendor = r300_get_device_vendor;
 729     r300screen->screen.get_param = r300_get_param;
 730     r300screen->screen.get_shader_param = r300_get_shader_param;
 731     r300screen->screen.get_paramf = r300_get_paramf;
 732     r300screen->screen.get_video_param = r300_get_video_param;
 733     r300screen->screen.is_format_supported = r300_is_format_supported;
 734     r300screen->screen.is_video_format_supported = vl_video_buffer_is_format_supported;
 735     r300screen->screen.context_create = r300_create_context;
 736     r300screen->screen.fence_reference = r300_fence_reference;
 737     r300screen->screen.fence_finish = r300_fence_finish;
 738
 739     r300_init_screen_resource_functions(r300screen);
 740
 741     util_format_s3tc_init();
 742     pipe_mutex_init(r300screen->cmask_mutex);
 743
 744     return &r300screen->screen;
 745 }