st/va: add BOB deinterlacing v2
[mesa.git] / src / gallium / drivers / r300 / r300_screen.c
1 /*
2 * Copyright 2008 Corbin Simpson <MostAwesomeDude@gmail.com>
3 * Copyright 2010 Marek Olšák <maraeo@gmail.com>
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * on the rights to use, copy, modify, merge, publish, distribute, sub
9 * license, and/or sell copies of the Software, and to permit persons to whom
10 * the Software is furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
14 * Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
20 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
21 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
22 * USE OR OTHER DEALINGS IN THE SOFTWARE. */
23
24 #include "util/u_format.h"
25 #include "util/u_format_s3tc.h"
26 #include "util/u_memory.h"
27 #include "os/os_time.h"
28 #include "vl/vl_decoder.h"
29 #include "vl/vl_video_buffer.h"
30
31 #include "r300_context.h"
32 #include "r300_texture.h"
33 #include "r300_screen_buffer.h"
34 #include "r300_state_inlines.h"
35 #include "r300_public.h"
36
37 #include "draw/draw_context.h"
38
39 /* Return the identifier behind whom the brave coders responsible for this
40 * amalgamation of code, sweat, and duct tape, routinely obscure their names.
41 *
42 * ...I should have just put "Corbin Simpson", but I'm not that cool.
43 *
44 * (Or egotistical. Yet.) */
45 static const char* r300_get_vendor(struct pipe_screen* pscreen)
46 {
47 return "X.Org R300 Project";
48 }
49
50 static const char* r300_get_device_vendor(struct pipe_screen* pscreen)
51 {
52 return "ATI";
53 }
54
55 static const char* chip_families[] = {
56 "unknown",
57 "ATI R300",
58 "ATI R350",
59 "ATI RV350",
60 "ATI RV370",
61 "ATI RV380",
62 "ATI RS400",
63 "ATI RC410",
64 "ATI RS480",
65 "ATI R420",
66 "ATI R423",
67 "ATI R430",
68 "ATI R480",
69 "ATI R481",
70 "ATI RV410",
71 "ATI RS600",
72 "ATI RS690",
73 "ATI RS740",
74 "ATI RV515",
75 "ATI R520",
76 "ATI RV530",
77 "ATI R580",
78 "ATI RV560",
79 "ATI RV570"
80 };
81
82 static const char* r300_get_name(struct pipe_screen* pscreen)
83 {
84 struct r300_screen* r300screen = r300_screen(pscreen);
85
86 return chip_families[r300screen->caps.family];
87 }
88
89 static int r300_get_param(struct pipe_screen* pscreen, enum pipe_cap param)
90 {
91 struct r300_screen* r300screen = r300_screen(pscreen);
92 boolean is_r500 = r300screen->caps.is_r500;
93
94 switch (param) {
95 /* Supported features (boolean caps). */
96 case PIPE_CAP_NPOT_TEXTURES:
97 case PIPE_CAP_MIXED_FRAMEBUFFER_SIZES:
98 case PIPE_CAP_TWO_SIDED_STENCIL:
99 case PIPE_CAP_ANISOTROPIC_FILTER:
100 case PIPE_CAP_POINT_SPRITE:
101 case PIPE_CAP_OCCLUSION_QUERY:
102 case PIPE_CAP_TEXTURE_SHADOW_MAP:
103 case PIPE_CAP_TEXTURE_MIRROR_CLAMP:
104 case PIPE_CAP_BLEND_EQUATION_SEPARATE:
105 case PIPE_CAP_VERTEX_ELEMENT_INSTANCE_DIVISOR:
106 case PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT:
107 case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER:
108 case PIPE_CAP_CONDITIONAL_RENDER:
109 case PIPE_CAP_TEXTURE_BARRIER:
110 case PIPE_CAP_TGSI_CAN_COMPACT_CONSTANTS:
111 case PIPE_CAP_USER_INDEX_BUFFERS:
112 case PIPE_CAP_USER_CONSTANT_BUFFERS:
113 case PIPE_CAP_PREFER_BLIT_BASED_TEXTURE_TRANSFER:
114 case PIPE_CAP_BUFFER_MAP_PERSISTENT_COHERENT:
115 case PIPE_CAP_CLIP_HALFZ:
116 return 1;
117
118 case PIPE_CAP_MIN_MAP_BUFFER_ALIGNMENT:
119 return R300_BUFFER_ALIGNMENT;
120
121 case PIPE_CAP_CONSTANT_BUFFER_OFFSET_ALIGNMENT:
122 return 16;
123
124 case PIPE_CAP_GLSL_FEATURE_LEVEL:
125 return 120;
126
127 /* r300 cannot do swizzling of compressed textures. Supported otherwise. */
128 case PIPE_CAP_TEXTURE_SWIZZLE:
129 return util_format_s3tc_enabled ? r300screen->caps.dxtc_swizzle : 1;
130
131 /* We don't support color clamping on r500, so that we can use color
132 * intepolators for generic varyings. */
133 case PIPE_CAP_VERTEX_COLOR_CLAMPED:
134 return !is_r500;
135
136 /* Supported on r500 only. */
137 case PIPE_CAP_VERTEX_COLOR_UNCLAMPED:
138 case PIPE_CAP_MIXED_COLORBUFFER_FORMATS:
139 case PIPE_CAP_SM3:
140 return is_r500 ? 1 : 0;
141
142 /* Unsupported features. */
143 case PIPE_CAP_QUERY_TIME_ELAPSED:
144 case PIPE_CAP_QUERY_PIPELINE_STATISTICS:
145 case PIPE_CAP_MAX_DUAL_SOURCE_RENDER_TARGETS:
146 case PIPE_CAP_INDEP_BLEND_ENABLE:
147 case PIPE_CAP_INDEP_BLEND_FUNC:
148 case PIPE_CAP_DEPTH_CLIP_DISABLE:
149 case PIPE_CAP_SHADER_STENCIL_EXPORT:
150 case PIPE_CAP_MAX_TEXTURE_ARRAY_LAYERS:
151 case PIPE_CAP_TGSI_INSTANCEID:
152 case PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT:
153 case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER:
154 case PIPE_CAP_SEAMLESS_CUBE_MAP:
155 case PIPE_CAP_SEAMLESS_CUBE_MAP_PER_TEXTURE:
156 case PIPE_CAP_MIN_TEXEL_OFFSET:
157 case PIPE_CAP_MAX_TEXEL_OFFSET:
158 case PIPE_CAP_MIN_TEXTURE_GATHER_OFFSET:
159 case PIPE_CAP_MAX_TEXTURE_GATHER_OFFSET:
160 case PIPE_CAP_MAX_STREAM_OUTPUT_BUFFERS:
161 case PIPE_CAP_MAX_STREAM_OUTPUT_SEPARATE_COMPONENTS:
162 case PIPE_CAP_MAX_STREAM_OUTPUT_INTERLEAVED_COMPONENTS:
163 case PIPE_CAP_MAX_GEOMETRY_OUTPUT_VERTICES:
164 case PIPE_CAP_MAX_GEOMETRY_TOTAL_OUTPUT_COMPONENTS:
165 case PIPE_CAP_MAX_VERTEX_STREAMS:
166 case PIPE_CAP_STREAM_OUTPUT_PAUSE_RESUME:
167 case PIPE_CAP_FRAGMENT_COLOR_CLAMPED:
168 case PIPE_CAP_QUADS_FOLLOW_PROVOKING_VERTEX_CONVENTION:
169 case PIPE_CAP_COMPUTE:
170 case PIPE_CAP_START_INSTANCE:
171 case PIPE_CAP_QUERY_TIMESTAMP:
172 case PIPE_CAP_TEXTURE_MULTISAMPLE:
173 case PIPE_CAP_CUBE_MAP_ARRAY:
174 case PIPE_CAP_TEXTURE_BUFFER_OBJECTS:
175 case PIPE_CAP_TEXTURE_BUFFER_OFFSET_ALIGNMENT:
176 case PIPE_CAP_TEXTURE_BORDER_COLOR_QUIRK:
177 case PIPE_CAP_MAX_TEXTURE_BUFFER_SIZE:
178 case PIPE_CAP_TGSI_VS_LAYER_VIEWPORT:
179 case PIPE_CAP_MAX_TEXTURE_GATHER_COMPONENTS:
180 case PIPE_CAP_TEXTURE_GATHER_SM5:
181 case PIPE_CAP_TEXTURE_QUERY_LOD:
182 case PIPE_CAP_FAKE_SW_MSAA:
183 case PIPE_CAP_SAMPLE_SHADING:
184 case PIPE_CAP_TEXTURE_GATHER_OFFSETS:
185 case PIPE_CAP_DRAW_INDIRECT:
186 case PIPE_CAP_MULTI_DRAW_INDIRECT:
187 case PIPE_CAP_MULTI_DRAW_INDIRECT_PARAMS:
188 case PIPE_CAP_TGSI_FS_FINE_DERIVATIVE:
189 case PIPE_CAP_CONDITIONAL_RENDER_INVERTED:
190 case PIPE_CAP_SAMPLER_VIEW_TARGET:
191 case PIPE_CAP_VERTEXID_NOBASE:
192 case PIPE_CAP_POLYGON_OFFSET_CLAMP:
193 case PIPE_CAP_MULTISAMPLE_Z_RESOLVE:
194 case PIPE_CAP_RESOURCE_FROM_USER_MEMORY:
195 case PIPE_CAP_DEVICE_RESET_STATUS_QUERY:
196 case PIPE_CAP_MAX_SHADER_PATCH_VARYINGS:
197 case PIPE_CAP_TEXTURE_FLOAT_LINEAR:
198 case PIPE_CAP_TEXTURE_HALF_FLOAT_LINEAR:
199 case PIPE_CAP_DEPTH_BOUNDS_TEST:
200 case PIPE_CAP_TGSI_TXQS:
201 case PIPE_CAP_FORCE_PERSAMPLE_INTERP:
202 case PIPE_CAP_SHAREABLE_SHADERS:
203 case PIPE_CAP_COPY_BETWEEN_COMPRESSED_AND_PLAIN_FORMATS:
204 case PIPE_CAP_CLEAR_TEXTURE:
205 case PIPE_CAP_DRAW_PARAMETERS:
206 case PIPE_CAP_TGSI_PACK_HALF_FLOAT:
207 case PIPE_CAP_TGSI_FS_POSITION_IS_SYSVAL:
208 case PIPE_CAP_TGSI_FS_FACE_IS_INTEGER_SYSVAL:
209 case PIPE_CAP_SHADER_BUFFER_OFFSET_ALIGNMENT:
210 return 0;
211
212 /* SWTCL-only features. */
213 case PIPE_CAP_PRIMITIVE_RESTART:
214 case PIPE_CAP_USER_VERTEX_BUFFERS:
215 case PIPE_CAP_TGSI_VS_WINDOW_SPACE_POSITION:
216 return !r300screen->caps.has_tcl;
217
218 /* HWTCL-only features / limitations. */
219 case PIPE_CAP_VERTEX_BUFFER_OFFSET_4BYTE_ALIGNED_ONLY:
220 case PIPE_CAP_VERTEX_BUFFER_STRIDE_4BYTE_ALIGNED_ONLY:
221 case PIPE_CAP_VERTEX_ELEMENT_SRC_OFFSET_4BYTE_ALIGNED_ONLY:
222 return r300screen->caps.has_tcl;
223 case PIPE_CAP_TGSI_TEXCOORD:
224 return 0;
225
226 /* Texturing. */
227 case PIPE_CAP_MAX_TEXTURE_2D_LEVELS:
228 case PIPE_CAP_MAX_TEXTURE_3D_LEVELS:
229 case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS:
230 /* 13 == 4096, 12 == 2048 */
231 return is_r500 ? 13 : 12;
232
233 /* Render targets. */
234 case PIPE_CAP_MAX_RENDER_TARGETS:
235 return 4;
236 case PIPE_CAP_ENDIANNESS:
237 return PIPE_ENDIAN_LITTLE;
238
239 case PIPE_CAP_MAX_VIEWPORTS:
240 return 1;
241
242 case PIPE_CAP_MAX_VERTEX_ATTRIB_STRIDE:
243 return 2048;
244
245 case PIPE_CAP_VENDOR_ID:
246 return 0x1002;
247 case PIPE_CAP_DEVICE_ID:
248 return r300screen->info.pci_id;
249 case PIPE_CAP_ACCELERATED:
250 return 1;
251 case PIPE_CAP_VIDEO_MEMORY:
252 return r300screen->info.vram_size >> 20;
253 case PIPE_CAP_UMA:
254 return 0;
255 }
256 return 0;
257 }
258
259 static int r300_get_shader_param(struct pipe_screen *pscreen, unsigned shader, enum pipe_shader_cap param)
260 {
261 struct r300_screen* r300screen = r300_screen(pscreen);
262 boolean is_r400 = r300screen->caps.is_r400;
263 boolean is_r500 = r300screen->caps.is_r500;
264
265 switch (shader) {
266 case PIPE_SHADER_FRAGMENT:
267 switch (param)
268 {
269 case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
270 return is_r500 || is_r400 ? 512 : 96;
271 case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
272 return is_r500 || is_r400 ? 512 : 64;
273 case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
274 return is_r500 || is_r400 ? 512 : 32;
275 case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
276 return is_r500 ? 511 : 4;
277 case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:
278 return is_r500 ? 64 : 0; /* Actually unlimited on r500. */
279 /* Fragment shader limits. */
280 case PIPE_SHADER_CAP_MAX_INPUTS:
281 /* 2 colors + 8 texcoords are always supported
282 * (minus fog and wpos).
283 *
284 * R500 has the ability to turn 3rd and 4th color into
285 * additional texcoords but there is no two-sided color
286 * selection then. However the facing bit can be used instead. */
287 return 10;
288 case PIPE_SHADER_CAP_MAX_OUTPUTS:
289 return 4;
290 case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE:
291 return (is_r500 ? 256 : 32) * sizeof(float[4]);
292 case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
293 case PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE:
294 return 1;
295 case PIPE_SHADER_CAP_MAX_TEMPS:
296 return is_r500 ? 128 : is_r400 ? 64 : 32;
297 case PIPE_SHADER_CAP_MAX_PREDS:
298 return 0; /* unused */
299 case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
300 case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS:
301 return r300screen->caps.num_tex_units;
302 case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
303 case PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED:
304 case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
305 case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
306 case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
307 case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
308 case PIPE_SHADER_CAP_SUBROUTINES:
309 case PIPE_SHADER_CAP_INTEGERS:
310 case PIPE_SHADER_CAP_DOUBLES:
311 case PIPE_SHADER_CAP_TGSI_DROUND_SUPPORTED:
312 case PIPE_SHADER_CAP_TGSI_DFRACEXP_DLDEXP_SUPPORTED:
313 case PIPE_SHADER_CAP_TGSI_FMA_SUPPORTED:
314 case PIPE_SHADER_CAP_MAX_SHADER_BUFFERS:
315 return 0;
316 case PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT:
317 return 32;
318 case PIPE_SHADER_CAP_PREFERRED_IR:
319 return PIPE_SHADER_IR_TGSI;
320 }
321 break;
322 case PIPE_SHADER_VERTEX:
323 switch (param)
324 {
325 case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
326 case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS:
327 case PIPE_SHADER_CAP_SUBROUTINES:
328 return 0;
329 default:;
330 }
331
332 if (!r300screen->caps.has_tcl) {
333 return draw_get_shader_param(shader, param);
334 }
335
336 switch (param)
337 {
338 case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
339 case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
340 return is_r500 ? 1024 : 256;
341 case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:
342 return is_r500 ? 4 : 0; /* For loops; not sure about conditionals. */
343 case PIPE_SHADER_CAP_MAX_INPUTS:
344 return 16;
345 case PIPE_SHADER_CAP_MAX_OUTPUTS:
346 return 10;
347 case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE:
348 return 256 * sizeof(float[4]);
349 case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
350 return 1;
351 case PIPE_SHADER_CAP_MAX_TEMPS:
352 return 32;
353 case PIPE_SHADER_CAP_MAX_PREDS:
354 return 0; /* unused */
355 case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
356 case PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE:
357 return 1;
358 case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
359 case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
360 case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
361 case PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED:
362 case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
363 case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
364 case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
365 case PIPE_SHADER_CAP_SUBROUTINES:
366 case PIPE_SHADER_CAP_INTEGERS:
367 case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
368 case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS:
369 case PIPE_SHADER_CAP_DOUBLES:
370 case PIPE_SHADER_CAP_TGSI_DROUND_SUPPORTED:
371 case PIPE_SHADER_CAP_TGSI_DFRACEXP_DLDEXP_SUPPORTED:
372 case PIPE_SHADER_CAP_TGSI_FMA_SUPPORTED:
373 case PIPE_SHADER_CAP_MAX_SHADER_BUFFERS:
374 return 0;
375 case PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT:
376 return 32;
377 case PIPE_SHADER_CAP_PREFERRED_IR:
378 return PIPE_SHADER_IR_TGSI;
379 }
380 break;
381 }
382 return 0;
383 }
384
385 static float r300_get_paramf(struct pipe_screen* pscreen,
386 enum pipe_capf param)
387 {
388 struct r300_screen* r300screen = r300_screen(pscreen);
389
390 switch (param) {
391 case PIPE_CAPF_MAX_LINE_WIDTH:
392 case PIPE_CAPF_MAX_LINE_WIDTH_AA:
393 case PIPE_CAPF_MAX_POINT_WIDTH:
394 case PIPE_CAPF_MAX_POINT_WIDTH_AA:
395 /* The maximum dimensions of the colorbuffer are our practical
396 * rendering limits. 2048 pixels should be enough for anybody. */
397 if (r300screen->caps.is_r500) {
398 return 4096.0f;
399 } else if (r300screen->caps.is_r400) {
400 return 4021.0f;
401 } else {
402 return 2560.0f;
403 }
404 case PIPE_CAPF_MAX_TEXTURE_ANISOTROPY:
405 return 16.0f;
406 case PIPE_CAPF_MAX_TEXTURE_LOD_BIAS:
407 return 16.0f;
408 case PIPE_CAPF_GUARD_BAND_LEFT:
409 case PIPE_CAPF_GUARD_BAND_TOP:
410 case PIPE_CAPF_GUARD_BAND_RIGHT:
411 case PIPE_CAPF_GUARD_BAND_BOTTOM:
412 return 0.0f;
413 default:
414 debug_printf("r300: Warning: Unknown CAP %d in get_paramf.\n",
415 param);
416 return 0.0f;
417 }
418 }
419
420 static int r300_get_video_param(struct pipe_screen *screen,
421 enum pipe_video_profile profile,
422 enum pipe_video_entrypoint entrypoint,
423 enum pipe_video_cap param)
424 {
425 switch (param) {
426 case PIPE_VIDEO_CAP_SUPPORTED:
427 return vl_profile_supported(screen, profile, entrypoint);
428 case PIPE_VIDEO_CAP_NPOT_TEXTURES:
429 return 0;
430 case PIPE_VIDEO_CAP_MAX_WIDTH:
431 case PIPE_VIDEO_CAP_MAX_HEIGHT:
432 return vl_video_buffer_max_size(screen);
433 case PIPE_VIDEO_CAP_PREFERED_FORMAT:
434 return PIPE_FORMAT_NV12;
435 case PIPE_VIDEO_CAP_PREFERS_INTERLACED:
436 return false;
437 case PIPE_VIDEO_CAP_SUPPORTS_INTERLACED:
438 return false;
439 case PIPE_VIDEO_CAP_SUPPORTS_PROGRESSIVE:
440 return true;
441 case PIPE_VIDEO_CAP_MAX_LEVEL:
442 return vl_level_supported(screen, profile);
443 default:
444 return 0;
445 }
446 }
447
448 /**
449 * Whether the format matches:
450 * PIPE_FORMAT_?10?10?10?2_UNORM
451 */
452 static inline boolean
453 util_format_is_rgba1010102_variant(const struct util_format_description *desc)
454 {
455 static const unsigned size[4] = {10, 10, 10, 2};
456 unsigned chan;
457
458 if (desc->block.width != 1 ||
459 desc->block.height != 1 ||
460 desc->block.bits != 32)
461 return FALSE;
462
463 for (chan = 0; chan < 4; ++chan) {
464 if(desc->channel[chan].type != UTIL_FORMAT_TYPE_UNSIGNED &&
465 desc->channel[chan].type != UTIL_FORMAT_TYPE_VOID)
466 return FALSE;
467 if (desc->channel[chan].size != size[chan])
468 return FALSE;
469 }
470
471 return TRUE;
472 }
473
474 static bool r300_is_blending_supported(struct r300_screen *rscreen,
475 enum pipe_format format)
476 {
477 int c;
478 const struct util_format_description *desc =
479 util_format_description(format);
480
481 if (desc->layout != UTIL_FORMAT_LAYOUT_PLAIN)
482 return false;
483
484 c = util_format_get_first_non_void_channel(format);
485
486 /* RGBA16F */
487 if (rscreen->caps.is_r500 &&
488 desc->nr_channels == 4 &&
489 desc->channel[c].size == 16 &&
490 desc->channel[c].type == UTIL_FORMAT_TYPE_FLOAT)
491 return true;
492
493 if (desc->channel[c].normalized &&
494 desc->channel[c].type == UTIL_FORMAT_TYPE_UNSIGNED &&
495 desc->channel[c].size >= 4 &&
496 desc->channel[c].size <= 10) {
497 /* RGB10_A2, RGBA8, RGB5_A1, RGBA4, RGB565 */
498 if (desc->nr_channels >= 3)
499 return true;
500
501 if (format == PIPE_FORMAT_R8G8_UNORM)
502 return true;
503
504 /* R8, I8, L8, A8 */
505 if (desc->nr_channels == 1)
506 return true;
507 }
508
509 return false;
510 }
511
512 static boolean r300_is_format_supported(struct pipe_screen* screen,
513 enum pipe_format format,
514 enum pipe_texture_target target,
515 unsigned sample_count,
516 unsigned usage)
517 {
518 uint32_t retval = 0;
519 boolean drm_2_8_0 = r300_screen(screen)->info.drm_minor >= 8;
520 boolean is_r500 = r300_screen(screen)->caps.is_r500;
521 boolean is_r400 = r300_screen(screen)->caps.is_r400;
522 boolean is_color2101010 = format == PIPE_FORMAT_R10G10B10A2_UNORM ||
523 format == PIPE_FORMAT_R10G10B10X2_SNORM ||
524 format == PIPE_FORMAT_B10G10R10A2_UNORM ||
525 format == PIPE_FORMAT_B10G10R10X2_UNORM ||
526 format == PIPE_FORMAT_R10SG10SB10SA2U_NORM;
527 boolean is_ati1n = format == PIPE_FORMAT_RGTC1_UNORM ||
528 format == PIPE_FORMAT_RGTC1_SNORM ||
529 format == PIPE_FORMAT_LATC1_UNORM ||
530 format == PIPE_FORMAT_LATC1_SNORM;
531 boolean is_ati2n = format == PIPE_FORMAT_RGTC2_UNORM ||
532 format == PIPE_FORMAT_RGTC2_SNORM ||
533 format == PIPE_FORMAT_LATC2_UNORM ||
534 format == PIPE_FORMAT_LATC2_SNORM;
535 boolean is_x16f_xy16f = format == PIPE_FORMAT_R16_FLOAT ||
536 format == PIPE_FORMAT_R16G16_FLOAT ||
537 format == PIPE_FORMAT_A16_FLOAT ||
538 format == PIPE_FORMAT_L16_FLOAT ||
539 format == PIPE_FORMAT_L16A16_FLOAT ||
540 format == PIPE_FORMAT_R16A16_FLOAT ||
541 format == PIPE_FORMAT_I16_FLOAT;
542 boolean is_half_float = format == PIPE_FORMAT_R16_FLOAT ||
543 format == PIPE_FORMAT_R16G16_FLOAT ||
544 format == PIPE_FORMAT_R16G16B16_FLOAT ||
545 format == PIPE_FORMAT_R16G16B16A16_FLOAT ||
546 format == PIPE_FORMAT_R16G16B16X16_FLOAT;
547 const struct util_format_description *desc;
548
549 if (!util_format_is_supported(format, usage))
550 return FALSE;
551
552 /* Check multisampling support. */
553 switch (sample_count) {
554 case 0:
555 case 1:
556 break;
557 case 2:
558 case 4:
559 case 6:
560 /* We need DRM 2.8.0. */
561 if (!drm_2_8_0) {
562 return FALSE;
563 }
564 /* No texturing and scanout. */
565 if (usage & (PIPE_BIND_SAMPLER_VIEW |
566 PIPE_BIND_DISPLAY_TARGET |
567 PIPE_BIND_SCANOUT)) {
568 return FALSE;
569 }
570
571 desc = util_format_description(format);
572
573 if (is_r500) {
574 /* Only allow depth/stencil, RGBA8, RGBA1010102, RGBA16F. */
575 if (!util_format_is_depth_or_stencil(format) &&
576 !util_format_is_rgba8_variant(desc) &&
577 !util_format_is_rgba1010102_variant(desc) &&
578 format != PIPE_FORMAT_R16G16B16A16_FLOAT &&
579 format != PIPE_FORMAT_R16G16B16X16_FLOAT) {
580 return FALSE;
581 }
582 } else {
583 /* Only allow depth/stencil, RGBA8. */
584 if (!util_format_is_depth_or_stencil(format) &&
585 !util_format_is_rgba8_variant(desc)) {
586 return FALSE;
587 }
588 }
589 break;
590 default:
591 return FALSE;
592 }
593
594 /* Check sampler format support. */
595 if ((usage & PIPE_BIND_SAMPLER_VIEW) &&
596 /* these two are broken for an unknown reason */
597 format != PIPE_FORMAT_R8G8B8X8_SNORM &&
598 format != PIPE_FORMAT_R16G16B16X16_SNORM &&
599 /* ATI1N is r5xx-only. */
600 (is_r500 || !is_ati1n) &&
601 /* ATI2N is supported on r4xx-r5xx. */
602 (is_r400 || is_r500 || !is_ati2n) &&
603 /* R16F and RG16F texture support was added in as late as DRM 2.8.0 */
604 (drm_2_8_0 || !is_x16f_xy16f) &&
605 r300_is_sampler_format_supported(format)) {
606 retval |= PIPE_BIND_SAMPLER_VIEW;
607 }
608
609 /* Check colorbuffer format support. */
610 if ((usage & (PIPE_BIND_RENDER_TARGET |
611 PIPE_BIND_DISPLAY_TARGET |
612 PIPE_BIND_SCANOUT |
613 PIPE_BIND_SHARED |
614 PIPE_BIND_BLENDABLE)) &&
615 /* 2101010 cannot be rendered to on non-r5xx. */
616 (!is_color2101010 || (is_r500 && drm_2_8_0)) &&
617 r300_is_colorbuffer_format_supported(format)) {
618 retval |= usage &
619 (PIPE_BIND_RENDER_TARGET |
620 PIPE_BIND_DISPLAY_TARGET |
621 PIPE_BIND_SCANOUT |
622 PIPE_BIND_SHARED);
623
624 if (r300_is_blending_supported(r300_screen(screen), format)) {
625 retval |= usage & PIPE_BIND_BLENDABLE;
626 }
627 }
628
629 /* Check depth-stencil format support. */
630 if (usage & PIPE_BIND_DEPTH_STENCIL &&
631 r300_is_zs_format_supported(format)) {
632 retval |= PIPE_BIND_DEPTH_STENCIL;
633 }
634
635 /* Check vertex buffer format support. */
636 if (usage & PIPE_BIND_VERTEX_BUFFER) {
637 if (r300_screen(screen)->caps.has_tcl) {
638 /* Half float is supported on >= R400. */
639 if ((is_r400 || is_r500 || !is_half_float) &&
640 r300_translate_vertex_data_type(format) != R300_INVALID_FORMAT) {
641 retval |= PIPE_BIND_VERTEX_BUFFER;
642 }
643 } else {
644 /* SW TCL */
645 if (!util_format_is_pure_integer(format)) {
646 retval |= PIPE_BIND_VERTEX_BUFFER;
647 }
648 }
649 }
650
651 /* Transfers are always supported. */
652 if (usage & PIPE_BIND_TRANSFER_READ)
653 retval |= PIPE_BIND_TRANSFER_READ;
654 if (usage & PIPE_BIND_TRANSFER_WRITE)
655 retval |= PIPE_BIND_TRANSFER_WRITE;
656
657 return retval == usage;
658 }
659
660 static void r300_destroy_screen(struct pipe_screen* pscreen)
661 {
662 struct r300_screen* r300screen = r300_screen(pscreen);
663 struct radeon_winsys *rws = radeon_winsys(pscreen);
664
665 if (rws && !rws->unref(rws))
666 return;
667
668 pipe_mutex_destroy(r300screen->cmask_mutex);
669
670 if (rws)
671 rws->destroy(rws);
672
673 FREE(r300screen);
674 }
675
676 static void r300_fence_reference(struct pipe_screen *screen,
677 struct pipe_fence_handle **ptr,
678 struct pipe_fence_handle *fence)
679 {
680 struct radeon_winsys *rws = r300_screen(screen)->rws;
681
682 rws->fence_reference(ptr, fence);
683 }
684
685 static boolean r300_fence_finish(struct pipe_screen *screen,
686 struct pipe_fence_handle *fence,
687 uint64_t timeout)
688 {
689 struct radeon_winsys *rws = r300_screen(screen)->rws;
690
691 return rws->fence_wait(rws, fence, timeout);
692 }
693
694 struct pipe_screen* r300_screen_create(struct radeon_winsys *rws)
695 {
696 struct r300_screen *r300screen = CALLOC_STRUCT(r300_screen);
697
698 if (!r300screen) {
699 FREE(r300screen);
700 return NULL;
701 }
702
703 rws->query_info(rws, &r300screen->info);
704
705 r300_init_debug(r300screen);
706 r300_parse_chipset(r300screen->info.pci_id, &r300screen->caps);
707
708 if (SCREEN_DBG_ON(r300screen, DBG_NO_ZMASK))
709 r300screen->caps.zmask_ram = 0;
710 if (SCREEN_DBG_ON(r300screen, DBG_NO_HIZ))
711 r300screen->caps.hiz_ram = 0;
712
713 if (r300screen->info.drm_minor < 8)
714 r300screen->caps.has_us_format = FALSE;
715
716 r300screen->rws = rws;
717 r300screen->screen.destroy = r300_destroy_screen;
718 r300screen->screen.get_name = r300_get_name;
719 r300screen->screen.get_vendor = r300_get_vendor;
720 r300screen->screen.get_device_vendor = r300_get_device_vendor;
721 r300screen->screen.get_param = r300_get_param;
722 r300screen->screen.get_shader_param = r300_get_shader_param;
723 r300screen->screen.get_paramf = r300_get_paramf;
724 r300screen->screen.get_video_param = r300_get_video_param;
725 r300screen->screen.is_format_supported = r300_is_format_supported;
726 r300screen->screen.is_video_format_supported = vl_video_buffer_is_format_supported;
727 r300screen->screen.context_create = r300_create_context;
728 r300screen->screen.fence_reference = r300_fence_reference;
729 r300screen->screen.fence_finish = r300_fence_finish;
730
731 r300_init_screen_resource_functions(r300screen);
732
733 util_format_s3tc_init();
734 pipe_mutex_init(r300screen->cmask_mutex);
735
736 return &r300screen->screen;
737 }