radeonsi: extract writing of a single streamout output
[mesa.git] / src / gallium / drivers / r300 / r300_screen.c
1 /*
2 * Copyright 2008 Corbin Simpson <MostAwesomeDude@gmail.com>
3 * Copyright 2010 Marek Olšák <maraeo@gmail.com>
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * on the rights to use, copy, modify, merge, publish, distribute, sub
9 * license, and/or sell copies of the Software, and to permit persons to whom
10 * the Software is furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
14 * Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
20 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
21 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
22 * USE OR OTHER DEALINGS IN THE SOFTWARE. */
23
24 #include "util/u_format.h"
25 #include "util/u_format_s3tc.h"
26 #include "util/u_memory.h"
27 #include "os/os_time.h"
28 #include "vl/vl_decoder.h"
29 #include "vl/vl_video_buffer.h"
30
31 #include "r300_context.h"
32 #include "r300_texture.h"
33 #include "r300_screen_buffer.h"
34 #include "r300_state_inlines.h"
35 #include "r300_public.h"
36
37 #include "draw/draw_context.h"
38
39 /* Return the identifier behind whom the brave coders responsible for this
40 * amalgamation of code, sweat, and duct tape, routinely obscure their names.
41 *
42 * ...I should have just put "Corbin Simpson", but I'm not that cool.
43 *
44 * (Or egotistical. Yet.) */
45 static const char* r300_get_vendor(struct pipe_screen* pscreen)
46 {
47 return "X.Org R300 Project";
48 }
49
50 static const char* r300_get_device_vendor(struct pipe_screen* pscreen)
51 {
52 return "ATI";
53 }
54
55 static const char* chip_families[] = {
56 "unknown",
57 "ATI R300",
58 "ATI R350",
59 "ATI RV350",
60 "ATI RV370",
61 "ATI RV380",
62 "ATI RS400",
63 "ATI RC410",
64 "ATI RS480",
65 "ATI R420",
66 "ATI R423",
67 "ATI R430",
68 "ATI R480",
69 "ATI R481",
70 "ATI RV410",
71 "ATI RS600",
72 "ATI RS690",
73 "ATI RS740",
74 "ATI RV515",
75 "ATI R520",
76 "ATI RV530",
77 "ATI R580",
78 "ATI RV560",
79 "ATI RV570"
80 };
81
82 static const char* r300_get_name(struct pipe_screen* pscreen)
83 {
84 struct r300_screen* r300screen = r300_screen(pscreen);
85
86 return chip_families[r300screen->caps.family];
87 }
88
89 static int r300_get_param(struct pipe_screen* pscreen, enum pipe_cap param)
90 {
91 struct r300_screen* r300screen = r300_screen(pscreen);
92 boolean is_r500 = r300screen->caps.is_r500;
93
94 switch (param) {
95 /* Supported features (boolean caps). */
96 case PIPE_CAP_NPOT_TEXTURES:
97 case PIPE_CAP_MIXED_FRAMEBUFFER_SIZES:
98 case PIPE_CAP_MIXED_COLOR_DEPTH_BITS:
99 case PIPE_CAP_TWO_SIDED_STENCIL:
100 case PIPE_CAP_ANISOTROPIC_FILTER:
101 case PIPE_CAP_POINT_SPRITE:
102 case PIPE_CAP_OCCLUSION_QUERY:
103 case PIPE_CAP_TEXTURE_SHADOW_MAP:
104 case PIPE_CAP_TEXTURE_MIRROR_CLAMP:
105 case PIPE_CAP_BLEND_EQUATION_SEPARATE:
106 case PIPE_CAP_VERTEX_ELEMENT_INSTANCE_DIVISOR:
107 case PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT:
108 case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER:
109 case PIPE_CAP_CONDITIONAL_RENDER:
110 case PIPE_CAP_TEXTURE_BARRIER:
111 case PIPE_CAP_TGSI_CAN_COMPACT_CONSTANTS:
112 case PIPE_CAP_USER_INDEX_BUFFERS:
113 case PIPE_CAP_USER_CONSTANT_BUFFERS:
114 case PIPE_CAP_PREFER_BLIT_BASED_TEXTURE_TRANSFER:
115 case PIPE_CAP_BUFFER_MAP_PERSISTENT_COHERENT:
116 case PIPE_CAP_CLIP_HALFZ:
117 return 1;
118
119 case PIPE_CAP_MIN_MAP_BUFFER_ALIGNMENT:
120 return R300_BUFFER_ALIGNMENT;
121
122 case PIPE_CAP_CONSTANT_BUFFER_OFFSET_ALIGNMENT:
123 return 16;
124
125 case PIPE_CAP_GLSL_FEATURE_LEVEL:
126 return 120;
127
128 /* r300 cannot do swizzling of compressed textures. Supported otherwise. */
129 case PIPE_CAP_TEXTURE_SWIZZLE:
130 return util_format_s3tc_enabled ? r300screen->caps.dxtc_swizzle : 1;
131
132 /* We don't support color clamping on r500, so that we can use color
133 * intepolators for generic varyings. */
134 case PIPE_CAP_VERTEX_COLOR_CLAMPED:
135 return !is_r500;
136
137 /* Supported on r500 only. */
138 case PIPE_CAP_VERTEX_COLOR_UNCLAMPED:
139 case PIPE_CAP_MIXED_COLORBUFFER_FORMATS:
140 case PIPE_CAP_SM3:
141 return is_r500 ? 1 : 0;
142
143 /* Unsupported features. */
144 case PIPE_CAP_QUERY_TIME_ELAPSED:
145 case PIPE_CAP_QUERY_PIPELINE_STATISTICS:
146 case PIPE_CAP_MAX_DUAL_SOURCE_RENDER_TARGETS:
147 case PIPE_CAP_INDEP_BLEND_ENABLE:
148 case PIPE_CAP_INDEP_BLEND_FUNC:
149 case PIPE_CAP_DEPTH_CLIP_DISABLE:
150 case PIPE_CAP_SHADER_STENCIL_EXPORT:
151 case PIPE_CAP_MAX_TEXTURE_ARRAY_LAYERS:
152 case PIPE_CAP_TGSI_INSTANCEID:
153 case PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT:
154 case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER:
155 case PIPE_CAP_SEAMLESS_CUBE_MAP:
156 case PIPE_CAP_SEAMLESS_CUBE_MAP_PER_TEXTURE:
157 case PIPE_CAP_MIN_TEXEL_OFFSET:
158 case PIPE_CAP_MAX_TEXEL_OFFSET:
159 case PIPE_CAP_MIN_TEXTURE_GATHER_OFFSET:
160 case PIPE_CAP_MAX_TEXTURE_GATHER_OFFSET:
161 case PIPE_CAP_MAX_STREAM_OUTPUT_BUFFERS:
162 case PIPE_CAP_MAX_STREAM_OUTPUT_SEPARATE_COMPONENTS:
163 case PIPE_CAP_MAX_STREAM_OUTPUT_INTERLEAVED_COMPONENTS:
164 case PIPE_CAP_MAX_GEOMETRY_OUTPUT_VERTICES:
165 case PIPE_CAP_MAX_GEOMETRY_TOTAL_OUTPUT_COMPONENTS:
166 case PIPE_CAP_MAX_VERTEX_STREAMS:
167 case PIPE_CAP_STREAM_OUTPUT_PAUSE_RESUME:
168 case PIPE_CAP_STREAM_OUTPUT_INTERLEAVE_BUFFERS:
169 case PIPE_CAP_FRAGMENT_COLOR_CLAMPED:
170 case PIPE_CAP_QUADS_FOLLOW_PROVOKING_VERTEX_CONVENTION:
171 case PIPE_CAP_COMPUTE:
172 case PIPE_CAP_START_INSTANCE:
173 case PIPE_CAP_QUERY_TIMESTAMP:
174 case PIPE_CAP_TEXTURE_MULTISAMPLE:
175 case PIPE_CAP_CUBE_MAP_ARRAY:
176 case PIPE_CAP_TEXTURE_BUFFER_OBJECTS:
177 case PIPE_CAP_TEXTURE_BUFFER_OFFSET_ALIGNMENT:
178 case PIPE_CAP_TEXTURE_BORDER_COLOR_QUIRK:
179 case PIPE_CAP_MAX_TEXTURE_BUFFER_SIZE:
180 case PIPE_CAP_TGSI_VS_LAYER_VIEWPORT:
181 case PIPE_CAP_MAX_TEXTURE_GATHER_COMPONENTS:
182 case PIPE_CAP_TEXTURE_GATHER_SM5:
183 case PIPE_CAP_TEXTURE_QUERY_LOD:
184 case PIPE_CAP_FAKE_SW_MSAA:
185 case PIPE_CAP_SAMPLE_SHADING:
186 case PIPE_CAP_TEXTURE_GATHER_OFFSETS:
187 case PIPE_CAP_DRAW_INDIRECT:
188 case PIPE_CAP_MULTI_DRAW_INDIRECT:
189 case PIPE_CAP_MULTI_DRAW_INDIRECT_PARAMS:
190 case PIPE_CAP_TGSI_FS_FINE_DERIVATIVE:
191 case PIPE_CAP_CONDITIONAL_RENDER_INVERTED:
192 case PIPE_CAP_SAMPLER_VIEW_TARGET:
193 case PIPE_CAP_VERTEXID_NOBASE:
194 case PIPE_CAP_POLYGON_OFFSET_CLAMP:
195 case PIPE_CAP_MULTISAMPLE_Z_RESOLVE:
196 case PIPE_CAP_RESOURCE_FROM_USER_MEMORY:
197 case PIPE_CAP_DEVICE_RESET_STATUS_QUERY:
198 case PIPE_CAP_MAX_SHADER_PATCH_VARYINGS:
199 case PIPE_CAP_TEXTURE_FLOAT_LINEAR:
200 case PIPE_CAP_TEXTURE_HALF_FLOAT_LINEAR:
201 case PIPE_CAP_DEPTH_BOUNDS_TEST:
202 case PIPE_CAP_TGSI_TXQS:
203 case PIPE_CAP_FORCE_PERSAMPLE_INTERP:
204 case PIPE_CAP_SHAREABLE_SHADERS:
205 case PIPE_CAP_COPY_BETWEEN_COMPRESSED_AND_PLAIN_FORMATS:
206 case PIPE_CAP_CLEAR_TEXTURE:
207 case PIPE_CAP_DRAW_PARAMETERS:
208 case PIPE_CAP_TGSI_PACK_HALF_FLOAT:
209 case PIPE_CAP_TGSI_FS_POSITION_IS_SYSVAL:
210 case PIPE_CAP_TGSI_FS_FACE_IS_INTEGER_SYSVAL:
211 case PIPE_CAP_SHADER_BUFFER_OFFSET_ALIGNMENT:
212 case PIPE_CAP_INVALIDATE_BUFFER:
213 case PIPE_CAP_GENERATE_MIPMAP:
214 case PIPE_CAP_STRING_MARKER:
215 case PIPE_CAP_BUFFER_SAMPLER_VIEW_RGBA_ONLY:
216 case PIPE_CAP_SURFACE_REINTERPRET_BLOCKS:
217 case PIPE_CAP_QUERY_BUFFER_OBJECT:
218 case PIPE_CAP_QUERY_MEMORY_INFO:
219 case PIPE_CAP_FRAMEBUFFER_NO_ATTACHMENT:
220 case PIPE_CAP_ROBUST_BUFFER_ACCESS_BEHAVIOR:
221 case PIPE_CAP_CULL_DISTANCE:
222 case PIPE_CAP_PRIMITIVE_RESTART_FOR_PATCHES:
223 case PIPE_CAP_TGSI_VOTE:
224 case PIPE_CAP_MAX_WINDOW_RECTANGLES:
225 case PIPE_CAP_POLYGON_OFFSET_UNITS_UNSCALED:
226 case PIPE_CAP_VIEWPORT_SUBPIXEL_BITS:
227 case PIPE_CAP_TGSI_ARRAY_COMPONENTS:
228 case PIPE_CAP_TGSI_CAN_READ_OUTPUTS:
229 case PIPE_CAP_NATIVE_FENCE_FD:
230 return 0;
231
232 /* SWTCL-only features. */
233 case PIPE_CAP_PRIMITIVE_RESTART:
234 case PIPE_CAP_USER_VERTEX_BUFFERS:
235 case PIPE_CAP_TGSI_VS_WINDOW_SPACE_POSITION:
236 return !r300screen->caps.has_tcl;
237
238 /* HWTCL-only features / limitations. */
239 case PIPE_CAP_VERTEX_BUFFER_OFFSET_4BYTE_ALIGNED_ONLY:
240 case PIPE_CAP_VERTEX_BUFFER_STRIDE_4BYTE_ALIGNED_ONLY:
241 case PIPE_CAP_VERTEX_ELEMENT_SRC_OFFSET_4BYTE_ALIGNED_ONLY:
242 return r300screen->caps.has_tcl;
243 case PIPE_CAP_TGSI_TEXCOORD:
244 return 0;
245
246 /* Texturing. */
247 case PIPE_CAP_MAX_TEXTURE_2D_LEVELS:
248 case PIPE_CAP_MAX_TEXTURE_3D_LEVELS:
249 case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS:
250 /* 13 == 4096, 12 == 2048 */
251 return is_r500 ? 13 : 12;
252
253 /* Render targets. */
254 case PIPE_CAP_MAX_RENDER_TARGETS:
255 return 4;
256 case PIPE_CAP_ENDIANNESS:
257 return PIPE_ENDIAN_LITTLE;
258
259 case PIPE_CAP_MAX_VIEWPORTS:
260 return 1;
261
262 case PIPE_CAP_MAX_VERTEX_ATTRIB_STRIDE:
263 return 2048;
264
265 case PIPE_CAP_VENDOR_ID:
266 return 0x1002;
267 case PIPE_CAP_DEVICE_ID:
268 return r300screen->info.pci_id;
269 case PIPE_CAP_ACCELERATED:
270 return 1;
271 case PIPE_CAP_VIDEO_MEMORY:
272 return r300screen->info.vram_size >> 20;
273 case PIPE_CAP_UMA:
274 return 0;
275 case PIPE_CAP_PCI_GROUP:
276 return r300screen->info.pci_domain;
277 case PIPE_CAP_PCI_BUS:
278 return r300screen->info.pci_bus;
279 case PIPE_CAP_PCI_DEVICE:
280 return r300screen->info.pci_dev;
281 case PIPE_CAP_PCI_FUNCTION:
282 return r300screen->info.pci_func;
283 }
284 return 0;
285 }
286
287 static int r300_get_shader_param(struct pipe_screen *pscreen, unsigned shader, enum pipe_shader_cap param)
288 {
289 struct r300_screen* r300screen = r300_screen(pscreen);
290 boolean is_r400 = r300screen->caps.is_r400;
291 boolean is_r500 = r300screen->caps.is_r500;
292
293 switch (shader) {
294 case PIPE_SHADER_FRAGMENT:
295 switch (param)
296 {
297 case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
298 return is_r500 || is_r400 ? 512 : 96;
299 case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
300 return is_r500 || is_r400 ? 512 : 64;
301 case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
302 return is_r500 || is_r400 ? 512 : 32;
303 case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
304 return is_r500 ? 511 : 4;
305 case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:
306 return is_r500 ? 64 : 0; /* Actually unlimited on r500. */
307 /* Fragment shader limits. */
308 case PIPE_SHADER_CAP_MAX_INPUTS:
309 /* 2 colors + 8 texcoords are always supported
310 * (minus fog and wpos).
311 *
312 * R500 has the ability to turn 3rd and 4th color into
313 * additional texcoords but there is no two-sided color
314 * selection then. However the facing bit can be used instead. */
315 return 10;
316 case PIPE_SHADER_CAP_MAX_OUTPUTS:
317 return 4;
318 case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE:
319 return (is_r500 ? 256 : 32) * sizeof(float[4]);
320 case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
321 case PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE:
322 return 1;
323 case PIPE_SHADER_CAP_MAX_TEMPS:
324 return is_r500 ? 128 : is_r400 ? 64 : 32;
325 case PIPE_SHADER_CAP_MAX_PREDS:
326 return 0; /* unused */
327 case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
328 case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS:
329 return r300screen->caps.num_tex_units;
330 case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
331 case PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED:
332 case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
333 case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
334 case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
335 case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
336 case PIPE_SHADER_CAP_SUBROUTINES:
337 case PIPE_SHADER_CAP_INTEGERS:
338 case PIPE_SHADER_CAP_DOUBLES:
339 case PIPE_SHADER_CAP_TGSI_DROUND_SUPPORTED:
340 case PIPE_SHADER_CAP_TGSI_DFRACEXP_DLDEXP_SUPPORTED:
341 case PIPE_SHADER_CAP_TGSI_FMA_SUPPORTED:
342 case PIPE_SHADER_CAP_MAX_SHADER_BUFFERS:
343 case PIPE_SHADER_CAP_MAX_SHADER_IMAGES:
344 case PIPE_SHADER_CAP_LOWER_IF_THRESHOLD:
345 return 0;
346 case PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT:
347 return 32;
348 case PIPE_SHADER_CAP_PREFERRED_IR:
349 return PIPE_SHADER_IR_TGSI;
350 case PIPE_SHADER_CAP_SUPPORTED_IRS:
351 return 0;
352 }
353 break;
354 case PIPE_SHADER_VERTEX:
355 switch (param)
356 {
357 case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
358 case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS:
359 case PIPE_SHADER_CAP_SUBROUTINES:
360 return 0;
361 default:;
362 }
363
364 if (!r300screen->caps.has_tcl) {
365 return draw_get_shader_param(shader, param);
366 }
367
368 switch (param)
369 {
370 case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
371 case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
372 return is_r500 ? 1024 : 256;
373 case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:
374 return is_r500 ? 4 : 0; /* For loops; not sure about conditionals. */
375 case PIPE_SHADER_CAP_MAX_INPUTS:
376 return 16;
377 case PIPE_SHADER_CAP_MAX_OUTPUTS:
378 return 10;
379 case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE:
380 return 256 * sizeof(float[4]);
381 case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
382 return 1;
383 case PIPE_SHADER_CAP_MAX_TEMPS:
384 return 32;
385 case PIPE_SHADER_CAP_MAX_PREDS:
386 return 0; /* unused */
387 case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
388 case PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE:
389 return 1;
390 case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
391 case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
392 case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
393 case PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED:
394 case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
395 case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
396 case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
397 case PIPE_SHADER_CAP_SUBROUTINES:
398 case PIPE_SHADER_CAP_INTEGERS:
399 case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
400 case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS:
401 case PIPE_SHADER_CAP_DOUBLES:
402 case PIPE_SHADER_CAP_TGSI_DROUND_SUPPORTED:
403 case PIPE_SHADER_CAP_TGSI_DFRACEXP_DLDEXP_SUPPORTED:
404 case PIPE_SHADER_CAP_TGSI_FMA_SUPPORTED:
405 case PIPE_SHADER_CAP_MAX_SHADER_BUFFERS:
406 case PIPE_SHADER_CAP_MAX_SHADER_IMAGES:
407 case PIPE_SHADER_CAP_LOWER_IF_THRESHOLD:
408 return 0;
409 case PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT:
410 return 32;
411 case PIPE_SHADER_CAP_PREFERRED_IR:
412 return PIPE_SHADER_IR_TGSI;
413 case PIPE_SHADER_CAP_SUPPORTED_IRS:
414 return 0;
415 }
416 break;
417 }
418 return 0;
419 }
420
421 static float r300_get_paramf(struct pipe_screen* pscreen,
422 enum pipe_capf param)
423 {
424 struct r300_screen* r300screen = r300_screen(pscreen);
425
426 switch (param) {
427 case PIPE_CAPF_MAX_LINE_WIDTH:
428 case PIPE_CAPF_MAX_LINE_WIDTH_AA:
429 case PIPE_CAPF_MAX_POINT_WIDTH:
430 case PIPE_CAPF_MAX_POINT_WIDTH_AA:
431 /* The maximum dimensions of the colorbuffer are our practical
432 * rendering limits. 2048 pixels should be enough for anybody. */
433 if (r300screen->caps.is_r500) {
434 return 4096.0f;
435 } else if (r300screen->caps.is_r400) {
436 return 4021.0f;
437 } else {
438 return 2560.0f;
439 }
440 case PIPE_CAPF_MAX_TEXTURE_ANISOTROPY:
441 return 16.0f;
442 case PIPE_CAPF_MAX_TEXTURE_LOD_BIAS:
443 return 16.0f;
444 case PIPE_CAPF_GUARD_BAND_LEFT:
445 case PIPE_CAPF_GUARD_BAND_TOP:
446 case PIPE_CAPF_GUARD_BAND_RIGHT:
447 case PIPE_CAPF_GUARD_BAND_BOTTOM:
448 return 0.0f;
449 default:
450 debug_printf("r300: Warning: Unknown CAP %d in get_paramf.\n",
451 param);
452 return 0.0f;
453 }
454 }
455
456 static int r300_get_video_param(struct pipe_screen *screen,
457 enum pipe_video_profile profile,
458 enum pipe_video_entrypoint entrypoint,
459 enum pipe_video_cap param)
460 {
461 switch (param) {
462 case PIPE_VIDEO_CAP_SUPPORTED:
463 return vl_profile_supported(screen, profile, entrypoint);
464 case PIPE_VIDEO_CAP_NPOT_TEXTURES:
465 return 0;
466 case PIPE_VIDEO_CAP_MAX_WIDTH:
467 case PIPE_VIDEO_CAP_MAX_HEIGHT:
468 return vl_video_buffer_max_size(screen);
469 case PIPE_VIDEO_CAP_PREFERED_FORMAT:
470 return PIPE_FORMAT_NV12;
471 case PIPE_VIDEO_CAP_PREFERS_INTERLACED:
472 return false;
473 case PIPE_VIDEO_CAP_SUPPORTS_INTERLACED:
474 return false;
475 case PIPE_VIDEO_CAP_SUPPORTS_PROGRESSIVE:
476 return true;
477 case PIPE_VIDEO_CAP_MAX_LEVEL:
478 return vl_level_supported(screen, profile);
479 default:
480 return 0;
481 }
482 }
483
484 /**
485 * Whether the format matches:
486 * PIPE_FORMAT_?10?10?10?2_UNORM
487 */
488 static inline boolean
489 util_format_is_rgba1010102_variant(const struct util_format_description *desc)
490 {
491 static const unsigned size[4] = {10, 10, 10, 2};
492 unsigned chan;
493
494 if (desc->block.width != 1 ||
495 desc->block.height != 1 ||
496 desc->block.bits != 32)
497 return FALSE;
498
499 for (chan = 0; chan < 4; ++chan) {
500 if(desc->channel[chan].type != UTIL_FORMAT_TYPE_UNSIGNED &&
501 desc->channel[chan].type != UTIL_FORMAT_TYPE_VOID)
502 return FALSE;
503 if (desc->channel[chan].size != size[chan])
504 return FALSE;
505 }
506
507 return TRUE;
508 }
509
510 static bool r300_is_blending_supported(struct r300_screen *rscreen,
511 enum pipe_format format)
512 {
513 int c;
514 const struct util_format_description *desc =
515 util_format_description(format);
516
517 if (desc->layout != UTIL_FORMAT_LAYOUT_PLAIN)
518 return false;
519
520 c = util_format_get_first_non_void_channel(format);
521
522 /* RGBA16F */
523 if (rscreen->caps.is_r500 &&
524 desc->nr_channels == 4 &&
525 desc->channel[c].size == 16 &&
526 desc->channel[c].type == UTIL_FORMAT_TYPE_FLOAT)
527 return true;
528
529 if (desc->channel[c].normalized &&
530 desc->channel[c].type == UTIL_FORMAT_TYPE_UNSIGNED &&
531 desc->channel[c].size >= 4 &&
532 desc->channel[c].size <= 10) {
533 /* RGB10_A2, RGBA8, RGB5_A1, RGBA4, RGB565 */
534 if (desc->nr_channels >= 3)
535 return true;
536
537 if (format == PIPE_FORMAT_R8G8_UNORM)
538 return true;
539
540 /* R8, I8, L8, A8 */
541 if (desc->nr_channels == 1)
542 return true;
543 }
544
545 return false;
546 }
547
548 static boolean r300_is_format_supported(struct pipe_screen* screen,
549 enum pipe_format format,
550 enum pipe_texture_target target,
551 unsigned sample_count,
552 unsigned usage)
553 {
554 uint32_t retval = 0;
555 boolean is_r500 = r300_screen(screen)->caps.is_r500;
556 boolean is_r400 = r300_screen(screen)->caps.is_r400;
557 boolean is_color2101010 = format == PIPE_FORMAT_R10G10B10A2_UNORM ||
558 format == PIPE_FORMAT_R10G10B10X2_SNORM ||
559 format == PIPE_FORMAT_B10G10R10A2_UNORM ||
560 format == PIPE_FORMAT_B10G10R10X2_UNORM ||
561 format == PIPE_FORMAT_R10SG10SB10SA2U_NORM;
562 boolean is_ati1n = format == PIPE_FORMAT_RGTC1_UNORM ||
563 format == PIPE_FORMAT_RGTC1_SNORM ||
564 format == PIPE_FORMAT_LATC1_UNORM ||
565 format == PIPE_FORMAT_LATC1_SNORM;
566 boolean is_ati2n = format == PIPE_FORMAT_RGTC2_UNORM ||
567 format == PIPE_FORMAT_RGTC2_SNORM ||
568 format == PIPE_FORMAT_LATC2_UNORM ||
569 format == PIPE_FORMAT_LATC2_SNORM;
570 boolean is_half_float = format == PIPE_FORMAT_R16_FLOAT ||
571 format == PIPE_FORMAT_R16G16_FLOAT ||
572 format == PIPE_FORMAT_R16G16B16_FLOAT ||
573 format == PIPE_FORMAT_R16G16B16A16_FLOAT ||
574 format == PIPE_FORMAT_R16G16B16X16_FLOAT;
575 const struct util_format_description *desc;
576
577 if (!util_format_is_supported(format, usage))
578 return FALSE;
579
580 /* Check multisampling support. */
581 switch (sample_count) {
582 case 0:
583 case 1:
584 break;
585 case 2:
586 case 4:
587 case 6:
588 /* No texturing and scanout. */
589 if (usage & (PIPE_BIND_SAMPLER_VIEW |
590 PIPE_BIND_DISPLAY_TARGET |
591 PIPE_BIND_SCANOUT)) {
592 return FALSE;
593 }
594
595 desc = util_format_description(format);
596
597 if (is_r500) {
598 /* Only allow depth/stencil, RGBA8, RGBA1010102, RGBA16F. */
599 if (!util_format_is_depth_or_stencil(format) &&
600 !util_format_is_rgba8_variant(desc) &&
601 !util_format_is_rgba1010102_variant(desc) &&
602 format != PIPE_FORMAT_R16G16B16A16_FLOAT &&
603 format != PIPE_FORMAT_R16G16B16X16_FLOAT) {
604 return FALSE;
605 }
606 } else {
607 /* Only allow depth/stencil, RGBA8. */
608 if (!util_format_is_depth_or_stencil(format) &&
609 !util_format_is_rgba8_variant(desc)) {
610 return FALSE;
611 }
612 }
613 break;
614 default:
615 return FALSE;
616 }
617
618 /* Check sampler format support. */
619 if ((usage & PIPE_BIND_SAMPLER_VIEW) &&
620 /* these two are broken for an unknown reason */
621 format != PIPE_FORMAT_R8G8B8X8_SNORM &&
622 format != PIPE_FORMAT_R16G16B16X16_SNORM &&
623 /* ATI1N is r5xx-only. */
624 (is_r500 || !is_ati1n) &&
625 /* ATI2N is supported on r4xx-r5xx. */
626 (is_r400 || is_r500 || !is_ati2n) &&
627 r300_is_sampler_format_supported(format)) {
628 retval |= PIPE_BIND_SAMPLER_VIEW;
629 }
630
631 /* Check colorbuffer format support. */
632 if ((usage & (PIPE_BIND_RENDER_TARGET |
633 PIPE_BIND_DISPLAY_TARGET |
634 PIPE_BIND_SCANOUT |
635 PIPE_BIND_SHARED |
636 PIPE_BIND_BLENDABLE)) &&
637 /* 2101010 cannot be rendered to on non-r5xx. */
638 (!is_color2101010 || is_r500) &&
639 r300_is_colorbuffer_format_supported(format)) {
640 retval |= usage &
641 (PIPE_BIND_RENDER_TARGET |
642 PIPE_BIND_DISPLAY_TARGET |
643 PIPE_BIND_SCANOUT |
644 PIPE_BIND_SHARED);
645
646 if (r300_is_blending_supported(r300_screen(screen), format)) {
647 retval |= usage & PIPE_BIND_BLENDABLE;
648 }
649 }
650
651 /* Check depth-stencil format support. */
652 if (usage & PIPE_BIND_DEPTH_STENCIL &&
653 r300_is_zs_format_supported(format)) {
654 retval |= PIPE_BIND_DEPTH_STENCIL;
655 }
656
657 /* Check vertex buffer format support. */
658 if (usage & PIPE_BIND_VERTEX_BUFFER) {
659 if (r300_screen(screen)->caps.has_tcl) {
660 /* Half float is supported on >= R400. */
661 if ((is_r400 || is_r500 || !is_half_float) &&
662 r300_translate_vertex_data_type(format) != R300_INVALID_FORMAT) {
663 retval |= PIPE_BIND_VERTEX_BUFFER;
664 }
665 } else {
666 /* SW TCL */
667 if (!util_format_is_pure_integer(format)) {
668 retval |= PIPE_BIND_VERTEX_BUFFER;
669 }
670 }
671 }
672
673 return retval == usage;
674 }
675
676 static void r300_destroy_screen(struct pipe_screen* pscreen)
677 {
678 struct r300_screen* r300screen = r300_screen(pscreen);
679 struct radeon_winsys *rws = radeon_winsys(pscreen);
680
681 if (rws && !rws->unref(rws))
682 return;
683
684 pipe_mutex_destroy(r300screen->cmask_mutex);
685 slab_destroy_parent(&r300screen->pool_transfers);
686
687 if (rws)
688 rws->destroy(rws);
689
690 FREE(r300screen);
691 }
692
693 static void r300_fence_reference(struct pipe_screen *screen,
694 struct pipe_fence_handle **ptr,
695 struct pipe_fence_handle *fence)
696 {
697 struct radeon_winsys *rws = r300_screen(screen)->rws;
698
699 rws->fence_reference(ptr, fence);
700 }
701
702 static boolean r300_fence_finish(struct pipe_screen *screen,
703 struct pipe_context *ctx,
704 struct pipe_fence_handle *fence,
705 uint64_t timeout)
706 {
707 struct radeon_winsys *rws = r300_screen(screen)->rws;
708
709 return rws->fence_wait(rws, fence, timeout);
710 }
711
712 struct pipe_screen* r300_screen_create(struct radeon_winsys *rws)
713 {
714 struct r300_screen *r300screen = CALLOC_STRUCT(r300_screen);
715
716 if (!r300screen) {
717 FREE(r300screen);
718 return NULL;
719 }
720
721 rws->query_info(rws, &r300screen->info);
722
723 r300_init_debug(r300screen);
724 r300_parse_chipset(r300screen->info.pci_id, &r300screen->caps);
725
726 if (SCREEN_DBG_ON(r300screen, DBG_NO_ZMASK))
727 r300screen->caps.zmask_ram = 0;
728 if (SCREEN_DBG_ON(r300screen, DBG_NO_HIZ))
729 r300screen->caps.hiz_ram = 0;
730
731 r300screen->rws = rws;
732 r300screen->screen.destroy = r300_destroy_screen;
733 r300screen->screen.get_name = r300_get_name;
734 r300screen->screen.get_vendor = r300_get_vendor;
735 r300screen->screen.get_device_vendor = r300_get_device_vendor;
736 r300screen->screen.get_param = r300_get_param;
737 r300screen->screen.get_shader_param = r300_get_shader_param;
738 r300screen->screen.get_paramf = r300_get_paramf;
739 r300screen->screen.get_video_param = r300_get_video_param;
740 r300screen->screen.is_format_supported = r300_is_format_supported;
741 r300screen->screen.is_video_format_supported = vl_video_buffer_is_format_supported;
742 r300screen->screen.context_create = r300_create_context;
743 r300screen->screen.fence_reference = r300_fence_reference;
744 r300screen->screen.fence_finish = r300_fence_finish;
745
746 r300_init_screen_resource_functions(r300screen);
747
748 slab_create_parent(&r300screen->pool_transfers, sizeof(struct pipe_transfer), 64);
749
750 util_format_s3tc_init();
751 pipe_mutex_init(r300screen->cmask_mutex);
752
753 return &r300screen->screen;
754 }