src/gallium/drivers/r300/r300_screen.c

   1 /*
   2  * Copyright 2008 Corbin Simpson <MostAwesomeDude@gmail.com>
   3  * Copyright 2010 Marek Olšák <maraeo@gmail.com>
   4  *
   5  * Permission is hereby granted, free of charge, to any person obtaining a
   6  * copy of this software and associated documentation files (the "Software"),
   7  * to deal in the Software without restriction, including without limitation
   8  * on the rights to use, copy, modify, merge, publish, distribute, sub
   9  * license, and/or sell copies of the Software, and to permit persons to whom
  10  * the Software is furnished to do so, subject to the following conditions:
  11  *
  12  * The above copyright notice and this permission notice (including the next
  13  * paragraph) shall be included in all copies or substantial portions of the
  14  * Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  19  * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
  20  * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
  21  * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
  22  * USE OR OTHER DEALINGS IN THE SOFTWARE. */
  23
  24 #include "util/u_format.h"
  25 #include "util/u_format_s3tc.h"
  26 #include "util/u_memory.h"
  27 #include "os/os_time.h"
  28 #include "vl/vl_decoder.h"
  29 #include "vl/vl_video_buffer.h"
  30
  31 #include "r300_context.h"
  32 #include "r300_texture.h"
  33 #include "r300_screen_buffer.h"
  34 #include "r300_state_inlines.h"
  35 #include "r300_public.h"
  36
  37 #include "draw/draw_context.h"
  38
  39 /* Return the identifier behind whom the brave coders responsible for this
  40  * amalgamation of code, sweat, and duct tape, routinely obscure their names.
  41  *
  42  * ...I should have just put "Corbin Simpson", but I'm not that cool.
  43  *
  44  * (Or egotistical. Yet.) */
  45 static const char* r300_get_vendor(struct pipe_screen* pscreen)
  46 {
  47     return "X.Org R300 Project";
  48 }
  49
  50 static const char* chip_families[] = {
  51     "unknown",
  52     "ATI R300",
  53     "ATI R350",
  54     "ATI RV350",
  55     "ATI RV370",
  56     "ATI RV380",
  57     "ATI RS400",
  58     "ATI RC410",
  59     "ATI RS480",
  60     "ATI R420",
  61     "ATI R423",
  62     "ATI R430",
  63     "ATI R480",
  64     "ATI R481",
  65     "ATI RV410",
  66     "ATI RS600",
  67     "ATI RS690",
  68     "ATI RS740",
  69     "ATI RV515",
  70     "ATI R520",
  71     "ATI RV530",
  72     "ATI R580",
  73     "ATI RV560",
  74     "ATI RV570"
  75 };
  76
  77 static const char* r300_get_name(struct pipe_screen* pscreen)
  78 {
  79     struct r300_screen* r300screen = r300_screen(pscreen);
  80
  81     return chip_families[r300screen->caps.family];
  82 }
  83
  84 static int r300_get_param(struct pipe_screen* pscreen, enum pipe_cap param)
  85 {
  86     struct r300_screen* r300screen = r300_screen(pscreen);
  87     boolean is_r500 = r300screen->caps.is_r500;
  88
  89     switch (param) {
  90         /* Supported features (boolean caps). */
  91         case PIPE_CAP_NPOT_TEXTURES:
  92         case PIPE_CAP_MIXED_FRAMEBUFFER_SIZES:
  93         case PIPE_CAP_TWO_SIDED_STENCIL:
  94         case PIPE_CAP_ANISOTROPIC_FILTER:
  95         case PIPE_CAP_POINT_SPRITE:
  96         case PIPE_CAP_OCCLUSION_QUERY:
  97         case PIPE_CAP_TEXTURE_SHADOW_MAP:
  98         case PIPE_CAP_TEXTURE_MIRROR_CLAMP:
  99         case PIPE_CAP_BLEND_EQUATION_SEPARATE:
 100         case PIPE_CAP_VERTEX_ELEMENT_INSTANCE_DIVISOR:
 101         case PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT:
 102         case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER:
 103         case PIPE_CAP_CONDITIONAL_RENDER:
 104         case PIPE_CAP_TEXTURE_BARRIER:
 105         case PIPE_CAP_TGSI_CAN_COMPACT_CONSTANTS:
 106         case PIPE_CAP_USER_INDEX_BUFFERS:
 107         case PIPE_CAP_USER_CONSTANT_BUFFERS:
 108         case PIPE_CAP_PREFER_BLIT_BASED_TEXTURE_TRANSFER:
 109         case PIPE_CAP_BUFFER_MAP_PERSISTENT_COHERENT:
 110             return 1;
 111
 112         case PIPE_CAP_MIN_MAP_BUFFER_ALIGNMENT:
 113             return R300_BUFFER_ALIGNMENT;
 114
 115         case PIPE_CAP_CONSTANT_BUFFER_OFFSET_ALIGNMENT:
 116             return 16;
 117
 118         case PIPE_CAP_GLSL_FEATURE_LEVEL:
 119             return 120;
 120
 121         /* r300 cannot do swizzling of compressed textures. Supported otherwise. */
 122         case PIPE_CAP_TEXTURE_SWIZZLE:
 123             return util_format_s3tc_enabled ? r300screen->caps.dxtc_swizzle : 1;
 124
 125         /* We don't support color clamping on r500, so that we can use color
 126          * intepolators for generic varyings. */
 127         case PIPE_CAP_VERTEX_COLOR_CLAMPED:
 128             return !is_r500;
 129
 130         /* Supported on r500 only. */
 131         case PIPE_CAP_VERTEX_COLOR_UNCLAMPED:
 132         case PIPE_CAP_MIXED_COLORBUFFER_FORMATS:
 133         case PIPE_CAP_SM3:
 134             return is_r500 ? 1 : 0;
 135
 136         /* Unsupported features. */
 137         case PIPE_CAP_QUERY_TIME_ELAPSED:
 138         case PIPE_CAP_QUERY_PIPELINE_STATISTICS:
 139         case PIPE_CAP_MAX_DUAL_SOURCE_RENDER_TARGETS:
 140         case PIPE_CAP_INDEP_BLEND_ENABLE:
 141         case PIPE_CAP_INDEP_BLEND_FUNC:
 142         case PIPE_CAP_DEPTH_CLIP_DISABLE:
 143         case PIPE_CAP_SHADER_STENCIL_EXPORT:
 144         case PIPE_CAP_MAX_TEXTURE_ARRAY_LAYERS:
 145         case PIPE_CAP_TGSI_INSTANCEID:
 146         case PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT:
 147         case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER:
 148         case PIPE_CAP_SEAMLESS_CUBE_MAP:
 149         case PIPE_CAP_SEAMLESS_CUBE_MAP_PER_TEXTURE:
 150         case PIPE_CAP_MIN_TEXEL_OFFSET:
 151         case PIPE_CAP_MAX_TEXEL_OFFSET:
 152         case PIPE_CAP_MIN_TEXTURE_GATHER_OFFSET:
 153         case PIPE_CAP_MAX_TEXTURE_GATHER_OFFSET:
 154         case PIPE_CAP_MAX_STREAM_OUTPUT_BUFFERS:
 155         case PIPE_CAP_MAX_STREAM_OUTPUT_SEPARATE_COMPONENTS:
 156         case PIPE_CAP_MAX_STREAM_OUTPUT_INTERLEAVED_COMPONENTS:
 157         case PIPE_CAP_MAX_GEOMETRY_OUTPUT_VERTICES:
 158         case PIPE_CAP_MAX_GEOMETRY_TOTAL_OUTPUT_COMPONENTS:
 159         case PIPE_CAP_MAX_VERTEX_STREAMS:
 160         case PIPE_CAP_STREAM_OUTPUT_PAUSE_RESUME:
 161         case PIPE_CAP_FRAGMENT_COLOR_CLAMPED:
 162         case PIPE_CAP_QUADS_FOLLOW_PROVOKING_VERTEX_CONVENTION:
 163         case PIPE_CAP_COMPUTE:
 164         case PIPE_CAP_START_INSTANCE:
 165         case PIPE_CAP_QUERY_TIMESTAMP:
 166         case PIPE_CAP_TEXTURE_MULTISAMPLE:
 167         case PIPE_CAP_CUBE_MAP_ARRAY:
 168         case PIPE_CAP_TEXTURE_BUFFER_OBJECTS:
 169         case PIPE_CAP_TEXTURE_BUFFER_OFFSET_ALIGNMENT:
 170         case PIPE_CAP_TEXTURE_BORDER_COLOR_QUIRK:
 171         case PIPE_CAP_MAX_TEXTURE_BUFFER_SIZE:
 172         case PIPE_CAP_TGSI_VS_LAYER_VIEWPORT:
 173         case PIPE_CAP_MAX_TEXTURE_GATHER_COMPONENTS:
 174         case PIPE_CAP_TEXTURE_GATHER_SM5:
 175         case PIPE_CAP_TEXTURE_QUERY_LOD:
 176         case PIPE_CAP_FAKE_SW_MSAA:
 177         case PIPE_CAP_SAMPLE_SHADING:
 178         case PIPE_CAP_TEXTURE_GATHER_OFFSETS:
 179         case PIPE_CAP_TGSI_VS_WINDOW_SPACE_POSITION:
 180         case PIPE_CAP_DRAW_INDIRECT:
 181         case PIPE_CAP_TGSI_FS_FINE_DERIVATIVE:
 182         case PIPE_CAP_CONDITIONAL_RENDER_INVERTED:
 183         case PIPE_CAP_SAMPLER_VIEW_TARGET:
 184             return 0;
 185
 186         /* SWTCL-only features. */
 187         case PIPE_CAP_PRIMITIVE_RESTART:
 188         case PIPE_CAP_USER_VERTEX_BUFFERS:
 189             return !r300screen->caps.has_tcl;
 190
 191         /* HWTCL-only features / limitations. */
 192         case PIPE_CAP_VERTEX_BUFFER_OFFSET_4BYTE_ALIGNED_ONLY:
 193         case PIPE_CAP_VERTEX_BUFFER_STRIDE_4BYTE_ALIGNED_ONLY:
 194         case PIPE_CAP_VERTEX_ELEMENT_SRC_OFFSET_4BYTE_ALIGNED_ONLY:
 195             return r300screen->caps.has_tcl;
 196         case PIPE_CAP_TGSI_TEXCOORD:
 197             return 0;
 198
 199         /* Texturing. */
 200         case PIPE_CAP_MAX_TEXTURE_2D_LEVELS:
 201         case PIPE_CAP_MAX_TEXTURE_3D_LEVELS:
 202         case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS:
 203             /* 13 == 4096, 12 == 2048 */
 204             return is_r500 ? 13 : 12;
 205
 206         /* Render targets. */
 207         case PIPE_CAP_MAX_RENDER_TARGETS:
 208             return 4;
 209         case PIPE_CAP_ENDIANNESS:
 210             return PIPE_ENDIAN_LITTLE;
 211
 212         case PIPE_CAP_MAX_VIEWPORTS:
 213             return 1;
 214
 215         case PIPE_CAP_MAX_VERTEX_ATTRIB_STRIDE:
 216             return 2048;
 217
 218         case PIPE_CAP_VENDOR_ID:
 219                 return 0x1002;
 220         case PIPE_CAP_DEVICE_ID:
 221                 return r300screen->info.pci_id;
 222         case PIPE_CAP_ACCELERATED:
 223                 return 1;
 224         case PIPE_CAP_VIDEO_MEMORY:
 225                 return r300screen->info.vram_size >> 20;
 226         case PIPE_CAP_UMA:
 227                 return 0;
 228     }
 229     return 0;
 230 }
 231
 232 static int r300_get_shader_param(struct pipe_screen *pscreen, unsigned shader, enum pipe_shader_cap param)
 233 {
 234    struct r300_screen* r300screen = r300_screen(pscreen);
 235    boolean is_r400 = r300screen->caps.is_r400;
 236    boolean is_r500 = r300screen->caps.is_r500;
 237
 238    switch (shader) {
 239     case PIPE_SHADER_FRAGMENT:
 240         switch (param)
 241         {
 242         case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
 243             return is_r500 || is_r400 ? 512 : 96;
 244         case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
 245             return is_r500 || is_r400 ? 512 : 64;
 246         case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
 247             return is_r500 || is_r400 ? 512 : 32;
 248         case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
 249             return is_r500 ? 511 : 4;
 250         case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:
 251             return is_r500 ? 64 : 0; /* Actually unlimited on r500. */
 252             /* Fragment shader limits. */
 253         case PIPE_SHADER_CAP_MAX_INPUTS:
 254             /* 2 colors + 8 texcoords are always supported
 255              * (minus fog and wpos).
 256              *
 257              * R500 has the ability to turn 3rd and 4th color into
 258              * additional texcoords but there is no two-sided color
 259              * selection then. However the facing bit can be used instead. */
 260             return 10;
 261         case PIPE_SHADER_CAP_MAX_OUTPUTS:
 262             return 4;
 263         case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE:
 264             return (is_r500 ? 256 : 32) * sizeof(float[4]);
 265         case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
 266             return 1;
 267         case PIPE_SHADER_CAP_MAX_TEMPS:
 268             return is_r500 ? 128 : is_r400 ? 64 : 32;
 269         case PIPE_SHADER_CAP_MAX_PREDS:
 270             return is_r500 ? 1 : 0;
 271         case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
 272         case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS:
 273            return r300screen->caps.num_tex_units;
 274         case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
 275         case PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED:
 276         case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
 277         case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
 278         case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
 279         case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
 280         case PIPE_SHADER_CAP_SUBROUTINES:
 281         case PIPE_SHADER_CAP_INTEGERS:
 282         case PIPE_SHADER_CAP_DOUBLES:
 283             return 0;
 284         case PIPE_SHADER_CAP_PREFERRED_IR:
 285             return PIPE_SHADER_IR_TGSI;
 286         }
 287         break;
 288     case PIPE_SHADER_VERTEX:
 289         switch (param)
 290         {
 291         case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
 292         case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS:
 293         case PIPE_SHADER_CAP_SUBROUTINES:
 294             return 0;
 295         default:;
 296         }
 297
 298         if (!r300screen->caps.has_tcl) {
 299             return draw_get_shader_param(shader, param);
 300         }
 301
 302         switch (param)
 303         {
 304         case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
 305         case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
 306             return is_r500 ? 1024 : 256;
 307         case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:
 308             return is_r500 ? 4 : 0; /* For loops; not sure about conditionals. */
 309         case PIPE_SHADER_CAP_MAX_INPUTS:
 310             return 16;
 311         case PIPE_SHADER_CAP_MAX_OUTPUTS:
 312             return 10;
 313         case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE:
 314             return 256 * sizeof(float[4]);
 315         case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
 316             return 1;
 317         case PIPE_SHADER_CAP_MAX_TEMPS:
 318             return 32;
 319         case PIPE_SHADER_CAP_MAX_PREDS:
 320             return is_r500 ? 4 : 0; /* XXX guessed. */
 321         case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
 322             return 1;
 323         case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
 324         case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
 325         case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
 326         case PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED:
 327         case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
 328         case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
 329         case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
 330         case PIPE_SHADER_CAP_SUBROUTINES:
 331         case PIPE_SHADER_CAP_INTEGERS:
 332         case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
 333         case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS:
 334         case PIPE_SHADER_CAP_DOUBLES:
 335             return 0;
 336         case PIPE_SHADER_CAP_PREFERRED_IR:
 337             return PIPE_SHADER_IR_TGSI;
 338         }
 339         break;
 340     }
 341     return 0;
 342 }
 343
 344 static float r300_get_paramf(struct pipe_screen* pscreen,
 345                              enum pipe_capf param)
 346 {
 347     struct r300_screen* r300screen = r300_screen(pscreen);
 348
 349     switch (param) {
 350         case PIPE_CAPF_MAX_LINE_WIDTH:
 351         case PIPE_CAPF_MAX_LINE_WIDTH_AA:
 352         case PIPE_CAPF_MAX_POINT_WIDTH:
 353         case PIPE_CAPF_MAX_POINT_WIDTH_AA:
 354             /* The maximum dimensions of the colorbuffer are our practical
 355              * rendering limits. 2048 pixels should be enough for anybody. */
 356             if (r300screen->caps.is_r500) {
 357                 return 4096.0f;
 358             } else if (r300screen->caps.is_r400) {
 359                 return 4021.0f;
 360             } else {
 361                 return 2560.0f;
 362             }
 363         case PIPE_CAPF_MAX_TEXTURE_ANISOTROPY:
 364             return 16.0f;
 365         case PIPE_CAPF_MAX_TEXTURE_LOD_BIAS:
 366             return 16.0f;
 367         case PIPE_CAPF_GUARD_BAND_LEFT:
 368         case PIPE_CAPF_GUARD_BAND_TOP:
 369         case PIPE_CAPF_GUARD_BAND_RIGHT:
 370         case PIPE_CAPF_GUARD_BAND_BOTTOM:
 371             /* XXX I don't know what these should be but the least we can do is
 372              * silence the potential error message */
 373             return 0.0f;
 374         default:
 375             debug_printf("r300: Warning: Unknown CAP %d in get_paramf.\n",
 376                          param);
 377             return 0.0f;
 378     }
 379 }
 380
 381 static int r300_get_video_param(struct pipe_screen *screen,
 382                                 enum pipe_video_profile profile,
 383                                 enum pipe_video_entrypoint entrypoint,
 384                                 enum pipe_video_cap param)
 385 {
 386    switch (param) {
 387       case PIPE_VIDEO_CAP_SUPPORTED:
 388          return vl_profile_supported(screen, profile, entrypoint);
 389       case PIPE_VIDEO_CAP_NPOT_TEXTURES:
 390          return 0;
 391       case PIPE_VIDEO_CAP_MAX_WIDTH:
 392       case PIPE_VIDEO_CAP_MAX_HEIGHT:
 393          return vl_video_buffer_max_size(screen);
 394       case PIPE_VIDEO_CAP_PREFERED_FORMAT:
 395          return PIPE_FORMAT_NV12;
 396       case PIPE_VIDEO_CAP_PREFERS_INTERLACED:
 397          return false;
 398       case PIPE_VIDEO_CAP_SUPPORTS_INTERLACED:
 399          return false;
 400       case PIPE_VIDEO_CAP_SUPPORTS_PROGRESSIVE:
 401          return true;
 402       case PIPE_VIDEO_CAP_MAX_LEVEL:
 403          return vl_level_supported(screen, profile);
 404       default:
 405          return 0;
 406    }
 407 }
 408
 409 /**
 410  * Whether the format matches:
 411  *   PIPE_FORMAT_?10?10?10?2_UNORM
 412  */
 413 static INLINE boolean
 414 util_format_is_rgba1010102_variant(const struct util_format_description *desc)
 415 {
 416    static const unsigned size[4] = {10, 10, 10, 2};
 417    unsigned chan;
 418
 419    if (desc->block.width != 1 ||
 420        desc->block.height != 1 ||
 421        desc->block.bits != 32)
 422       return FALSE;
 423
 424    for (chan = 0; chan < 4; ++chan) {
 425       if(desc->channel[chan].type != UTIL_FORMAT_TYPE_UNSIGNED &&
 426          desc->channel[chan].type != UTIL_FORMAT_TYPE_VOID)
 427          return FALSE;
 428       if (desc->channel[chan].size != size[chan])
 429          return FALSE;
 430    }
 431
 432    return TRUE;
 433 }
 434
 435 static bool r300_is_blending_supported(struct r300_screen *rscreen,
 436                                        enum pipe_format format)
 437 {
 438     int c;
 439     const struct util_format_description *desc =
 440         util_format_description(format);
 441
 442     if (desc->layout != UTIL_FORMAT_LAYOUT_PLAIN)
 443         return false;
 444
 445     c = util_format_get_first_non_void_channel(format);
 446
 447     /* RGBA16F */
 448     if (rscreen->caps.is_r500 &&
 449         desc->nr_channels == 4 &&
 450         desc->channel[c].size == 16 &&
 451         desc->channel[c].type == UTIL_FORMAT_TYPE_FLOAT)
 452         return true;
 453
 454     if (desc->channel[c].normalized &&
 455         desc->channel[c].type == UTIL_FORMAT_TYPE_UNSIGNED &&
 456         desc->channel[c].size >= 4 &&
 457         desc->channel[c].size <= 10) {
 458         /* RGB10_A2, RGBA8, RGB5_A1, RGBA4, RGB565 */
 459         if (desc->nr_channels >= 3)
 460             return true;
 461
 462         if (format == PIPE_FORMAT_R8G8_UNORM)
 463             return true;
 464
 465         /* R8, I8, L8, A8 */
 466         if (desc->nr_channels == 1)
 467             return true;
 468     }
 469
 470     return false;
 471 }
 472
 473 static boolean r300_is_format_supported(struct pipe_screen* screen,
 474                                         enum pipe_format format,
 475                                         enum pipe_texture_target target,
 476                                         unsigned sample_count,
 477                                         unsigned usage)
 478 {
 479     uint32_t retval = 0;
 480     boolean drm_2_8_0 = r300_screen(screen)->info.drm_minor >= 8;
 481     boolean is_r500 = r300_screen(screen)->caps.is_r500;
 482     boolean is_r400 = r300_screen(screen)->caps.is_r400;
 483     boolean is_color2101010 = format == PIPE_FORMAT_R10G10B10A2_UNORM ||
 484                               format == PIPE_FORMAT_R10G10B10X2_SNORM ||
 485                               format == PIPE_FORMAT_B10G10R10A2_UNORM ||
 486                               format == PIPE_FORMAT_B10G10R10X2_UNORM ||
 487                               format == PIPE_FORMAT_R10SG10SB10SA2U_NORM;
 488     boolean is_ati1n = format == PIPE_FORMAT_RGTC1_UNORM ||
 489                        format == PIPE_FORMAT_RGTC1_SNORM ||
 490                        format == PIPE_FORMAT_LATC1_UNORM ||
 491                        format == PIPE_FORMAT_LATC1_SNORM;
 492     boolean is_ati2n = format == PIPE_FORMAT_RGTC2_UNORM ||
 493                        format == PIPE_FORMAT_RGTC2_SNORM ||
 494                        format == PIPE_FORMAT_LATC2_UNORM ||
 495                        format == PIPE_FORMAT_LATC2_SNORM;
 496     boolean is_x16f_xy16f = format == PIPE_FORMAT_R16_FLOAT ||
 497                             format == PIPE_FORMAT_R16G16_FLOAT ||
 498                             format == PIPE_FORMAT_A16_FLOAT ||
 499                             format == PIPE_FORMAT_L16_FLOAT ||
 500                             format == PIPE_FORMAT_L16A16_FLOAT ||
 501                             format == PIPE_FORMAT_R16A16_FLOAT ||
 502                             format == PIPE_FORMAT_I16_FLOAT;
 503     boolean is_half_float = format == PIPE_FORMAT_R16_FLOAT ||
 504                             format == PIPE_FORMAT_R16G16_FLOAT ||
 505                             format == PIPE_FORMAT_R16G16B16_FLOAT ||
 506                             format == PIPE_FORMAT_R16G16B16A16_FLOAT ||
 507                             format == PIPE_FORMAT_R16G16B16X16_FLOAT;
 508     const struct util_format_description *desc;
 509
 510     if (!util_format_is_supported(format, usage))
 511        return FALSE;
 512
 513     /* Check multisampling support. */
 514     switch (sample_count) {
 515         case 0:
 516         case 1:
 517             break;
 518         case 2:
 519         case 4:
 520         case 6:
 521             /* We need DRM 2.8.0. */
 522             if (!drm_2_8_0) {
 523                 return FALSE;
 524             }
 525             /* No texturing and scanout. */
 526             if (usage & (PIPE_BIND_SAMPLER_VIEW |
 527                          PIPE_BIND_DISPLAY_TARGET |
 528                          PIPE_BIND_SCANOUT)) {
 529                 return FALSE;
 530             }
 531
 532             desc = util_format_description(format);
 533
 534             if (is_r500) {
 535                 /* Only allow depth/stencil, RGBA8, RGBA1010102, RGBA16F. */
 536                 if (!util_format_is_depth_or_stencil(format) &&
 537                     !util_format_is_rgba8_variant(desc) &&
 538                     !util_format_is_rgba1010102_variant(desc) &&
 539                     format != PIPE_FORMAT_R16G16B16A16_FLOAT &&
 540                     format != PIPE_FORMAT_R16G16B16X16_FLOAT) {
 541                     return FALSE;
 542                 }
 543             } else {
 544                 /* Only allow depth/stencil, RGBA8. */
 545                 if (!util_format_is_depth_or_stencil(format) &&
 546                     !util_format_is_rgba8_variant(desc)) {
 547                     return FALSE;
 548                 }
 549             }
 550             break;
 551         default:
 552             return FALSE;
 553     }
 554
 555     /* Check sampler format support. */
 556     if ((usage & PIPE_BIND_SAMPLER_VIEW) &&
 557         /* these two are broken for an unknown reason */
 558         format != PIPE_FORMAT_R8G8B8X8_SNORM &&
 559         format != PIPE_FORMAT_R16G16B16X16_SNORM &&
 560         /* ATI1N is r5xx-only. */
 561         (is_r500 || !is_ati1n) &&
 562         /* ATI2N is supported on r4xx-r5xx. */
 563         (is_r400 || is_r500 || !is_ati2n) &&
 564         /* R16F and RG16F texture support was added in as late as DRM 2.8.0 */
 565         (drm_2_8_0 || !is_x16f_xy16f) &&
 566         r300_is_sampler_format_supported(format)) {
 567         retval |= PIPE_BIND_SAMPLER_VIEW;
 568     }
 569
 570     /* Check colorbuffer format support. */
 571     if ((usage & (PIPE_BIND_RENDER_TARGET |
 572                   PIPE_BIND_DISPLAY_TARGET |
 573                   PIPE_BIND_SCANOUT |
 574                   PIPE_BIND_SHARED |
 575                   PIPE_BIND_BLENDABLE)) &&
 576         /* 2101010 cannot be rendered to on non-r5xx. */
 577         (!is_color2101010 || (is_r500 && drm_2_8_0)) &&
 578         r300_is_colorbuffer_format_supported(format)) {
 579         retval |= usage &
 580             (PIPE_BIND_RENDER_TARGET |
 581              PIPE_BIND_DISPLAY_TARGET |
 582              PIPE_BIND_SCANOUT |
 583              PIPE_BIND_SHARED);
 584
 585         if (r300_is_blending_supported(r300_screen(screen), format)) {
 586             retval |= usage & PIPE_BIND_BLENDABLE;
 587         }
 588     }
 589
 590     /* Check depth-stencil format support. */
 591     if (usage & PIPE_BIND_DEPTH_STENCIL &&
 592         r300_is_zs_format_supported(format)) {
 593         retval |= PIPE_BIND_DEPTH_STENCIL;
 594     }
 595
 596     /* Check vertex buffer format support. */
 597     if (usage & PIPE_BIND_VERTEX_BUFFER) {
 598         if (r300_screen(screen)->caps.has_tcl) {
 599             /* Half float is supported on >= R400. */
 600             if ((is_r400 || is_r500 || !is_half_float) &&
 601                 r300_translate_vertex_data_type(format) != R300_INVALID_FORMAT) {
 602                 retval |= PIPE_BIND_VERTEX_BUFFER;
 603             }
 604         } else {
 605             /* SW TCL */
 606             if (!util_format_is_pure_integer(format)) {
 607                 retval |= PIPE_BIND_VERTEX_BUFFER;
 608             }
 609         }
 610     }
 611
 612     /* Transfers are always supported. */
 613     if (usage & PIPE_BIND_TRANSFER_READ)
 614         retval |= PIPE_BIND_TRANSFER_READ;
 615     if (usage & PIPE_BIND_TRANSFER_WRITE)
 616         retval |= PIPE_BIND_TRANSFER_WRITE;
 617
 618     return retval == usage;
 619 }
 620
 621 static void r300_destroy_screen(struct pipe_screen* pscreen)
 622 {
 623     struct r300_screen* r300screen = r300_screen(pscreen);
 624     struct radeon_winsys *rws = radeon_winsys(pscreen);
 625
 626     if (rws && !rws->unref(rws))
 627       return;
 628
 629     pipe_mutex_destroy(r300screen->cmask_mutex);
 630
 631     if (rws)
 632       rws->destroy(rws);
 633
 634     FREE(r300screen);
 635 }
 636
 637 static void r300_fence_reference(struct pipe_screen *screen,
 638                                  struct pipe_fence_handle **ptr,
 639                                  struct pipe_fence_handle *fence)
 640 {
 641     struct radeon_winsys *rws = r300_screen(screen)->rws;
 642
 643     rws->fence_reference(ptr, fence);
 644 }
 645
 646 static boolean r300_fence_signalled(struct pipe_screen *screen,
 647                                     struct pipe_fence_handle *fence)
 648 {
 649     struct radeon_winsys *rws = r300_screen(screen)->rws;
 650
 651     return rws->fence_wait(rws, fence, 0);
 652 }
 653
 654 static boolean r300_fence_finish(struct pipe_screen *screen,
 655                                  struct pipe_fence_handle *fence,
 656                                  uint64_t timeout)
 657 {
 658     struct radeon_winsys *rws = r300_screen(screen)->rws;
 659
 660     return rws->fence_wait(rws, fence, timeout);
 661 }
 662
 663 struct pipe_screen* r300_screen_create(struct radeon_winsys *rws)
 664 {
 665     struct r300_screen *r300screen = CALLOC_STRUCT(r300_screen);
 666
 667     if (!r300screen) {
 668         FREE(r300screen);
 669         return NULL;
 670     }
 671
 672     rws->query_info(rws, &r300screen->info);
 673
 674     r300_init_debug(r300screen);
 675     r300_parse_chipset(r300screen->info.pci_id, &r300screen->caps);
 676
 677     if (SCREEN_DBG_ON(r300screen, DBG_NO_ZMASK))
 678         r300screen->caps.zmask_ram = 0;
 679     if (SCREEN_DBG_ON(r300screen, DBG_NO_HIZ))
 680         r300screen->caps.hiz_ram = 0;
 681
 682     if (r300screen->info.drm_minor < 8)
 683         r300screen->caps.has_us_format = FALSE;
 684
 685     r300screen->rws = rws;
 686     r300screen->screen.destroy = r300_destroy_screen;
 687     r300screen->screen.get_name = r300_get_name;
 688     r300screen->screen.get_vendor = r300_get_vendor;
 689     r300screen->screen.get_param = r300_get_param;
 690     r300screen->screen.get_shader_param = r300_get_shader_param;
 691     r300screen->screen.get_paramf = r300_get_paramf;
 692     r300screen->screen.get_video_param = r300_get_video_param;
 693     r300screen->screen.is_format_supported = r300_is_format_supported;
 694     r300screen->screen.is_video_format_supported = vl_video_buffer_is_format_supported;
 695     r300screen->screen.context_create = r300_create_context;
 696     r300screen->screen.fence_reference = r300_fence_reference;
 697     r300screen->screen.fence_signalled = r300_fence_signalled;
 698     r300screen->screen.fence_finish = r300_fence_finish;
 699
 700     r300_init_screen_resource_functions(r300screen);
 701
 702     util_format_s3tc_init();
 703     pipe_mutex_init(r300screen->cmask_mutex);
 704
 705     return &r300screen->screen;
 706 }