src/gallium/drivers/r300/r300_screen.c

   1 /*
   2  * Copyright 2008 Corbin Simpson <MostAwesomeDude@gmail.com>
   3  * Copyright 2010 Marek Olšák <maraeo@gmail.com>
   4  *
   5  * Permission is hereby granted, free of charge, to any person obtaining a
   6  * copy of this software and associated documentation files (the "Software"),
   7  * to deal in the Software without restriction, including without limitation
   8  * on the rights to use, copy, modify, merge, publish, distribute, sub
   9  * license, and/or sell copies of the Software, and to permit persons to whom
  10  * the Software is furnished to do so, subject to the following conditions:
  11  *
  12  * The above copyright notice and this permission notice (including the next
  13  * paragraph) shall be included in all copies or substantial portions of the
  14  * Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  19  * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
  20  * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
  21  * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
  22  * USE OR OTHER DEALINGS IN THE SOFTWARE. */
  23
  24 #include "util/u_format.h"
  25 #include "util/u_format_s3tc.h"
  26 #include "util/u_memory.h"
  27 #include "os/os_time.h"
  28 #include "vl/vl_decoder.h"
  29 #include "vl/vl_video_buffer.h"
  30
  31 #include "r300_context.h"
  32 #include "r300_texture.h"
  33 #include "r300_screen_buffer.h"
  34 #include "r300_state_inlines.h"
  35 #include "r300_public.h"
  36
  37 #include "draw/draw_context.h"
  38
  39 /* Return the identifier behind whom the brave coders responsible for this
  40  * amalgamation of code, sweat, and duct tape, routinely obscure their names.
  41  *
  42  * ...I should have just put "Corbin Simpson", but I'm not that cool.
  43  *
  44  * (Or egotistical. Yet.) */
  45 static const char* r300_get_vendor(struct pipe_screen* pscreen)
  46 {
  47     return "X.Org R300 Project";
  48 }
  49
  50 static const char* chip_families[] = {
  51     "unknown",
  52     "ATI R300",
  53     "ATI R350",
  54     "ATI RV350",
  55     "ATI RV370",
  56     "ATI RV380",
  57     "ATI RS400",
  58     "ATI RC410",
  59     "ATI RS480",
  60     "ATI R420",
  61     "ATI R423",
  62     "ATI R430",
  63     "ATI R480",
  64     "ATI R481",
  65     "ATI RV410",
  66     "ATI RS600",
  67     "ATI RS690",
  68     "ATI RS740",
  69     "ATI RV515",
  70     "ATI R520",
  71     "ATI RV530",
  72     "ATI R580",
  73     "ATI RV560",
  74     "ATI RV570"
  75 };
  76
  77 static const char* r300_get_name(struct pipe_screen* pscreen)
  78 {
  79     struct r300_screen* r300screen = r300_screen(pscreen);
  80
  81     return chip_families[r300screen->caps.family];
  82 }
  83
  84 static int r300_get_param(struct pipe_screen* pscreen, enum pipe_cap param)
  85 {
  86     struct r300_screen* r300screen = r300_screen(pscreen);
  87     boolean is_r500 = r300screen->caps.is_r500;
  88
  89     switch (param) {
  90         /* Supported features (boolean caps). */
  91         case PIPE_CAP_NPOT_TEXTURES:
  92         case PIPE_CAP_TWO_SIDED_STENCIL:
  93         case PIPE_CAP_ANISOTROPIC_FILTER:
  94         case PIPE_CAP_POINT_SPRITE:
  95         case PIPE_CAP_OCCLUSION_QUERY:
  96         case PIPE_CAP_TEXTURE_SHADOW_MAP:
  97         case PIPE_CAP_TEXTURE_MIRROR_CLAMP:
  98         case PIPE_CAP_BLEND_EQUATION_SEPARATE:
  99         case PIPE_CAP_VERTEX_ELEMENT_INSTANCE_DIVISOR:
 100         case PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT:
 101         case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER:
 102         case PIPE_CAP_CONDITIONAL_RENDER:
 103         case PIPE_CAP_TEXTURE_BARRIER:
 104         case PIPE_CAP_TGSI_CAN_COMPACT_VARYINGS:
 105         case PIPE_CAP_TGSI_CAN_COMPACT_CONSTANTS:
 106         case PIPE_CAP_USER_INDEX_BUFFERS:
 107         case PIPE_CAP_USER_CONSTANT_BUFFERS:
 108         case PIPE_CAP_DEPTH_CLIP_DISABLE: /* XXX implemented, but breaks Regnum Online */
 109         case PIPE_CAP_PREFER_BLIT_BASED_TEXTURE_TRANSFER:
 110             return 1;
 111
 112         case PIPE_CAP_MIN_MAP_BUFFER_ALIGNMENT:
 113             return R300_BUFFER_ALIGNMENT;
 114
 115         case PIPE_CAP_CONSTANT_BUFFER_OFFSET_ALIGNMENT:
 116             return 16;
 117
 118         case PIPE_CAP_GLSL_FEATURE_LEVEL:
 119             return 120;
 120
 121         /* r300 cannot do swizzling of compressed textures. Supported otherwise. */
 122         case PIPE_CAP_TEXTURE_SWIZZLE:
 123             return util_format_s3tc_enabled ? r300screen->caps.dxtc_swizzle : 1;
 124
 125         /* We don't support color clamping on r500, so that we can use color
 126          * intepolators for generic varyings. */
 127         case PIPE_CAP_VERTEX_COLOR_CLAMPED:
 128             return !is_r500;
 129
 130         /* Supported on r500 only. */
 131         case PIPE_CAP_VERTEX_COLOR_UNCLAMPED:
 132         case PIPE_CAP_MIXED_COLORBUFFER_FORMATS:
 133         case PIPE_CAP_SM3:
 134             return is_r500 ? 1 : 0;
 135
 136         /* Unsupported features. */
 137         case PIPE_CAP_QUERY_TIME_ELAPSED:
 138         case PIPE_CAP_QUERY_PIPELINE_STATISTICS:
 139         case PIPE_CAP_MAX_DUAL_SOURCE_RENDER_TARGETS:
 140         case PIPE_CAP_INDEP_BLEND_ENABLE:
 141         case PIPE_CAP_INDEP_BLEND_FUNC:
 142         case PIPE_CAP_SHADER_STENCIL_EXPORT:
 143         case PIPE_CAP_MAX_TEXTURE_ARRAY_LAYERS:
 144         case PIPE_CAP_TGSI_INSTANCEID:
 145         case PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT:
 146         case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER:
 147         case PIPE_CAP_SEAMLESS_CUBE_MAP:
 148         case PIPE_CAP_SEAMLESS_CUBE_MAP_PER_TEXTURE:
 149         case PIPE_CAP_SCALED_RESOLVE:
 150         case PIPE_CAP_MIN_TEXEL_OFFSET:
 151         case PIPE_CAP_MAX_TEXEL_OFFSET:
 152         case PIPE_CAP_MAX_STREAM_OUTPUT_BUFFERS:
 153         case PIPE_CAP_MAX_STREAM_OUTPUT_SEPARATE_COMPONENTS:
 154         case PIPE_CAP_MAX_STREAM_OUTPUT_INTERLEAVED_COMPONENTS:
 155         case PIPE_CAP_STREAM_OUTPUT_PAUSE_RESUME:
 156         case PIPE_CAP_FRAGMENT_COLOR_CLAMPED:
 157         case PIPE_CAP_QUADS_FOLLOW_PROVOKING_VERTEX_CONVENTION:
 158         case PIPE_CAP_COMPUTE:
 159         case PIPE_CAP_START_INSTANCE:
 160         case PIPE_CAP_QUERY_TIMESTAMP:
 161         case PIPE_CAP_TEXTURE_MULTISAMPLE:
 162         case PIPE_CAP_CUBE_MAP_ARRAY:
 163         case PIPE_CAP_TEXTURE_BUFFER_OBJECTS:
 164         case PIPE_CAP_TEXTURE_BUFFER_OFFSET_ALIGNMENT:
 165         case PIPE_CAP_TEXTURE_BORDER_COLOR_QUIRK:
 166         case PIPE_CAP_MAX_TEXTURE_BUFFER_SIZE:
 167             return 0;
 168
 169         /* SWTCL-only features. */
 170         case PIPE_CAP_PRIMITIVE_RESTART:
 171         case PIPE_CAP_USER_VERTEX_BUFFERS:
 172             return !r300screen->caps.has_tcl;
 173
 174         /* HWTCL-only features / limitations. */
 175         case PIPE_CAP_VERTEX_BUFFER_OFFSET_4BYTE_ALIGNED_ONLY:
 176         case PIPE_CAP_VERTEX_BUFFER_STRIDE_4BYTE_ALIGNED_ONLY:
 177         case PIPE_CAP_VERTEX_ELEMENT_SRC_OFFSET_4BYTE_ALIGNED_ONLY:
 178             return r300screen->caps.has_tcl;
 179         case PIPE_CAP_TGSI_TEXCOORD:
 180             return 0;
 181
 182         /* Texturing. */
 183         case PIPE_CAP_MAX_COMBINED_SAMPLERS:
 184             return r300screen->caps.num_tex_units;
 185         case PIPE_CAP_MAX_TEXTURE_2D_LEVELS:
 186         case PIPE_CAP_MAX_TEXTURE_3D_LEVELS:
 187         case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS:
 188             /* 13 == 4096, 12 == 2048 */
 189             return is_r500 ? 13 : 12;
 190
 191         /* Render targets. */
 192         case PIPE_CAP_MAX_RENDER_TARGETS:
 193             return 4;
 194     }
 195     return 0;
 196 }
 197
 198 static int r300_get_shader_param(struct pipe_screen *pscreen, unsigned shader, enum pipe_shader_cap param)
 199 {
 200    struct r300_screen* r300screen = r300_screen(pscreen);
 201    boolean is_r400 = r300screen->caps.is_r400;
 202    boolean is_r500 = r300screen->caps.is_r500;
 203
 204    switch (shader) {
 205     case PIPE_SHADER_FRAGMENT:
 206         switch (param)
 207         {
 208         case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
 209             return is_r500 || is_r400 ? 512 : 96;
 210         case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
 211             return is_r500 || is_r400 ? 512 : 64;
 212         case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
 213             return is_r500 || is_r400 ? 512 : 32;
 214         case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
 215             return is_r500 ? 511 : 4;
 216         case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:
 217             return is_r500 ? 64 : 0; /* Actually unlimited on r500. */
 218             /* Fragment shader limits. */
 219         case PIPE_SHADER_CAP_MAX_INPUTS:
 220             /* 2 colors + 8 texcoords are always supported
 221              * (minus fog and wpos).
 222              *
 223              * R500 has the ability to turn 3rd and 4th color into
 224              * additional texcoords but there is no two-sided color
 225              * selection then. However the facing bit can be used instead. */
 226             return 10;
 227         case PIPE_SHADER_CAP_MAX_CONSTS:
 228             return is_r500 ? 256 : 32;
 229         case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
 230             return 1;
 231         case PIPE_SHADER_CAP_MAX_TEMPS:
 232             return is_r500 ? 128 : is_r400 ? 64 : 32;
 233         case PIPE_SHADER_CAP_MAX_PREDS:
 234             return is_r500 ? 1 : 0;
 235         case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
 236            return r300screen->caps.num_tex_units;
 237         case PIPE_SHADER_CAP_MAX_ADDRS:
 238         case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
 239         case PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED:
 240         case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
 241         case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
 242         case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
 243         case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
 244         case PIPE_SHADER_CAP_SUBROUTINES:
 245         case PIPE_SHADER_CAP_INTEGERS:
 246             return 0;
 247         case PIPE_SHADER_CAP_PREFERRED_IR:
 248             return PIPE_SHADER_IR_TGSI;
 249         }
 250         break;
 251     case PIPE_SHADER_VERTEX:
 252         switch (param)
 253         {
 254         case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
 255         case PIPE_SHADER_CAP_SUBROUTINES:
 256             return 0;
 257         default:;
 258         }
 259
 260         if (!r300screen->caps.has_tcl) {
 261             return draw_get_shader_param(shader, param);
 262         }
 263
 264         switch (param)
 265         {
 266         case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
 267         case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
 268             return is_r500 ? 1024 : 256;
 269         case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:
 270             return is_r500 ? 4 : 0; /* For loops; not sure about conditionals. */
 271         case PIPE_SHADER_CAP_MAX_INPUTS:
 272             return 16;
 273         case PIPE_SHADER_CAP_MAX_CONSTS:
 274             return 256;
 275         case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
 276             return 1;
 277         case PIPE_SHADER_CAP_MAX_TEMPS:
 278             return 32;
 279         case PIPE_SHADER_CAP_MAX_ADDRS:
 280             return 1; /* XXX guessed */
 281         case PIPE_SHADER_CAP_MAX_PREDS:
 282             return is_r500 ? 4 : 0; /* XXX guessed. */
 283         case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
 284             return 1;
 285         case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
 286         case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
 287         case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
 288         case PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED:
 289         case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
 290         case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
 291         case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
 292         case PIPE_SHADER_CAP_SUBROUTINES:
 293         case PIPE_SHADER_CAP_INTEGERS:
 294         case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
 295             return 0;
 296         case PIPE_SHADER_CAP_PREFERRED_IR:
 297             return PIPE_SHADER_IR_TGSI;
 298         }
 299         break;
 300     }
 301     return 0;
 302 }
 303
 304 static float r300_get_paramf(struct pipe_screen* pscreen,
 305                              enum pipe_capf param)
 306 {
 307     struct r300_screen* r300screen = r300_screen(pscreen);
 308
 309     switch (param) {
 310         case PIPE_CAPF_MAX_LINE_WIDTH:
 311         case PIPE_CAPF_MAX_LINE_WIDTH_AA:
 312         case PIPE_CAPF_MAX_POINT_WIDTH:
 313         case PIPE_CAPF_MAX_POINT_WIDTH_AA:
 314             /* The maximum dimensions of the colorbuffer are our practical
 315              * rendering limits. 2048 pixels should be enough for anybody. */
 316             if (r300screen->caps.is_r500) {
 317                 return 4096.0f;
 318             } else if (r300screen->caps.is_r400) {
 319                 return 4021.0f;
 320             } else {
 321                 return 2560.0f;
 322             }
 323         case PIPE_CAPF_MAX_TEXTURE_ANISOTROPY:
 324             return 16.0f;
 325         case PIPE_CAPF_MAX_TEXTURE_LOD_BIAS:
 326             return 16.0f;
 327         case PIPE_CAPF_GUARD_BAND_LEFT:
 328         case PIPE_CAPF_GUARD_BAND_TOP:
 329         case PIPE_CAPF_GUARD_BAND_RIGHT:
 330         case PIPE_CAPF_GUARD_BAND_BOTTOM:
 331             /* XXX I don't know what these should be but the least we can do is
 332              * silence the potential error message */
 333             return 0.0f;
 334         default:
 335             debug_printf("r300: Warning: Unknown CAP %d in get_paramf.\n",
 336                          param);
 337             return 0.0f;
 338     }
 339 }
 340
 341 static int r300_get_video_param(struct pipe_screen *screen,
 342                                 enum pipe_video_profile profile,
 343                                 enum pipe_video_cap param)
 344 {
 345    switch (param) {
 346       case PIPE_VIDEO_CAP_SUPPORTED:
 347          return vl_profile_supported(screen, profile);
 348       case PIPE_VIDEO_CAP_NPOT_TEXTURES:
 349          return 0;
 350       case PIPE_VIDEO_CAP_MAX_WIDTH:
 351       case PIPE_VIDEO_CAP_MAX_HEIGHT:
 352          return vl_video_buffer_max_size(screen);
 353       case PIPE_VIDEO_CAP_PREFERED_FORMAT:
 354          return PIPE_FORMAT_NV12;
 355       case PIPE_VIDEO_CAP_PREFERS_INTERLACED:
 356          return false;
 357       case PIPE_VIDEO_CAP_SUPPORTS_INTERLACED:
 358          return false;
 359       case PIPE_VIDEO_CAP_SUPPORTS_PROGRESSIVE:
 360          return true;
 361       default:
 362          return 0;
 363    }
 364 }
 365
 366 /**
 367  * Whether the format matches:
 368  *   PIPE_FORMAT_?10?10?10?2_UNORM
 369  */
 370 static INLINE boolean
 371 util_format_is_rgba1010102_variant(const struct util_format_description *desc)
 372 {
 373    static const unsigned size[4] = {10, 10, 10, 2};
 374    unsigned chan;
 375
 376    if (desc->block.width != 1 ||
 377        desc->block.height != 1 ||
 378        desc->block.bits != 32)
 379       return FALSE;
 380
 381    for (chan = 0; chan < 4; ++chan) {
 382       if(desc->channel[chan].type != UTIL_FORMAT_TYPE_UNSIGNED &&
 383          desc->channel[chan].type != UTIL_FORMAT_TYPE_VOID)
 384          return FALSE;
 385       if (desc->channel[chan].size != size[chan])
 386          return FALSE;
 387    }
 388
 389    return TRUE;
 390 }
 391
 392 static boolean r300_is_format_supported(struct pipe_screen* screen,
 393                                         enum pipe_format format,
 394                                         enum pipe_texture_target target,
 395                                         unsigned sample_count,
 396                                         unsigned usage)
 397 {
 398     uint32_t retval = 0;
 399     boolean drm_2_8_0 = r300_screen(screen)->info.drm_minor >= 8;
 400     boolean is_r500 = r300_screen(screen)->caps.is_r500;
 401     boolean is_r400 = r300_screen(screen)->caps.is_r400;
 402     boolean is_color2101010 = format == PIPE_FORMAT_R10G10B10A2_UNORM ||
 403                               format == PIPE_FORMAT_R10G10B10X2_SNORM ||
 404                               format == PIPE_FORMAT_B10G10R10A2_UNORM ||
 405                               format == PIPE_FORMAT_R10SG10SB10SA2U_NORM;
 406     boolean is_ati1n = format == PIPE_FORMAT_RGTC1_UNORM ||
 407                        format == PIPE_FORMAT_RGTC1_SNORM ||
 408                        format == PIPE_FORMAT_LATC1_UNORM ||
 409                        format == PIPE_FORMAT_LATC1_SNORM;
 410     boolean is_ati2n = format == PIPE_FORMAT_RGTC2_UNORM ||
 411                        format == PIPE_FORMAT_RGTC2_SNORM ||
 412                        format == PIPE_FORMAT_LATC2_UNORM ||
 413                        format == PIPE_FORMAT_LATC2_SNORM;
 414     boolean is_x16f_xy16f = format == PIPE_FORMAT_R16_FLOAT ||
 415                             format == PIPE_FORMAT_R16G16_FLOAT ||
 416                             format == PIPE_FORMAT_A16_FLOAT ||
 417                             format == PIPE_FORMAT_L16_FLOAT ||
 418                             format == PIPE_FORMAT_L16A16_FLOAT ||
 419                             format == PIPE_FORMAT_R16A16_FLOAT ||
 420                             format == PIPE_FORMAT_I16_FLOAT;
 421     boolean is_half_float = format == PIPE_FORMAT_R16_FLOAT ||
 422                             format == PIPE_FORMAT_R16G16_FLOAT ||
 423                             format == PIPE_FORMAT_R16G16B16_FLOAT ||
 424                             format == PIPE_FORMAT_R16G16B16A16_FLOAT ||
 425                             format == PIPE_FORMAT_R16G16B16X16_FLOAT;
 426     const struct util_format_description *desc;
 427
 428     if (!util_format_is_supported(format, usage))
 429        return FALSE;
 430
 431     /* Check multisampling support. */
 432     switch (sample_count) {
 433         case 0:
 434         case 1:
 435             break;
 436         case 2:
 437         case 4:
 438         case 6:
 439             /* We need DRM 2.8.0. */
 440             if (!drm_2_8_0) {
 441                 return FALSE;
 442             }
 443             /* Only support R500, because I didn't test older chipsets,
 444              * but MSAA should work there too. */
 445             if (!is_r500 && !debug_get_bool_option("RADEON_MSAA", FALSE)) {
 446                 return FALSE;
 447             }
 448             /* No texturing and scanout. */
 449             if (usage & (PIPE_BIND_SAMPLER_VIEW |
 450                          PIPE_BIND_DISPLAY_TARGET |
 451                          PIPE_BIND_SCANOUT)) {
 452                 return FALSE;
 453             }
 454
 455             desc = util_format_description(format);
 456
 457             if (is_r500) {
 458                 /* Only allow depth/stencil, RGBA8, RGBA1010102, RGBA16F. */
 459                 if (!util_format_is_depth_or_stencil(format) &&
 460                     !util_format_is_rgba8_variant(desc) &&
 461                     !util_format_is_rgba1010102_variant(desc) &&
 462                     format != PIPE_FORMAT_R16G16B16A16_FLOAT &&
 463                     format != PIPE_FORMAT_R16G16B16X16_FLOAT) {
 464                     return FALSE;
 465                 }
 466             } else {
 467                 /* Only allow depth/stencil, RGBA8. */
 468                 if (!util_format_is_depth_or_stencil(format) &&
 469                     !util_format_is_rgba8_variant(desc)) {
 470                     return FALSE;
 471                 }
 472             }
 473             break;
 474         default:
 475             return FALSE;
 476     }
 477
 478     /* Check sampler format support. */
 479     if ((usage & PIPE_BIND_SAMPLER_VIEW) &&
 480         /* these two are broken for an unknown reason */
 481         format != PIPE_FORMAT_R8G8B8X8_SNORM &&
 482         format != PIPE_FORMAT_R16G16B16X16_SNORM &&
 483         /* ATI1N is r5xx-only. */
 484         (is_r500 || !is_ati1n) &&
 485         /* ATI2N is supported on r4xx-r5xx. */
 486         (is_r400 || is_r500 || !is_ati2n) &&
 487         /* R16F and RG16F texture support was added in as late as DRM 2.8.0 */
 488         (drm_2_8_0 || !is_x16f_xy16f) &&
 489         r300_is_sampler_format_supported(format)) {
 490         retval |= PIPE_BIND_SAMPLER_VIEW;
 491     }
 492
 493     /* Check colorbuffer format support. */
 494     if ((usage & (PIPE_BIND_RENDER_TARGET |
 495                   PIPE_BIND_DISPLAY_TARGET |
 496                   PIPE_BIND_SCANOUT |
 497                   PIPE_BIND_SHARED)) &&
 498         /* 2101010 cannot be rendered to on non-r5xx. */
 499         (!is_color2101010 || (is_r500 && drm_2_8_0)) &&
 500         r300_is_colorbuffer_format_supported(format)) {
 501         retval |= usage &
 502             (PIPE_BIND_RENDER_TARGET |
 503              PIPE_BIND_DISPLAY_TARGET |
 504              PIPE_BIND_SCANOUT |
 505              PIPE_BIND_SHARED);
 506     }
 507
 508     /* Check depth-stencil format support. */
 509     if (usage & PIPE_BIND_DEPTH_STENCIL &&
 510         r300_is_zs_format_supported(format)) {
 511         retval |= PIPE_BIND_DEPTH_STENCIL;
 512     }
 513
 514     /* Check vertex buffer format support. */
 515     if (usage & PIPE_BIND_VERTEX_BUFFER) {
 516         if (r300_screen(screen)->caps.has_tcl) {
 517             /* Half float is supported on >= R400. */
 518             if ((is_r400 || is_r500 || !is_half_float) &&
 519                 r300_translate_vertex_data_type(format) != R300_INVALID_FORMAT) {
 520                 retval |= PIPE_BIND_VERTEX_BUFFER;
 521             }
 522         } else {
 523             /* SW TCL */
 524             if (!util_format_is_pure_integer(format)) {
 525                 retval |= PIPE_BIND_VERTEX_BUFFER;
 526             }
 527         }
 528     }
 529
 530     /* Transfers are always supported. */
 531     if (usage & PIPE_BIND_TRANSFER_READ)
 532         retval |= PIPE_BIND_TRANSFER_READ;
 533     if (usage & PIPE_BIND_TRANSFER_WRITE)
 534         retval |= PIPE_BIND_TRANSFER_WRITE;
 535
 536     return retval == usage;
 537 }
 538
 539 static void r300_destroy_screen(struct pipe_screen* pscreen)
 540 {
 541     struct r300_screen* r300screen = r300_screen(pscreen);
 542     struct radeon_winsys *rws = radeon_winsys(pscreen);
 543
 544     pipe_mutex_destroy(r300screen->cmask_mutex);
 545
 546     if (rws)
 547       rws->destroy(rws);
 548
 549     FREE(r300screen);
 550 }
 551
 552 static void r300_fence_reference(struct pipe_screen *screen,
 553                                  struct pipe_fence_handle **ptr,
 554                                  struct pipe_fence_handle *fence)
 555 {
 556     pb_reference((struct pb_buffer**)ptr,
 557                              (struct pb_buffer*)fence);
 558 }
 559
 560 static boolean r300_fence_signalled(struct pipe_screen *screen,
 561                                     struct pipe_fence_handle *fence)
 562 {
 563     struct radeon_winsys *rws = r300_screen(screen)->rws;
 564     struct pb_buffer *rfence = (struct pb_buffer*)fence;
 565
 566     return !rws->buffer_is_busy(rfence, RADEON_USAGE_READWRITE);
 567 }
 568
 569 static boolean r300_fence_finish(struct pipe_screen *screen,
 570                                  struct pipe_fence_handle *fence,
 571                                  uint64_t timeout)
 572 {
 573     struct radeon_winsys *rws = r300_screen(screen)->rws;
 574     struct pb_buffer *rfence = (struct pb_buffer*)fence;
 575
 576     if (timeout != PIPE_TIMEOUT_INFINITE) {
 577         int64_t start_time = os_time_get();
 578
 579         /* Convert to microseconds. */
 580         timeout /= 1000;
 581
 582         /* Wait in a loop. */
 583         while (rws->buffer_is_busy(rfence, RADEON_USAGE_READWRITE)) {
 584             if (os_time_get() - start_time >= timeout) {
 585                 return FALSE;
 586             }
 587             os_time_sleep(10);
 588         }
 589         return TRUE;
 590     }
 591
 592     rws->buffer_wait(rfence, RADEON_USAGE_READWRITE);
 593     return TRUE;
 594 }
 595
 596 struct pipe_screen* r300_screen_create(struct radeon_winsys *rws)
 597 {
 598     struct r300_screen *r300screen = CALLOC_STRUCT(r300_screen);
 599
 600     if (!r300screen) {
 601         FREE(r300screen);
 602         return NULL;
 603     }
 604
 605     rws->query_info(rws, &r300screen->info);
 606
 607     r300_init_debug(r300screen);
 608     r300_parse_chipset(r300screen->info.pci_id, &r300screen->caps);
 609
 610     if (SCREEN_DBG_ON(r300screen, DBG_NO_ZMASK))
 611         r300screen->caps.zmask_ram = 0;
 612     if (SCREEN_DBG_ON(r300screen, DBG_NO_HIZ))
 613         r300screen->caps.hiz_ram = 0;
 614
 615     if (r300screen->info.drm_minor < 8)
 616         r300screen->caps.has_us_format = FALSE;
 617
 618     r300screen->rws = rws;
 619     r300screen->screen.destroy = r300_destroy_screen;
 620     r300screen->screen.get_name = r300_get_name;
 621     r300screen->screen.get_vendor = r300_get_vendor;
 622     r300screen->screen.get_param = r300_get_param;
 623     r300screen->screen.get_shader_param = r300_get_shader_param;
 624     r300screen->screen.get_paramf = r300_get_paramf;
 625     r300screen->screen.get_video_param = r300_get_video_param;
 626     r300screen->screen.is_format_supported = r300_is_format_supported;
 627     r300screen->screen.is_video_format_supported = vl_video_buffer_is_format_supported;
 628     r300screen->screen.context_create = r300_create_context;
 629     r300screen->screen.fence_reference = r300_fence_reference;
 630     r300screen->screen.fence_signalled = r300_fence_signalled;
 631     r300screen->screen.fence_finish = r300_fence_finish;
 632
 633     r300_init_screen_resource_functions(r300screen);
 634
 635     util_format_s3tc_init();
 636     pipe_mutex_init(r300screen->cmask_mutex);
 637
 638     return &r300screen->screen;
 639 }