vl: add interlacing capabilities
[mesa.git] / src / gallium / drivers / r300 / r300_screen.c
1 /*
2 * Copyright 2008 Corbin Simpson <MostAwesomeDude@gmail.com>
3 * Copyright 2010 Marek Olšák <maraeo@gmail.com>
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * on the rights to use, copy, modify, merge, publish, distribute, sub
9 * license, and/or sell copies of the Software, and to permit persons to whom
10 * the Software is furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
14 * Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
20 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
21 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
22 * USE OR OTHER DEALINGS IN THE SOFTWARE. */
23
24 #include "util/u_format.h"
25 #include "util/u_format_s3tc.h"
26 #include "util/u_memory.h"
27 #include "os/os_time.h"
28 #include "vl/vl_decoder.h"
29 #include "vl/vl_video_buffer.h"
30
31 #include "r300_context.h"
32 #include "r300_texture.h"
33 #include "r300_screen_buffer.h"
34 #include "r300_state_inlines.h"
35 #include "r300_public.h"
36
37 #include "draw/draw_context.h"
38
39 /* Return the identifier behind whom the brave coders responsible for this
40 * amalgamation of code, sweat, and duct tape, routinely obscure their names.
41 *
42 * ...I should have just put "Corbin Simpson", but I'm not that cool.
43 *
44 * (Or egotistical. Yet.) */
45 static const char* r300_get_vendor(struct pipe_screen* pscreen)
46 {
47 return "X.Org R300 Project";
48 }
49
50 static const char* chip_families[] = {
51 "ATI R300",
52 "ATI R350",
53 "ATI RV350",
54 "ATI RV370",
55 "ATI RV380",
56 "ATI RS400",
57 "ATI RC410",
58 "ATI RS480",
59 "ATI R420",
60 "ATI R423",
61 "ATI R430",
62 "ATI R480",
63 "ATI R481",
64 "ATI RV410",
65 "ATI RS600",
66 "ATI RS690",
67 "ATI RS740",
68 "ATI RV515",
69 "ATI R520",
70 "ATI RV530",
71 "ATI R580",
72 "ATI RV560",
73 "ATI RV570"
74 };
75
76 static const char* r300_get_name(struct pipe_screen* pscreen)
77 {
78 struct r300_screen* r300screen = r300_screen(pscreen);
79
80 return chip_families[r300screen->caps.family];
81 }
82
83 static int r300_get_param(struct pipe_screen* pscreen, enum pipe_cap param)
84 {
85 struct r300_screen* r300screen = r300_screen(pscreen);
86 boolean is_r500 = r300screen->caps.is_r500;
87
88 switch (param) {
89 /* Supported features (boolean caps). */
90 case PIPE_CAP_NPOT_TEXTURES:
91 case PIPE_CAP_TWO_SIDED_STENCIL:
92 case PIPE_CAP_ANISOTROPIC_FILTER:
93 case PIPE_CAP_POINT_SPRITE:
94 case PIPE_CAP_OCCLUSION_QUERY:
95 case PIPE_CAP_TEXTURE_SHADOW_MAP:
96 case PIPE_CAP_TEXTURE_MIRROR_CLAMP:
97 case PIPE_CAP_BLEND_EQUATION_SEPARATE:
98 case PIPE_CAP_VERTEX_ELEMENT_INSTANCE_DIVISOR:
99 case PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT:
100 case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER:
101 case PIPE_CAP_CONDITIONAL_RENDER:
102 case PIPE_CAP_TEXTURE_BARRIER:
103 case PIPE_CAP_TGSI_CAN_COMPACT_VARYINGS:
104 case PIPE_CAP_TGSI_CAN_COMPACT_CONSTANTS:
105 case PIPE_CAP_VERTEX_COLOR_CLAMPED:
106 return 1;
107
108 case PIPE_CAP_GLSL_FEATURE_LEVEL:
109 return 120;
110
111 /* r300 cannot do swizzling of compressed textures. Supported otherwise. */
112 case PIPE_CAP_TEXTURE_SWIZZLE:
113 return util_format_s3tc_enabled ? r300screen->caps.dxtc_swizzle : 1;
114
115 /* Supported on r500 only. */
116 case PIPE_CAP_VERTEX_COLOR_UNCLAMPED:
117 case PIPE_CAP_MIXED_COLORBUFFER_FORMATS:
118 case PIPE_CAP_SM3:
119 return is_r500 ? 1 : 0;
120
121 /* Unsupported features. */
122 case PIPE_CAP_TIMER_QUERY:
123 case PIPE_CAP_DUAL_SOURCE_BLEND:
124 case PIPE_CAP_INDEP_BLEND_ENABLE:
125 case PIPE_CAP_INDEP_BLEND_FUNC:
126 case PIPE_CAP_DEPTH_CLIP_DISABLE:
127 case PIPE_CAP_DEPTHSTENCIL_CLEAR_SEPARATE:
128 case PIPE_CAP_SHADER_STENCIL_EXPORT:
129 case PIPE_CAP_MAX_TEXTURE_ARRAY_LAYERS:
130 case PIPE_CAP_TGSI_INSTANCEID:
131 case PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT:
132 case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER:
133 case PIPE_CAP_SEAMLESS_CUBE_MAP:
134 case PIPE_CAP_SEAMLESS_CUBE_MAP_PER_TEXTURE:
135 case PIPE_CAP_SCALED_RESOLVE:
136 case PIPE_CAP_MIN_TEXEL_OFFSET:
137 case PIPE_CAP_MAX_TEXEL_OFFSET:
138 case PIPE_CAP_MAX_STREAM_OUTPUT_BUFFERS:
139 case PIPE_CAP_MAX_STREAM_OUTPUT_SEPARATE_COMPONENTS:
140 case PIPE_CAP_MAX_STREAM_OUTPUT_INTERLEAVED_COMPONENTS:
141 case PIPE_CAP_STREAM_OUTPUT_PAUSE_RESUME:
142 case PIPE_CAP_FRAGMENT_COLOR_CLAMPED:
143 return 0;
144
145 /* SWTCL-only features. */
146 case PIPE_CAP_PRIMITIVE_RESTART:
147 return !r300screen->caps.has_tcl;
148
149 /* Texturing. */
150 case PIPE_CAP_MAX_COMBINED_SAMPLERS:
151 return r300screen->caps.num_tex_units;
152 case PIPE_CAP_MAX_TEXTURE_2D_LEVELS:
153 case PIPE_CAP_MAX_TEXTURE_3D_LEVELS:
154 case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS:
155 /* 13 == 4096, 12 == 2048 */
156 return is_r500 ? 13 : 12;
157
158 /* Render targets. */
159 case PIPE_CAP_MAX_RENDER_TARGETS:
160 return 4;
161 }
162 return 0;
163 }
164
165 static int r300_get_shader_param(struct pipe_screen *pscreen, unsigned shader, enum pipe_shader_cap param)
166 {
167 struct r300_screen* r300screen = r300_screen(pscreen);
168 boolean is_r400 = r300screen->caps.is_r400;
169 boolean is_r500 = r300screen->caps.is_r500;
170
171 switch (shader) {
172 case PIPE_SHADER_FRAGMENT:
173 switch (param)
174 {
175 case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
176 return is_r500 || is_r400 ? 512 : 96;
177 case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
178 return is_r500 || is_r400 ? 512 : 64;
179 case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
180 return is_r500 || is_r400 ? 512 : 32;
181 case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
182 return is_r500 ? 511 : 4;
183 case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:
184 return is_r500 ? 64 : 0; /* Actually unlimited on r500. */
185 /* Fragment shader limits. */
186 case PIPE_SHADER_CAP_MAX_INPUTS:
187 /* 2 colors + 8 texcoords are always supported
188 * (minus fog and wpos).
189 *
190 * R500 has the ability to turn 3rd and 4th color into
191 * additional texcoords but there is no two-sided color
192 * selection then. However the facing bit can be used instead. */
193 return 10;
194 case PIPE_SHADER_CAP_MAX_CONSTS:
195 return is_r500 ? 256 : 32;
196 case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
197 return 1;
198 case PIPE_SHADER_CAP_MAX_TEMPS:
199 return is_r500 ? 128 : is_r400 ? 64 : 32;
200 case PIPE_SHADER_CAP_MAX_PREDS:
201 return is_r500 ? 1 : 0;
202 case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
203 return r300screen->caps.num_tex_units;
204 case PIPE_SHADER_CAP_MAX_ADDRS:
205 case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
206 case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
207 case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
208 case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
209 case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
210 case PIPE_SHADER_CAP_SUBROUTINES:
211 case PIPE_SHADER_CAP_INTEGERS:
212 case PIPE_SHADER_CAP_OUTPUT_READ:
213 return 0;
214 }
215 break;
216 case PIPE_SHADER_VERTEX:
217 switch (param)
218 {
219 case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
220 return 0;
221 default:;
222 }
223
224 if (!r300screen->caps.has_tcl) {
225 return draw_get_shader_param(shader, param);
226 }
227
228 switch (param)
229 {
230 case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
231 case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
232 return is_r500 ? 1024 : 256;
233 case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:
234 return is_r500 ? 4 : 0; /* For loops; not sure about conditionals. */
235 case PIPE_SHADER_CAP_MAX_INPUTS:
236 return 16;
237 case PIPE_SHADER_CAP_MAX_CONSTS:
238 return 256;
239 case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
240 return 1;
241 case PIPE_SHADER_CAP_MAX_TEMPS:
242 return 32;
243 case PIPE_SHADER_CAP_MAX_ADDRS:
244 return 1; /* XXX guessed */
245 case PIPE_SHADER_CAP_MAX_PREDS:
246 return is_r500 ? 4 : 0; /* XXX guessed. */
247 case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
248 return 1;
249 case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
250 case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
251 case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
252 case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
253 case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
254 case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
255 case PIPE_SHADER_CAP_SUBROUTINES:
256 case PIPE_SHADER_CAP_INTEGERS:
257 case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
258 case PIPE_SHADER_CAP_OUTPUT_READ:
259 return 0;
260 }
261 break;
262 }
263 return 0;
264 }
265
266 static float r300_get_paramf(struct pipe_screen* pscreen,
267 enum pipe_capf param)
268 {
269 struct r300_screen* r300screen = r300_screen(pscreen);
270
271 switch (param) {
272 case PIPE_CAPF_MAX_LINE_WIDTH:
273 case PIPE_CAPF_MAX_LINE_WIDTH_AA:
274 case PIPE_CAPF_MAX_POINT_WIDTH:
275 case PIPE_CAPF_MAX_POINT_WIDTH_AA:
276 /* The maximum dimensions of the colorbuffer are our practical
277 * rendering limits. 2048 pixels should be enough for anybody. */
278 if (r300screen->caps.is_r500) {
279 return 4096.0f;
280 } else if (r300screen->caps.is_r400) {
281 return 4021.0f;
282 } else {
283 return 2560.0f;
284 }
285 case PIPE_CAPF_MAX_TEXTURE_ANISOTROPY:
286 return 16.0f;
287 case PIPE_CAPF_MAX_TEXTURE_LOD_BIAS:
288 return 16.0f;
289 case PIPE_CAPF_GUARD_BAND_LEFT:
290 case PIPE_CAPF_GUARD_BAND_TOP:
291 case PIPE_CAPF_GUARD_BAND_RIGHT:
292 case PIPE_CAPF_GUARD_BAND_BOTTOM:
293 /* XXX I don't know what these should be but the least we can do is
294 * silence the potential error message */
295 return 0.0f;
296 default:
297 debug_printf("r300: Warning: Unknown CAP %d in get_paramf.\n",
298 param);
299 return 0.0f;
300 }
301 }
302
303 static int r300_get_video_param(struct pipe_screen *screen,
304 enum pipe_video_profile profile,
305 enum pipe_video_cap param)
306 {
307 switch (param) {
308 case PIPE_VIDEO_CAP_SUPPORTED:
309 return vl_profile_supported(screen, profile);
310 case PIPE_VIDEO_CAP_NPOT_TEXTURES:
311 return 0;
312 case PIPE_VIDEO_CAP_MAX_WIDTH:
313 case PIPE_VIDEO_CAP_MAX_HEIGHT:
314 return vl_video_buffer_max_size(screen);
315 case PIPE_VIDEO_CAP_PREFERED_FORMAT:
316 return PIPE_FORMAT_NV12;
317 case PIPE_VIDEO_CAP_PREFERS_INTERLACED:
318 return false;
319 case PIPE_VIDEO_CAP_SUPPORTS_INTERLACED:
320 return false;
321 case PIPE_VIDEO_CAP_SUPPORTS_PROGRESSIVE:
322 return true;
323 default:
324 return 0;
325 }
326 }
327
328 static boolean r300_is_format_supported(struct pipe_screen* screen,
329 enum pipe_format format,
330 enum pipe_texture_target target,
331 unsigned sample_count,
332 unsigned usage)
333 {
334 uint32_t retval = 0;
335 boolean drm_2_8_0 = r300_screen(screen)->info.drm_minor >= 8;
336 boolean is_r500 = r300_screen(screen)->caps.is_r500;
337 boolean is_r400 = r300_screen(screen)->caps.is_r400;
338 boolean is_color2101010 = format == PIPE_FORMAT_R10G10B10A2_UNORM ||
339 format == PIPE_FORMAT_R10G10B10X2_SNORM ||
340 format == PIPE_FORMAT_B10G10R10A2_UNORM ||
341 format == PIPE_FORMAT_R10SG10SB10SA2U_NORM;
342 boolean is_ati1n = format == PIPE_FORMAT_RGTC1_UNORM ||
343 format == PIPE_FORMAT_RGTC1_SNORM ||
344 format == PIPE_FORMAT_LATC1_UNORM ||
345 format == PIPE_FORMAT_LATC1_SNORM;
346 boolean is_ati2n = format == PIPE_FORMAT_RGTC2_UNORM ||
347 format == PIPE_FORMAT_RGTC2_SNORM ||
348 format == PIPE_FORMAT_LATC2_UNORM ||
349 format == PIPE_FORMAT_LATC2_SNORM;
350 boolean is_x16f_xy16f = format == PIPE_FORMAT_R16_FLOAT ||
351 format == PIPE_FORMAT_R16G16_FLOAT ||
352 format == PIPE_FORMAT_A16_FLOAT ||
353 format == PIPE_FORMAT_L16_FLOAT ||
354 format == PIPE_FORMAT_L16A16_FLOAT ||
355 format == PIPE_FORMAT_I16_FLOAT;
356 boolean is_half_float = format == PIPE_FORMAT_R16_FLOAT ||
357 format == PIPE_FORMAT_R16G16_FLOAT ||
358 format == PIPE_FORMAT_R16G16B16_FLOAT ||
359 format == PIPE_FORMAT_R16G16B16A16_FLOAT;
360 boolean is_fixed = format == PIPE_FORMAT_R32_FIXED ||
361 format == PIPE_FORMAT_R32G32_FIXED ||
362 format == PIPE_FORMAT_R32G32B32_FIXED ||
363 format == PIPE_FORMAT_R32G32B32A32_FIXED;
364
365 if (!util_format_is_supported(format, usage))
366 return FALSE;
367
368 /* Check multisampling support. */
369 switch (sample_count) {
370 case 0:
371 case 1:
372 break;
373 case 2:
374 case 3:
375 case 4:
376 case 6:
377 return FALSE;
378 #if 0
379 if (usage != PIPE_BIND_RENDER_TARGET ||
380 !util_format_is_rgba8_variant(
381 util_format_description(format))) {
382 return FALSE;
383 }
384 #endif
385 break;
386 default:
387 return FALSE;
388 }
389
390 /* Check sampler format support. */
391 if ((usage & PIPE_BIND_SAMPLER_VIEW) &&
392 /* ATI1N is r5xx-only. */
393 (is_r500 || !is_ati1n) &&
394 /* ATI2N is supported on r4xx-r5xx. */
395 (is_r400 || is_r500 || !is_ati2n) &&
396 /* R16F and RG16F texture support was added in as late as DRM 2.8.0 */
397 (drm_2_8_0 || !is_x16f_xy16f) &&
398 r300_is_sampler_format_supported(format)) {
399 retval |= PIPE_BIND_SAMPLER_VIEW;
400 }
401
402 /* Check colorbuffer format support. */
403 if ((usage & (PIPE_BIND_RENDER_TARGET |
404 PIPE_BIND_DISPLAY_TARGET |
405 PIPE_BIND_SCANOUT |
406 PIPE_BIND_SHARED)) &&
407 /* 2101010 cannot be rendered to on non-r5xx. */
408 (!is_color2101010 || (is_r500 && drm_2_8_0)) &&
409 r300_is_colorbuffer_format_supported(format)) {
410 retval |= usage &
411 (PIPE_BIND_RENDER_TARGET |
412 PIPE_BIND_DISPLAY_TARGET |
413 PIPE_BIND_SCANOUT |
414 PIPE_BIND_SHARED);
415 }
416
417 /* Check depth-stencil format support. */
418 if (usage & PIPE_BIND_DEPTH_STENCIL &&
419 r300_is_zs_format_supported(format)) {
420 retval |= PIPE_BIND_DEPTH_STENCIL;
421 }
422
423 /* Check vertex buffer format support. */
424 if (usage & PIPE_BIND_VERTEX_BUFFER &&
425 /* Half float is supported on >= R400. */
426 (is_r400 || is_r500 || !is_half_float) &&
427 /* We have a fallback for FIXED. */
428 (is_fixed || r300_translate_vertex_data_type(format) != R300_INVALID_FORMAT)) {
429 retval |= PIPE_BIND_VERTEX_BUFFER;
430 }
431
432 /* Transfers are always supported. */
433 if (usage & PIPE_BIND_TRANSFER_READ)
434 retval |= PIPE_BIND_TRANSFER_READ;
435 if (usage & PIPE_BIND_TRANSFER_WRITE)
436 retval |= PIPE_BIND_TRANSFER_WRITE;
437
438 return retval == usage;
439 }
440
441 static void r300_destroy_screen(struct pipe_screen* pscreen)
442 {
443 struct r300_screen* r300screen = r300_screen(pscreen);
444 struct radeon_winsys *rws = radeon_winsys(pscreen);
445
446 util_slab_destroy(&r300screen->pool_buffers);
447 pipe_mutex_destroy(r300screen->num_contexts_mutex);
448
449 if (rws)
450 rws->destroy(rws);
451
452 FREE(r300screen);
453 }
454
455 static void r300_fence_reference(struct pipe_screen *screen,
456 struct pipe_fence_handle **ptr,
457 struct pipe_fence_handle *fence)
458 {
459 pb_reference((struct pb_buffer**)ptr,
460 (struct pb_buffer*)fence);
461 }
462
463 static boolean r300_fence_signalled(struct pipe_screen *screen,
464 struct pipe_fence_handle *fence)
465 {
466 struct radeon_winsys *rws = r300_screen(screen)->rws;
467 struct pb_buffer *rfence = (struct pb_buffer*)fence;
468
469 return !rws->buffer_is_busy(rfence, RADEON_USAGE_READWRITE);
470 }
471
472 static boolean r300_fence_finish(struct pipe_screen *screen,
473 struct pipe_fence_handle *fence,
474 uint64_t timeout)
475 {
476 struct radeon_winsys *rws = r300_screen(screen)->rws;
477 struct pb_buffer *rfence = (struct pb_buffer*)fence;
478
479 if (timeout != PIPE_TIMEOUT_INFINITE) {
480 int64_t start_time = os_time_get();
481
482 /* Convert to microseconds. */
483 timeout /= 1000;
484
485 /* Wait in a loop. */
486 while (rws->buffer_is_busy(rfence, RADEON_USAGE_READWRITE)) {
487 if (os_time_get() - start_time >= timeout) {
488 return FALSE;
489 }
490 os_time_sleep(10);
491 }
492 return TRUE;
493 }
494
495 rws->buffer_wait(rfence, RADEON_USAGE_READWRITE);
496 return TRUE;
497 }
498
499 struct pipe_screen* r300_screen_create(struct radeon_winsys *rws)
500 {
501 struct r300_screen *r300screen = CALLOC_STRUCT(r300_screen);
502
503 if (!r300screen) {
504 FREE(r300screen);
505 return NULL;
506 }
507
508 rws->query_info(rws, &r300screen->info);
509
510 r300_init_debug(r300screen);
511 r300_parse_chipset(r300screen->info.pci_id, &r300screen->caps);
512
513 if (SCREEN_DBG_ON(r300screen, DBG_NO_ZMASK))
514 r300screen->caps.zmask_ram = 0;
515 if (SCREEN_DBG_ON(r300screen, DBG_NO_HIZ))
516 r300screen->caps.hiz_ram = 0;
517
518 if (r300screen->info.drm_minor < 8)
519 r300screen->caps.has_us_format = FALSE;
520
521 pipe_mutex_init(r300screen->num_contexts_mutex);
522
523 util_slab_create(&r300screen->pool_buffers,
524 sizeof(struct r300_resource), 64,
525 UTIL_SLAB_SINGLETHREADED);
526
527 r300screen->rws = rws;
528 r300screen->screen.winsys = (struct pipe_winsys*)rws;
529 r300screen->screen.destroy = r300_destroy_screen;
530 r300screen->screen.get_name = r300_get_name;
531 r300screen->screen.get_vendor = r300_get_vendor;
532 r300screen->screen.get_param = r300_get_param;
533 r300screen->screen.get_shader_param = r300_get_shader_param;
534 r300screen->screen.get_paramf = r300_get_paramf;
535 r300screen->screen.get_video_param = r300_get_video_param;
536 r300screen->screen.is_format_supported = r300_is_format_supported;
537 r300screen->screen.is_video_format_supported = vl_video_buffer_is_format_supported;
538 r300screen->screen.context_create = r300_create_context;
539 r300screen->screen.fence_reference = r300_fence_reference;
540 r300screen->screen.fence_signalled = r300_fence_signalled;
541 r300screen->screen.fence_finish = r300_fence_finish;
542
543 r300_init_screen_resource_functions(r300screen);
544
545 util_format_s3tc_init();
546
547 return &r300screen->screen;
548 }