gallium: interface changes necessary to implement transform feedback (v5)
[mesa.git] / src / gallium / drivers / r300 / r300_screen.c
1 /*
2 * Copyright 2008 Corbin Simpson <MostAwesomeDude@gmail.com>
3 * Copyright 2010 Marek Olšák <maraeo@gmail.com>
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * on the rights to use, copy, modify, merge, publish, distribute, sub
9 * license, and/or sell copies of the Software, and to permit persons to whom
10 * the Software is furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
14 * Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
20 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
21 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
22 * USE OR OTHER DEALINGS IN THE SOFTWARE. */
23
24 #include "util/u_format.h"
25 #include "util/u_format_s3tc.h"
26 #include "util/u_memory.h"
27 #include "os/os_time.h"
28 #include "vl/vl_decoder.h"
29 #include "vl/vl_video_buffer.h"
30
31 #include "r300_context.h"
32 #include "r300_texture.h"
33 #include "r300_screen_buffer.h"
34 #include "r300_state_inlines.h"
35 #include "r300_public.h"
36
37 #include "draw/draw_context.h"
38
39 /* Return the identifier behind whom the brave coders responsible for this
40 * amalgamation of code, sweat, and duct tape, routinely obscure their names.
41 *
42 * ...I should have just put "Corbin Simpson", but I'm not that cool.
43 *
44 * (Or egotistical. Yet.) */
45 static const char* r300_get_vendor(struct pipe_screen* pscreen)
46 {
47 return "X.Org R300 Project";
48 }
49
50 static const char* chip_families[] = {
51 "ATI R300",
52 "ATI R350",
53 "ATI RV350",
54 "ATI RV370",
55 "ATI RV380",
56 "ATI RS400",
57 "ATI RC410",
58 "ATI RS480",
59 "ATI R420",
60 "ATI R423",
61 "ATI R430",
62 "ATI R480",
63 "ATI R481",
64 "ATI RV410",
65 "ATI RS600",
66 "ATI RS690",
67 "ATI RS740",
68 "ATI RV515",
69 "ATI R520",
70 "ATI RV530",
71 "ATI R580",
72 "ATI RV560",
73 "ATI RV570"
74 };
75
76 static const char* r300_get_name(struct pipe_screen* pscreen)
77 {
78 struct r300_screen* r300screen = r300_screen(pscreen);
79
80 return chip_families[r300screen->caps.family];
81 }
82
83 static int r300_get_param(struct pipe_screen* pscreen, enum pipe_cap param)
84 {
85 struct r300_screen* r300screen = r300_screen(pscreen);
86 boolean is_r500 = r300screen->caps.is_r500;
87
88 switch (param) {
89 /* Supported features (boolean caps). */
90 case PIPE_CAP_NPOT_TEXTURES:
91 case PIPE_CAP_TWO_SIDED_STENCIL:
92 case PIPE_CAP_ANISOTROPIC_FILTER:
93 case PIPE_CAP_POINT_SPRITE:
94 case PIPE_CAP_OCCLUSION_QUERY:
95 case PIPE_CAP_TEXTURE_SHADOW_MAP:
96 case PIPE_CAP_TEXTURE_MIRROR_CLAMP:
97 case PIPE_CAP_BLEND_EQUATION_SEPARATE:
98 case PIPE_CAP_VERTEX_ELEMENT_INSTANCE_DIVISOR:
99 case PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT:
100 case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER:
101 case PIPE_CAP_CONDITIONAL_RENDER:
102 case PIPE_CAP_TEXTURE_BARRIER:
103 case PIPE_CAP_TGSI_CAN_COMPACT_VARYINGS:
104 case PIPE_CAP_TGSI_CAN_COMPACT_CONSTANTS:
105 return 1;
106
107 /* r300 cannot do swizzling of compressed textures. Supported otherwise. */
108 case PIPE_CAP_TEXTURE_SWIZZLE:
109 return util_format_s3tc_enabled ? r300screen->caps.dxtc_swizzle : 1;
110
111 /* Supported on r500 only. */
112 case PIPE_CAP_FRAGMENT_COLOR_CLAMP_CONTROL:
113 case PIPE_CAP_MIXED_COLORBUFFER_FORMATS:
114 case PIPE_CAP_SM3:
115 return is_r500 ? 1 : 0;
116
117 /* Unsupported features. */
118 case PIPE_CAP_TIMER_QUERY:
119 case PIPE_CAP_DUAL_SOURCE_BLEND:
120 case PIPE_CAP_INDEP_BLEND_ENABLE:
121 case PIPE_CAP_INDEP_BLEND_FUNC:
122 case PIPE_CAP_DEPTH_CLAMP:
123 case PIPE_CAP_DEPTHSTENCIL_CLEAR_SEPARATE:
124 case PIPE_CAP_SHADER_STENCIL_EXPORT:
125 case PIPE_CAP_MAX_TEXTURE_ARRAY_LAYERS:
126 case PIPE_CAP_TGSI_INSTANCEID:
127 case PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT:
128 case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER:
129 case PIPE_CAP_SEAMLESS_CUBE_MAP:
130 case PIPE_CAP_SEAMLESS_CUBE_MAP_PER_TEXTURE:
131 case PIPE_CAP_SCALED_RESOLVE:
132 case PIPE_CAP_MIN_TEXEL_OFFSET:
133 case PIPE_CAP_MAX_TEXEL_OFFSET:
134 case PIPE_CAP_MAX_STREAM_OUTPUT_BUFFERS:
135 return 0;
136
137 /* SWTCL-only features. */
138 case PIPE_CAP_PRIMITIVE_RESTART:
139 return !r300screen->caps.has_tcl;
140
141 /* Texturing. */
142 case PIPE_CAP_MAX_COMBINED_SAMPLERS:
143 return r300screen->caps.num_tex_units;
144 case PIPE_CAP_MAX_TEXTURE_2D_LEVELS:
145 case PIPE_CAP_MAX_TEXTURE_3D_LEVELS:
146 case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS:
147 /* 13 == 4096, 12 == 2048 */
148 return is_r500 ? 13 : 12;
149
150 /* Render targets. */
151 case PIPE_CAP_MAX_RENDER_TARGETS:
152 return 4;
153 }
154 return 0;
155 }
156
157 static int r300_get_shader_param(struct pipe_screen *pscreen, unsigned shader, enum pipe_shader_cap param)
158 {
159 struct r300_screen* r300screen = r300_screen(pscreen);
160 boolean is_r400 = r300screen->caps.is_r400;
161 boolean is_r500 = r300screen->caps.is_r500;
162
163 switch (shader) {
164 case PIPE_SHADER_FRAGMENT:
165 switch (param)
166 {
167 case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
168 return is_r500 || is_r400 ? 512 : 96;
169 case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
170 return is_r500 || is_r400 ? 512 : 64;
171 case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
172 return is_r500 || is_r400 ? 512 : 32;
173 case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
174 return is_r500 ? 511 : 4;
175 case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:
176 return is_r500 ? 64 : 0; /* Actually unlimited on r500. */
177 /* Fragment shader limits. */
178 case PIPE_SHADER_CAP_MAX_INPUTS:
179 /* 2 colors + 8 texcoords are always supported
180 * (minus fog and wpos).
181 *
182 * R500 has the ability to turn 3rd and 4th color into
183 * additional texcoords but there is no two-sided color
184 * selection then. However the facing bit can be used instead. */
185 return 10;
186 case PIPE_SHADER_CAP_MAX_CONSTS:
187 return is_r500 ? 256 : 32;
188 case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
189 return 1;
190 case PIPE_SHADER_CAP_MAX_TEMPS:
191 return is_r500 ? 128 : is_r400 ? 64 : 32;
192 case PIPE_SHADER_CAP_MAX_PREDS:
193 return is_r500 ? 1 : 0;
194 case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
195 return r300screen->caps.num_tex_units;
196 case PIPE_SHADER_CAP_MAX_ADDRS:
197 case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
198 case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
199 case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
200 case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
201 case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
202 case PIPE_SHADER_CAP_SUBROUTINES:
203 case PIPE_SHADER_CAP_INTEGERS:
204 case PIPE_SHADER_CAP_OUTPUT_READ:
205 return 0;
206 }
207 break;
208 case PIPE_SHADER_VERTEX:
209 switch (param)
210 {
211 case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
212 return 0;
213 default:;
214 }
215
216 if (!r300screen->caps.has_tcl) {
217 return draw_get_shader_param(shader, param);
218 }
219
220 switch (param)
221 {
222 case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
223 case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
224 return is_r500 ? 1024 : 256;
225 case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:
226 return is_r500 ? 4 : 0; /* For loops; not sure about conditionals. */
227 case PIPE_SHADER_CAP_MAX_INPUTS:
228 return 16;
229 case PIPE_SHADER_CAP_MAX_CONSTS:
230 return 256;
231 case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
232 return 1;
233 case PIPE_SHADER_CAP_MAX_TEMPS:
234 return 32;
235 case PIPE_SHADER_CAP_MAX_ADDRS:
236 return 1; /* XXX guessed */
237 case PIPE_SHADER_CAP_MAX_PREDS:
238 return is_r500 ? 4 : 0; /* XXX guessed. */
239 case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
240 return 1;
241 case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
242 case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
243 case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
244 case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
245 case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
246 case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
247 case PIPE_SHADER_CAP_SUBROUTINES:
248 case PIPE_SHADER_CAP_INTEGERS:
249 case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
250 case PIPE_SHADER_CAP_OUTPUT_READ:
251 return 0;
252 }
253 break;
254 }
255 return 0;
256 }
257
258 static float r300_get_paramf(struct pipe_screen* pscreen,
259 enum pipe_capf param)
260 {
261 struct r300_screen* r300screen = r300_screen(pscreen);
262
263 switch (param) {
264 case PIPE_CAPF_MAX_LINE_WIDTH:
265 case PIPE_CAPF_MAX_LINE_WIDTH_AA:
266 case PIPE_CAPF_MAX_POINT_WIDTH:
267 case PIPE_CAPF_MAX_POINT_WIDTH_AA:
268 /* The maximum dimensions of the colorbuffer are our practical
269 * rendering limits. 2048 pixels should be enough for anybody. */
270 if (r300screen->caps.is_r500) {
271 return 4096.0f;
272 } else if (r300screen->caps.is_r400) {
273 return 4021.0f;
274 } else {
275 return 2560.0f;
276 }
277 case PIPE_CAPF_MAX_TEXTURE_ANISOTROPY:
278 return 16.0f;
279 case PIPE_CAPF_MAX_TEXTURE_LOD_BIAS:
280 return 16.0f;
281 case PIPE_CAPF_GUARD_BAND_LEFT:
282 case PIPE_CAPF_GUARD_BAND_TOP:
283 case PIPE_CAPF_GUARD_BAND_RIGHT:
284 case PIPE_CAPF_GUARD_BAND_BOTTOM:
285 /* XXX I don't know what these should be but the least we can do is
286 * silence the potential error message */
287 return 0.0f;
288 default:
289 debug_printf("r300: Warning: Unknown CAP %d in get_paramf.\n",
290 param);
291 return 0.0f;
292 }
293 }
294
295 static int r300_get_video_param(struct pipe_screen *screen,
296 enum pipe_video_profile profile,
297 enum pipe_video_cap param)
298 {
299 switch (param) {
300 case PIPE_VIDEO_CAP_SUPPORTED:
301 return vl_profile_supported(screen, profile);
302 case PIPE_VIDEO_CAP_NPOT_TEXTURES:
303 return 0;
304 case PIPE_VIDEO_CAP_MAX_WIDTH:
305 case PIPE_VIDEO_CAP_MAX_HEIGHT:
306 return vl_video_buffer_max_size(screen);
307 case PIPE_VIDEO_CAP_NUM_BUFFERS_DESIRED:
308 return vl_num_buffers_desired(screen, profile);
309 default:
310 return 0;
311 }
312 }
313
314 static boolean r300_is_format_supported(struct pipe_screen* screen,
315 enum pipe_format format,
316 enum pipe_texture_target target,
317 unsigned sample_count,
318 unsigned usage)
319 {
320 uint32_t retval = 0;
321 boolean drm_2_8_0 = r300_screen(screen)->info.drm_minor >= 8;
322 boolean is_r500 = r300_screen(screen)->caps.is_r500;
323 boolean is_r400 = r300_screen(screen)->caps.is_r400;
324 boolean is_color2101010 = format == PIPE_FORMAT_R10G10B10A2_UNORM ||
325 format == PIPE_FORMAT_R10G10B10X2_SNORM ||
326 format == PIPE_FORMAT_B10G10R10A2_UNORM ||
327 format == PIPE_FORMAT_R10SG10SB10SA2U_NORM;
328 boolean is_ati1n = format == PIPE_FORMAT_RGTC1_UNORM ||
329 format == PIPE_FORMAT_RGTC1_SNORM ||
330 format == PIPE_FORMAT_LATC1_UNORM ||
331 format == PIPE_FORMAT_LATC1_SNORM;
332 boolean is_ati2n = format == PIPE_FORMAT_RGTC2_UNORM ||
333 format == PIPE_FORMAT_RGTC2_SNORM ||
334 format == PIPE_FORMAT_LATC2_UNORM ||
335 format == PIPE_FORMAT_LATC2_SNORM;
336 boolean is_x16f_xy16f = format == PIPE_FORMAT_R16_FLOAT ||
337 format == PIPE_FORMAT_R16G16_FLOAT ||
338 format == PIPE_FORMAT_A16_FLOAT ||
339 format == PIPE_FORMAT_L16_FLOAT ||
340 format == PIPE_FORMAT_L16A16_FLOAT ||
341 format == PIPE_FORMAT_I16_FLOAT;
342 boolean is_half_float = format == PIPE_FORMAT_R16_FLOAT ||
343 format == PIPE_FORMAT_R16G16_FLOAT ||
344 format == PIPE_FORMAT_R16G16B16_FLOAT ||
345 format == PIPE_FORMAT_R16G16B16A16_FLOAT;
346 boolean is_fixed = format == PIPE_FORMAT_R32_FIXED ||
347 format == PIPE_FORMAT_R32G32_FIXED ||
348 format == PIPE_FORMAT_R32G32B32_FIXED ||
349 format == PIPE_FORMAT_R32G32B32A32_FIXED;
350
351 if (!util_format_is_supported(format, usage))
352 return FALSE;
353
354 /* Check multisampling support. */
355 switch (sample_count) {
356 case 0:
357 case 1:
358 break;
359 case 2:
360 case 3:
361 case 4:
362 case 6:
363 return FALSE;
364 #if 0
365 if (usage != PIPE_BIND_RENDER_TARGET ||
366 !util_format_is_rgba8_variant(
367 util_format_description(format))) {
368 return FALSE;
369 }
370 #endif
371 break;
372 default:
373 return FALSE;
374 }
375
376 /* Check sampler format support. */
377 if ((usage & PIPE_BIND_SAMPLER_VIEW) &&
378 /* ATI1N is r5xx-only. */
379 (is_r500 || !is_ati1n) &&
380 /* ATI2N is supported on r4xx-r5xx. */
381 (is_r400 || is_r500 || !is_ati2n) &&
382 /* R16F and RG16F texture support was added in as late as DRM 2.8.0 */
383 (drm_2_8_0 || !is_x16f_xy16f) &&
384 r300_is_sampler_format_supported(format)) {
385 retval |= PIPE_BIND_SAMPLER_VIEW;
386 }
387
388 /* Check colorbuffer format support. */
389 if ((usage & (PIPE_BIND_RENDER_TARGET |
390 PIPE_BIND_DISPLAY_TARGET |
391 PIPE_BIND_SCANOUT |
392 PIPE_BIND_SHARED)) &&
393 /* 2101010 cannot be rendered to on non-r5xx. */
394 (!is_color2101010 || (is_r500 && drm_2_8_0)) &&
395 r300_is_colorbuffer_format_supported(format)) {
396 retval |= usage &
397 (PIPE_BIND_RENDER_TARGET |
398 PIPE_BIND_DISPLAY_TARGET |
399 PIPE_BIND_SCANOUT |
400 PIPE_BIND_SHARED);
401 }
402
403 /* Check depth-stencil format support. */
404 if (usage & PIPE_BIND_DEPTH_STENCIL &&
405 r300_is_zs_format_supported(format)) {
406 retval |= PIPE_BIND_DEPTH_STENCIL;
407 }
408
409 /* Check vertex buffer format support. */
410 if (usage & PIPE_BIND_VERTEX_BUFFER &&
411 /* Half float is supported on >= R400. */
412 (is_r400 || is_r500 || !is_half_float) &&
413 /* We have a fallback for FIXED. */
414 (is_fixed || r300_translate_vertex_data_type(format) != R300_INVALID_FORMAT)) {
415 retval |= PIPE_BIND_VERTEX_BUFFER;
416 }
417
418 /* Transfers are always supported. */
419 if (usage & PIPE_BIND_TRANSFER_READ)
420 retval |= PIPE_BIND_TRANSFER_READ;
421 if (usage & PIPE_BIND_TRANSFER_WRITE)
422 retval |= PIPE_BIND_TRANSFER_WRITE;
423
424 return retval == usage;
425 }
426
427 static void r300_destroy_screen(struct pipe_screen* pscreen)
428 {
429 struct r300_screen* r300screen = r300_screen(pscreen);
430 struct radeon_winsys *rws = radeon_winsys(pscreen);
431
432 util_slab_destroy(&r300screen->pool_buffers);
433 pipe_mutex_destroy(r300screen->num_contexts_mutex);
434
435 if (rws)
436 rws->destroy(rws);
437
438 FREE(r300screen);
439 }
440
441 static void r300_fence_reference(struct pipe_screen *screen,
442 struct pipe_fence_handle **ptr,
443 struct pipe_fence_handle *fence)
444 {
445 pb_reference((struct pb_buffer**)ptr,
446 (struct pb_buffer*)fence);
447 }
448
449 static boolean r300_fence_signalled(struct pipe_screen *screen,
450 struct pipe_fence_handle *fence)
451 {
452 struct radeon_winsys *rws = r300_screen(screen)->rws;
453 struct pb_buffer *rfence = (struct pb_buffer*)fence;
454
455 return !rws->buffer_is_busy(rfence, RADEON_USAGE_READWRITE);
456 }
457
458 static boolean r300_fence_finish(struct pipe_screen *screen,
459 struct pipe_fence_handle *fence,
460 uint64_t timeout)
461 {
462 struct radeon_winsys *rws = r300_screen(screen)->rws;
463 struct pb_buffer *rfence = (struct pb_buffer*)fence;
464
465 if (timeout != PIPE_TIMEOUT_INFINITE) {
466 int64_t start_time = os_time_get();
467
468 /* Convert to microseconds. */
469 timeout /= 1000;
470
471 /* Wait in a loop. */
472 while (rws->buffer_is_busy(rfence, RADEON_USAGE_READWRITE)) {
473 if (os_time_get() - start_time >= timeout) {
474 return FALSE;
475 }
476 os_time_sleep(10);
477 }
478 return TRUE;
479 }
480
481 rws->buffer_wait(rfence, RADEON_USAGE_READWRITE);
482 return TRUE;
483 }
484
485 struct pipe_screen* r300_screen_create(struct radeon_winsys *rws)
486 {
487 struct r300_screen *r300screen = CALLOC_STRUCT(r300_screen);
488
489 if (!r300screen) {
490 FREE(r300screen);
491 return NULL;
492 }
493
494 rws->query_info(rws, &r300screen->info);
495
496 r300_init_debug(r300screen);
497 r300_parse_chipset(r300screen->info.pci_id, &r300screen->caps);
498
499 if (SCREEN_DBG_ON(r300screen, DBG_NO_ZMASK))
500 r300screen->caps.zmask_ram = 0;
501 if (SCREEN_DBG_ON(r300screen, DBG_NO_HIZ))
502 r300screen->caps.hiz_ram = 0;
503
504 if (r300screen->info.drm_minor < 8)
505 r300screen->caps.has_us_format = FALSE;
506
507 pipe_mutex_init(r300screen->num_contexts_mutex);
508
509 util_slab_create(&r300screen->pool_buffers,
510 sizeof(struct r300_resource), 64,
511 UTIL_SLAB_SINGLETHREADED);
512
513 r300screen->rws = rws;
514 r300screen->screen.winsys = (struct pipe_winsys*)rws;
515 r300screen->screen.destroy = r300_destroy_screen;
516 r300screen->screen.get_name = r300_get_name;
517 r300screen->screen.get_vendor = r300_get_vendor;
518 r300screen->screen.get_param = r300_get_param;
519 r300screen->screen.get_shader_param = r300_get_shader_param;
520 r300screen->screen.get_paramf = r300_get_paramf;
521 r300screen->screen.get_video_param = r300_get_video_param;
522 r300screen->screen.is_format_supported = r300_is_format_supported;
523 r300screen->screen.is_video_format_supported = vl_video_buffer_is_format_supported;
524 r300screen->screen.context_create = r300_create_context;
525 r300screen->screen.fence_reference = r300_fence_reference;
526 r300screen->screen.fence_signalled = r300_fence_signalled;
527 r300screen->screen.fence_finish = r300_fence_finish;
528
529 r300_init_screen_resource_functions(r300screen);
530
531 util_format_s3tc_init();
532
533 return &r300screen->screen;
534 }