src/gallium/drivers/r300/r300_screen.c

   1 /*
   2  * Copyright 2008 Corbin Simpson <MostAwesomeDude@gmail.com>
   3  * Copyright 2010 Marek Olšák <maraeo@gmail.com>
   4  *
   5  * Permission is hereby granted, free of charge, to any person obtaining a
   6  * copy of this software and associated documentation files (the "Software"),
   7  * to deal in the Software without restriction, including without limitation
   8  * on the rights to use, copy, modify, merge, publish, distribute, sub
   9  * license, and/or sell copies of the Software, and to permit persons to whom
  10  * the Software is furnished to do so, subject to the following conditions:
  11  *
  12  * The above copyright notice and this permission notice (including the next
  13  * paragraph) shall be included in all copies or substantial portions of the
  14  * Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  19  * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
  20  * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
  21  * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
  22  * USE OR OTHER DEALINGS IN THE SOFTWARE. */
  23
  24 #include "util/u_format.h"
  25 #include "util/u_format_s3tc.h"
  26 #include "util/u_memory.h"
  27 #include "os/os_time.h"
  28 #include "vl/vl_decoder.h"
  29 #include "vl/vl_video_buffer.h"
  30
  31 #include "r300_context.h"
  32 #include "r300_texture.h"
  33 #include "r300_screen_buffer.h"
  34 #include "r300_state_inlines.h"
  35 #include "r300_public.h"
  36
  37 #include "draw/draw_context.h"
  38
  39 /* Return the identifier behind whom the brave coders responsible for this
  40  * amalgamation of code, sweat, and duct tape, routinely obscure their names.
  41  *
  42  * ...I should have just put "Corbin Simpson", but I'm not that cool.
  43  *
  44  * (Or egotistical. Yet.) */
  45 static const char* r300_get_vendor(struct pipe_screen* pscreen)
  46 {
  47     return "X.Org R300 Project";
  48 }
  49
  50 static const char* r300_get_device_vendor(struct pipe_screen* pscreen)
  51 {
  52     return "ATI";
  53 }
  54
  55 static const char* chip_families[] = {
  56     "unknown",
  57     "ATI R300",
  58     "ATI R350",
  59     "ATI RV350",
  60     "ATI RV370",
  61     "ATI RV380",
  62     "ATI RS400",
  63     "ATI RC410",
  64     "ATI RS480",
  65     "ATI R420",
  66     "ATI R423",
  67     "ATI R430",
  68     "ATI R480",
  69     "ATI R481",
  70     "ATI RV410",
  71     "ATI RS600",
  72     "ATI RS690",
  73     "ATI RS740",
  74     "ATI RV515",
  75     "ATI R520",
  76     "ATI RV530",
  77     "ATI R580",
  78     "ATI RV560",
  79     "ATI RV570"
  80 };
  81
  82 static const char* r300_get_name(struct pipe_screen* pscreen)
  83 {
  84     struct r300_screen* r300screen = r300_screen(pscreen);
  85
  86     return chip_families[r300screen->caps.family];
  87 }
  88
  89 static int r300_get_param(struct pipe_screen* pscreen, enum pipe_cap param)
  90 {
  91     struct r300_screen* r300screen = r300_screen(pscreen);
  92     boolean is_r500 = r300screen->caps.is_r500;
  93
  94     switch (param) {
  95         /* Supported features (boolean caps). */
  96         case PIPE_CAP_NPOT_TEXTURES:
  97         case PIPE_CAP_MIXED_FRAMEBUFFER_SIZES:
  98         case PIPE_CAP_MIXED_COLOR_DEPTH_BITS:
  99         case PIPE_CAP_TWO_SIDED_STENCIL:
 100         case PIPE_CAP_ANISOTROPIC_FILTER:
 101         case PIPE_CAP_POINT_SPRITE:
 102         case PIPE_CAP_OCCLUSION_QUERY:
 103         case PIPE_CAP_TEXTURE_SHADOW_MAP:
 104         case PIPE_CAP_TEXTURE_MIRROR_CLAMP:
 105         case PIPE_CAP_BLEND_EQUATION_SEPARATE:
 106         case PIPE_CAP_VERTEX_ELEMENT_INSTANCE_DIVISOR:
 107         case PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT:
 108         case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER:
 109         case PIPE_CAP_CONDITIONAL_RENDER:
 110         case PIPE_CAP_TEXTURE_BARRIER:
 111         case PIPE_CAP_TGSI_CAN_COMPACT_CONSTANTS:
 112         case PIPE_CAP_USER_CONSTANT_BUFFERS:
 113         case PIPE_CAP_PREFER_BLIT_BASED_TEXTURE_TRANSFER:
 114         case PIPE_CAP_BUFFER_MAP_PERSISTENT_COHERENT:
 115         case PIPE_CAP_CLIP_HALFZ:
 116         case PIPE_CAP_ALLOW_MAPPED_BUFFERS_DURING_EXECUTION:
 117             return 1;
 118
 119         case PIPE_CAP_MIN_MAP_BUFFER_ALIGNMENT:
 120             return R300_BUFFER_ALIGNMENT;
 121
 122         case PIPE_CAP_CONSTANT_BUFFER_OFFSET_ALIGNMENT:
 123             return 16;
 124
 125         case PIPE_CAP_GLSL_FEATURE_LEVEL:
 126             return 120;
 127
 128         /* r300 cannot do swizzling of compressed textures. Supported otherwise. */
 129         case PIPE_CAP_TEXTURE_SWIZZLE:
 130             return util_format_s3tc_enabled ? r300screen->caps.dxtc_swizzle : 1;
 131
 132         /* We don't support color clamping on r500, so that we can use color
 133          * intepolators for generic varyings. */
 134         case PIPE_CAP_VERTEX_COLOR_CLAMPED:
 135             return !is_r500;
 136
 137         /* Supported on r500 only. */
 138         case PIPE_CAP_VERTEX_COLOR_UNCLAMPED:
 139         case PIPE_CAP_MIXED_COLORBUFFER_FORMATS:
 140         case PIPE_CAP_SM3:
 141             return is_r500 ? 1 : 0;
 142
 143         /* Unsupported features. */
 144         case PIPE_CAP_QUERY_TIME_ELAPSED:
 145         case PIPE_CAP_QUERY_PIPELINE_STATISTICS:
 146         case PIPE_CAP_MAX_DUAL_SOURCE_RENDER_TARGETS:
 147         case PIPE_CAP_INDEP_BLEND_ENABLE:
 148         case PIPE_CAP_INDEP_BLEND_FUNC:
 149         case PIPE_CAP_DEPTH_CLIP_DISABLE:
 150         case PIPE_CAP_SHADER_STENCIL_EXPORT:
 151         case PIPE_CAP_MAX_TEXTURE_ARRAY_LAYERS:
 152         case PIPE_CAP_TGSI_INSTANCEID:
 153         case PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT:
 154         case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER:
 155         case PIPE_CAP_SEAMLESS_CUBE_MAP:
 156         case PIPE_CAP_SEAMLESS_CUBE_MAP_PER_TEXTURE:
 157         case PIPE_CAP_MIN_TEXEL_OFFSET:
 158         case PIPE_CAP_MAX_TEXEL_OFFSET:
 159         case PIPE_CAP_MIN_TEXTURE_GATHER_OFFSET:
 160         case PIPE_CAP_MAX_TEXTURE_GATHER_OFFSET:
 161         case PIPE_CAP_MAX_STREAM_OUTPUT_BUFFERS:
 162         case PIPE_CAP_MAX_STREAM_OUTPUT_SEPARATE_COMPONENTS:
 163         case PIPE_CAP_MAX_STREAM_OUTPUT_INTERLEAVED_COMPONENTS:
 164         case PIPE_CAP_MAX_GEOMETRY_OUTPUT_VERTICES:
 165         case PIPE_CAP_MAX_GEOMETRY_TOTAL_OUTPUT_COMPONENTS:
 166         case PIPE_CAP_MAX_VERTEX_STREAMS:
 167         case PIPE_CAP_STREAM_OUTPUT_PAUSE_RESUME:
 168         case PIPE_CAP_STREAM_OUTPUT_INTERLEAVE_BUFFERS:
 169         case PIPE_CAP_FRAGMENT_COLOR_CLAMPED:
 170         case PIPE_CAP_QUADS_FOLLOW_PROVOKING_VERTEX_CONVENTION:
 171         case PIPE_CAP_COMPUTE:
 172         case PIPE_CAP_START_INSTANCE:
 173         case PIPE_CAP_QUERY_TIMESTAMP:
 174         case PIPE_CAP_TEXTURE_MULTISAMPLE:
 175         case PIPE_CAP_CUBE_MAP_ARRAY:
 176         case PIPE_CAP_TEXTURE_BUFFER_OBJECTS:
 177         case PIPE_CAP_TEXTURE_BUFFER_OFFSET_ALIGNMENT:
 178         case PIPE_CAP_TEXTURE_BORDER_COLOR_QUIRK:
 179         case PIPE_CAP_MAX_TEXTURE_BUFFER_SIZE:
 180         case PIPE_CAP_TGSI_VS_LAYER_VIEWPORT:
 181         case PIPE_CAP_MAX_TEXTURE_GATHER_COMPONENTS:
 182         case PIPE_CAP_TEXTURE_GATHER_SM5:
 183         case PIPE_CAP_TEXTURE_QUERY_LOD:
 184         case PIPE_CAP_FAKE_SW_MSAA:
 185         case PIPE_CAP_SAMPLE_SHADING:
 186         case PIPE_CAP_TEXTURE_GATHER_OFFSETS:
 187         case PIPE_CAP_DRAW_INDIRECT:
 188         case PIPE_CAP_MULTI_DRAW_INDIRECT:
 189         case PIPE_CAP_MULTI_DRAW_INDIRECT_PARAMS:
 190         case PIPE_CAP_TGSI_FS_FINE_DERIVATIVE:
 191         case PIPE_CAP_CONDITIONAL_RENDER_INVERTED:
 192         case PIPE_CAP_SAMPLER_VIEW_TARGET:
 193         case PIPE_CAP_VERTEXID_NOBASE:
 194         case PIPE_CAP_POLYGON_OFFSET_CLAMP:
 195         case PIPE_CAP_MULTISAMPLE_Z_RESOLVE:
 196         case PIPE_CAP_RESOURCE_FROM_USER_MEMORY:
 197         case PIPE_CAP_DEVICE_RESET_STATUS_QUERY:
 198         case PIPE_CAP_MAX_SHADER_PATCH_VARYINGS:
 199         case PIPE_CAP_TEXTURE_FLOAT_LINEAR:
 200         case PIPE_CAP_TEXTURE_HALF_FLOAT_LINEAR:
 201         case PIPE_CAP_DEPTH_BOUNDS_TEST:
 202         case PIPE_CAP_TGSI_TXQS:
 203         case PIPE_CAP_FORCE_PERSAMPLE_INTERP:
 204         case PIPE_CAP_SHAREABLE_SHADERS:
 205         case PIPE_CAP_COPY_BETWEEN_COMPRESSED_AND_PLAIN_FORMATS:
 206         case PIPE_CAP_CLEAR_TEXTURE:
 207         case PIPE_CAP_DRAW_PARAMETERS:
 208         case PIPE_CAP_TGSI_PACK_HALF_FLOAT:
 209         case PIPE_CAP_TGSI_FS_POSITION_IS_SYSVAL:
 210         case PIPE_CAP_TGSI_FS_FACE_IS_INTEGER_SYSVAL:
 211         case PIPE_CAP_SHADER_BUFFER_OFFSET_ALIGNMENT:
 212         case PIPE_CAP_INVALIDATE_BUFFER:
 213         case PIPE_CAP_GENERATE_MIPMAP:
 214         case PIPE_CAP_STRING_MARKER:
 215         case PIPE_CAP_BUFFER_SAMPLER_VIEW_RGBA_ONLY:
 216         case PIPE_CAP_SURFACE_REINTERPRET_BLOCKS:
 217         case PIPE_CAP_QUERY_BUFFER_OBJECT:
 218         case PIPE_CAP_QUERY_MEMORY_INFO:
 219         case PIPE_CAP_FRAMEBUFFER_NO_ATTACHMENT:
 220         case PIPE_CAP_ROBUST_BUFFER_ACCESS_BEHAVIOR:
 221         case PIPE_CAP_CULL_DISTANCE:
 222         case PIPE_CAP_PRIMITIVE_RESTART_FOR_PATCHES:
 223         case PIPE_CAP_TGSI_VOTE:
 224         case PIPE_CAP_MAX_WINDOW_RECTANGLES:
 225         case PIPE_CAP_POLYGON_OFFSET_UNITS_UNSCALED:
 226         case PIPE_CAP_VIEWPORT_SUBPIXEL_BITS:
 227         case PIPE_CAP_TGSI_ARRAY_COMPONENTS:
 228         case PIPE_CAP_TGSI_CAN_READ_OUTPUTS:
 229         case PIPE_CAP_NATIVE_FENCE_FD:
 230         case PIPE_CAP_GLSL_OPTIMIZE_CONSERVATIVELY:
 231         case PIPE_CAP_TGSI_FS_FBFETCH:
 232         case PIPE_CAP_TGSI_MUL_ZERO_WINS:
 233         case PIPE_CAP_DOUBLES:
 234         case PIPE_CAP_INT64:
 235         case PIPE_CAP_INT64_DIVMOD:
 236         case PIPE_CAP_TGSI_TEX_TXF_LZ:
 237         case PIPE_CAP_TGSI_CLOCK:
 238         case PIPE_CAP_POLYGON_MODE_FILL_RECTANGLE:
 239         case PIPE_CAP_SPARSE_BUFFER_PAGE_SIZE:
 240         case PIPE_CAP_TGSI_BALLOT:
 241         case PIPE_CAP_TGSI_TES_LAYER_VIEWPORT:
 242         case PIPE_CAP_CAN_BIND_CONST_BUFFER_AS_VERTEX:
 243         case PIPE_CAP_POST_DEPTH_COVERAGE:
 244         case PIPE_CAP_BINDLESS_TEXTURE:
 245         case PIPE_CAP_NIR_SAMPLERS_AS_DEREF:
 246             return 0;
 247
 248         /* SWTCL-only features. */
 249         case PIPE_CAP_PRIMITIVE_RESTART:
 250         case PIPE_CAP_USER_VERTEX_BUFFERS:
 251         case PIPE_CAP_TGSI_VS_WINDOW_SPACE_POSITION:
 252             return !r300screen->caps.has_tcl;
 253
 254         /* HWTCL-only features / limitations. */
 255         case PIPE_CAP_VERTEX_BUFFER_OFFSET_4BYTE_ALIGNED_ONLY:
 256         case PIPE_CAP_VERTEX_BUFFER_STRIDE_4BYTE_ALIGNED_ONLY:
 257         case PIPE_CAP_VERTEX_ELEMENT_SRC_OFFSET_4BYTE_ALIGNED_ONLY:
 258             return r300screen->caps.has_tcl;
 259         case PIPE_CAP_TGSI_TEXCOORD:
 260             return 0;
 261
 262         /* Texturing. */
 263         case PIPE_CAP_MAX_TEXTURE_2D_LEVELS:
 264         case PIPE_CAP_MAX_TEXTURE_3D_LEVELS:
 265         case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS:
 266             /* 13 == 4096, 12 == 2048 */
 267             return is_r500 ? 13 : 12;
 268
 269         /* Render targets. */
 270         case PIPE_CAP_MAX_RENDER_TARGETS:
 271             return 4;
 272         case PIPE_CAP_ENDIANNESS:
 273             return PIPE_ENDIAN_LITTLE;
 274
 275         case PIPE_CAP_MAX_VIEWPORTS:
 276             return 1;
 277
 278         case PIPE_CAP_MAX_VERTEX_ATTRIB_STRIDE:
 279             return 2048;
 280
 281         case PIPE_CAP_VENDOR_ID:
 282                 return 0x1002;
 283         case PIPE_CAP_DEVICE_ID:
 284                 return r300screen->info.pci_id;
 285         case PIPE_CAP_ACCELERATED:
 286                 return 1;
 287         case PIPE_CAP_VIDEO_MEMORY:
 288                 return r300screen->info.vram_size >> 20;
 289         case PIPE_CAP_UMA:
 290                 return 0;
 291         case PIPE_CAP_PCI_GROUP:
 292             return r300screen->info.pci_domain;
 293         case PIPE_CAP_PCI_BUS:
 294             return r300screen->info.pci_bus;
 295         case PIPE_CAP_PCI_DEVICE:
 296             return r300screen->info.pci_dev;
 297         case PIPE_CAP_PCI_FUNCTION:
 298             return r300screen->info.pci_func;
 299     }
 300     return 0;
 301 }
 302
 303 static int r300_get_shader_param(struct pipe_screen *pscreen,
 304                                  enum pipe_shader_type shader,
 305                                  enum pipe_shader_cap param)
 306 {
 307    struct r300_screen* r300screen = r300_screen(pscreen);
 308    boolean is_r400 = r300screen->caps.is_r400;
 309    boolean is_r500 = r300screen->caps.is_r500;
 310
 311    switch (shader) {
 312     case PIPE_SHADER_FRAGMENT:
 313         switch (param)
 314         {
 315         case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
 316             return is_r500 || is_r400 ? 512 : 96;
 317         case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
 318             return is_r500 || is_r400 ? 512 : 64;
 319         case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
 320             return is_r500 || is_r400 ? 512 : 32;
 321         case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
 322             return is_r500 ? 511 : 4;
 323         case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:
 324             return is_r500 ? 64 : 0; /* Actually unlimited on r500. */
 325             /* Fragment shader limits. */
 326         case PIPE_SHADER_CAP_MAX_INPUTS:
 327             /* 2 colors + 8 texcoords are always supported
 328              * (minus fog and wpos).
 329              *
 330              * R500 has the ability to turn 3rd and 4th color into
 331              * additional texcoords but there is no two-sided color
 332              * selection then. However the facing bit can be used instead. */
 333             return 10;
 334         case PIPE_SHADER_CAP_MAX_OUTPUTS:
 335             return 4;
 336         case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE:
 337             return (is_r500 ? 256 : 32) * sizeof(float[4]);
 338         case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
 339         case PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE:
 340             return 1;
 341         case PIPE_SHADER_CAP_MAX_TEMPS:
 342             return is_r500 ? 128 : is_r400 ? 64 : 32;
 343         case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
 344         case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS:
 345            return r300screen->caps.num_tex_units;
 346         case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
 347         case PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED:
 348         case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
 349         case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
 350         case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
 351         case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
 352         case PIPE_SHADER_CAP_SUBROUTINES:
 353         case PIPE_SHADER_CAP_INTEGERS:
 354         case PIPE_SHADER_CAP_TGSI_DROUND_SUPPORTED:
 355         case PIPE_SHADER_CAP_TGSI_DFRACEXP_DLDEXP_SUPPORTED:
 356         case PIPE_SHADER_CAP_TGSI_FMA_SUPPORTED:
 357         case PIPE_SHADER_CAP_MAX_SHADER_BUFFERS:
 358         case PIPE_SHADER_CAP_MAX_SHADER_IMAGES:
 359         case PIPE_SHADER_CAP_LOWER_IF_THRESHOLD:
 360         case PIPE_SHADER_CAP_TGSI_SKIP_MERGE_REGISTERS:
 361             return 0;
 362         case PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT:
 363             return 32;
 364         case PIPE_SHADER_CAP_PREFERRED_IR:
 365             return PIPE_SHADER_IR_TGSI;
 366         case PIPE_SHADER_CAP_SUPPORTED_IRS:
 367             return 0;
 368         }
 369         break;
 370     case PIPE_SHADER_VERTEX:
 371         switch (param)
 372         {
 373         case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
 374         case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS:
 375         case PIPE_SHADER_CAP_SUBROUTINES:
 376             return 0;
 377         default:;
 378         }
 379
 380         if (!r300screen->caps.has_tcl) {
 381             return draw_get_shader_param(shader, param);
 382         }
 383
 384         switch (param)
 385         {
 386         case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
 387         case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
 388             return is_r500 ? 1024 : 256;
 389         case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:
 390             return is_r500 ? 4 : 0; /* For loops; not sure about conditionals. */
 391         case PIPE_SHADER_CAP_MAX_INPUTS:
 392             return 16;
 393         case PIPE_SHADER_CAP_MAX_OUTPUTS:
 394             return 10;
 395         case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE:
 396             return 256 * sizeof(float[4]);
 397         case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
 398             return 1;
 399         case PIPE_SHADER_CAP_MAX_TEMPS:
 400             return 32;
 401         case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
 402         case PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE:
 403             return 1;
 404         case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
 405         case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
 406         case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
 407         case PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED:
 408         case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
 409         case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
 410         case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
 411         case PIPE_SHADER_CAP_SUBROUTINES:
 412         case PIPE_SHADER_CAP_INTEGERS:
 413         case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
 414         case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS:
 415         case PIPE_SHADER_CAP_TGSI_DROUND_SUPPORTED:
 416         case PIPE_SHADER_CAP_TGSI_DFRACEXP_DLDEXP_SUPPORTED:
 417         case PIPE_SHADER_CAP_TGSI_FMA_SUPPORTED:
 418         case PIPE_SHADER_CAP_MAX_SHADER_BUFFERS:
 419         case PIPE_SHADER_CAP_MAX_SHADER_IMAGES:
 420         case PIPE_SHADER_CAP_LOWER_IF_THRESHOLD:
 421         case PIPE_SHADER_CAP_TGSI_SKIP_MERGE_REGISTERS:
 422             return 0;
 423         case PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT:
 424             return 32;
 425         case PIPE_SHADER_CAP_PREFERRED_IR:
 426             return PIPE_SHADER_IR_TGSI;
 427         case PIPE_SHADER_CAP_SUPPORTED_IRS:
 428             return 0;
 429         }
 430         break;
 431     default:
 432         ; /* nothing */
 433     }
 434     return 0;
 435 }
 436
 437 static float r300_get_paramf(struct pipe_screen* pscreen,
 438                              enum pipe_capf param)
 439 {
 440     struct r300_screen* r300screen = r300_screen(pscreen);
 441
 442     switch (param) {
 443         case PIPE_CAPF_MAX_LINE_WIDTH:
 444         case PIPE_CAPF_MAX_LINE_WIDTH_AA:
 445         case PIPE_CAPF_MAX_POINT_WIDTH:
 446         case PIPE_CAPF_MAX_POINT_WIDTH_AA:
 447             /* The maximum dimensions of the colorbuffer are our practical
 448              * rendering limits. 2048 pixels should be enough for anybody. */
 449             if (r300screen->caps.is_r500) {
 450                 return 4096.0f;
 451             } else if (r300screen->caps.is_r400) {
 452                 return 4021.0f;
 453             } else {
 454                 return 2560.0f;
 455             }
 456         case PIPE_CAPF_MAX_TEXTURE_ANISOTROPY:
 457             return 16.0f;
 458         case PIPE_CAPF_MAX_TEXTURE_LOD_BIAS:
 459             return 16.0f;
 460         case PIPE_CAPF_GUARD_BAND_LEFT:
 461         case PIPE_CAPF_GUARD_BAND_TOP:
 462         case PIPE_CAPF_GUARD_BAND_RIGHT:
 463         case PIPE_CAPF_GUARD_BAND_BOTTOM:
 464             return 0.0f;
 465         default:
 466             debug_printf("r300: Warning: Unknown CAP %d in get_paramf.\n",
 467                          param);
 468             return 0.0f;
 469     }
 470 }
 471
 472 static int r300_get_video_param(struct pipe_screen *screen,
 473                                 enum pipe_video_profile profile,
 474                                 enum pipe_video_entrypoint entrypoint,
 475                                 enum pipe_video_cap param)
 476 {
 477    switch (param) {
 478       case PIPE_VIDEO_CAP_SUPPORTED:
 479          return vl_profile_supported(screen, profile, entrypoint);
 480       case PIPE_VIDEO_CAP_NPOT_TEXTURES:
 481          return 0;
 482       case PIPE_VIDEO_CAP_MAX_WIDTH:
 483       case PIPE_VIDEO_CAP_MAX_HEIGHT:
 484          return vl_video_buffer_max_size(screen);
 485       case PIPE_VIDEO_CAP_PREFERED_FORMAT:
 486          return PIPE_FORMAT_NV12;
 487       case PIPE_VIDEO_CAP_PREFERS_INTERLACED:
 488          return false;
 489       case PIPE_VIDEO_CAP_SUPPORTS_INTERLACED:
 490          return false;
 491       case PIPE_VIDEO_CAP_SUPPORTS_PROGRESSIVE:
 492          return true;
 493       case PIPE_VIDEO_CAP_MAX_LEVEL:
 494          return vl_level_supported(screen, profile);
 495       default:
 496          return 0;
 497    }
 498 }
 499
 500 /**
 501  * Whether the format matches:
 502  *   PIPE_FORMAT_?10?10?10?2_UNORM
 503  */
 504 static inline boolean
 505 util_format_is_rgba1010102_variant(const struct util_format_description *desc)
 506 {
 507    static const unsigned size[4] = {10, 10, 10, 2};
 508    unsigned chan;
 509
 510    if (desc->block.width != 1 ||
 511        desc->block.height != 1 ||
 512        desc->block.bits != 32)
 513       return FALSE;
 514
 515    for (chan = 0; chan < 4; ++chan) {
 516       if(desc->channel[chan].type != UTIL_FORMAT_TYPE_UNSIGNED &&
 517          desc->channel[chan].type != UTIL_FORMAT_TYPE_VOID)
 518          return FALSE;
 519       if (desc->channel[chan].size != size[chan])
 520          return FALSE;
 521    }
 522
 523    return TRUE;
 524 }
 525
 526 static bool r300_is_blending_supported(struct r300_screen *rscreen,
 527                                        enum pipe_format format)
 528 {
 529     int c;
 530     const struct util_format_description *desc =
 531         util_format_description(format);
 532
 533     if (desc->layout != UTIL_FORMAT_LAYOUT_PLAIN)
 534         return false;
 535
 536     c = util_format_get_first_non_void_channel(format);
 537
 538     /* RGBA16F */
 539     if (rscreen->caps.is_r500 &&
 540         desc->nr_channels == 4 &&
 541         desc->channel[c].size == 16 &&
 542         desc->channel[c].type == UTIL_FORMAT_TYPE_FLOAT)
 543         return true;
 544
 545     if (desc->channel[c].normalized &&
 546         desc->channel[c].type == UTIL_FORMAT_TYPE_UNSIGNED &&
 547         desc->channel[c].size >= 4 &&
 548         desc->channel[c].size <= 10) {
 549         /* RGB10_A2, RGBA8, RGB5_A1, RGBA4, RGB565 */
 550         if (desc->nr_channels >= 3)
 551             return true;
 552
 553         if (format == PIPE_FORMAT_R8G8_UNORM)
 554             return true;
 555
 556         /* R8, I8, L8, A8 */
 557         if (desc->nr_channels == 1)
 558             return true;
 559     }
 560
 561     return false;
 562 }
 563
 564 static boolean r300_is_format_supported(struct pipe_screen* screen,
 565                                         enum pipe_format format,
 566                                         enum pipe_texture_target target,
 567                                         unsigned sample_count,
 568                                         unsigned usage)
 569 {
 570     uint32_t retval = 0;
 571     boolean is_r500 = r300_screen(screen)->caps.is_r500;
 572     boolean is_r400 = r300_screen(screen)->caps.is_r400;
 573     boolean is_color2101010 = format == PIPE_FORMAT_R10G10B10A2_UNORM ||
 574                               format == PIPE_FORMAT_R10G10B10X2_SNORM ||
 575                               format == PIPE_FORMAT_B10G10R10A2_UNORM ||
 576                               format == PIPE_FORMAT_B10G10R10X2_UNORM ||
 577                               format == PIPE_FORMAT_R10SG10SB10SA2U_NORM;
 578     boolean is_ati1n = format == PIPE_FORMAT_RGTC1_UNORM ||
 579                        format == PIPE_FORMAT_RGTC1_SNORM ||
 580                        format == PIPE_FORMAT_LATC1_UNORM ||
 581                        format == PIPE_FORMAT_LATC1_SNORM;
 582     boolean is_ati2n = format == PIPE_FORMAT_RGTC2_UNORM ||
 583                        format == PIPE_FORMAT_RGTC2_SNORM ||
 584                        format == PIPE_FORMAT_LATC2_UNORM ||
 585                        format == PIPE_FORMAT_LATC2_SNORM;
 586     boolean is_half_float = format == PIPE_FORMAT_R16_FLOAT ||
 587                             format == PIPE_FORMAT_R16G16_FLOAT ||
 588                             format == PIPE_FORMAT_R16G16B16_FLOAT ||
 589                             format == PIPE_FORMAT_R16G16B16A16_FLOAT ||
 590                             format == PIPE_FORMAT_R16G16B16X16_FLOAT;
 591     const struct util_format_description *desc;
 592
 593     if (!util_format_is_supported(format, usage))
 594        return FALSE;
 595
 596     /* Check multisampling support. */
 597     switch (sample_count) {
 598         case 0:
 599         case 1:
 600             break;
 601         case 2:
 602         case 4:
 603         case 6:
 604             /* No texturing and scanout. */
 605             if (usage & (PIPE_BIND_SAMPLER_VIEW |
 606                          PIPE_BIND_DISPLAY_TARGET |
 607                          PIPE_BIND_SCANOUT)) {
 608                 return FALSE;
 609             }
 610
 611             desc = util_format_description(format);
 612
 613             if (is_r500) {
 614                 /* Only allow depth/stencil, RGBA8, RGBA1010102, RGBA16F. */
 615                 if (!util_format_is_depth_or_stencil(format) &&
 616                     !util_format_is_rgba8_variant(desc) &&
 617                     !util_format_is_rgba1010102_variant(desc) &&
 618                     format != PIPE_FORMAT_R16G16B16A16_FLOAT &&
 619                     format != PIPE_FORMAT_R16G16B16X16_FLOAT) {
 620                     return FALSE;
 621                 }
 622             } else {
 623                 /* Only allow depth/stencil, RGBA8. */
 624                 if (!util_format_is_depth_or_stencil(format) &&
 625                     !util_format_is_rgba8_variant(desc)) {
 626                     return FALSE;
 627                 }
 628             }
 629             break;
 630         default:
 631             return FALSE;
 632     }
 633
 634     /* Check sampler format support. */
 635     if ((usage & PIPE_BIND_SAMPLER_VIEW) &&
 636         /* these two are broken for an unknown reason */
 637         format != PIPE_FORMAT_R8G8B8X8_SNORM &&
 638         format != PIPE_FORMAT_R16G16B16X16_SNORM &&
 639         /* ATI1N is r5xx-only. */
 640         (is_r500 || !is_ati1n) &&
 641         /* ATI2N is supported on r4xx-r5xx. */
 642         (is_r400 || is_r500 || !is_ati2n) &&
 643         r300_is_sampler_format_supported(format)) {
 644         retval |= PIPE_BIND_SAMPLER_VIEW;
 645     }
 646
 647     /* Check colorbuffer format support. */
 648     if ((usage & (PIPE_BIND_RENDER_TARGET |
 649                   PIPE_BIND_DISPLAY_TARGET |
 650                   PIPE_BIND_SCANOUT |
 651                   PIPE_BIND_SHARED |
 652                   PIPE_BIND_BLENDABLE)) &&
 653         /* 2101010 cannot be rendered to on non-r5xx. */
 654         (!is_color2101010 || is_r500) &&
 655         r300_is_colorbuffer_format_supported(format)) {
 656         retval |= usage &
 657             (PIPE_BIND_RENDER_TARGET |
 658              PIPE_BIND_DISPLAY_TARGET |
 659              PIPE_BIND_SCANOUT |
 660              PIPE_BIND_SHARED);
 661
 662         if (r300_is_blending_supported(r300_screen(screen), format)) {
 663             retval |= usage & PIPE_BIND_BLENDABLE;
 664         }
 665     }
 666
 667     /* Check depth-stencil format support. */
 668     if (usage & PIPE_BIND_DEPTH_STENCIL &&
 669         r300_is_zs_format_supported(format)) {
 670         retval |= PIPE_BIND_DEPTH_STENCIL;
 671     }
 672
 673     /* Check vertex buffer format support. */
 674     if (usage & PIPE_BIND_VERTEX_BUFFER) {
 675         if (r300_screen(screen)->caps.has_tcl) {
 676             /* Half float is supported on >= R400. */
 677             if ((is_r400 || is_r500 || !is_half_float) &&
 678                 r300_translate_vertex_data_type(format) != R300_INVALID_FORMAT) {
 679                 retval |= PIPE_BIND_VERTEX_BUFFER;
 680             }
 681         } else {
 682             /* SW TCL */
 683             if (!util_format_is_pure_integer(format)) {
 684                 retval |= PIPE_BIND_VERTEX_BUFFER;
 685             }
 686         }
 687     }
 688
 689     return retval == usage;
 690 }
 691
 692 static void r300_destroy_screen(struct pipe_screen* pscreen)
 693 {
 694     struct r300_screen* r300screen = r300_screen(pscreen);
 695     struct radeon_winsys *rws = radeon_winsys(pscreen);
 696
 697     if (rws && !rws->unref(rws))
 698       return;
 699
 700     mtx_destroy(&r300screen->cmask_mutex);
 701     slab_destroy_parent(&r300screen->pool_transfers);
 702
 703     if (rws)
 704       rws->destroy(rws);
 705
 706     FREE(r300screen);
 707 }
 708
 709 static void r300_fence_reference(struct pipe_screen *screen,
 710                                  struct pipe_fence_handle **ptr,
 711                                  struct pipe_fence_handle *fence)
 712 {
 713     struct radeon_winsys *rws = r300_screen(screen)->rws;
 714
 715     rws->fence_reference(ptr, fence);
 716 }
 717
 718 static boolean r300_fence_finish(struct pipe_screen *screen,
 719                                  struct pipe_context *ctx,
 720                                  struct pipe_fence_handle *fence,
 721                                  uint64_t timeout)
 722 {
 723     struct radeon_winsys *rws = r300_screen(screen)->rws;
 724
 725     return rws->fence_wait(rws, fence, timeout);
 726 }
 727
 728 struct pipe_screen* r300_screen_create(struct radeon_winsys *rws, unsigned flags)
 729 {
 730     struct r300_screen *r300screen = CALLOC_STRUCT(r300_screen);
 731
 732     if (!r300screen) {
 733         FREE(r300screen);
 734         return NULL;
 735     }
 736
 737     rws->query_info(rws, &r300screen->info);
 738
 739     r300_init_debug(r300screen);
 740     r300_parse_chipset(r300screen->info.pci_id, &r300screen->caps);
 741
 742     if (SCREEN_DBG_ON(r300screen, DBG_NO_ZMASK))
 743         r300screen->caps.zmask_ram = 0;
 744     if (SCREEN_DBG_ON(r300screen, DBG_NO_HIZ))
 745         r300screen->caps.hiz_ram = 0;
 746
 747     r300screen->rws = rws;
 748     r300screen->screen.destroy = r300_destroy_screen;
 749     r300screen->screen.get_name = r300_get_name;
 750     r300screen->screen.get_vendor = r300_get_vendor;
 751     r300screen->screen.get_device_vendor = r300_get_device_vendor;
 752     r300screen->screen.get_param = r300_get_param;
 753     r300screen->screen.get_shader_param = r300_get_shader_param;
 754     r300screen->screen.get_paramf = r300_get_paramf;
 755     r300screen->screen.get_video_param = r300_get_video_param;
 756     r300screen->screen.is_format_supported = r300_is_format_supported;
 757     r300screen->screen.is_video_format_supported = vl_video_buffer_is_format_supported;
 758     r300screen->screen.context_create = r300_create_context;
 759     r300screen->screen.fence_reference = r300_fence_reference;
 760     r300screen->screen.fence_finish = r300_fence_finish;
 761
 762     r300_init_screen_resource_functions(r300screen);
 763
 764     slab_create_parent(&r300screen->pool_transfers, sizeof(struct pipe_transfer), 64);
 765
 766     util_format_s3tc_init();
 767     (void) mtx_init(&r300screen->cmask_mutex, mtx_plain);
 768
 769     return &r300screen->screen;
 770 }