src/gallium/drivers/r300/r300_screen.c

   1 /*
   2  * Copyright 2008 Corbin Simpson <MostAwesomeDude@gmail.com>
   3  * Copyright 2010 Marek Olšák <maraeo@gmail.com>
   4  *
   5  * Permission is hereby granted, free of charge, to any person obtaining a
   6  * copy of this software and associated documentation files (the "Software"),
   7  * to deal in the Software without restriction, including without limitation
   8  * on the rights to use, copy, modify, merge, publish, distribute, sub
   9  * license, and/or sell copies of the Software, and to permit persons to whom
  10  * the Software is furnished to do so, subject to the following conditions:
  11  *
  12  * The above copyright notice and this permission notice (including the next
  13  * paragraph) shall be included in all copies or substantial portions of the
  14  * Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  19  * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
  20  * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
  21  * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
  22  * USE OR OTHER DEALINGS IN THE SOFTWARE. */
  23
  24 #include "util/u_format.h"
  25 #include "util/u_format_s3tc.h"
  26 #include "util/u_memory.h"
  27 #include "os/os_time.h"
  28 #include "vl/vl_decoder.h"
  29 #include "vl/vl_video_buffer.h"
  30
  31 #include "r300_context.h"
  32 #include "r300_texture.h"
  33 #include "r300_screen_buffer.h"
  34 #include "r300_state_inlines.h"
  35 #include "r300_public.h"
  36
  37 #include "draw/draw_context.h"
  38
  39 /* Return the identifier behind whom the brave coders responsible for this
  40  * amalgamation of code, sweat, and duct tape, routinely obscure their names.
  41  *
  42  * ...I should have just put "Corbin Simpson", but I'm not that cool.
  43  *
  44  * (Or egotistical. Yet.) */
  45 static const char* r300_get_vendor(struct pipe_screen* pscreen)
  46 {
  47     return "X.Org R300 Project";
  48 }
  49
  50 static const char* chip_families[] = {
  51     "unknown",
  52     "ATI R300",
  53     "ATI R350",
  54     "ATI RV350",
  55     "ATI RV370",
  56     "ATI RV380",
  57     "ATI RS400",
  58     "ATI RC410",
  59     "ATI RS480",
  60     "ATI R420",
  61     "ATI R423",
  62     "ATI R430",
  63     "ATI R480",
  64     "ATI R481",
  65     "ATI RV410",
  66     "ATI RS600",
  67     "ATI RS690",
  68     "ATI RS740",
  69     "ATI RV515",
  70     "ATI R520",
  71     "ATI RV530",
  72     "ATI R580",
  73     "ATI RV560",
  74     "ATI RV570"
  75 };
  76
  77 static const char* r300_get_name(struct pipe_screen* pscreen)
  78 {
  79     struct r300_screen* r300screen = r300_screen(pscreen);
  80
  81     return chip_families[r300screen->caps.family];
  82 }
  83
  84 static int r300_get_param(struct pipe_screen* pscreen, enum pipe_cap param)
  85 {
  86     struct r300_screen* r300screen = r300_screen(pscreen);
  87     boolean is_r500 = r300screen->caps.is_r500;
  88
  89     switch (param) {
  90         /* Supported features (boolean caps). */
  91         case PIPE_CAP_NPOT_TEXTURES:
  92         case PIPE_CAP_TWO_SIDED_STENCIL:
  93         case PIPE_CAP_ANISOTROPIC_FILTER:
  94         case PIPE_CAP_POINT_SPRITE:
  95         case PIPE_CAP_OCCLUSION_QUERY:
  96         case PIPE_CAP_TEXTURE_SHADOW_MAP:
  97         case PIPE_CAP_TEXTURE_MIRROR_CLAMP:
  98         case PIPE_CAP_BLEND_EQUATION_SEPARATE:
  99         case PIPE_CAP_VERTEX_ELEMENT_INSTANCE_DIVISOR:
 100         case PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT:
 101         case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER:
 102         case PIPE_CAP_CONDITIONAL_RENDER:
 103         case PIPE_CAP_TEXTURE_BARRIER:
 104         case PIPE_CAP_TGSI_CAN_COMPACT_VARYINGS:
 105         case PIPE_CAP_TGSI_CAN_COMPACT_CONSTANTS:
 106         case PIPE_CAP_VERTEX_COLOR_CLAMPED:
 107         case PIPE_CAP_USER_INDEX_BUFFERS:
 108         case PIPE_CAP_USER_CONSTANT_BUFFERS:
 109         case PIPE_CAP_DEPTH_CLIP_DISABLE: /* XXX implemented, but breaks Regnum Online */
 110             return 1;
 111
 112         case PIPE_CAP_MIN_MAP_BUFFER_ALIGNMENT:
 113             return R300_BUFFER_ALIGNMENT;
 114
 115         case PIPE_CAP_CONSTANT_BUFFER_OFFSET_ALIGNMENT:
 116             return 16;
 117
 118         case PIPE_CAP_GLSL_FEATURE_LEVEL:
 119             return 120;
 120
 121         /* r300 cannot do swizzling of compressed textures. Supported otherwise. */
 122         case PIPE_CAP_TEXTURE_SWIZZLE:
 123             return util_format_s3tc_enabled ? r300screen->caps.dxtc_swizzle : 1;
 124
 125         /* Supported on r500 only. */
 126         case PIPE_CAP_VERTEX_COLOR_UNCLAMPED:
 127         case PIPE_CAP_MIXED_COLORBUFFER_FORMATS:
 128         case PIPE_CAP_SM3:
 129             return is_r500 ? 1 : 0;
 130
 131         /* Unsupported features. */
 132         case PIPE_CAP_QUERY_TIME_ELAPSED:
 133         case PIPE_CAP_MAX_DUAL_SOURCE_RENDER_TARGETS:
 134         case PIPE_CAP_INDEP_BLEND_ENABLE:
 135         case PIPE_CAP_INDEP_BLEND_FUNC:
 136         case PIPE_CAP_DEPTHSTENCIL_CLEAR_SEPARATE:
 137         case PIPE_CAP_SHADER_STENCIL_EXPORT:
 138         case PIPE_CAP_MAX_TEXTURE_ARRAY_LAYERS:
 139         case PIPE_CAP_TGSI_INSTANCEID:
 140         case PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT:
 141         case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER:
 142         case PIPE_CAP_SEAMLESS_CUBE_MAP:
 143         case PIPE_CAP_SEAMLESS_CUBE_MAP_PER_TEXTURE:
 144         case PIPE_CAP_SCALED_RESOLVE:
 145         case PIPE_CAP_MIN_TEXEL_OFFSET:
 146         case PIPE_CAP_MAX_TEXEL_OFFSET:
 147         case PIPE_CAP_MAX_STREAM_OUTPUT_BUFFERS:
 148         case PIPE_CAP_MAX_STREAM_OUTPUT_SEPARATE_COMPONENTS:
 149         case PIPE_CAP_MAX_STREAM_OUTPUT_INTERLEAVED_COMPONENTS:
 150         case PIPE_CAP_STREAM_OUTPUT_PAUSE_RESUME:
 151         case PIPE_CAP_FRAGMENT_COLOR_CLAMPED:
 152         case PIPE_CAP_QUADS_FOLLOW_PROVOKING_VERTEX_CONVENTION:
 153         case PIPE_CAP_COMPUTE:
 154         case PIPE_CAP_START_INSTANCE:
 155         case PIPE_CAP_QUERY_TIMESTAMP:
 156         case PIPE_CAP_TEXTURE_MULTISAMPLE:
 157         case PIPE_CAP_CUBE_MAP_ARRAY:
 158         case PIPE_CAP_TEXTURE_BUFFER_OBJECTS:
 159             return 0;
 160
 161         /* SWTCL-only features. */
 162         case PIPE_CAP_PRIMITIVE_RESTART:
 163         case PIPE_CAP_USER_VERTEX_BUFFERS:
 164             return !r300screen->caps.has_tcl;
 165
 166         /* HWTCL-only features / limitations. */
 167         case PIPE_CAP_VERTEX_BUFFER_OFFSET_4BYTE_ALIGNED_ONLY:
 168         case PIPE_CAP_VERTEX_BUFFER_STRIDE_4BYTE_ALIGNED_ONLY:
 169         case PIPE_CAP_VERTEX_ELEMENT_SRC_OFFSET_4BYTE_ALIGNED_ONLY:
 170             return r300screen->caps.has_tcl;
 171
 172         /* Texturing. */
 173         case PIPE_CAP_MAX_COMBINED_SAMPLERS:
 174             return r300screen->caps.num_tex_units;
 175         case PIPE_CAP_MAX_TEXTURE_2D_LEVELS:
 176         case PIPE_CAP_MAX_TEXTURE_3D_LEVELS:
 177         case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS:
 178             /* 13 == 4096, 12 == 2048 */
 179             return is_r500 ? 13 : 12;
 180
 181         /* Render targets. */
 182         case PIPE_CAP_MAX_RENDER_TARGETS:
 183             return 4;
 184     }
 185     return 0;
 186 }
 187
 188 static int r300_get_shader_param(struct pipe_screen *pscreen, unsigned shader, enum pipe_shader_cap param)
 189 {
 190    struct r300_screen* r300screen = r300_screen(pscreen);
 191    boolean is_r400 = r300screen->caps.is_r400;
 192    boolean is_r500 = r300screen->caps.is_r500;
 193
 194    switch (shader) {
 195     case PIPE_SHADER_FRAGMENT:
 196         switch (param)
 197         {
 198         case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
 199             return is_r500 || is_r400 ? 512 : 96;
 200         case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
 201             return is_r500 || is_r400 ? 512 : 64;
 202         case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
 203             return is_r500 || is_r400 ? 512 : 32;
 204         case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
 205             return is_r500 ? 511 : 4;
 206         case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:
 207             return is_r500 ? 64 : 0; /* Actually unlimited on r500. */
 208             /* Fragment shader limits. */
 209         case PIPE_SHADER_CAP_MAX_INPUTS:
 210             /* 2 colors + 8 texcoords are always supported
 211              * (minus fog and wpos).
 212              *
 213              * R500 has the ability to turn 3rd and 4th color into
 214              * additional texcoords but there is no two-sided color
 215              * selection then. However the facing bit can be used instead. */
 216             return 10;
 217         case PIPE_SHADER_CAP_MAX_CONSTS:
 218             return is_r500 ? 256 : 32;
 219         case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
 220             return 1;
 221         case PIPE_SHADER_CAP_MAX_TEMPS:
 222             return is_r500 ? 128 : is_r400 ? 64 : 32;
 223         case PIPE_SHADER_CAP_MAX_PREDS:
 224             return is_r500 ? 1 : 0;
 225         case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
 226            return r300screen->caps.num_tex_units;
 227         case PIPE_SHADER_CAP_MAX_ADDRS:
 228         case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
 229         case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
 230         case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
 231         case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
 232         case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
 233         case PIPE_SHADER_CAP_SUBROUTINES:
 234         case PIPE_SHADER_CAP_INTEGERS:
 235             return 0;
 236         case PIPE_SHADER_CAP_PREFERRED_IR:
 237             return PIPE_SHADER_IR_TGSI;
 238         }
 239         break;
 240     case PIPE_SHADER_VERTEX:
 241         switch (param)
 242         {
 243         case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
 244         case PIPE_SHADER_CAP_SUBROUTINES:
 245             return 0;
 246         default:;
 247         }
 248
 249         if (!r300screen->caps.has_tcl) {
 250             return draw_get_shader_param(shader, param);
 251         }
 252
 253         switch (param)
 254         {
 255         case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
 256         case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
 257             return is_r500 ? 1024 : 256;
 258         case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:
 259             return is_r500 ? 4 : 0; /* For loops; not sure about conditionals. */
 260         case PIPE_SHADER_CAP_MAX_INPUTS:
 261             return 16;
 262         case PIPE_SHADER_CAP_MAX_CONSTS:
 263             return 256;
 264         case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
 265             return 1;
 266         case PIPE_SHADER_CAP_MAX_TEMPS:
 267             return 32;
 268         case PIPE_SHADER_CAP_MAX_ADDRS:
 269             return 1; /* XXX guessed */
 270         case PIPE_SHADER_CAP_MAX_PREDS:
 271             return is_r500 ? 4 : 0; /* XXX guessed. */
 272         case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
 273             return 1;
 274         case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
 275         case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
 276         case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
 277         case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
 278         case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
 279         case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
 280         case PIPE_SHADER_CAP_SUBROUTINES:
 281         case PIPE_SHADER_CAP_INTEGERS:
 282         case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
 283             return 0;
 284         case PIPE_SHADER_CAP_PREFERRED_IR:
 285             return PIPE_SHADER_IR_TGSI;
 286         }
 287         break;
 288     }
 289     return 0;
 290 }
 291
 292 static float r300_get_paramf(struct pipe_screen* pscreen,
 293                              enum pipe_capf param)
 294 {
 295     struct r300_screen* r300screen = r300_screen(pscreen);
 296
 297     switch (param) {
 298         case PIPE_CAPF_MAX_LINE_WIDTH:
 299         case PIPE_CAPF_MAX_LINE_WIDTH_AA:
 300         case PIPE_CAPF_MAX_POINT_WIDTH:
 301         case PIPE_CAPF_MAX_POINT_WIDTH_AA:
 302             /* The maximum dimensions of the colorbuffer are our practical
 303              * rendering limits. 2048 pixels should be enough for anybody. */
 304             if (r300screen->caps.is_r500) {
 305                 return 4096.0f;
 306             } else if (r300screen->caps.is_r400) {
 307                 return 4021.0f;
 308             } else {
 309                 return 2560.0f;
 310             }
 311         case PIPE_CAPF_MAX_TEXTURE_ANISOTROPY:
 312             return 16.0f;
 313         case PIPE_CAPF_MAX_TEXTURE_LOD_BIAS:
 314             return 16.0f;
 315         case PIPE_CAPF_GUARD_BAND_LEFT:
 316         case PIPE_CAPF_GUARD_BAND_TOP:
 317         case PIPE_CAPF_GUARD_BAND_RIGHT:
 318         case PIPE_CAPF_GUARD_BAND_BOTTOM:
 319             /* XXX I don't know what these should be but the least we can do is
 320              * silence the potential error message */
 321             return 0.0f;
 322         default:
 323             debug_printf("r300: Warning: Unknown CAP %d in get_paramf.\n",
 324                          param);
 325             return 0.0f;
 326     }
 327 }
 328
 329 static int r300_get_video_param(struct pipe_screen *screen,
 330                                 enum pipe_video_profile profile,
 331                                 enum pipe_video_cap param)
 332 {
 333    switch (param) {
 334       case PIPE_VIDEO_CAP_SUPPORTED:
 335          return vl_profile_supported(screen, profile);
 336       case PIPE_VIDEO_CAP_NPOT_TEXTURES:
 337          return 0;
 338       case PIPE_VIDEO_CAP_MAX_WIDTH:
 339       case PIPE_VIDEO_CAP_MAX_HEIGHT:
 340          return vl_video_buffer_max_size(screen);
 341       case PIPE_VIDEO_CAP_PREFERED_FORMAT:
 342          return PIPE_FORMAT_NV12;
 343       case PIPE_VIDEO_CAP_PREFERS_INTERLACED:
 344          return false;
 345       case PIPE_VIDEO_CAP_SUPPORTS_INTERLACED:
 346          return false;
 347       case PIPE_VIDEO_CAP_SUPPORTS_PROGRESSIVE:
 348          return true;
 349       default:
 350          return 0;
 351    }
 352 }
 353
 354 static boolean r300_is_format_supported(struct pipe_screen* screen,
 355                                         enum pipe_format format,
 356                                         enum pipe_texture_target target,
 357                                         unsigned sample_count,
 358                                         unsigned usage)
 359 {
 360     uint32_t retval = 0;
 361     boolean drm_2_8_0 = r300_screen(screen)->info.drm_minor >= 8;
 362     boolean is_r500 = r300_screen(screen)->caps.is_r500;
 363     boolean is_r400 = r300_screen(screen)->caps.is_r400;
 364     boolean is_color2101010 = format == PIPE_FORMAT_R10G10B10A2_UNORM ||
 365                               format == PIPE_FORMAT_R10G10B10X2_SNORM ||
 366                               format == PIPE_FORMAT_B10G10R10A2_UNORM ||
 367                               format == PIPE_FORMAT_R10SG10SB10SA2U_NORM;
 368     boolean is_ati1n = format == PIPE_FORMAT_RGTC1_UNORM ||
 369                        format == PIPE_FORMAT_RGTC1_SNORM ||
 370                        format == PIPE_FORMAT_LATC1_UNORM ||
 371                        format == PIPE_FORMAT_LATC1_SNORM;
 372     boolean is_ati2n = format == PIPE_FORMAT_RGTC2_UNORM ||
 373                        format == PIPE_FORMAT_RGTC2_SNORM ||
 374                        format == PIPE_FORMAT_LATC2_UNORM ||
 375                        format == PIPE_FORMAT_LATC2_SNORM;
 376     boolean is_x16f_xy16f = format == PIPE_FORMAT_R16_FLOAT ||
 377                             format == PIPE_FORMAT_R16G16_FLOAT ||
 378                             format == PIPE_FORMAT_A16_FLOAT ||
 379                             format == PIPE_FORMAT_L16_FLOAT ||
 380                             format == PIPE_FORMAT_L16A16_FLOAT ||
 381                             format == PIPE_FORMAT_I16_FLOAT;
 382     boolean is_half_float = format == PIPE_FORMAT_R16_FLOAT ||
 383                             format == PIPE_FORMAT_R16G16_FLOAT ||
 384                             format == PIPE_FORMAT_R16G16B16_FLOAT ||
 385                             format == PIPE_FORMAT_R16G16B16A16_FLOAT;
 386
 387     if (!util_format_is_supported(format, usage))
 388        return FALSE;
 389
 390     /* Check multisampling support. */
 391     switch (sample_count) {
 392         case 0:
 393         case 1:
 394             break;
 395         case 2:
 396         case 4:
 397         case 6:
 398             /* We need DRM 2.8.0. */
 399             if (!drm_2_8_0) {
 400                 return FALSE;
 401             }
 402             /* Only support R500, because I didn't test older chipsets,
 403              * but MSAA should work there too. */
 404             if (!is_r500 && !debug_get_bool_option("RADEON_MSAA", FALSE)) {
 405                 return FALSE;
 406             }
 407             /* No texturing and scanout. */
 408             if (usage & (PIPE_BIND_SAMPLER_VIEW |
 409                          PIPE_BIND_DISPLAY_TARGET |
 410                          PIPE_BIND_SCANOUT)) {
 411                 return FALSE;
 412             }
 413             /* Only allow depth/stencil, RGBA8, RGBA16F */
 414             if (!util_format_is_depth_or_stencil(format) &&
 415                 !util_format_is_rgba8_variant(
 416                     util_format_description(format)) &&
 417                 format != PIPE_FORMAT_R16G16B16A16_FLOAT) {
 418                 return FALSE;
 419             }
 420             /* RGBA16F AA is only supported on R500. */
 421             if (format == PIPE_FORMAT_R16G16B16A16_FLOAT && !is_r500) {
 422                 return FALSE;
 423             }
 424             break;
 425         default:
 426             return FALSE;
 427     }
 428
 429     /* Check sampler format support. */
 430     if ((usage & PIPE_BIND_SAMPLER_VIEW) &&
 431         /* ATI1N is r5xx-only. */
 432         (is_r500 || !is_ati1n) &&
 433         /* ATI2N is supported on r4xx-r5xx. */
 434         (is_r400 || is_r500 || !is_ati2n) &&
 435         /* R16F and RG16F texture support was added in as late as DRM 2.8.0 */
 436         (drm_2_8_0 || !is_x16f_xy16f) &&
 437         r300_is_sampler_format_supported(format)) {
 438         retval |= PIPE_BIND_SAMPLER_VIEW;
 439     }
 440
 441     /* Check colorbuffer format support. */
 442     if ((usage & (PIPE_BIND_RENDER_TARGET |
 443                   PIPE_BIND_DISPLAY_TARGET |
 444                   PIPE_BIND_SCANOUT |
 445                   PIPE_BIND_SHARED)) &&
 446         /* 2101010 cannot be rendered to on non-r5xx. */
 447         (!is_color2101010 || (is_r500 && drm_2_8_0)) &&
 448         r300_is_colorbuffer_format_supported(format)) {
 449         retval |= usage &
 450             (PIPE_BIND_RENDER_TARGET |
 451              PIPE_BIND_DISPLAY_TARGET |
 452              PIPE_BIND_SCANOUT |
 453              PIPE_BIND_SHARED);
 454     }
 455
 456     /* Check depth-stencil format support. */
 457     if (usage & PIPE_BIND_DEPTH_STENCIL &&
 458         r300_is_zs_format_supported(format)) {
 459         retval |= PIPE_BIND_DEPTH_STENCIL;
 460     }
 461
 462     /* Check vertex buffer format support. */
 463     if (usage & PIPE_BIND_VERTEX_BUFFER) {
 464         if (r300_screen(screen)->caps.has_tcl) {
 465             /* Half float is supported on >= R400. */
 466             if ((is_r400 || is_r500 || !is_half_float) &&
 467                 r300_translate_vertex_data_type(format) != R300_INVALID_FORMAT) {
 468                 retval |= PIPE_BIND_VERTEX_BUFFER;
 469             }
 470         } else {
 471             /* SW TCL */
 472             if (!util_format_is_pure_integer(format)) {
 473                 retval |= PIPE_BIND_VERTEX_BUFFER;
 474             }
 475         }
 476     }
 477
 478     /* Transfers are always supported. */
 479     if (usage & PIPE_BIND_TRANSFER_READ)
 480         retval |= PIPE_BIND_TRANSFER_READ;
 481     if (usage & PIPE_BIND_TRANSFER_WRITE)
 482         retval |= PIPE_BIND_TRANSFER_WRITE;
 483
 484     return retval == usage;
 485 }
 486
 487 static void r300_destroy_screen(struct pipe_screen* pscreen)
 488 {
 489     struct r300_screen* r300screen = r300_screen(pscreen);
 490     struct radeon_winsys *rws = radeon_winsys(pscreen);
 491
 492     if (rws)
 493       rws->destroy(rws);
 494
 495     FREE(r300screen);
 496 }
 497
 498 static void r300_fence_reference(struct pipe_screen *screen,
 499                                  struct pipe_fence_handle **ptr,
 500                                  struct pipe_fence_handle *fence)
 501 {
 502     pb_reference((struct pb_buffer**)ptr,
 503                              (struct pb_buffer*)fence);
 504 }
 505
 506 static boolean r300_fence_signalled(struct pipe_screen *screen,
 507                                     struct pipe_fence_handle *fence)
 508 {
 509     struct radeon_winsys *rws = r300_screen(screen)->rws;
 510     struct pb_buffer *rfence = (struct pb_buffer*)fence;
 511
 512     return !rws->buffer_is_busy(rfence, RADEON_USAGE_READWRITE);
 513 }
 514
 515 static boolean r300_fence_finish(struct pipe_screen *screen,
 516                                  struct pipe_fence_handle *fence,
 517                                  uint64_t timeout)
 518 {
 519     struct radeon_winsys *rws = r300_screen(screen)->rws;
 520     struct pb_buffer *rfence = (struct pb_buffer*)fence;
 521
 522     if (timeout != PIPE_TIMEOUT_INFINITE) {
 523         int64_t start_time = os_time_get();
 524
 525         /* Convert to microseconds. */
 526         timeout /= 1000;
 527
 528         /* Wait in a loop. */
 529         while (rws->buffer_is_busy(rfence, RADEON_USAGE_READWRITE)) {
 530             if (os_time_get() - start_time >= timeout) {
 531                 return FALSE;
 532             }
 533             os_time_sleep(10);
 534         }
 535         return TRUE;
 536     }
 537
 538     rws->buffer_wait(rfence, RADEON_USAGE_READWRITE);
 539     return TRUE;
 540 }
 541
 542 struct pipe_screen* r300_screen_create(struct radeon_winsys *rws)
 543 {
 544     struct r300_screen *r300screen = CALLOC_STRUCT(r300_screen);
 545
 546     if (!r300screen) {
 547         FREE(r300screen);
 548         return NULL;
 549     }
 550
 551     rws->query_info(rws, &r300screen->info);
 552
 553     r300_init_debug(r300screen);
 554     r300_parse_chipset(r300screen->info.pci_id, &r300screen->caps);
 555
 556     if (SCREEN_DBG_ON(r300screen, DBG_NO_ZMASK))
 557         r300screen->caps.zmask_ram = 0;
 558     if (SCREEN_DBG_ON(r300screen, DBG_NO_HIZ))
 559         r300screen->caps.hiz_ram = 0;
 560
 561     if (r300screen->info.drm_minor < 8)
 562         r300screen->caps.has_us_format = FALSE;
 563
 564     r300screen->rws = rws;
 565     r300screen->screen.destroy = r300_destroy_screen;
 566     r300screen->screen.get_name = r300_get_name;
 567     r300screen->screen.get_vendor = r300_get_vendor;
 568     r300screen->screen.get_param = r300_get_param;
 569     r300screen->screen.get_shader_param = r300_get_shader_param;
 570     r300screen->screen.get_paramf = r300_get_paramf;
 571     r300screen->screen.get_video_param = r300_get_video_param;
 572     r300screen->screen.is_format_supported = r300_is_format_supported;
 573     r300screen->screen.is_video_format_supported = vl_video_buffer_is_format_supported;
 574     r300screen->screen.context_create = r300_create_context;
 575     r300screen->screen.fence_reference = r300_fence_reference;
 576     r300screen->screen.fence_signalled = r300_fence_signalled;
 577     r300screen->screen.fence_finish = r300_fence_finish;
 578
 579     r300_init_screen_resource_functions(r300screen);
 580
 581     util_format_s3tc_init();
 582
 583     return &r300screen->screen;
 584 }