gallium: new shader cap bit for the amount of sampler views
[mesa.git] / src / gallium / drivers / r300 / r300_screen.c
1 /*
2 * Copyright 2008 Corbin Simpson <MostAwesomeDude@gmail.com>
3 * Copyright 2010 Marek Olšák <maraeo@gmail.com>
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * on the rights to use, copy, modify, merge, publish, distribute, sub
9 * license, and/or sell copies of the Software, and to permit persons to whom
10 * the Software is furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
14 * Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
20 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
21 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
22 * USE OR OTHER DEALINGS IN THE SOFTWARE. */
23
24 #include "util/u_format.h"
25 #include "util/u_format_s3tc.h"
26 #include "util/u_memory.h"
27 #include "os/os_time.h"
28 #include "vl/vl_decoder.h"
29 #include "vl/vl_video_buffer.h"
30
31 #include "r300_context.h"
32 #include "r300_texture.h"
33 #include "r300_screen_buffer.h"
34 #include "r300_state_inlines.h"
35 #include "r300_public.h"
36
37 #include "draw/draw_context.h"
38
39 /* Return the identifier behind whom the brave coders responsible for this
40 * amalgamation of code, sweat, and duct tape, routinely obscure their names.
41 *
42 * ...I should have just put "Corbin Simpson", but I'm not that cool.
43 *
44 * (Or egotistical. Yet.) */
45 static const char* r300_get_vendor(struct pipe_screen* pscreen)
46 {
47 return "X.Org R300 Project";
48 }
49
50 static const char* chip_families[] = {
51 "unknown",
52 "ATI R300",
53 "ATI R350",
54 "ATI RV350",
55 "ATI RV370",
56 "ATI RV380",
57 "ATI RS400",
58 "ATI RC410",
59 "ATI RS480",
60 "ATI R420",
61 "ATI R423",
62 "ATI R430",
63 "ATI R480",
64 "ATI R481",
65 "ATI RV410",
66 "ATI RS600",
67 "ATI RS690",
68 "ATI RS740",
69 "ATI RV515",
70 "ATI R520",
71 "ATI RV530",
72 "ATI R580",
73 "ATI RV560",
74 "ATI RV570"
75 };
76
77 static const char* r300_get_name(struct pipe_screen* pscreen)
78 {
79 struct r300_screen* r300screen = r300_screen(pscreen);
80
81 return chip_families[r300screen->caps.family];
82 }
83
84 static int r300_get_param(struct pipe_screen* pscreen, enum pipe_cap param)
85 {
86 struct r300_screen* r300screen = r300_screen(pscreen);
87 boolean is_r500 = r300screen->caps.is_r500;
88
89 switch (param) {
90 /* Supported features (boolean caps). */
91 case PIPE_CAP_NPOT_TEXTURES:
92 case PIPE_CAP_MIXED_FRAMEBUFFER_SIZES:
93 case PIPE_CAP_TWO_SIDED_STENCIL:
94 case PIPE_CAP_ANISOTROPIC_FILTER:
95 case PIPE_CAP_POINT_SPRITE:
96 case PIPE_CAP_OCCLUSION_QUERY:
97 case PIPE_CAP_TEXTURE_SHADOW_MAP:
98 case PIPE_CAP_TEXTURE_MIRROR_CLAMP:
99 case PIPE_CAP_BLEND_EQUATION_SEPARATE:
100 case PIPE_CAP_VERTEX_ELEMENT_INSTANCE_DIVISOR:
101 case PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT:
102 case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER:
103 case PIPE_CAP_CONDITIONAL_RENDER:
104 case PIPE_CAP_TEXTURE_BARRIER:
105 case PIPE_CAP_TGSI_CAN_COMPACT_CONSTANTS:
106 case PIPE_CAP_USER_INDEX_BUFFERS:
107 case PIPE_CAP_USER_CONSTANT_BUFFERS:
108 case PIPE_CAP_PREFER_BLIT_BASED_TEXTURE_TRANSFER:
109 return 1;
110
111 case PIPE_CAP_MIN_MAP_BUFFER_ALIGNMENT:
112 return R300_BUFFER_ALIGNMENT;
113
114 case PIPE_CAP_CONSTANT_BUFFER_OFFSET_ALIGNMENT:
115 return 16;
116
117 case PIPE_CAP_GLSL_FEATURE_LEVEL:
118 return 120;
119
120 /* r300 cannot do swizzling of compressed textures. Supported otherwise. */
121 case PIPE_CAP_TEXTURE_SWIZZLE:
122 return util_format_s3tc_enabled ? r300screen->caps.dxtc_swizzle : 1;
123
124 /* We don't support color clamping on r500, so that we can use color
125 * intepolators for generic varyings. */
126 case PIPE_CAP_VERTEX_COLOR_CLAMPED:
127 return !is_r500;
128
129 /* Supported on r500 only. */
130 case PIPE_CAP_VERTEX_COLOR_UNCLAMPED:
131 case PIPE_CAP_MIXED_COLORBUFFER_FORMATS:
132 case PIPE_CAP_SM3:
133 return is_r500 ? 1 : 0;
134
135 /* Unsupported features. */
136 case PIPE_CAP_QUERY_TIME_ELAPSED:
137 case PIPE_CAP_QUERY_PIPELINE_STATISTICS:
138 case PIPE_CAP_MAX_DUAL_SOURCE_RENDER_TARGETS:
139 case PIPE_CAP_INDEP_BLEND_ENABLE:
140 case PIPE_CAP_INDEP_BLEND_FUNC:
141 case PIPE_CAP_DEPTH_CLIP_DISABLE:
142 case PIPE_CAP_SHADER_STENCIL_EXPORT:
143 case PIPE_CAP_MAX_TEXTURE_ARRAY_LAYERS:
144 case PIPE_CAP_TGSI_INSTANCEID:
145 case PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT:
146 case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER:
147 case PIPE_CAP_SEAMLESS_CUBE_MAP:
148 case PIPE_CAP_SEAMLESS_CUBE_MAP_PER_TEXTURE:
149 case PIPE_CAP_SCALED_RESOLVE:
150 case PIPE_CAP_MIN_TEXEL_OFFSET:
151 case PIPE_CAP_MAX_TEXEL_OFFSET:
152 case PIPE_CAP_MAX_STREAM_OUTPUT_BUFFERS:
153 case PIPE_CAP_MAX_STREAM_OUTPUT_SEPARATE_COMPONENTS:
154 case PIPE_CAP_MAX_STREAM_OUTPUT_INTERLEAVED_COMPONENTS:
155 case PIPE_CAP_STREAM_OUTPUT_PAUSE_RESUME:
156 case PIPE_CAP_FRAGMENT_COLOR_CLAMPED:
157 case PIPE_CAP_QUADS_FOLLOW_PROVOKING_VERTEX_CONVENTION:
158 case PIPE_CAP_COMPUTE:
159 case PIPE_CAP_START_INSTANCE:
160 case PIPE_CAP_QUERY_TIMESTAMP:
161 case PIPE_CAP_TEXTURE_MULTISAMPLE:
162 case PIPE_CAP_CUBE_MAP_ARRAY:
163 case PIPE_CAP_TEXTURE_BUFFER_OBJECTS:
164 case PIPE_CAP_TEXTURE_BUFFER_OFFSET_ALIGNMENT:
165 case PIPE_CAP_TEXTURE_BORDER_COLOR_QUIRK:
166 case PIPE_CAP_MAX_TEXTURE_BUFFER_SIZE:
167 return 0;
168
169 /* SWTCL-only features. */
170 case PIPE_CAP_PRIMITIVE_RESTART:
171 case PIPE_CAP_USER_VERTEX_BUFFERS:
172 return !r300screen->caps.has_tcl;
173
174 /* HWTCL-only features / limitations. */
175 case PIPE_CAP_VERTEX_BUFFER_OFFSET_4BYTE_ALIGNED_ONLY:
176 case PIPE_CAP_VERTEX_BUFFER_STRIDE_4BYTE_ALIGNED_ONLY:
177 case PIPE_CAP_VERTEX_ELEMENT_SRC_OFFSET_4BYTE_ALIGNED_ONLY:
178 return r300screen->caps.has_tcl;
179 case PIPE_CAP_TGSI_TEXCOORD:
180 return 0;
181
182 /* Texturing. */
183 case PIPE_CAP_MAX_COMBINED_SAMPLERS:
184 return r300screen->caps.num_tex_units;
185 case PIPE_CAP_MAX_TEXTURE_2D_LEVELS:
186 case PIPE_CAP_MAX_TEXTURE_3D_LEVELS:
187 case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS:
188 /* 13 == 4096, 12 == 2048 */
189 return is_r500 ? 13 : 12;
190
191 /* Render targets. */
192 case PIPE_CAP_MAX_RENDER_TARGETS:
193 return 4;
194 case PIPE_CAP_ENDIANNESS:
195 return PIPE_ENDIAN_LITTLE;
196
197 case PIPE_CAP_MAX_VIEWPORTS:
198 return 1;
199 }
200 return 0;
201 }
202
203 static int r300_get_shader_param(struct pipe_screen *pscreen, unsigned shader, enum pipe_shader_cap param)
204 {
205 struct r300_screen* r300screen = r300_screen(pscreen);
206 boolean is_r400 = r300screen->caps.is_r400;
207 boolean is_r500 = r300screen->caps.is_r500;
208
209 switch (shader) {
210 case PIPE_SHADER_FRAGMENT:
211 switch (param)
212 {
213 case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
214 return is_r500 || is_r400 ? 512 : 96;
215 case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
216 return is_r500 || is_r400 ? 512 : 64;
217 case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
218 return is_r500 || is_r400 ? 512 : 32;
219 case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
220 return is_r500 ? 511 : 4;
221 case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:
222 return is_r500 ? 64 : 0; /* Actually unlimited on r500. */
223 /* Fragment shader limits. */
224 case PIPE_SHADER_CAP_MAX_INPUTS:
225 /* 2 colors + 8 texcoords are always supported
226 * (minus fog and wpos).
227 *
228 * R500 has the ability to turn 3rd and 4th color into
229 * additional texcoords but there is no two-sided color
230 * selection then. However the facing bit can be used instead. */
231 return 10;
232 case PIPE_SHADER_CAP_MAX_CONSTS:
233 return is_r500 ? 256 : 32;
234 case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
235 return 1;
236 case PIPE_SHADER_CAP_MAX_TEMPS:
237 return is_r500 ? 128 : is_r400 ? 64 : 32;
238 case PIPE_SHADER_CAP_MAX_PREDS:
239 return is_r500 ? 1 : 0;
240 case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
241 case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS:
242 return r300screen->caps.num_tex_units;
243 case PIPE_SHADER_CAP_MAX_ADDRS:
244 case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
245 case PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED:
246 case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
247 case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
248 case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
249 case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
250 case PIPE_SHADER_CAP_SUBROUTINES:
251 case PIPE_SHADER_CAP_INTEGERS:
252 return 0;
253 case PIPE_SHADER_CAP_PREFERRED_IR:
254 return PIPE_SHADER_IR_TGSI;
255 }
256 break;
257 case PIPE_SHADER_VERTEX:
258 switch (param)
259 {
260 case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
261 case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS:
262 case PIPE_SHADER_CAP_SUBROUTINES:
263 return 0;
264 default:;
265 }
266
267 if (!r300screen->caps.has_tcl) {
268 return draw_get_shader_param(shader, param);
269 }
270
271 switch (param)
272 {
273 case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
274 case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
275 return is_r500 ? 1024 : 256;
276 case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:
277 return is_r500 ? 4 : 0; /* For loops; not sure about conditionals. */
278 case PIPE_SHADER_CAP_MAX_INPUTS:
279 return 16;
280 case PIPE_SHADER_CAP_MAX_CONSTS:
281 return 256;
282 case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
283 return 1;
284 case PIPE_SHADER_CAP_MAX_TEMPS:
285 return 32;
286 case PIPE_SHADER_CAP_MAX_ADDRS:
287 return 1; /* XXX guessed */
288 case PIPE_SHADER_CAP_MAX_PREDS:
289 return is_r500 ? 4 : 0; /* XXX guessed. */
290 case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
291 return 1;
292 case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
293 case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
294 case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
295 case PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED:
296 case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
297 case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
298 case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
299 case PIPE_SHADER_CAP_SUBROUTINES:
300 case PIPE_SHADER_CAP_INTEGERS:
301 case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
302 case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS:
303 return 0;
304 case PIPE_SHADER_CAP_PREFERRED_IR:
305 return PIPE_SHADER_IR_TGSI;
306 }
307 break;
308 }
309 return 0;
310 }
311
312 static float r300_get_paramf(struct pipe_screen* pscreen,
313 enum pipe_capf param)
314 {
315 struct r300_screen* r300screen = r300_screen(pscreen);
316
317 switch (param) {
318 case PIPE_CAPF_MAX_LINE_WIDTH:
319 case PIPE_CAPF_MAX_LINE_WIDTH_AA:
320 case PIPE_CAPF_MAX_POINT_WIDTH:
321 case PIPE_CAPF_MAX_POINT_WIDTH_AA:
322 /* The maximum dimensions of the colorbuffer are our practical
323 * rendering limits. 2048 pixels should be enough for anybody. */
324 if (r300screen->caps.is_r500) {
325 return 4096.0f;
326 } else if (r300screen->caps.is_r400) {
327 return 4021.0f;
328 } else {
329 return 2560.0f;
330 }
331 case PIPE_CAPF_MAX_TEXTURE_ANISOTROPY:
332 return 16.0f;
333 case PIPE_CAPF_MAX_TEXTURE_LOD_BIAS:
334 return 16.0f;
335 case PIPE_CAPF_GUARD_BAND_LEFT:
336 case PIPE_CAPF_GUARD_BAND_TOP:
337 case PIPE_CAPF_GUARD_BAND_RIGHT:
338 case PIPE_CAPF_GUARD_BAND_BOTTOM:
339 /* XXX I don't know what these should be but the least we can do is
340 * silence the potential error message */
341 return 0.0f;
342 default:
343 debug_printf("r300: Warning: Unknown CAP %d in get_paramf.\n",
344 param);
345 return 0.0f;
346 }
347 }
348
349 static int r300_get_video_param(struct pipe_screen *screen,
350 enum pipe_video_profile profile,
351 enum pipe_video_entrypoint entrypoint,
352 enum pipe_video_cap param)
353 {
354 switch (param) {
355 case PIPE_VIDEO_CAP_SUPPORTED:
356 return vl_profile_supported(screen, profile, entrypoint);
357 case PIPE_VIDEO_CAP_NPOT_TEXTURES:
358 return 0;
359 case PIPE_VIDEO_CAP_MAX_WIDTH:
360 case PIPE_VIDEO_CAP_MAX_HEIGHT:
361 return vl_video_buffer_max_size(screen);
362 case PIPE_VIDEO_CAP_PREFERED_FORMAT:
363 return PIPE_FORMAT_NV12;
364 case PIPE_VIDEO_CAP_PREFERS_INTERLACED:
365 return false;
366 case PIPE_VIDEO_CAP_SUPPORTS_INTERLACED:
367 return false;
368 case PIPE_VIDEO_CAP_SUPPORTS_PROGRESSIVE:
369 return true;
370 case PIPE_VIDEO_CAP_MAX_LEVEL:
371 return vl_level_supported(screen, profile);
372 default:
373 return 0;
374 }
375 }
376
377 /**
378 * Whether the format matches:
379 * PIPE_FORMAT_?10?10?10?2_UNORM
380 */
381 static INLINE boolean
382 util_format_is_rgba1010102_variant(const struct util_format_description *desc)
383 {
384 static const unsigned size[4] = {10, 10, 10, 2};
385 unsigned chan;
386
387 if (desc->block.width != 1 ||
388 desc->block.height != 1 ||
389 desc->block.bits != 32)
390 return FALSE;
391
392 for (chan = 0; chan < 4; ++chan) {
393 if(desc->channel[chan].type != UTIL_FORMAT_TYPE_UNSIGNED &&
394 desc->channel[chan].type != UTIL_FORMAT_TYPE_VOID)
395 return FALSE;
396 if (desc->channel[chan].size != size[chan])
397 return FALSE;
398 }
399
400 return TRUE;
401 }
402
403 static boolean r300_is_format_supported(struct pipe_screen* screen,
404 enum pipe_format format,
405 enum pipe_texture_target target,
406 unsigned sample_count,
407 unsigned usage)
408 {
409 uint32_t retval = 0;
410 boolean drm_2_8_0 = r300_screen(screen)->info.drm_minor >= 8;
411 boolean is_r500 = r300_screen(screen)->caps.is_r500;
412 boolean is_r400 = r300_screen(screen)->caps.is_r400;
413 boolean is_color2101010 = format == PIPE_FORMAT_R10G10B10A2_UNORM ||
414 format == PIPE_FORMAT_R10G10B10X2_SNORM ||
415 format == PIPE_FORMAT_B10G10R10A2_UNORM ||
416 format == PIPE_FORMAT_R10SG10SB10SA2U_NORM;
417 boolean is_ati1n = format == PIPE_FORMAT_RGTC1_UNORM ||
418 format == PIPE_FORMAT_RGTC1_SNORM ||
419 format == PIPE_FORMAT_LATC1_UNORM ||
420 format == PIPE_FORMAT_LATC1_SNORM;
421 boolean is_ati2n = format == PIPE_FORMAT_RGTC2_UNORM ||
422 format == PIPE_FORMAT_RGTC2_SNORM ||
423 format == PIPE_FORMAT_LATC2_UNORM ||
424 format == PIPE_FORMAT_LATC2_SNORM;
425 boolean is_x16f_xy16f = format == PIPE_FORMAT_R16_FLOAT ||
426 format == PIPE_FORMAT_R16G16_FLOAT ||
427 format == PIPE_FORMAT_A16_FLOAT ||
428 format == PIPE_FORMAT_L16_FLOAT ||
429 format == PIPE_FORMAT_L16A16_FLOAT ||
430 format == PIPE_FORMAT_R16A16_FLOAT ||
431 format == PIPE_FORMAT_I16_FLOAT;
432 boolean is_half_float = format == PIPE_FORMAT_R16_FLOAT ||
433 format == PIPE_FORMAT_R16G16_FLOAT ||
434 format == PIPE_FORMAT_R16G16B16_FLOAT ||
435 format == PIPE_FORMAT_R16G16B16A16_FLOAT ||
436 format == PIPE_FORMAT_R16G16B16X16_FLOAT;
437 const struct util_format_description *desc;
438
439 if (!util_format_is_supported(format, usage))
440 return FALSE;
441
442 /* Check multisampling support. */
443 switch (sample_count) {
444 case 0:
445 case 1:
446 break;
447 case 2:
448 case 4:
449 case 6:
450 /* We need DRM 2.8.0. */
451 if (!drm_2_8_0) {
452 return FALSE;
453 }
454 /* No texturing and scanout. */
455 if (usage & (PIPE_BIND_SAMPLER_VIEW |
456 PIPE_BIND_DISPLAY_TARGET |
457 PIPE_BIND_SCANOUT)) {
458 return FALSE;
459 }
460
461 desc = util_format_description(format);
462
463 if (is_r500) {
464 /* Only allow depth/stencil, RGBA8, RGBA1010102, RGBA16F. */
465 if (!util_format_is_depth_or_stencil(format) &&
466 !util_format_is_rgba8_variant(desc) &&
467 !util_format_is_rgba1010102_variant(desc) &&
468 format != PIPE_FORMAT_R16G16B16A16_FLOAT &&
469 format != PIPE_FORMAT_R16G16B16X16_FLOAT) {
470 return FALSE;
471 }
472 } else {
473 /* Only allow depth/stencil, RGBA8. */
474 if (!util_format_is_depth_or_stencil(format) &&
475 !util_format_is_rgba8_variant(desc)) {
476 return FALSE;
477 }
478 }
479 break;
480 default:
481 return FALSE;
482 }
483
484 /* Check sampler format support. */
485 if ((usage & PIPE_BIND_SAMPLER_VIEW) &&
486 /* these two are broken for an unknown reason */
487 format != PIPE_FORMAT_R8G8B8X8_SNORM &&
488 format != PIPE_FORMAT_R16G16B16X16_SNORM &&
489 /* ATI1N is r5xx-only. */
490 (is_r500 || !is_ati1n) &&
491 /* ATI2N is supported on r4xx-r5xx. */
492 (is_r400 || is_r500 || !is_ati2n) &&
493 /* R16F and RG16F texture support was added in as late as DRM 2.8.0 */
494 (drm_2_8_0 || !is_x16f_xy16f) &&
495 r300_is_sampler_format_supported(format)) {
496 retval |= PIPE_BIND_SAMPLER_VIEW;
497 }
498
499 /* Check colorbuffer format support. */
500 if ((usage & (PIPE_BIND_RENDER_TARGET |
501 PIPE_BIND_DISPLAY_TARGET |
502 PIPE_BIND_SCANOUT |
503 PIPE_BIND_SHARED)) &&
504 /* 2101010 cannot be rendered to on non-r5xx. */
505 (!is_color2101010 || (is_r500 && drm_2_8_0)) &&
506 r300_is_colorbuffer_format_supported(format)) {
507 retval |= usage &
508 (PIPE_BIND_RENDER_TARGET |
509 PIPE_BIND_DISPLAY_TARGET |
510 PIPE_BIND_SCANOUT |
511 PIPE_BIND_SHARED);
512 }
513
514 /* Check depth-stencil format support. */
515 if (usage & PIPE_BIND_DEPTH_STENCIL &&
516 r300_is_zs_format_supported(format)) {
517 retval |= PIPE_BIND_DEPTH_STENCIL;
518 }
519
520 /* Check vertex buffer format support. */
521 if (usage & PIPE_BIND_VERTEX_BUFFER) {
522 if (r300_screen(screen)->caps.has_tcl) {
523 /* Half float is supported on >= R400. */
524 if ((is_r400 || is_r500 || !is_half_float) &&
525 r300_translate_vertex_data_type(format) != R300_INVALID_FORMAT) {
526 retval |= PIPE_BIND_VERTEX_BUFFER;
527 }
528 } else {
529 /* SW TCL */
530 if (!util_format_is_pure_integer(format)) {
531 retval |= PIPE_BIND_VERTEX_BUFFER;
532 }
533 }
534 }
535
536 /* Transfers are always supported. */
537 if (usage & PIPE_BIND_TRANSFER_READ)
538 retval |= PIPE_BIND_TRANSFER_READ;
539 if (usage & PIPE_BIND_TRANSFER_WRITE)
540 retval |= PIPE_BIND_TRANSFER_WRITE;
541
542 return retval == usage;
543 }
544
545 static void r300_destroy_screen(struct pipe_screen* pscreen)
546 {
547 struct r300_screen* r300screen = r300_screen(pscreen);
548 struct radeon_winsys *rws = radeon_winsys(pscreen);
549
550 if (rws && !radeon_winsys_unref(rws))
551 return;
552
553 pipe_mutex_destroy(r300screen->cmask_mutex);
554
555 if (rws)
556 rws->destroy(rws);
557
558 FREE(r300screen);
559 }
560
561 static void r300_fence_reference(struct pipe_screen *screen,
562 struct pipe_fence_handle **ptr,
563 struct pipe_fence_handle *fence)
564 {
565 struct radeon_winsys *rws = r300_screen(screen)->rws;
566
567 rws->fence_reference(ptr, fence);
568 }
569
570 static boolean r300_fence_signalled(struct pipe_screen *screen,
571 struct pipe_fence_handle *fence)
572 {
573 struct radeon_winsys *rws = r300_screen(screen)->rws;
574
575 return rws->fence_wait(rws, fence, 0);
576 }
577
578 static boolean r300_fence_finish(struct pipe_screen *screen,
579 struct pipe_fence_handle *fence,
580 uint64_t timeout)
581 {
582 struct radeon_winsys *rws = r300_screen(screen)->rws;
583
584 return rws->fence_wait(rws, fence, timeout);
585 }
586
587 struct pipe_screen* r300_screen_create(struct radeon_winsys *rws)
588 {
589 struct r300_screen *r300screen = CALLOC_STRUCT(r300_screen);
590
591 if (!r300screen) {
592 FREE(r300screen);
593 return NULL;
594 }
595
596 rws->query_info(rws, &r300screen->info);
597
598 r300_init_debug(r300screen);
599 r300_parse_chipset(r300screen->info.pci_id, &r300screen->caps);
600
601 if (SCREEN_DBG_ON(r300screen, DBG_NO_ZMASK))
602 r300screen->caps.zmask_ram = 0;
603 if (SCREEN_DBG_ON(r300screen, DBG_NO_HIZ))
604 r300screen->caps.hiz_ram = 0;
605
606 if (r300screen->info.drm_minor < 8)
607 r300screen->caps.has_us_format = FALSE;
608
609 r300screen->rws = rws;
610 r300screen->screen.destroy = r300_destroy_screen;
611 r300screen->screen.get_name = r300_get_name;
612 r300screen->screen.get_vendor = r300_get_vendor;
613 r300screen->screen.get_param = r300_get_param;
614 r300screen->screen.get_shader_param = r300_get_shader_param;
615 r300screen->screen.get_paramf = r300_get_paramf;
616 r300screen->screen.get_video_param = r300_get_video_param;
617 r300screen->screen.is_format_supported = r300_is_format_supported;
618 r300screen->screen.is_video_format_supported = vl_video_buffer_is_format_supported;
619 r300screen->screen.context_create = r300_create_context;
620 r300screen->screen.fence_reference = r300_fence_reference;
621 r300screen->screen.fence_signalled = r300_fence_signalled;
622 r300screen->screen.fence_finish = r300_fence_finish;
623
624 r300_init_screen_resource_functions(r300screen);
625
626 util_format_s3tc_init();
627 pipe_mutex_init(r300screen->cmask_mutex);
628
629 return &r300screen->screen;
630 }