src/gallium/drivers/r300/r300_screen.c

   1 /*
   2  * Copyright 2008 Corbin Simpson <MostAwesomeDude@gmail.com>
   3  * Copyright 2010 Marek Olšák <maraeo@gmail.com>
   4  *
   5  * Permission is hereby granted, free of charge, to any person obtaining a
   6  * copy of this software and associated documentation files (the "Software"),
   7  * to deal in the Software without restriction, including without limitation
   8  * on the rights to use, copy, modify, merge, publish, distribute, sub
   9  * license, and/or sell copies of the Software, and to permit persons to whom
  10  * the Software is furnished to do so, subject to the following conditions:
  11  *
  12  * The above copyright notice and this permission notice (including the next
  13  * paragraph) shall be included in all copies or substantial portions of the
  14  * Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  19  * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
  20  * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
  21  * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
  22  * USE OR OTHER DEALINGS IN THE SOFTWARE. */
  23
  24 #include "util/u_format.h"
  25 #include "util/u_format_s3tc.h"
  26 #include "util/u_memory.h"
  27 #include "os/os_time.h"
  28 #include "vl/vl_decoder.h"
  29 #include "vl/vl_video_buffer.h"
  30
  31 #include "r300_context.h"
  32 #include "r300_texture.h"
  33 #include "r300_screen_buffer.h"
  34 #include "r300_state_inlines.h"
  35 #include "r300_public.h"
  36
  37 #include "draw/draw_context.h"
  38
  39 /* Return the identifier behind whom the brave coders responsible for this
  40  * amalgamation of code, sweat, and duct tape, routinely obscure their names.
  41  *
  42  * ...I should have just put "Corbin Simpson", but I'm not that cool.
  43  *
  44  * (Or egotistical. Yet.) */
  45 static const char* r300_get_vendor(struct pipe_screen* pscreen)
  46 {
  47     return "X.Org R300 Project";
  48 }
  49
  50 static const char* r300_get_device_vendor(struct pipe_screen* pscreen)
  51 {
  52     return "ATI";
  53 }
  54
  55 static const char* chip_families[] = {
  56     "unknown",
  57     "ATI R300",
  58     "ATI R350",
  59     "ATI RV350",
  60     "ATI RV370",
  61     "ATI RV380",
  62     "ATI RS400",
  63     "ATI RC410",
  64     "ATI RS480",
  65     "ATI R420",
  66     "ATI R423",
  67     "ATI R430",
  68     "ATI R480",
  69     "ATI R481",
  70     "ATI RV410",
  71     "ATI RS600",
  72     "ATI RS690",
  73     "ATI RS740",
  74     "ATI RV515",
  75     "ATI R520",
  76     "ATI RV530",
  77     "ATI R580",
  78     "ATI RV560",
  79     "ATI RV570"
  80 };
  81
  82 static const char* r300_get_name(struct pipe_screen* pscreen)
  83 {
  84     struct r300_screen* r300screen = r300_screen(pscreen);
  85
  86     return chip_families[r300screen->caps.family];
  87 }
  88
  89 static int r300_get_param(struct pipe_screen* pscreen, enum pipe_cap param)
  90 {
  91     struct r300_screen* r300screen = r300_screen(pscreen);
  92     boolean is_r500 = r300screen->caps.is_r500;
  93
  94     switch (param) {
  95         /* Supported features (boolean caps). */
  96         case PIPE_CAP_NPOT_TEXTURES:
  97         case PIPE_CAP_MIXED_FRAMEBUFFER_SIZES:
  98         case PIPE_CAP_TWO_SIDED_STENCIL:
  99         case PIPE_CAP_ANISOTROPIC_FILTER:
 100         case PIPE_CAP_POINT_SPRITE:
 101         case PIPE_CAP_OCCLUSION_QUERY:
 102         case PIPE_CAP_TEXTURE_SHADOW_MAP:
 103         case PIPE_CAP_TEXTURE_MIRROR_CLAMP:
 104         case PIPE_CAP_BLEND_EQUATION_SEPARATE:
 105         case PIPE_CAP_VERTEX_ELEMENT_INSTANCE_DIVISOR:
 106         case PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT:
 107         case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER:
 108         case PIPE_CAP_CONDITIONAL_RENDER:
 109         case PIPE_CAP_TEXTURE_BARRIER:
 110         case PIPE_CAP_TGSI_CAN_COMPACT_CONSTANTS:
 111         case PIPE_CAP_USER_INDEX_BUFFERS:
 112         case PIPE_CAP_USER_CONSTANT_BUFFERS:
 113         case PIPE_CAP_PREFER_BLIT_BASED_TEXTURE_TRANSFER:
 114         case PIPE_CAP_BUFFER_MAP_PERSISTENT_COHERENT:
 115         case PIPE_CAP_CLIP_HALFZ:
 116             return 1;
 117
 118         case PIPE_CAP_MIN_MAP_BUFFER_ALIGNMENT:
 119             return R300_BUFFER_ALIGNMENT;
 120
 121         case PIPE_CAP_CONSTANT_BUFFER_OFFSET_ALIGNMENT:
 122             return 16;
 123
 124         case PIPE_CAP_GLSL_FEATURE_LEVEL:
 125             return 120;
 126
 127         /* r300 cannot do swizzling of compressed textures. Supported otherwise. */
 128         case PIPE_CAP_TEXTURE_SWIZZLE:
 129             return util_format_s3tc_enabled ? r300screen->caps.dxtc_swizzle : 1;
 130
 131         /* We don't support color clamping on r500, so that we can use color
 132          * intepolators for generic varyings. */
 133         case PIPE_CAP_VERTEX_COLOR_CLAMPED:
 134             return !is_r500;
 135
 136         /* Supported on r500 only. */
 137         case PIPE_CAP_VERTEX_COLOR_UNCLAMPED:
 138         case PIPE_CAP_MIXED_COLORBUFFER_FORMATS:
 139         case PIPE_CAP_SM3:
 140             return is_r500 ? 1 : 0;
 141
 142         /* Unsupported features. */
 143         case PIPE_CAP_QUERY_TIME_ELAPSED:
 144         case PIPE_CAP_QUERY_PIPELINE_STATISTICS:
 145         case PIPE_CAP_MAX_DUAL_SOURCE_RENDER_TARGETS:
 146         case PIPE_CAP_INDEP_BLEND_ENABLE:
 147         case PIPE_CAP_INDEP_BLEND_FUNC:
 148         case PIPE_CAP_DEPTH_CLIP_DISABLE:
 149         case PIPE_CAP_SHADER_STENCIL_EXPORT:
 150         case PIPE_CAP_MAX_TEXTURE_ARRAY_LAYERS:
 151         case PIPE_CAP_TGSI_INSTANCEID:
 152         case PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT:
 153         case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER:
 154         case PIPE_CAP_SEAMLESS_CUBE_MAP:
 155         case PIPE_CAP_SEAMLESS_CUBE_MAP_PER_TEXTURE:
 156         case PIPE_CAP_MIN_TEXEL_OFFSET:
 157         case PIPE_CAP_MAX_TEXEL_OFFSET:
 158         case PIPE_CAP_MIN_TEXTURE_GATHER_OFFSET:
 159         case PIPE_CAP_MAX_TEXTURE_GATHER_OFFSET:
 160         case PIPE_CAP_MAX_STREAM_OUTPUT_BUFFERS:
 161         case PIPE_CAP_MAX_STREAM_OUTPUT_SEPARATE_COMPONENTS:
 162         case PIPE_CAP_MAX_STREAM_OUTPUT_INTERLEAVED_COMPONENTS:
 163         case PIPE_CAP_MAX_GEOMETRY_OUTPUT_VERTICES:
 164         case PIPE_CAP_MAX_GEOMETRY_TOTAL_OUTPUT_COMPONENTS:
 165         case PIPE_CAP_MAX_VERTEX_STREAMS:
 166         case PIPE_CAP_STREAM_OUTPUT_PAUSE_RESUME:
 167         case PIPE_CAP_FRAGMENT_COLOR_CLAMPED:
 168         case PIPE_CAP_QUADS_FOLLOW_PROVOKING_VERTEX_CONVENTION:
 169         case PIPE_CAP_COMPUTE:
 170         case PIPE_CAP_START_INSTANCE:
 171         case PIPE_CAP_QUERY_TIMESTAMP:
 172         case PIPE_CAP_TEXTURE_MULTISAMPLE:
 173         case PIPE_CAP_CUBE_MAP_ARRAY:
 174         case PIPE_CAP_TEXTURE_BUFFER_OBJECTS:
 175         case PIPE_CAP_TEXTURE_BUFFER_OFFSET_ALIGNMENT:
 176         case PIPE_CAP_TEXTURE_BORDER_COLOR_QUIRK:
 177         case PIPE_CAP_MAX_TEXTURE_BUFFER_SIZE:
 178         case PIPE_CAP_TGSI_VS_LAYER_VIEWPORT:
 179         case PIPE_CAP_MAX_TEXTURE_GATHER_COMPONENTS:
 180         case PIPE_CAP_TEXTURE_GATHER_SM5:
 181         case PIPE_CAP_TEXTURE_QUERY_LOD:
 182         case PIPE_CAP_FAKE_SW_MSAA:
 183         case PIPE_CAP_SAMPLE_SHADING:
 184         case PIPE_CAP_TEXTURE_GATHER_OFFSETS:
 185         case PIPE_CAP_DRAW_INDIRECT:
 186         case PIPE_CAP_MULTI_DRAW_INDIRECT:
 187         case PIPE_CAP_MULTI_DRAW_INDIRECT_PARAMS:
 188         case PIPE_CAP_TGSI_FS_FINE_DERIVATIVE:
 189         case PIPE_CAP_CONDITIONAL_RENDER_INVERTED:
 190         case PIPE_CAP_SAMPLER_VIEW_TARGET:
 191         case PIPE_CAP_VERTEXID_NOBASE:
 192         case PIPE_CAP_POLYGON_OFFSET_CLAMP:
 193         case PIPE_CAP_MULTISAMPLE_Z_RESOLVE:
 194         case PIPE_CAP_RESOURCE_FROM_USER_MEMORY:
 195         case PIPE_CAP_DEVICE_RESET_STATUS_QUERY:
 196         case PIPE_CAP_MAX_SHADER_PATCH_VARYINGS:
 197         case PIPE_CAP_TEXTURE_FLOAT_LINEAR:
 198         case PIPE_CAP_TEXTURE_HALF_FLOAT_LINEAR:
 199         case PIPE_CAP_DEPTH_BOUNDS_TEST:
 200         case PIPE_CAP_TGSI_TXQS:
 201         case PIPE_CAP_FORCE_PERSAMPLE_INTERP:
 202         case PIPE_CAP_SHAREABLE_SHADERS:
 203         case PIPE_CAP_COPY_BETWEEN_COMPRESSED_AND_PLAIN_FORMATS:
 204         case PIPE_CAP_CLEAR_TEXTURE:
 205         case PIPE_CAP_DRAW_PARAMETERS:
 206         case PIPE_CAP_TGSI_PACK_HALF_FLOAT:
 207         case PIPE_CAP_TGSI_FS_POSITION_IS_SYSVAL:
 208         case PIPE_CAP_TGSI_FS_FACE_IS_INTEGER_SYSVAL:
 209         case PIPE_CAP_SHADER_BUFFER_OFFSET_ALIGNMENT:
 210         case PIPE_CAP_INVALIDATE_BUFFER:
 211         case PIPE_CAP_GENERATE_MIPMAP:
 212         case PIPE_CAP_STRING_MARKER:
 213         case PIPE_CAP_BUFFER_SAMPLER_VIEW_RGBA_ONLY:
 214         case PIPE_CAP_SURFACE_REINTERPRET_BLOCKS:
 215         case PIPE_CAP_QUERY_BUFFER_OBJECT:
 216         case PIPE_CAP_QUERY_MEMORY_INFO:
 217         case PIPE_CAP_FRAMEBUFFER_NO_ATTACHMENT:
 218         case PIPE_CAP_ROBUST_BUFFER_ACCESS_BEHAVIOR:
 219         case PIPE_CAP_CULL_DISTANCE:
 220             return 0;
 221
 222         /* SWTCL-only features. */
 223         case PIPE_CAP_PRIMITIVE_RESTART:
 224         case PIPE_CAP_USER_VERTEX_BUFFERS:
 225         case PIPE_CAP_TGSI_VS_WINDOW_SPACE_POSITION:
 226             return !r300screen->caps.has_tcl;
 227
 228         /* HWTCL-only features / limitations. */
 229         case PIPE_CAP_VERTEX_BUFFER_OFFSET_4BYTE_ALIGNED_ONLY:
 230         case PIPE_CAP_VERTEX_BUFFER_STRIDE_4BYTE_ALIGNED_ONLY:
 231         case PIPE_CAP_VERTEX_ELEMENT_SRC_OFFSET_4BYTE_ALIGNED_ONLY:
 232             return r300screen->caps.has_tcl;
 233         case PIPE_CAP_TGSI_TEXCOORD:
 234             return 0;
 235
 236         /* Texturing. */
 237         case PIPE_CAP_MAX_TEXTURE_2D_LEVELS:
 238         case PIPE_CAP_MAX_TEXTURE_3D_LEVELS:
 239         case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS:
 240             /* 13 == 4096, 12 == 2048 */
 241             return is_r500 ? 13 : 12;
 242
 243         /* Render targets. */
 244         case PIPE_CAP_MAX_RENDER_TARGETS:
 245             return 4;
 246         case PIPE_CAP_ENDIANNESS:
 247             return PIPE_ENDIAN_LITTLE;
 248
 249         case PIPE_CAP_MAX_VIEWPORTS:
 250             return 1;
 251
 252         case PIPE_CAP_MAX_VERTEX_ATTRIB_STRIDE:
 253             return 2048;
 254
 255         case PIPE_CAP_VENDOR_ID:
 256                 return 0x1002;
 257         case PIPE_CAP_DEVICE_ID:
 258                 return r300screen->info.pci_id;
 259         case PIPE_CAP_ACCELERATED:
 260                 return 1;
 261         case PIPE_CAP_VIDEO_MEMORY:
 262                 return r300screen->info.vram_size >> 20;
 263         case PIPE_CAP_UMA:
 264                 return 0;
 265         case PIPE_CAP_PCI_GROUP:
 266             return r300screen->info.pci_domain;
 267         case PIPE_CAP_PCI_BUS:
 268             return r300screen->info.pci_bus;
 269         case PIPE_CAP_PCI_DEVICE:
 270             return r300screen->info.pci_dev;
 271         case PIPE_CAP_PCI_FUNCTION:
 272             return r300screen->info.pci_func;
 273     }
 274     return 0;
 275 }
 276
 277 static int r300_get_shader_param(struct pipe_screen *pscreen, unsigned shader, enum pipe_shader_cap param)
 278 {
 279    struct r300_screen* r300screen = r300_screen(pscreen);
 280    boolean is_r400 = r300screen->caps.is_r400;
 281    boolean is_r500 = r300screen->caps.is_r500;
 282
 283    switch (shader) {
 284     case PIPE_SHADER_FRAGMENT:
 285         switch (param)
 286         {
 287         case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
 288             return is_r500 || is_r400 ? 512 : 96;
 289         case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
 290             return is_r500 || is_r400 ? 512 : 64;
 291         case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
 292             return is_r500 || is_r400 ? 512 : 32;
 293         case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
 294             return is_r500 ? 511 : 4;
 295         case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:
 296             return is_r500 ? 64 : 0; /* Actually unlimited on r500. */
 297             /* Fragment shader limits. */
 298         case PIPE_SHADER_CAP_MAX_INPUTS:
 299             /* 2 colors + 8 texcoords are always supported
 300              * (minus fog and wpos).
 301              *
 302              * R500 has the ability to turn 3rd and 4th color into
 303              * additional texcoords but there is no two-sided color
 304              * selection then. However the facing bit can be used instead. */
 305             return 10;
 306         case PIPE_SHADER_CAP_MAX_OUTPUTS:
 307             return 4;
 308         case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE:
 309             return (is_r500 ? 256 : 32) * sizeof(float[4]);
 310         case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
 311         case PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE:
 312             return 1;
 313         case PIPE_SHADER_CAP_MAX_TEMPS:
 314             return is_r500 ? 128 : is_r400 ? 64 : 32;
 315         case PIPE_SHADER_CAP_MAX_PREDS:
 316             return 0; /* unused */
 317         case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
 318         case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS:
 319            return r300screen->caps.num_tex_units;
 320         case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
 321         case PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED:
 322         case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
 323         case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
 324         case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
 325         case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
 326         case PIPE_SHADER_CAP_SUBROUTINES:
 327         case PIPE_SHADER_CAP_INTEGERS:
 328         case PIPE_SHADER_CAP_DOUBLES:
 329         case PIPE_SHADER_CAP_TGSI_DROUND_SUPPORTED:
 330         case PIPE_SHADER_CAP_TGSI_DFRACEXP_DLDEXP_SUPPORTED:
 331         case PIPE_SHADER_CAP_TGSI_FMA_SUPPORTED:
 332         case PIPE_SHADER_CAP_MAX_SHADER_BUFFERS:
 333         case PIPE_SHADER_CAP_MAX_SHADER_IMAGES:
 334             return 0;
 335         case PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT:
 336             return 32;
 337         case PIPE_SHADER_CAP_PREFERRED_IR:
 338             return PIPE_SHADER_IR_TGSI;
 339         case PIPE_SHADER_CAP_SUPPORTED_IRS:
 340             return 0;
 341         }
 342         break;
 343     case PIPE_SHADER_VERTEX:
 344         switch (param)
 345         {
 346         case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
 347         case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS:
 348         case PIPE_SHADER_CAP_SUBROUTINES:
 349             return 0;
 350         default:;
 351         }
 352
 353         if (!r300screen->caps.has_tcl) {
 354             return draw_get_shader_param(shader, param);
 355         }
 356
 357         switch (param)
 358         {
 359         case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
 360         case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
 361             return is_r500 ? 1024 : 256;
 362         case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:
 363             return is_r500 ? 4 : 0; /* For loops; not sure about conditionals. */
 364         case PIPE_SHADER_CAP_MAX_INPUTS:
 365             return 16;
 366         case PIPE_SHADER_CAP_MAX_OUTPUTS:
 367             return 10;
 368         case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE:
 369             return 256 * sizeof(float[4]);
 370         case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
 371             return 1;
 372         case PIPE_SHADER_CAP_MAX_TEMPS:
 373             return 32;
 374         case PIPE_SHADER_CAP_MAX_PREDS:
 375             return 0; /* unused */
 376         case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
 377         case PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE:
 378             return 1;
 379         case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
 380         case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
 381         case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
 382         case PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED:
 383         case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
 384         case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
 385         case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
 386         case PIPE_SHADER_CAP_SUBROUTINES:
 387         case PIPE_SHADER_CAP_INTEGERS:
 388         case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
 389         case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS:
 390         case PIPE_SHADER_CAP_DOUBLES:
 391         case PIPE_SHADER_CAP_TGSI_DROUND_SUPPORTED:
 392         case PIPE_SHADER_CAP_TGSI_DFRACEXP_DLDEXP_SUPPORTED:
 393         case PIPE_SHADER_CAP_TGSI_FMA_SUPPORTED:
 394         case PIPE_SHADER_CAP_MAX_SHADER_BUFFERS:
 395         case PIPE_SHADER_CAP_MAX_SHADER_IMAGES:
 396             return 0;
 397         case PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT:
 398             return 32;
 399         case PIPE_SHADER_CAP_PREFERRED_IR:
 400             return PIPE_SHADER_IR_TGSI;
 401         case PIPE_SHADER_CAP_SUPPORTED_IRS:
 402             return 0;
 403         }
 404         break;
 405     }
 406     return 0;
 407 }
 408
 409 static float r300_get_paramf(struct pipe_screen* pscreen,
 410                              enum pipe_capf param)
 411 {
 412     struct r300_screen* r300screen = r300_screen(pscreen);
 413
 414     switch (param) {
 415         case PIPE_CAPF_MAX_LINE_WIDTH:
 416         case PIPE_CAPF_MAX_LINE_WIDTH_AA:
 417         case PIPE_CAPF_MAX_POINT_WIDTH:
 418         case PIPE_CAPF_MAX_POINT_WIDTH_AA:
 419             /* The maximum dimensions of the colorbuffer are our practical
 420              * rendering limits. 2048 pixels should be enough for anybody. */
 421             if (r300screen->caps.is_r500) {
 422                 return 4096.0f;
 423             } else if (r300screen->caps.is_r400) {
 424                 return 4021.0f;
 425             } else {
 426                 return 2560.0f;
 427             }
 428         case PIPE_CAPF_MAX_TEXTURE_ANISOTROPY:
 429             return 16.0f;
 430         case PIPE_CAPF_MAX_TEXTURE_LOD_BIAS:
 431             return 16.0f;
 432         case PIPE_CAPF_GUARD_BAND_LEFT:
 433         case PIPE_CAPF_GUARD_BAND_TOP:
 434         case PIPE_CAPF_GUARD_BAND_RIGHT:
 435         case PIPE_CAPF_GUARD_BAND_BOTTOM:
 436             return 0.0f;
 437         default:
 438             debug_printf("r300: Warning: Unknown CAP %d in get_paramf.\n",
 439                          param);
 440             return 0.0f;
 441     }
 442 }
 443
 444 static int r300_get_video_param(struct pipe_screen *screen,
 445                                 enum pipe_video_profile profile,
 446                                 enum pipe_video_entrypoint entrypoint,
 447                                 enum pipe_video_cap param)
 448 {
 449    switch (param) {
 450       case PIPE_VIDEO_CAP_SUPPORTED:
 451          return vl_profile_supported(screen, profile, entrypoint);
 452       case PIPE_VIDEO_CAP_NPOT_TEXTURES:
 453          return 0;
 454       case PIPE_VIDEO_CAP_MAX_WIDTH:
 455       case PIPE_VIDEO_CAP_MAX_HEIGHT:
 456          return vl_video_buffer_max_size(screen);
 457       case PIPE_VIDEO_CAP_PREFERED_FORMAT:
 458          return PIPE_FORMAT_NV12;
 459       case PIPE_VIDEO_CAP_PREFERS_INTERLACED:
 460          return false;
 461       case PIPE_VIDEO_CAP_SUPPORTS_INTERLACED:
 462          return false;
 463       case PIPE_VIDEO_CAP_SUPPORTS_PROGRESSIVE:
 464          return true;
 465       case PIPE_VIDEO_CAP_MAX_LEVEL:
 466          return vl_level_supported(screen, profile);
 467       default:
 468          return 0;
 469    }
 470 }
 471
 472 /**
 473  * Whether the format matches:
 474  *   PIPE_FORMAT_?10?10?10?2_UNORM
 475  */
 476 static inline boolean
 477 util_format_is_rgba1010102_variant(const struct util_format_description *desc)
 478 {
 479    static const unsigned size[4] = {10, 10, 10, 2};
 480    unsigned chan;
 481
 482    if (desc->block.width != 1 ||
 483        desc->block.height != 1 ||
 484        desc->block.bits != 32)
 485       return FALSE;
 486
 487    for (chan = 0; chan < 4; ++chan) {
 488       if(desc->channel[chan].type != UTIL_FORMAT_TYPE_UNSIGNED &&
 489          desc->channel[chan].type != UTIL_FORMAT_TYPE_VOID)
 490          return FALSE;
 491       if (desc->channel[chan].size != size[chan])
 492          return FALSE;
 493    }
 494
 495    return TRUE;
 496 }
 497
 498 static bool r300_is_blending_supported(struct r300_screen *rscreen,
 499                                        enum pipe_format format)
 500 {
 501     int c;
 502     const struct util_format_description *desc =
 503         util_format_description(format);
 504
 505     if (desc->layout != UTIL_FORMAT_LAYOUT_PLAIN)
 506         return false;
 507
 508     c = util_format_get_first_non_void_channel(format);
 509
 510     /* RGBA16F */
 511     if (rscreen->caps.is_r500 &&
 512         desc->nr_channels == 4 &&
 513         desc->channel[c].size == 16 &&
 514         desc->channel[c].type == UTIL_FORMAT_TYPE_FLOAT)
 515         return true;
 516
 517     if (desc->channel[c].normalized &&
 518         desc->channel[c].type == UTIL_FORMAT_TYPE_UNSIGNED &&
 519         desc->channel[c].size >= 4 &&
 520         desc->channel[c].size <= 10) {
 521         /* RGB10_A2, RGBA8, RGB5_A1, RGBA4, RGB565 */
 522         if (desc->nr_channels >= 3)
 523             return true;
 524
 525         if (format == PIPE_FORMAT_R8G8_UNORM)
 526             return true;
 527
 528         /* R8, I8, L8, A8 */
 529         if (desc->nr_channels == 1)
 530             return true;
 531     }
 532
 533     return false;
 534 }
 535
 536 static boolean r300_is_format_supported(struct pipe_screen* screen,
 537                                         enum pipe_format format,
 538                                         enum pipe_texture_target target,
 539                                         unsigned sample_count,
 540                                         unsigned usage)
 541 {
 542     uint32_t retval = 0;
 543     boolean is_r500 = r300_screen(screen)->caps.is_r500;
 544     boolean is_r400 = r300_screen(screen)->caps.is_r400;
 545     boolean is_color2101010 = format == PIPE_FORMAT_R10G10B10A2_UNORM ||
 546                               format == PIPE_FORMAT_R10G10B10X2_SNORM ||
 547                               format == PIPE_FORMAT_B10G10R10A2_UNORM ||
 548                               format == PIPE_FORMAT_B10G10R10X2_UNORM ||
 549                               format == PIPE_FORMAT_R10SG10SB10SA2U_NORM;
 550     boolean is_ati1n = format == PIPE_FORMAT_RGTC1_UNORM ||
 551                        format == PIPE_FORMAT_RGTC1_SNORM ||
 552                        format == PIPE_FORMAT_LATC1_UNORM ||
 553                        format == PIPE_FORMAT_LATC1_SNORM;
 554     boolean is_ati2n = format == PIPE_FORMAT_RGTC2_UNORM ||
 555                        format == PIPE_FORMAT_RGTC2_SNORM ||
 556                        format == PIPE_FORMAT_LATC2_UNORM ||
 557                        format == PIPE_FORMAT_LATC2_SNORM;
 558     boolean is_half_float = format == PIPE_FORMAT_R16_FLOAT ||
 559                             format == PIPE_FORMAT_R16G16_FLOAT ||
 560                             format == PIPE_FORMAT_R16G16B16_FLOAT ||
 561                             format == PIPE_FORMAT_R16G16B16A16_FLOAT ||
 562                             format == PIPE_FORMAT_R16G16B16X16_FLOAT;
 563     const struct util_format_description *desc;
 564
 565     if (!util_format_is_supported(format, usage))
 566        return FALSE;
 567
 568     /* Check multisampling support. */
 569     switch (sample_count) {
 570         case 0:
 571         case 1:
 572             break;
 573         case 2:
 574         case 4:
 575         case 6:
 576             /* No texturing and scanout. */
 577             if (usage & (PIPE_BIND_SAMPLER_VIEW |
 578                          PIPE_BIND_DISPLAY_TARGET |
 579                          PIPE_BIND_SCANOUT)) {
 580                 return FALSE;
 581             }
 582
 583             desc = util_format_description(format);
 584
 585             if (is_r500) {
 586                 /* Only allow depth/stencil, RGBA8, RGBA1010102, RGBA16F. */
 587                 if (!util_format_is_depth_or_stencil(format) &&
 588                     !util_format_is_rgba8_variant(desc) &&
 589                     !util_format_is_rgba1010102_variant(desc) &&
 590                     format != PIPE_FORMAT_R16G16B16A16_FLOAT &&
 591                     format != PIPE_FORMAT_R16G16B16X16_FLOAT) {
 592                     return FALSE;
 593                 }
 594             } else {
 595                 /* Only allow depth/stencil, RGBA8. */
 596                 if (!util_format_is_depth_or_stencil(format) &&
 597                     !util_format_is_rgba8_variant(desc)) {
 598                     return FALSE;
 599                 }
 600             }
 601             break;
 602         default:
 603             return FALSE;
 604     }
 605
 606     /* Check sampler format support. */
 607     if ((usage & PIPE_BIND_SAMPLER_VIEW) &&
 608         /* these two are broken for an unknown reason */
 609         format != PIPE_FORMAT_R8G8B8X8_SNORM &&
 610         format != PIPE_FORMAT_R16G16B16X16_SNORM &&
 611         /* ATI1N is r5xx-only. */
 612         (is_r500 || !is_ati1n) &&
 613         /* ATI2N is supported on r4xx-r5xx. */
 614         (is_r400 || is_r500 || !is_ati2n) &&
 615         r300_is_sampler_format_supported(format)) {
 616         retval |= PIPE_BIND_SAMPLER_VIEW;
 617     }
 618
 619     /* Check colorbuffer format support. */
 620     if ((usage & (PIPE_BIND_RENDER_TARGET |
 621                   PIPE_BIND_DISPLAY_TARGET |
 622                   PIPE_BIND_SCANOUT |
 623                   PIPE_BIND_SHARED |
 624                   PIPE_BIND_BLENDABLE)) &&
 625         /* 2101010 cannot be rendered to on non-r5xx. */
 626         (!is_color2101010 || is_r500) &&
 627         r300_is_colorbuffer_format_supported(format)) {
 628         retval |= usage &
 629             (PIPE_BIND_RENDER_TARGET |
 630              PIPE_BIND_DISPLAY_TARGET |
 631              PIPE_BIND_SCANOUT |
 632              PIPE_BIND_SHARED);
 633
 634         if (r300_is_blending_supported(r300_screen(screen), format)) {
 635             retval |= usage & PIPE_BIND_BLENDABLE;
 636         }
 637     }
 638
 639     /* Check depth-stencil format support. */
 640     if (usage & PIPE_BIND_DEPTH_STENCIL &&
 641         r300_is_zs_format_supported(format)) {
 642         retval |= PIPE_BIND_DEPTH_STENCIL;
 643     }
 644
 645     /* Check vertex buffer format support. */
 646     if (usage & PIPE_BIND_VERTEX_BUFFER) {
 647         if (r300_screen(screen)->caps.has_tcl) {
 648             /* Half float is supported on >= R400. */
 649             if ((is_r400 || is_r500 || !is_half_float) &&
 650                 r300_translate_vertex_data_type(format) != R300_INVALID_FORMAT) {
 651                 retval |= PIPE_BIND_VERTEX_BUFFER;
 652             }
 653         } else {
 654             /* SW TCL */
 655             if (!util_format_is_pure_integer(format)) {
 656                 retval |= PIPE_BIND_VERTEX_BUFFER;
 657             }
 658         }
 659     }
 660
 661     /* Transfers are always supported. */
 662     if (usage & PIPE_BIND_TRANSFER_READ)
 663         retval |= PIPE_BIND_TRANSFER_READ;
 664     if (usage & PIPE_BIND_TRANSFER_WRITE)
 665         retval |= PIPE_BIND_TRANSFER_WRITE;
 666
 667     return retval == usage;
 668 }
 669
 670 static void r300_destroy_screen(struct pipe_screen* pscreen)
 671 {
 672     struct r300_screen* r300screen = r300_screen(pscreen);
 673     struct radeon_winsys *rws = radeon_winsys(pscreen);
 674
 675     if (rws && !rws->unref(rws))
 676       return;
 677
 678     pipe_mutex_destroy(r300screen->cmask_mutex);
 679
 680     if (rws)
 681       rws->destroy(rws);
 682
 683     FREE(r300screen);
 684 }
 685
 686 static void r300_fence_reference(struct pipe_screen *screen,
 687                                  struct pipe_fence_handle **ptr,
 688                                  struct pipe_fence_handle *fence)
 689 {
 690     struct radeon_winsys *rws = r300_screen(screen)->rws;
 691
 692     rws->fence_reference(ptr, fence);
 693 }
 694
 695 static boolean r300_fence_finish(struct pipe_screen *screen,
 696                                  struct pipe_fence_handle *fence,
 697                                  uint64_t timeout)
 698 {
 699     struct radeon_winsys *rws = r300_screen(screen)->rws;
 700
 701     return rws->fence_wait(rws, fence, timeout);
 702 }
 703
 704 struct pipe_screen* r300_screen_create(struct radeon_winsys *rws)
 705 {
 706     struct r300_screen *r300screen = CALLOC_STRUCT(r300_screen);
 707
 708     if (!r300screen) {
 709         FREE(r300screen);
 710         return NULL;
 711     }
 712
 713     rws->query_info(rws, &r300screen->info);
 714
 715     r300_init_debug(r300screen);
 716     r300_parse_chipset(r300screen->info.pci_id, &r300screen->caps);
 717
 718     if (SCREEN_DBG_ON(r300screen, DBG_NO_ZMASK))
 719         r300screen->caps.zmask_ram = 0;
 720     if (SCREEN_DBG_ON(r300screen, DBG_NO_HIZ))
 721         r300screen->caps.hiz_ram = 0;
 722
 723     r300screen->rws = rws;
 724     r300screen->screen.destroy = r300_destroy_screen;
 725     r300screen->screen.get_name = r300_get_name;
 726     r300screen->screen.get_vendor = r300_get_vendor;
 727     r300screen->screen.get_device_vendor = r300_get_device_vendor;
 728     r300screen->screen.get_param = r300_get_param;
 729     r300screen->screen.get_shader_param = r300_get_shader_param;
 730     r300screen->screen.get_paramf = r300_get_paramf;
 731     r300screen->screen.get_video_param = r300_get_video_param;
 732     r300screen->screen.is_format_supported = r300_is_format_supported;
 733     r300screen->screen.is_video_format_supported = vl_video_buffer_is_format_supported;
 734     r300screen->screen.context_create = r300_create_context;
 735     r300screen->screen.fence_reference = r300_fence_reference;
 736     r300screen->screen.fence_finish = r300_fence_finish;
 737
 738     r300_init_screen_resource_functions(r300screen);
 739
 740     util_format_s3tc_init();
 741     pipe_mutex_init(r300screen->cmask_mutex);
 742
 743     return &r300screen->screen;
 744 }