gallium: add a cap for VIEWPORT_SUBPIXEL_BITS (v2)
[mesa.git] / src / gallium / drivers / r300 / r300_screen.c
1 /*
2 * Copyright 2008 Corbin Simpson <MostAwesomeDude@gmail.com>
3 * Copyright 2010 Marek Olšák <maraeo@gmail.com>
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * on the rights to use, copy, modify, merge, publish, distribute, sub
9 * license, and/or sell copies of the Software, and to permit persons to whom
10 * the Software is furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
14 * Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
20 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
21 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
22 * USE OR OTHER DEALINGS IN THE SOFTWARE. */
23
24 #include "util/u_format.h"
25 #include "util/u_format_s3tc.h"
26 #include "util/u_memory.h"
27 #include "os/os_time.h"
28 #include "vl/vl_decoder.h"
29 #include "vl/vl_video_buffer.h"
30
31 #include "r300_context.h"
32 #include "r300_texture.h"
33 #include "r300_screen_buffer.h"
34 #include "r300_state_inlines.h"
35 #include "r300_public.h"
36
37 #include "draw/draw_context.h"
38
39 /* Return the identifier behind whom the brave coders responsible for this
40 * amalgamation of code, sweat, and duct tape, routinely obscure their names.
41 *
42 * ...I should have just put "Corbin Simpson", but I'm not that cool.
43 *
44 * (Or egotistical. Yet.) */
45 static const char* r300_get_vendor(struct pipe_screen* pscreen)
46 {
47 return "X.Org R300 Project";
48 }
49
50 static const char* r300_get_device_vendor(struct pipe_screen* pscreen)
51 {
52 return "ATI";
53 }
54
55 static const char* chip_families[] = {
56 "unknown",
57 "ATI R300",
58 "ATI R350",
59 "ATI RV350",
60 "ATI RV370",
61 "ATI RV380",
62 "ATI RS400",
63 "ATI RC410",
64 "ATI RS480",
65 "ATI R420",
66 "ATI R423",
67 "ATI R430",
68 "ATI R480",
69 "ATI R481",
70 "ATI RV410",
71 "ATI RS600",
72 "ATI RS690",
73 "ATI RS740",
74 "ATI RV515",
75 "ATI R520",
76 "ATI RV530",
77 "ATI R580",
78 "ATI RV560",
79 "ATI RV570"
80 };
81
82 static const char* r300_get_name(struct pipe_screen* pscreen)
83 {
84 struct r300_screen* r300screen = r300_screen(pscreen);
85
86 return chip_families[r300screen->caps.family];
87 }
88
89 static int r300_get_param(struct pipe_screen* pscreen, enum pipe_cap param)
90 {
91 struct r300_screen* r300screen = r300_screen(pscreen);
92 boolean is_r500 = r300screen->caps.is_r500;
93
94 switch (param) {
95 /* Supported features (boolean caps). */
96 case PIPE_CAP_NPOT_TEXTURES:
97 case PIPE_CAP_MIXED_FRAMEBUFFER_SIZES:
98 case PIPE_CAP_TWO_SIDED_STENCIL:
99 case PIPE_CAP_ANISOTROPIC_FILTER:
100 case PIPE_CAP_POINT_SPRITE:
101 case PIPE_CAP_OCCLUSION_QUERY:
102 case PIPE_CAP_TEXTURE_SHADOW_MAP:
103 case PIPE_CAP_TEXTURE_MIRROR_CLAMP:
104 case PIPE_CAP_BLEND_EQUATION_SEPARATE:
105 case PIPE_CAP_VERTEX_ELEMENT_INSTANCE_DIVISOR:
106 case PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT:
107 case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER:
108 case PIPE_CAP_CONDITIONAL_RENDER:
109 case PIPE_CAP_TEXTURE_BARRIER:
110 case PIPE_CAP_TGSI_CAN_COMPACT_CONSTANTS:
111 case PIPE_CAP_USER_INDEX_BUFFERS:
112 case PIPE_CAP_USER_CONSTANT_BUFFERS:
113 case PIPE_CAP_PREFER_BLIT_BASED_TEXTURE_TRANSFER:
114 case PIPE_CAP_BUFFER_MAP_PERSISTENT_COHERENT:
115 case PIPE_CAP_CLIP_HALFZ:
116 return 1;
117
118 case PIPE_CAP_MIN_MAP_BUFFER_ALIGNMENT:
119 return R300_BUFFER_ALIGNMENT;
120
121 case PIPE_CAP_CONSTANT_BUFFER_OFFSET_ALIGNMENT:
122 return 16;
123
124 case PIPE_CAP_GLSL_FEATURE_LEVEL:
125 return 120;
126
127 /* r300 cannot do swizzling of compressed textures. Supported otherwise. */
128 case PIPE_CAP_TEXTURE_SWIZZLE:
129 return util_format_s3tc_enabled ? r300screen->caps.dxtc_swizzle : 1;
130
131 /* We don't support color clamping on r500, so that we can use color
132 * intepolators for generic varyings. */
133 case PIPE_CAP_VERTEX_COLOR_CLAMPED:
134 return !is_r500;
135
136 /* Supported on r500 only. */
137 case PIPE_CAP_VERTEX_COLOR_UNCLAMPED:
138 case PIPE_CAP_MIXED_COLORBUFFER_FORMATS:
139 case PIPE_CAP_SM3:
140 return is_r500 ? 1 : 0;
141
142 /* Unsupported features. */
143 case PIPE_CAP_QUERY_TIME_ELAPSED:
144 case PIPE_CAP_QUERY_PIPELINE_STATISTICS:
145 case PIPE_CAP_MAX_DUAL_SOURCE_RENDER_TARGETS:
146 case PIPE_CAP_INDEP_BLEND_ENABLE:
147 case PIPE_CAP_INDEP_BLEND_FUNC:
148 case PIPE_CAP_DEPTH_CLIP_DISABLE:
149 case PIPE_CAP_SHADER_STENCIL_EXPORT:
150 case PIPE_CAP_MAX_TEXTURE_ARRAY_LAYERS:
151 case PIPE_CAP_TGSI_INSTANCEID:
152 case PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT:
153 case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER:
154 case PIPE_CAP_SEAMLESS_CUBE_MAP:
155 case PIPE_CAP_SEAMLESS_CUBE_MAP_PER_TEXTURE:
156 case PIPE_CAP_MIN_TEXEL_OFFSET:
157 case PIPE_CAP_MAX_TEXEL_OFFSET:
158 case PIPE_CAP_MIN_TEXTURE_GATHER_OFFSET:
159 case PIPE_CAP_MAX_TEXTURE_GATHER_OFFSET:
160 case PIPE_CAP_MAX_STREAM_OUTPUT_BUFFERS:
161 case PIPE_CAP_MAX_STREAM_OUTPUT_SEPARATE_COMPONENTS:
162 case PIPE_CAP_MAX_STREAM_OUTPUT_INTERLEAVED_COMPONENTS:
163 case PIPE_CAP_MAX_GEOMETRY_OUTPUT_VERTICES:
164 case PIPE_CAP_MAX_GEOMETRY_TOTAL_OUTPUT_COMPONENTS:
165 case PIPE_CAP_MAX_VERTEX_STREAMS:
166 case PIPE_CAP_STREAM_OUTPUT_PAUSE_RESUME:
167 case PIPE_CAP_FRAGMENT_COLOR_CLAMPED:
168 case PIPE_CAP_QUADS_FOLLOW_PROVOKING_VERTEX_CONVENTION:
169 case PIPE_CAP_COMPUTE:
170 case PIPE_CAP_START_INSTANCE:
171 case PIPE_CAP_QUERY_TIMESTAMP:
172 case PIPE_CAP_TEXTURE_MULTISAMPLE:
173 case PIPE_CAP_CUBE_MAP_ARRAY:
174 case PIPE_CAP_TEXTURE_BUFFER_OBJECTS:
175 case PIPE_CAP_TEXTURE_BUFFER_OFFSET_ALIGNMENT:
176 case PIPE_CAP_TEXTURE_BORDER_COLOR_QUIRK:
177 case PIPE_CAP_MAX_TEXTURE_BUFFER_SIZE:
178 case PIPE_CAP_TGSI_VS_LAYER_VIEWPORT:
179 case PIPE_CAP_MAX_TEXTURE_GATHER_COMPONENTS:
180 case PIPE_CAP_TEXTURE_GATHER_SM5:
181 case PIPE_CAP_TEXTURE_QUERY_LOD:
182 case PIPE_CAP_FAKE_SW_MSAA:
183 case PIPE_CAP_SAMPLE_SHADING:
184 case PIPE_CAP_TEXTURE_GATHER_OFFSETS:
185 case PIPE_CAP_DRAW_INDIRECT:
186 case PIPE_CAP_MULTI_DRAW_INDIRECT:
187 case PIPE_CAP_MULTI_DRAW_INDIRECT_PARAMS:
188 case PIPE_CAP_TGSI_FS_FINE_DERIVATIVE:
189 case PIPE_CAP_CONDITIONAL_RENDER_INVERTED:
190 case PIPE_CAP_SAMPLER_VIEW_TARGET:
191 case PIPE_CAP_VERTEXID_NOBASE:
192 case PIPE_CAP_POLYGON_OFFSET_CLAMP:
193 case PIPE_CAP_MULTISAMPLE_Z_RESOLVE:
194 case PIPE_CAP_RESOURCE_FROM_USER_MEMORY:
195 case PIPE_CAP_DEVICE_RESET_STATUS_QUERY:
196 case PIPE_CAP_MAX_SHADER_PATCH_VARYINGS:
197 case PIPE_CAP_TEXTURE_FLOAT_LINEAR:
198 case PIPE_CAP_TEXTURE_HALF_FLOAT_LINEAR:
199 case PIPE_CAP_DEPTH_BOUNDS_TEST:
200 case PIPE_CAP_TGSI_TXQS:
201 case PIPE_CAP_FORCE_PERSAMPLE_INTERP:
202 case PIPE_CAP_SHAREABLE_SHADERS:
203 case PIPE_CAP_COPY_BETWEEN_COMPRESSED_AND_PLAIN_FORMATS:
204 case PIPE_CAP_CLEAR_TEXTURE:
205 case PIPE_CAP_DRAW_PARAMETERS:
206 case PIPE_CAP_TGSI_PACK_HALF_FLOAT:
207 case PIPE_CAP_TGSI_FS_POSITION_IS_SYSVAL:
208 case PIPE_CAP_TGSI_FS_FACE_IS_INTEGER_SYSVAL:
209 case PIPE_CAP_SHADER_BUFFER_OFFSET_ALIGNMENT:
210 case PIPE_CAP_INVALIDATE_BUFFER:
211 case PIPE_CAP_GENERATE_MIPMAP:
212 case PIPE_CAP_STRING_MARKER:
213 case PIPE_CAP_BUFFER_SAMPLER_VIEW_RGBA_ONLY:
214 case PIPE_CAP_SURFACE_REINTERPRET_BLOCKS:
215 case PIPE_CAP_QUERY_BUFFER_OBJECT:
216 case PIPE_CAP_QUERY_MEMORY_INFO:
217 case PIPE_CAP_FRAMEBUFFER_NO_ATTACHMENT:
218 case PIPE_CAP_ROBUST_BUFFER_ACCESS_BEHAVIOR:
219 case PIPE_CAP_CULL_DISTANCE:
220 case PIPE_CAP_PRIMITIVE_RESTART_FOR_PATCHES:
221 case PIPE_CAP_TGSI_VOTE:
222 case PIPE_CAP_MAX_WINDOW_RECTANGLES:
223 case PIPE_CAP_POLYGON_OFFSET_UNITS_UNSCALED:
224 case PIPE_CAP_VIEWPORT_SUBPIXEL_BITS:
225 return 0;
226
227 /* SWTCL-only features. */
228 case PIPE_CAP_PRIMITIVE_RESTART:
229 case PIPE_CAP_USER_VERTEX_BUFFERS:
230 case PIPE_CAP_TGSI_VS_WINDOW_SPACE_POSITION:
231 return !r300screen->caps.has_tcl;
232
233 /* HWTCL-only features / limitations. */
234 case PIPE_CAP_VERTEX_BUFFER_OFFSET_4BYTE_ALIGNED_ONLY:
235 case PIPE_CAP_VERTEX_BUFFER_STRIDE_4BYTE_ALIGNED_ONLY:
236 case PIPE_CAP_VERTEX_ELEMENT_SRC_OFFSET_4BYTE_ALIGNED_ONLY:
237 return r300screen->caps.has_tcl;
238 case PIPE_CAP_TGSI_TEXCOORD:
239 return 0;
240
241 /* Texturing. */
242 case PIPE_CAP_MAX_TEXTURE_2D_LEVELS:
243 case PIPE_CAP_MAX_TEXTURE_3D_LEVELS:
244 case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS:
245 /* 13 == 4096, 12 == 2048 */
246 return is_r500 ? 13 : 12;
247
248 /* Render targets. */
249 case PIPE_CAP_MAX_RENDER_TARGETS:
250 return 4;
251 case PIPE_CAP_ENDIANNESS:
252 return PIPE_ENDIAN_LITTLE;
253
254 case PIPE_CAP_MAX_VIEWPORTS:
255 return 1;
256
257 case PIPE_CAP_MAX_VERTEX_ATTRIB_STRIDE:
258 return 2048;
259
260 case PIPE_CAP_VENDOR_ID:
261 return 0x1002;
262 case PIPE_CAP_DEVICE_ID:
263 return r300screen->info.pci_id;
264 case PIPE_CAP_ACCELERATED:
265 return 1;
266 case PIPE_CAP_VIDEO_MEMORY:
267 return r300screen->info.vram_size >> 20;
268 case PIPE_CAP_UMA:
269 return 0;
270 case PIPE_CAP_PCI_GROUP:
271 return r300screen->info.pci_domain;
272 case PIPE_CAP_PCI_BUS:
273 return r300screen->info.pci_bus;
274 case PIPE_CAP_PCI_DEVICE:
275 return r300screen->info.pci_dev;
276 case PIPE_CAP_PCI_FUNCTION:
277 return r300screen->info.pci_func;
278 }
279 return 0;
280 }
281
282 static int r300_get_shader_param(struct pipe_screen *pscreen, unsigned shader, enum pipe_shader_cap param)
283 {
284 struct r300_screen* r300screen = r300_screen(pscreen);
285 boolean is_r400 = r300screen->caps.is_r400;
286 boolean is_r500 = r300screen->caps.is_r500;
287
288 switch (shader) {
289 case PIPE_SHADER_FRAGMENT:
290 switch (param)
291 {
292 case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
293 return is_r500 || is_r400 ? 512 : 96;
294 case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
295 return is_r500 || is_r400 ? 512 : 64;
296 case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
297 return is_r500 || is_r400 ? 512 : 32;
298 case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
299 return is_r500 ? 511 : 4;
300 case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:
301 return is_r500 ? 64 : 0; /* Actually unlimited on r500. */
302 /* Fragment shader limits. */
303 case PIPE_SHADER_CAP_MAX_INPUTS:
304 /* 2 colors + 8 texcoords are always supported
305 * (minus fog and wpos).
306 *
307 * R500 has the ability to turn 3rd and 4th color into
308 * additional texcoords but there is no two-sided color
309 * selection then. However the facing bit can be used instead. */
310 return 10;
311 case PIPE_SHADER_CAP_MAX_OUTPUTS:
312 return 4;
313 case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE:
314 return (is_r500 ? 256 : 32) * sizeof(float[4]);
315 case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
316 case PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE:
317 return 1;
318 case PIPE_SHADER_CAP_MAX_TEMPS:
319 return is_r500 ? 128 : is_r400 ? 64 : 32;
320 case PIPE_SHADER_CAP_MAX_PREDS:
321 return 0; /* unused */
322 case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
323 case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS:
324 return r300screen->caps.num_tex_units;
325 case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
326 case PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED:
327 case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
328 case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
329 case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
330 case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
331 case PIPE_SHADER_CAP_SUBROUTINES:
332 case PIPE_SHADER_CAP_INTEGERS:
333 case PIPE_SHADER_CAP_DOUBLES:
334 case PIPE_SHADER_CAP_TGSI_DROUND_SUPPORTED:
335 case PIPE_SHADER_CAP_TGSI_DFRACEXP_DLDEXP_SUPPORTED:
336 case PIPE_SHADER_CAP_TGSI_FMA_SUPPORTED:
337 case PIPE_SHADER_CAP_MAX_SHADER_BUFFERS:
338 case PIPE_SHADER_CAP_MAX_SHADER_IMAGES:
339 return 0;
340 case PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT:
341 return 32;
342 case PIPE_SHADER_CAP_PREFERRED_IR:
343 return PIPE_SHADER_IR_TGSI;
344 case PIPE_SHADER_CAP_SUPPORTED_IRS:
345 return 0;
346 }
347 break;
348 case PIPE_SHADER_VERTEX:
349 switch (param)
350 {
351 case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
352 case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS:
353 case PIPE_SHADER_CAP_SUBROUTINES:
354 return 0;
355 default:;
356 }
357
358 if (!r300screen->caps.has_tcl) {
359 return draw_get_shader_param(shader, param);
360 }
361
362 switch (param)
363 {
364 case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
365 case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
366 return is_r500 ? 1024 : 256;
367 case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:
368 return is_r500 ? 4 : 0; /* For loops; not sure about conditionals. */
369 case PIPE_SHADER_CAP_MAX_INPUTS:
370 return 16;
371 case PIPE_SHADER_CAP_MAX_OUTPUTS:
372 return 10;
373 case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE:
374 return 256 * sizeof(float[4]);
375 case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
376 return 1;
377 case PIPE_SHADER_CAP_MAX_TEMPS:
378 return 32;
379 case PIPE_SHADER_CAP_MAX_PREDS:
380 return 0; /* unused */
381 case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
382 case PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE:
383 return 1;
384 case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
385 case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
386 case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
387 case PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED:
388 case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
389 case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
390 case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
391 case PIPE_SHADER_CAP_SUBROUTINES:
392 case PIPE_SHADER_CAP_INTEGERS:
393 case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
394 case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS:
395 case PIPE_SHADER_CAP_DOUBLES:
396 case PIPE_SHADER_CAP_TGSI_DROUND_SUPPORTED:
397 case PIPE_SHADER_CAP_TGSI_DFRACEXP_DLDEXP_SUPPORTED:
398 case PIPE_SHADER_CAP_TGSI_FMA_SUPPORTED:
399 case PIPE_SHADER_CAP_MAX_SHADER_BUFFERS:
400 case PIPE_SHADER_CAP_MAX_SHADER_IMAGES:
401 return 0;
402 case PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT:
403 return 32;
404 case PIPE_SHADER_CAP_PREFERRED_IR:
405 return PIPE_SHADER_IR_TGSI;
406 case PIPE_SHADER_CAP_SUPPORTED_IRS:
407 return 0;
408 }
409 break;
410 }
411 return 0;
412 }
413
414 static float r300_get_paramf(struct pipe_screen* pscreen,
415 enum pipe_capf param)
416 {
417 struct r300_screen* r300screen = r300_screen(pscreen);
418
419 switch (param) {
420 case PIPE_CAPF_MAX_LINE_WIDTH:
421 case PIPE_CAPF_MAX_LINE_WIDTH_AA:
422 case PIPE_CAPF_MAX_POINT_WIDTH:
423 case PIPE_CAPF_MAX_POINT_WIDTH_AA:
424 /* The maximum dimensions of the colorbuffer are our practical
425 * rendering limits. 2048 pixels should be enough for anybody. */
426 if (r300screen->caps.is_r500) {
427 return 4096.0f;
428 } else if (r300screen->caps.is_r400) {
429 return 4021.0f;
430 } else {
431 return 2560.0f;
432 }
433 case PIPE_CAPF_MAX_TEXTURE_ANISOTROPY:
434 return 16.0f;
435 case PIPE_CAPF_MAX_TEXTURE_LOD_BIAS:
436 return 16.0f;
437 case PIPE_CAPF_GUARD_BAND_LEFT:
438 case PIPE_CAPF_GUARD_BAND_TOP:
439 case PIPE_CAPF_GUARD_BAND_RIGHT:
440 case PIPE_CAPF_GUARD_BAND_BOTTOM:
441 return 0.0f;
442 default:
443 debug_printf("r300: Warning: Unknown CAP %d in get_paramf.\n",
444 param);
445 return 0.0f;
446 }
447 }
448
449 static int r300_get_video_param(struct pipe_screen *screen,
450 enum pipe_video_profile profile,
451 enum pipe_video_entrypoint entrypoint,
452 enum pipe_video_cap param)
453 {
454 switch (param) {
455 case PIPE_VIDEO_CAP_SUPPORTED:
456 return vl_profile_supported(screen, profile, entrypoint);
457 case PIPE_VIDEO_CAP_NPOT_TEXTURES:
458 return 0;
459 case PIPE_VIDEO_CAP_MAX_WIDTH:
460 case PIPE_VIDEO_CAP_MAX_HEIGHT:
461 return vl_video_buffer_max_size(screen);
462 case PIPE_VIDEO_CAP_PREFERED_FORMAT:
463 return PIPE_FORMAT_NV12;
464 case PIPE_VIDEO_CAP_PREFERS_INTERLACED:
465 return false;
466 case PIPE_VIDEO_CAP_SUPPORTS_INTERLACED:
467 return false;
468 case PIPE_VIDEO_CAP_SUPPORTS_PROGRESSIVE:
469 return true;
470 case PIPE_VIDEO_CAP_MAX_LEVEL:
471 return vl_level_supported(screen, profile);
472 default:
473 return 0;
474 }
475 }
476
477 /**
478 * Whether the format matches:
479 * PIPE_FORMAT_?10?10?10?2_UNORM
480 */
481 static inline boolean
482 util_format_is_rgba1010102_variant(const struct util_format_description *desc)
483 {
484 static const unsigned size[4] = {10, 10, 10, 2};
485 unsigned chan;
486
487 if (desc->block.width != 1 ||
488 desc->block.height != 1 ||
489 desc->block.bits != 32)
490 return FALSE;
491
492 for (chan = 0; chan < 4; ++chan) {
493 if(desc->channel[chan].type != UTIL_FORMAT_TYPE_UNSIGNED &&
494 desc->channel[chan].type != UTIL_FORMAT_TYPE_VOID)
495 return FALSE;
496 if (desc->channel[chan].size != size[chan])
497 return FALSE;
498 }
499
500 return TRUE;
501 }
502
503 static bool r300_is_blending_supported(struct r300_screen *rscreen,
504 enum pipe_format format)
505 {
506 int c;
507 const struct util_format_description *desc =
508 util_format_description(format);
509
510 if (desc->layout != UTIL_FORMAT_LAYOUT_PLAIN)
511 return false;
512
513 c = util_format_get_first_non_void_channel(format);
514
515 /* RGBA16F */
516 if (rscreen->caps.is_r500 &&
517 desc->nr_channels == 4 &&
518 desc->channel[c].size == 16 &&
519 desc->channel[c].type == UTIL_FORMAT_TYPE_FLOAT)
520 return true;
521
522 if (desc->channel[c].normalized &&
523 desc->channel[c].type == UTIL_FORMAT_TYPE_UNSIGNED &&
524 desc->channel[c].size >= 4 &&
525 desc->channel[c].size <= 10) {
526 /* RGB10_A2, RGBA8, RGB5_A1, RGBA4, RGB565 */
527 if (desc->nr_channels >= 3)
528 return true;
529
530 if (format == PIPE_FORMAT_R8G8_UNORM)
531 return true;
532
533 /* R8, I8, L8, A8 */
534 if (desc->nr_channels == 1)
535 return true;
536 }
537
538 return false;
539 }
540
541 static boolean r300_is_format_supported(struct pipe_screen* screen,
542 enum pipe_format format,
543 enum pipe_texture_target target,
544 unsigned sample_count,
545 unsigned usage)
546 {
547 uint32_t retval = 0;
548 boolean is_r500 = r300_screen(screen)->caps.is_r500;
549 boolean is_r400 = r300_screen(screen)->caps.is_r400;
550 boolean is_color2101010 = format == PIPE_FORMAT_R10G10B10A2_UNORM ||
551 format == PIPE_FORMAT_R10G10B10X2_SNORM ||
552 format == PIPE_FORMAT_B10G10R10A2_UNORM ||
553 format == PIPE_FORMAT_B10G10R10X2_UNORM ||
554 format == PIPE_FORMAT_R10SG10SB10SA2U_NORM;
555 boolean is_ati1n = format == PIPE_FORMAT_RGTC1_UNORM ||
556 format == PIPE_FORMAT_RGTC1_SNORM ||
557 format == PIPE_FORMAT_LATC1_UNORM ||
558 format == PIPE_FORMAT_LATC1_SNORM;
559 boolean is_ati2n = format == PIPE_FORMAT_RGTC2_UNORM ||
560 format == PIPE_FORMAT_RGTC2_SNORM ||
561 format == PIPE_FORMAT_LATC2_UNORM ||
562 format == PIPE_FORMAT_LATC2_SNORM;
563 boolean is_half_float = format == PIPE_FORMAT_R16_FLOAT ||
564 format == PIPE_FORMAT_R16G16_FLOAT ||
565 format == PIPE_FORMAT_R16G16B16_FLOAT ||
566 format == PIPE_FORMAT_R16G16B16A16_FLOAT ||
567 format == PIPE_FORMAT_R16G16B16X16_FLOAT;
568 const struct util_format_description *desc;
569
570 if (!util_format_is_supported(format, usage))
571 return FALSE;
572
573 /* Check multisampling support. */
574 switch (sample_count) {
575 case 0:
576 case 1:
577 break;
578 case 2:
579 case 4:
580 case 6:
581 /* No texturing and scanout. */
582 if (usage & (PIPE_BIND_SAMPLER_VIEW |
583 PIPE_BIND_DISPLAY_TARGET |
584 PIPE_BIND_SCANOUT)) {
585 return FALSE;
586 }
587
588 desc = util_format_description(format);
589
590 if (is_r500) {
591 /* Only allow depth/stencil, RGBA8, RGBA1010102, RGBA16F. */
592 if (!util_format_is_depth_or_stencil(format) &&
593 !util_format_is_rgba8_variant(desc) &&
594 !util_format_is_rgba1010102_variant(desc) &&
595 format != PIPE_FORMAT_R16G16B16A16_FLOAT &&
596 format != PIPE_FORMAT_R16G16B16X16_FLOAT) {
597 return FALSE;
598 }
599 } else {
600 /* Only allow depth/stencil, RGBA8. */
601 if (!util_format_is_depth_or_stencil(format) &&
602 !util_format_is_rgba8_variant(desc)) {
603 return FALSE;
604 }
605 }
606 break;
607 default:
608 return FALSE;
609 }
610
611 /* Check sampler format support. */
612 if ((usage & PIPE_BIND_SAMPLER_VIEW) &&
613 /* these two are broken for an unknown reason */
614 format != PIPE_FORMAT_R8G8B8X8_SNORM &&
615 format != PIPE_FORMAT_R16G16B16X16_SNORM &&
616 /* ATI1N is r5xx-only. */
617 (is_r500 || !is_ati1n) &&
618 /* ATI2N is supported on r4xx-r5xx. */
619 (is_r400 || is_r500 || !is_ati2n) &&
620 r300_is_sampler_format_supported(format)) {
621 retval |= PIPE_BIND_SAMPLER_VIEW;
622 }
623
624 /* Check colorbuffer format support. */
625 if ((usage & (PIPE_BIND_RENDER_TARGET |
626 PIPE_BIND_DISPLAY_TARGET |
627 PIPE_BIND_SCANOUT |
628 PIPE_BIND_SHARED |
629 PIPE_BIND_BLENDABLE)) &&
630 /* 2101010 cannot be rendered to on non-r5xx. */
631 (!is_color2101010 || is_r500) &&
632 r300_is_colorbuffer_format_supported(format)) {
633 retval |= usage &
634 (PIPE_BIND_RENDER_TARGET |
635 PIPE_BIND_DISPLAY_TARGET |
636 PIPE_BIND_SCANOUT |
637 PIPE_BIND_SHARED);
638
639 if (r300_is_blending_supported(r300_screen(screen), format)) {
640 retval |= usage & PIPE_BIND_BLENDABLE;
641 }
642 }
643
644 /* Check depth-stencil format support. */
645 if (usage & PIPE_BIND_DEPTH_STENCIL &&
646 r300_is_zs_format_supported(format)) {
647 retval |= PIPE_BIND_DEPTH_STENCIL;
648 }
649
650 /* Check vertex buffer format support. */
651 if (usage & PIPE_BIND_VERTEX_BUFFER) {
652 if (r300_screen(screen)->caps.has_tcl) {
653 /* Half float is supported on >= R400. */
654 if ((is_r400 || is_r500 || !is_half_float) &&
655 r300_translate_vertex_data_type(format) != R300_INVALID_FORMAT) {
656 retval |= PIPE_BIND_VERTEX_BUFFER;
657 }
658 } else {
659 /* SW TCL */
660 if (!util_format_is_pure_integer(format)) {
661 retval |= PIPE_BIND_VERTEX_BUFFER;
662 }
663 }
664 }
665
666 /* Transfers are always supported. */
667 if (usage & PIPE_BIND_TRANSFER_READ)
668 retval |= PIPE_BIND_TRANSFER_READ;
669 if (usage & PIPE_BIND_TRANSFER_WRITE)
670 retval |= PIPE_BIND_TRANSFER_WRITE;
671
672 return retval == usage;
673 }
674
675 static void r300_destroy_screen(struct pipe_screen* pscreen)
676 {
677 struct r300_screen* r300screen = r300_screen(pscreen);
678 struct radeon_winsys *rws = radeon_winsys(pscreen);
679
680 if (rws && !rws->unref(rws))
681 return;
682
683 pipe_mutex_destroy(r300screen->cmask_mutex);
684
685 if (rws)
686 rws->destroy(rws);
687
688 FREE(r300screen);
689 }
690
691 static void r300_fence_reference(struct pipe_screen *screen,
692 struct pipe_fence_handle **ptr,
693 struct pipe_fence_handle *fence)
694 {
695 struct radeon_winsys *rws = r300_screen(screen)->rws;
696
697 rws->fence_reference(ptr, fence);
698 }
699
700 static boolean r300_fence_finish(struct pipe_screen *screen,
701 struct pipe_fence_handle *fence,
702 uint64_t timeout)
703 {
704 struct radeon_winsys *rws = r300_screen(screen)->rws;
705
706 return rws->fence_wait(rws, fence, timeout);
707 }
708
709 struct pipe_screen* r300_screen_create(struct radeon_winsys *rws)
710 {
711 struct r300_screen *r300screen = CALLOC_STRUCT(r300_screen);
712
713 if (!r300screen) {
714 FREE(r300screen);
715 return NULL;
716 }
717
718 rws->query_info(rws, &r300screen->info);
719
720 r300_init_debug(r300screen);
721 r300_parse_chipset(r300screen->info.pci_id, &r300screen->caps);
722
723 if (SCREEN_DBG_ON(r300screen, DBG_NO_ZMASK))
724 r300screen->caps.zmask_ram = 0;
725 if (SCREEN_DBG_ON(r300screen, DBG_NO_HIZ))
726 r300screen->caps.hiz_ram = 0;
727
728 r300screen->rws = rws;
729 r300screen->screen.destroy = r300_destroy_screen;
730 r300screen->screen.get_name = r300_get_name;
731 r300screen->screen.get_vendor = r300_get_vendor;
732 r300screen->screen.get_device_vendor = r300_get_device_vendor;
733 r300screen->screen.get_param = r300_get_param;
734 r300screen->screen.get_shader_param = r300_get_shader_param;
735 r300screen->screen.get_paramf = r300_get_paramf;
736 r300screen->screen.get_video_param = r300_get_video_param;
737 r300screen->screen.is_format_supported = r300_is_format_supported;
738 r300screen->screen.is_video_format_supported = vl_video_buffer_is_format_supported;
739 r300screen->screen.context_create = r300_create_context;
740 r300screen->screen.fence_reference = r300_fence_reference;
741 r300screen->screen.fence_finish = r300_fence_finish;
742
743 r300_init_screen_resource_functions(r300screen);
744
745 util_format_s3tc_init();
746 pipe_mutex_init(r300screen->cmask_mutex);
747
748 return &r300screen->screen;
749 }