gallium: remove PIPE_CAP_USER_INDEX_BUFFERS
[mesa.git] / src / gallium / drivers / r300 / r300_screen.c
1 /*
2 * Copyright 2008 Corbin Simpson <MostAwesomeDude@gmail.com>
3 * Copyright 2010 Marek Olšák <maraeo@gmail.com>
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * on the rights to use, copy, modify, merge, publish, distribute, sub
9 * license, and/or sell copies of the Software, and to permit persons to whom
10 * the Software is furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
14 * Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
20 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
21 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
22 * USE OR OTHER DEALINGS IN THE SOFTWARE. */
23
24 #include "util/u_format.h"
25 #include "util/u_format_s3tc.h"
26 #include "util/u_memory.h"
27 #include "os/os_time.h"
28 #include "vl/vl_decoder.h"
29 #include "vl/vl_video_buffer.h"
30
31 #include "r300_context.h"
32 #include "r300_texture.h"
33 #include "r300_screen_buffer.h"
34 #include "r300_state_inlines.h"
35 #include "r300_public.h"
36
37 #include "draw/draw_context.h"
38
39 /* Return the identifier behind whom the brave coders responsible for this
40 * amalgamation of code, sweat, and duct tape, routinely obscure their names.
41 *
42 * ...I should have just put "Corbin Simpson", but I'm not that cool.
43 *
44 * (Or egotistical. Yet.) */
45 static const char* r300_get_vendor(struct pipe_screen* pscreen)
46 {
47 return "X.Org R300 Project";
48 }
49
50 static const char* r300_get_device_vendor(struct pipe_screen* pscreen)
51 {
52 return "ATI";
53 }
54
55 static const char* chip_families[] = {
56 "unknown",
57 "ATI R300",
58 "ATI R350",
59 "ATI RV350",
60 "ATI RV370",
61 "ATI RV380",
62 "ATI RS400",
63 "ATI RC410",
64 "ATI RS480",
65 "ATI R420",
66 "ATI R423",
67 "ATI R430",
68 "ATI R480",
69 "ATI R481",
70 "ATI RV410",
71 "ATI RS600",
72 "ATI RS690",
73 "ATI RS740",
74 "ATI RV515",
75 "ATI R520",
76 "ATI RV530",
77 "ATI R580",
78 "ATI RV560",
79 "ATI RV570"
80 };
81
82 static const char* r300_get_name(struct pipe_screen* pscreen)
83 {
84 struct r300_screen* r300screen = r300_screen(pscreen);
85
86 return chip_families[r300screen->caps.family];
87 }
88
89 static int r300_get_param(struct pipe_screen* pscreen, enum pipe_cap param)
90 {
91 struct r300_screen* r300screen = r300_screen(pscreen);
92 boolean is_r500 = r300screen->caps.is_r500;
93
94 switch (param) {
95 /* Supported features (boolean caps). */
96 case PIPE_CAP_NPOT_TEXTURES:
97 case PIPE_CAP_MIXED_FRAMEBUFFER_SIZES:
98 case PIPE_CAP_MIXED_COLOR_DEPTH_BITS:
99 case PIPE_CAP_TWO_SIDED_STENCIL:
100 case PIPE_CAP_ANISOTROPIC_FILTER:
101 case PIPE_CAP_POINT_SPRITE:
102 case PIPE_CAP_OCCLUSION_QUERY:
103 case PIPE_CAP_TEXTURE_SHADOW_MAP:
104 case PIPE_CAP_TEXTURE_MIRROR_CLAMP:
105 case PIPE_CAP_BLEND_EQUATION_SEPARATE:
106 case PIPE_CAP_VERTEX_ELEMENT_INSTANCE_DIVISOR:
107 case PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT:
108 case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER:
109 case PIPE_CAP_CONDITIONAL_RENDER:
110 case PIPE_CAP_TEXTURE_BARRIER:
111 case PIPE_CAP_TGSI_CAN_COMPACT_CONSTANTS:
112 case PIPE_CAP_USER_CONSTANT_BUFFERS:
113 case PIPE_CAP_PREFER_BLIT_BASED_TEXTURE_TRANSFER:
114 case PIPE_CAP_BUFFER_MAP_PERSISTENT_COHERENT:
115 case PIPE_CAP_CLIP_HALFZ:
116 return 1;
117
118 case PIPE_CAP_MIN_MAP_BUFFER_ALIGNMENT:
119 return R300_BUFFER_ALIGNMENT;
120
121 case PIPE_CAP_CONSTANT_BUFFER_OFFSET_ALIGNMENT:
122 return 16;
123
124 case PIPE_CAP_GLSL_FEATURE_LEVEL:
125 return 120;
126
127 /* r300 cannot do swizzling of compressed textures. Supported otherwise. */
128 case PIPE_CAP_TEXTURE_SWIZZLE:
129 return util_format_s3tc_enabled ? r300screen->caps.dxtc_swizzle : 1;
130
131 /* We don't support color clamping on r500, so that we can use color
132 * intepolators for generic varyings. */
133 case PIPE_CAP_VERTEX_COLOR_CLAMPED:
134 return !is_r500;
135
136 /* Supported on r500 only. */
137 case PIPE_CAP_VERTEX_COLOR_UNCLAMPED:
138 case PIPE_CAP_MIXED_COLORBUFFER_FORMATS:
139 case PIPE_CAP_SM3:
140 return is_r500 ? 1 : 0;
141
142 /* Unsupported features. */
143 case PIPE_CAP_QUERY_TIME_ELAPSED:
144 case PIPE_CAP_QUERY_PIPELINE_STATISTICS:
145 case PIPE_CAP_MAX_DUAL_SOURCE_RENDER_TARGETS:
146 case PIPE_CAP_INDEP_BLEND_ENABLE:
147 case PIPE_CAP_INDEP_BLEND_FUNC:
148 case PIPE_CAP_DEPTH_CLIP_DISABLE:
149 case PIPE_CAP_SHADER_STENCIL_EXPORT:
150 case PIPE_CAP_MAX_TEXTURE_ARRAY_LAYERS:
151 case PIPE_CAP_TGSI_INSTANCEID:
152 case PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT:
153 case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER:
154 case PIPE_CAP_SEAMLESS_CUBE_MAP:
155 case PIPE_CAP_SEAMLESS_CUBE_MAP_PER_TEXTURE:
156 case PIPE_CAP_MIN_TEXEL_OFFSET:
157 case PIPE_CAP_MAX_TEXEL_OFFSET:
158 case PIPE_CAP_MIN_TEXTURE_GATHER_OFFSET:
159 case PIPE_CAP_MAX_TEXTURE_GATHER_OFFSET:
160 case PIPE_CAP_MAX_STREAM_OUTPUT_BUFFERS:
161 case PIPE_CAP_MAX_STREAM_OUTPUT_SEPARATE_COMPONENTS:
162 case PIPE_CAP_MAX_STREAM_OUTPUT_INTERLEAVED_COMPONENTS:
163 case PIPE_CAP_MAX_GEOMETRY_OUTPUT_VERTICES:
164 case PIPE_CAP_MAX_GEOMETRY_TOTAL_OUTPUT_COMPONENTS:
165 case PIPE_CAP_MAX_VERTEX_STREAMS:
166 case PIPE_CAP_STREAM_OUTPUT_PAUSE_RESUME:
167 case PIPE_CAP_STREAM_OUTPUT_INTERLEAVE_BUFFERS:
168 case PIPE_CAP_FRAGMENT_COLOR_CLAMPED:
169 case PIPE_CAP_QUADS_FOLLOW_PROVOKING_VERTEX_CONVENTION:
170 case PIPE_CAP_COMPUTE:
171 case PIPE_CAP_START_INSTANCE:
172 case PIPE_CAP_QUERY_TIMESTAMP:
173 case PIPE_CAP_TEXTURE_MULTISAMPLE:
174 case PIPE_CAP_CUBE_MAP_ARRAY:
175 case PIPE_CAP_TEXTURE_BUFFER_OBJECTS:
176 case PIPE_CAP_TEXTURE_BUFFER_OFFSET_ALIGNMENT:
177 case PIPE_CAP_TEXTURE_BORDER_COLOR_QUIRK:
178 case PIPE_CAP_MAX_TEXTURE_BUFFER_SIZE:
179 case PIPE_CAP_TGSI_VS_LAYER_VIEWPORT:
180 case PIPE_CAP_MAX_TEXTURE_GATHER_COMPONENTS:
181 case PIPE_CAP_TEXTURE_GATHER_SM5:
182 case PIPE_CAP_TEXTURE_QUERY_LOD:
183 case PIPE_CAP_FAKE_SW_MSAA:
184 case PIPE_CAP_SAMPLE_SHADING:
185 case PIPE_CAP_TEXTURE_GATHER_OFFSETS:
186 case PIPE_CAP_DRAW_INDIRECT:
187 case PIPE_CAP_MULTI_DRAW_INDIRECT:
188 case PIPE_CAP_MULTI_DRAW_INDIRECT_PARAMS:
189 case PIPE_CAP_TGSI_FS_FINE_DERIVATIVE:
190 case PIPE_CAP_CONDITIONAL_RENDER_INVERTED:
191 case PIPE_CAP_SAMPLER_VIEW_TARGET:
192 case PIPE_CAP_VERTEXID_NOBASE:
193 case PIPE_CAP_POLYGON_OFFSET_CLAMP:
194 case PIPE_CAP_MULTISAMPLE_Z_RESOLVE:
195 case PIPE_CAP_RESOURCE_FROM_USER_MEMORY:
196 case PIPE_CAP_DEVICE_RESET_STATUS_QUERY:
197 case PIPE_CAP_MAX_SHADER_PATCH_VARYINGS:
198 case PIPE_CAP_TEXTURE_FLOAT_LINEAR:
199 case PIPE_CAP_TEXTURE_HALF_FLOAT_LINEAR:
200 case PIPE_CAP_DEPTH_BOUNDS_TEST:
201 case PIPE_CAP_TGSI_TXQS:
202 case PIPE_CAP_FORCE_PERSAMPLE_INTERP:
203 case PIPE_CAP_SHAREABLE_SHADERS:
204 case PIPE_CAP_COPY_BETWEEN_COMPRESSED_AND_PLAIN_FORMATS:
205 case PIPE_CAP_CLEAR_TEXTURE:
206 case PIPE_CAP_DRAW_PARAMETERS:
207 case PIPE_CAP_TGSI_PACK_HALF_FLOAT:
208 case PIPE_CAP_TGSI_FS_POSITION_IS_SYSVAL:
209 case PIPE_CAP_TGSI_FS_FACE_IS_INTEGER_SYSVAL:
210 case PIPE_CAP_SHADER_BUFFER_OFFSET_ALIGNMENT:
211 case PIPE_CAP_INVALIDATE_BUFFER:
212 case PIPE_CAP_GENERATE_MIPMAP:
213 case PIPE_CAP_STRING_MARKER:
214 case PIPE_CAP_BUFFER_SAMPLER_VIEW_RGBA_ONLY:
215 case PIPE_CAP_SURFACE_REINTERPRET_BLOCKS:
216 case PIPE_CAP_QUERY_BUFFER_OBJECT:
217 case PIPE_CAP_QUERY_MEMORY_INFO:
218 case PIPE_CAP_FRAMEBUFFER_NO_ATTACHMENT:
219 case PIPE_CAP_ROBUST_BUFFER_ACCESS_BEHAVIOR:
220 case PIPE_CAP_CULL_DISTANCE:
221 case PIPE_CAP_PRIMITIVE_RESTART_FOR_PATCHES:
222 case PIPE_CAP_TGSI_VOTE:
223 case PIPE_CAP_MAX_WINDOW_RECTANGLES:
224 case PIPE_CAP_POLYGON_OFFSET_UNITS_UNSCALED:
225 case PIPE_CAP_VIEWPORT_SUBPIXEL_BITS:
226 case PIPE_CAP_TGSI_ARRAY_COMPONENTS:
227 case PIPE_CAP_TGSI_CAN_READ_OUTPUTS:
228 case PIPE_CAP_NATIVE_FENCE_FD:
229 case PIPE_CAP_GLSL_OPTIMIZE_CONSERVATIVELY:
230 case PIPE_CAP_TGSI_FS_FBFETCH:
231 case PIPE_CAP_TGSI_MUL_ZERO_WINS:
232 case PIPE_CAP_DOUBLES:
233 case PIPE_CAP_INT64:
234 case PIPE_CAP_INT64_DIVMOD:
235 return 0;
236
237 /* SWTCL-only features. */
238 case PIPE_CAP_PRIMITIVE_RESTART:
239 case PIPE_CAP_USER_VERTEX_BUFFERS:
240 case PIPE_CAP_TGSI_VS_WINDOW_SPACE_POSITION:
241 return !r300screen->caps.has_tcl;
242
243 /* HWTCL-only features / limitations. */
244 case PIPE_CAP_VERTEX_BUFFER_OFFSET_4BYTE_ALIGNED_ONLY:
245 case PIPE_CAP_VERTEX_BUFFER_STRIDE_4BYTE_ALIGNED_ONLY:
246 case PIPE_CAP_VERTEX_ELEMENT_SRC_OFFSET_4BYTE_ALIGNED_ONLY:
247 return r300screen->caps.has_tcl;
248 case PIPE_CAP_TGSI_TEXCOORD:
249 return 0;
250
251 /* Texturing. */
252 case PIPE_CAP_MAX_TEXTURE_2D_LEVELS:
253 case PIPE_CAP_MAX_TEXTURE_3D_LEVELS:
254 case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS:
255 /* 13 == 4096, 12 == 2048 */
256 return is_r500 ? 13 : 12;
257
258 /* Render targets. */
259 case PIPE_CAP_MAX_RENDER_TARGETS:
260 return 4;
261 case PIPE_CAP_ENDIANNESS:
262 return PIPE_ENDIAN_LITTLE;
263
264 case PIPE_CAP_MAX_VIEWPORTS:
265 return 1;
266
267 case PIPE_CAP_MAX_VERTEX_ATTRIB_STRIDE:
268 return 2048;
269
270 case PIPE_CAP_VENDOR_ID:
271 return 0x1002;
272 case PIPE_CAP_DEVICE_ID:
273 return r300screen->info.pci_id;
274 case PIPE_CAP_ACCELERATED:
275 return 1;
276 case PIPE_CAP_VIDEO_MEMORY:
277 return r300screen->info.vram_size >> 20;
278 case PIPE_CAP_UMA:
279 return 0;
280 case PIPE_CAP_PCI_GROUP:
281 return r300screen->info.pci_domain;
282 case PIPE_CAP_PCI_BUS:
283 return r300screen->info.pci_bus;
284 case PIPE_CAP_PCI_DEVICE:
285 return r300screen->info.pci_dev;
286 case PIPE_CAP_PCI_FUNCTION:
287 return r300screen->info.pci_func;
288 }
289 return 0;
290 }
291
292 static int r300_get_shader_param(struct pipe_screen *pscreen, unsigned shader, enum pipe_shader_cap param)
293 {
294 struct r300_screen* r300screen = r300_screen(pscreen);
295 boolean is_r400 = r300screen->caps.is_r400;
296 boolean is_r500 = r300screen->caps.is_r500;
297
298 switch (shader) {
299 case PIPE_SHADER_FRAGMENT:
300 switch (param)
301 {
302 case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
303 return is_r500 || is_r400 ? 512 : 96;
304 case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
305 return is_r500 || is_r400 ? 512 : 64;
306 case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
307 return is_r500 || is_r400 ? 512 : 32;
308 case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
309 return is_r500 ? 511 : 4;
310 case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:
311 return is_r500 ? 64 : 0; /* Actually unlimited on r500. */
312 /* Fragment shader limits. */
313 case PIPE_SHADER_CAP_MAX_INPUTS:
314 /* 2 colors + 8 texcoords are always supported
315 * (minus fog and wpos).
316 *
317 * R500 has the ability to turn 3rd and 4th color into
318 * additional texcoords but there is no two-sided color
319 * selection then. However the facing bit can be used instead. */
320 return 10;
321 case PIPE_SHADER_CAP_MAX_OUTPUTS:
322 return 4;
323 case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE:
324 return (is_r500 ? 256 : 32) * sizeof(float[4]);
325 case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
326 case PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE:
327 return 1;
328 case PIPE_SHADER_CAP_MAX_TEMPS:
329 return is_r500 ? 128 : is_r400 ? 64 : 32;
330 case PIPE_SHADER_CAP_MAX_PREDS:
331 return 0; /* unused */
332 case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
333 case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS:
334 return r300screen->caps.num_tex_units;
335 case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
336 case PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED:
337 case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
338 case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
339 case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
340 case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
341 case PIPE_SHADER_CAP_SUBROUTINES:
342 case PIPE_SHADER_CAP_INTEGERS:
343 case PIPE_SHADER_CAP_TGSI_DROUND_SUPPORTED:
344 case PIPE_SHADER_CAP_TGSI_DFRACEXP_DLDEXP_SUPPORTED:
345 case PIPE_SHADER_CAP_TGSI_FMA_SUPPORTED:
346 case PIPE_SHADER_CAP_MAX_SHADER_BUFFERS:
347 case PIPE_SHADER_CAP_MAX_SHADER_IMAGES:
348 case PIPE_SHADER_CAP_LOWER_IF_THRESHOLD:
349 return 0;
350 case PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT:
351 return 32;
352 case PIPE_SHADER_CAP_PREFERRED_IR:
353 return PIPE_SHADER_IR_TGSI;
354 case PIPE_SHADER_CAP_SUPPORTED_IRS:
355 return 0;
356 }
357 break;
358 case PIPE_SHADER_VERTEX:
359 switch (param)
360 {
361 case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
362 case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS:
363 case PIPE_SHADER_CAP_SUBROUTINES:
364 return 0;
365 default:;
366 }
367
368 if (!r300screen->caps.has_tcl) {
369 return draw_get_shader_param(shader, param);
370 }
371
372 switch (param)
373 {
374 case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
375 case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
376 return is_r500 ? 1024 : 256;
377 case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:
378 return is_r500 ? 4 : 0; /* For loops; not sure about conditionals. */
379 case PIPE_SHADER_CAP_MAX_INPUTS:
380 return 16;
381 case PIPE_SHADER_CAP_MAX_OUTPUTS:
382 return 10;
383 case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE:
384 return 256 * sizeof(float[4]);
385 case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
386 return 1;
387 case PIPE_SHADER_CAP_MAX_TEMPS:
388 return 32;
389 case PIPE_SHADER_CAP_MAX_PREDS:
390 return 0; /* unused */
391 case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
392 case PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE:
393 return 1;
394 case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
395 case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
396 case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
397 case PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED:
398 case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
399 case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
400 case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
401 case PIPE_SHADER_CAP_SUBROUTINES:
402 case PIPE_SHADER_CAP_INTEGERS:
403 case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
404 case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS:
405 case PIPE_SHADER_CAP_TGSI_DROUND_SUPPORTED:
406 case PIPE_SHADER_CAP_TGSI_DFRACEXP_DLDEXP_SUPPORTED:
407 case PIPE_SHADER_CAP_TGSI_FMA_SUPPORTED:
408 case PIPE_SHADER_CAP_MAX_SHADER_BUFFERS:
409 case PIPE_SHADER_CAP_MAX_SHADER_IMAGES:
410 case PIPE_SHADER_CAP_LOWER_IF_THRESHOLD:
411 return 0;
412 case PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT:
413 return 32;
414 case PIPE_SHADER_CAP_PREFERRED_IR:
415 return PIPE_SHADER_IR_TGSI;
416 case PIPE_SHADER_CAP_SUPPORTED_IRS:
417 return 0;
418 }
419 break;
420 }
421 return 0;
422 }
423
424 static float r300_get_paramf(struct pipe_screen* pscreen,
425 enum pipe_capf param)
426 {
427 struct r300_screen* r300screen = r300_screen(pscreen);
428
429 switch (param) {
430 case PIPE_CAPF_MAX_LINE_WIDTH:
431 case PIPE_CAPF_MAX_LINE_WIDTH_AA:
432 case PIPE_CAPF_MAX_POINT_WIDTH:
433 case PIPE_CAPF_MAX_POINT_WIDTH_AA:
434 /* The maximum dimensions of the colorbuffer are our practical
435 * rendering limits. 2048 pixels should be enough for anybody. */
436 if (r300screen->caps.is_r500) {
437 return 4096.0f;
438 } else if (r300screen->caps.is_r400) {
439 return 4021.0f;
440 } else {
441 return 2560.0f;
442 }
443 case PIPE_CAPF_MAX_TEXTURE_ANISOTROPY:
444 return 16.0f;
445 case PIPE_CAPF_MAX_TEXTURE_LOD_BIAS:
446 return 16.0f;
447 case PIPE_CAPF_GUARD_BAND_LEFT:
448 case PIPE_CAPF_GUARD_BAND_TOP:
449 case PIPE_CAPF_GUARD_BAND_RIGHT:
450 case PIPE_CAPF_GUARD_BAND_BOTTOM:
451 return 0.0f;
452 default:
453 debug_printf("r300: Warning: Unknown CAP %d in get_paramf.\n",
454 param);
455 return 0.0f;
456 }
457 }
458
459 static int r300_get_video_param(struct pipe_screen *screen,
460 enum pipe_video_profile profile,
461 enum pipe_video_entrypoint entrypoint,
462 enum pipe_video_cap param)
463 {
464 switch (param) {
465 case PIPE_VIDEO_CAP_SUPPORTED:
466 return vl_profile_supported(screen, profile, entrypoint);
467 case PIPE_VIDEO_CAP_NPOT_TEXTURES:
468 return 0;
469 case PIPE_VIDEO_CAP_MAX_WIDTH:
470 case PIPE_VIDEO_CAP_MAX_HEIGHT:
471 return vl_video_buffer_max_size(screen);
472 case PIPE_VIDEO_CAP_PREFERED_FORMAT:
473 return PIPE_FORMAT_NV12;
474 case PIPE_VIDEO_CAP_PREFERS_INTERLACED:
475 return false;
476 case PIPE_VIDEO_CAP_SUPPORTS_INTERLACED:
477 return false;
478 case PIPE_VIDEO_CAP_SUPPORTS_PROGRESSIVE:
479 return true;
480 case PIPE_VIDEO_CAP_MAX_LEVEL:
481 return vl_level_supported(screen, profile);
482 default:
483 return 0;
484 }
485 }
486
487 /**
488 * Whether the format matches:
489 * PIPE_FORMAT_?10?10?10?2_UNORM
490 */
491 static inline boolean
492 util_format_is_rgba1010102_variant(const struct util_format_description *desc)
493 {
494 static const unsigned size[4] = {10, 10, 10, 2};
495 unsigned chan;
496
497 if (desc->block.width != 1 ||
498 desc->block.height != 1 ||
499 desc->block.bits != 32)
500 return FALSE;
501
502 for (chan = 0; chan < 4; ++chan) {
503 if(desc->channel[chan].type != UTIL_FORMAT_TYPE_UNSIGNED &&
504 desc->channel[chan].type != UTIL_FORMAT_TYPE_VOID)
505 return FALSE;
506 if (desc->channel[chan].size != size[chan])
507 return FALSE;
508 }
509
510 return TRUE;
511 }
512
513 static bool r300_is_blending_supported(struct r300_screen *rscreen,
514 enum pipe_format format)
515 {
516 int c;
517 const struct util_format_description *desc =
518 util_format_description(format);
519
520 if (desc->layout != UTIL_FORMAT_LAYOUT_PLAIN)
521 return false;
522
523 c = util_format_get_first_non_void_channel(format);
524
525 /* RGBA16F */
526 if (rscreen->caps.is_r500 &&
527 desc->nr_channels == 4 &&
528 desc->channel[c].size == 16 &&
529 desc->channel[c].type == UTIL_FORMAT_TYPE_FLOAT)
530 return true;
531
532 if (desc->channel[c].normalized &&
533 desc->channel[c].type == UTIL_FORMAT_TYPE_UNSIGNED &&
534 desc->channel[c].size >= 4 &&
535 desc->channel[c].size <= 10) {
536 /* RGB10_A2, RGBA8, RGB5_A1, RGBA4, RGB565 */
537 if (desc->nr_channels >= 3)
538 return true;
539
540 if (format == PIPE_FORMAT_R8G8_UNORM)
541 return true;
542
543 /* R8, I8, L8, A8 */
544 if (desc->nr_channels == 1)
545 return true;
546 }
547
548 return false;
549 }
550
551 static boolean r300_is_format_supported(struct pipe_screen* screen,
552 enum pipe_format format,
553 enum pipe_texture_target target,
554 unsigned sample_count,
555 unsigned usage)
556 {
557 uint32_t retval = 0;
558 boolean is_r500 = r300_screen(screen)->caps.is_r500;
559 boolean is_r400 = r300_screen(screen)->caps.is_r400;
560 boolean is_color2101010 = format == PIPE_FORMAT_R10G10B10A2_UNORM ||
561 format == PIPE_FORMAT_R10G10B10X2_SNORM ||
562 format == PIPE_FORMAT_B10G10R10A2_UNORM ||
563 format == PIPE_FORMAT_B10G10R10X2_UNORM ||
564 format == PIPE_FORMAT_R10SG10SB10SA2U_NORM;
565 boolean is_ati1n = format == PIPE_FORMAT_RGTC1_UNORM ||
566 format == PIPE_FORMAT_RGTC1_SNORM ||
567 format == PIPE_FORMAT_LATC1_UNORM ||
568 format == PIPE_FORMAT_LATC1_SNORM;
569 boolean is_ati2n = format == PIPE_FORMAT_RGTC2_UNORM ||
570 format == PIPE_FORMAT_RGTC2_SNORM ||
571 format == PIPE_FORMAT_LATC2_UNORM ||
572 format == PIPE_FORMAT_LATC2_SNORM;
573 boolean is_half_float = format == PIPE_FORMAT_R16_FLOAT ||
574 format == PIPE_FORMAT_R16G16_FLOAT ||
575 format == PIPE_FORMAT_R16G16B16_FLOAT ||
576 format == PIPE_FORMAT_R16G16B16A16_FLOAT ||
577 format == PIPE_FORMAT_R16G16B16X16_FLOAT;
578 const struct util_format_description *desc;
579
580 if (!util_format_is_supported(format, usage))
581 return FALSE;
582
583 /* Check multisampling support. */
584 switch (sample_count) {
585 case 0:
586 case 1:
587 break;
588 case 2:
589 case 4:
590 case 6:
591 /* No texturing and scanout. */
592 if (usage & (PIPE_BIND_SAMPLER_VIEW |
593 PIPE_BIND_DISPLAY_TARGET |
594 PIPE_BIND_SCANOUT)) {
595 return FALSE;
596 }
597
598 desc = util_format_description(format);
599
600 if (is_r500) {
601 /* Only allow depth/stencil, RGBA8, RGBA1010102, RGBA16F. */
602 if (!util_format_is_depth_or_stencil(format) &&
603 !util_format_is_rgba8_variant(desc) &&
604 !util_format_is_rgba1010102_variant(desc) &&
605 format != PIPE_FORMAT_R16G16B16A16_FLOAT &&
606 format != PIPE_FORMAT_R16G16B16X16_FLOAT) {
607 return FALSE;
608 }
609 } else {
610 /* Only allow depth/stencil, RGBA8. */
611 if (!util_format_is_depth_or_stencil(format) &&
612 !util_format_is_rgba8_variant(desc)) {
613 return FALSE;
614 }
615 }
616 break;
617 default:
618 return FALSE;
619 }
620
621 /* Check sampler format support. */
622 if ((usage & PIPE_BIND_SAMPLER_VIEW) &&
623 /* these two are broken for an unknown reason */
624 format != PIPE_FORMAT_R8G8B8X8_SNORM &&
625 format != PIPE_FORMAT_R16G16B16X16_SNORM &&
626 /* ATI1N is r5xx-only. */
627 (is_r500 || !is_ati1n) &&
628 /* ATI2N is supported on r4xx-r5xx. */
629 (is_r400 || is_r500 || !is_ati2n) &&
630 r300_is_sampler_format_supported(format)) {
631 retval |= PIPE_BIND_SAMPLER_VIEW;
632 }
633
634 /* Check colorbuffer format support. */
635 if ((usage & (PIPE_BIND_RENDER_TARGET |
636 PIPE_BIND_DISPLAY_TARGET |
637 PIPE_BIND_SCANOUT |
638 PIPE_BIND_SHARED |
639 PIPE_BIND_BLENDABLE)) &&
640 /* 2101010 cannot be rendered to on non-r5xx. */
641 (!is_color2101010 || is_r500) &&
642 r300_is_colorbuffer_format_supported(format)) {
643 retval |= usage &
644 (PIPE_BIND_RENDER_TARGET |
645 PIPE_BIND_DISPLAY_TARGET |
646 PIPE_BIND_SCANOUT |
647 PIPE_BIND_SHARED);
648
649 if (r300_is_blending_supported(r300_screen(screen), format)) {
650 retval |= usage & PIPE_BIND_BLENDABLE;
651 }
652 }
653
654 /* Check depth-stencil format support. */
655 if (usage & PIPE_BIND_DEPTH_STENCIL &&
656 r300_is_zs_format_supported(format)) {
657 retval |= PIPE_BIND_DEPTH_STENCIL;
658 }
659
660 /* Check vertex buffer format support. */
661 if (usage & PIPE_BIND_VERTEX_BUFFER) {
662 if (r300_screen(screen)->caps.has_tcl) {
663 /* Half float is supported on >= R400. */
664 if ((is_r400 || is_r500 || !is_half_float) &&
665 r300_translate_vertex_data_type(format) != R300_INVALID_FORMAT) {
666 retval |= PIPE_BIND_VERTEX_BUFFER;
667 }
668 } else {
669 /* SW TCL */
670 if (!util_format_is_pure_integer(format)) {
671 retval |= PIPE_BIND_VERTEX_BUFFER;
672 }
673 }
674 }
675
676 return retval == usage;
677 }
678
679 static void r300_destroy_screen(struct pipe_screen* pscreen)
680 {
681 struct r300_screen* r300screen = r300_screen(pscreen);
682 struct radeon_winsys *rws = radeon_winsys(pscreen);
683
684 if (rws && !rws->unref(rws))
685 return;
686
687 pipe_mutex_destroy(r300screen->cmask_mutex);
688 slab_destroy_parent(&r300screen->pool_transfers);
689
690 if (rws)
691 rws->destroy(rws);
692
693 FREE(r300screen);
694 }
695
696 static void r300_fence_reference(struct pipe_screen *screen,
697 struct pipe_fence_handle **ptr,
698 struct pipe_fence_handle *fence)
699 {
700 struct radeon_winsys *rws = r300_screen(screen)->rws;
701
702 rws->fence_reference(ptr, fence);
703 }
704
705 static boolean r300_fence_finish(struct pipe_screen *screen,
706 struct pipe_context *ctx,
707 struct pipe_fence_handle *fence,
708 uint64_t timeout)
709 {
710 struct radeon_winsys *rws = r300_screen(screen)->rws;
711
712 return rws->fence_wait(rws, fence, timeout);
713 }
714
715 struct pipe_screen* r300_screen_create(struct radeon_winsys *rws)
716 {
717 struct r300_screen *r300screen = CALLOC_STRUCT(r300_screen);
718
719 if (!r300screen) {
720 FREE(r300screen);
721 return NULL;
722 }
723
724 rws->query_info(rws, &r300screen->info);
725
726 r300_init_debug(r300screen);
727 r300_parse_chipset(r300screen->info.pci_id, &r300screen->caps);
728
729 if (SCREEN_DBG_ON(r300screen, DBG_NO_ZMASK))
730 r300screen->caps.zmask_ram = 0;
731 if (SCREEN_DBG_ON(r300screen, DBG_NO_HIZ))
732 r300screen->caps.hiz_ram = 0;
733
734 r300screen->rws = rws;
735 r300screen->screen.destroy = r300_destroy_screen;
736 r300screen->screen.get_name = r300_get_name;
737 r300screen->screen.get_vendor = r300_get_vendor;
738 r300screen->screen.get_device_vendor = r300_get_device_vendor;
739 r300screen->screen.get_param = r300_get_param;
740 r300screen->screen.get_shader_param = r300_get_shader_param;
741 r300screen->screen.get_paramf = r300_get_paramf;
742 r300screen->screen.get_video_param = r300_get_video_param;
743 r300screen->screen.is_format_supported = r300_is_format_supported;
744 r300screen->screen.is_video_format_supported = vl_video_buffer_is_format_supported;
745 r300screen->screen.context_create = r300_create_context;
746 r300screen->screen.fence_reference = r300_fence_reference;
747 r300screen->screen.fence_finish = r300_fence_finish;
748
749 r300_init_screen_resource_functions(r300screen);
750
751 slab_create_parent(&r300screen->pool_transfers, sizeof(struct pipe_transfer), 64);
752
753 util_format_s3tc_init();
754 pipe_mutex_init(r300screen->cmask_mutex);
755
756 return &r300screen->screen;
757 }