gallium: add PIPE_CAP_INVALIDATE_BUFFER
[mesa.git] / src / gallium / drivers / r300 / r300_screen.c
1 /*
2 * Copyright 2008 Corbin Simpson <MostAwesomeDude@gmail.com>
3 * Copyright 2010 Marek Olšák <maraeo@gmail.com>
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * on the rights to use, copy, modify, merge, publish, distribute, sub
9 * license, and/or sell copies of the Software, and to permit persons to whom
10 * the Software is furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
14 * Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
20 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
21 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
22 * USE OR OTHER DEALINGS IN THE SOFTWARE. */
23
24 #include "util/u_format.h"
25 #include "util/u_format_s3tc.h"
26 #include "util/u_memory.h"
27 #include "os/os_time.h"
28 #include "vl/vl_decoder.h"
29 #include "vl/vl_video_buffer.h"
30
31 #include "r300_context.h"
32 #include "r300_texture.h"
33 #include "r300_screen_buffer.h"
34 #include "r300_state_inlines.h"
35 #include "r300_public.h"
36
37 #include "draw/draw_context.h"
38
39 /* Return the identifier behind whom the brave coders responsible for this
40 * amalgamation of code, sweat, and duct tape, routinely obscure their names.
41 *
42 * ...I should have just put "Corbin Simpson", but I'm not that cool.
43 *
44 * (Or egotistical. Yet.) */
45 static const char* r300_get_vendor(struct pipe_screen* pscreen)
46 {
47 return "X.Org R300 Project";
48 }
49
50 static const char* r300_get_device_vendor(struct pipe_screen* pscreen)
51 {
52 return "ATI";
53 }
54
55 static const char* chip_families[] = {
56 "unknown",
57 "ATI R300",
58 "ATI R350",
59 "ATI RV350",
60 "ATI RV370",
61 "ATI RV380",
62 "ATI RS400",
63 "ATI RC410",
64 "ATI RS480",
65 "ATI R420",
66 "ATI R423",
67 "ATI R430",
68 "ATI R480",
69 "ATI R481",
70 "ATI RV410",
71 "ATI RS600",
72 "ATI RS690",
73 "ATI RS740",
74 "ATI RV515",
75 "ATI R520",
76 "ATI RV530",
77 "ATI R580",
78 "ATI RV560",
79 "ATI RV570"
80 };
81
82 static const char* r300_get_name(struct pipe_screen* pscreen)
83 {
84 struct r300_screen* r300screen = r300_screen(pscreen);
85
86 return chip_families[r300screen->caps.family];
87 }
88
89 static int r300_get_param(struct pipe_screen* pscreen, enum pipe_cap param)
90 {
91 struct r300_screen* r300screen = r300_screen(pscreen);
92 boolean is_r500 = r300screen->caps.is_r500;
93
94 switch (param) {
95 /* Supported features (boolean caps). */
96 case PIPE_CAP_NPOT_TEXTURES:
97 case PIPE_CAP_MIXED_FRAMEBUFFER_SIZES:
98 case PIPE_CAP_TWO_SIDED_STENCIL:
99 case PIPE_CAP_ANISOTROPIC_FILTER:
100 case PIPE_CAP_POINT_SPRITE:
101 case PIPE_CAP_OCCLUSION_QUERY:
102 case PIPE_CAP_TEXTURE_SHADOW_MAP:
103 case PIPE_CAP_TEXTURE_MIRROR_CLAMP:
104 case PIPE_CAP_BLEND_EQUATION_SEPARATE:
105 case PIPE_CAP_VERTEX_ELEMENT_INSTANCE_DIVISOR:
106 case PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT:
107 case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER:
108 case PIPE_CAP_CONDITIONAL_RENDER:
109 case PIPE_CAP_TEXTURE_BARRIER:
110 case PIPE_CAP_TGSI_CAN_COMPACT_CONSTANTS:
111 case PIPE_CAP_USER_INDEX_BUFFERS:
112 case PIPE_CAP_USER_CONSTANT_BUFFERS:
113 case PIPE_CAP_PREFER_BLIT_BASED_TEXTURE_TRANSFER:
114 case PIPE_CAP_BUFFER_MAP_PERSISTENT_COHERENT:
115 case PIPE_CAP_CLIP_HALFZ:
116 return 1;
117
118 case PIPE_CAP_MIN_MAP_BUFFER_ALIGNMENT:
119 return R300_BUFFER_ALIGNMENT;
120
121 case PIPE_CAP_CONSTANT_BUFFER_OFFSET_ALIGNMENT:
122 return 16;
123
124 case PIPE_CAP_GLSL_FEATURE_LEVEL:
125 return 120;
126
127 /* r300 cannot do swizzling of compressed textures. Supported otherwise. */
128 case PIPE_CAP_TEXTURE_SWIZZLE:
129 return util_format_s3tc_enabled ? r300screen->caps.dxtc_swizzle : 1;
130
131 /* We don't support color clamping on r500, so that we can use color
132 * intepolators for generic varyings. */
133 case PIPE_CAP_VERTEX_COLOR_CLAMPED:
134 return !is_r500;
135
136 /* Supported on r500 only. */
137 case PIPE_CAP_VERTEX_COLOR_UNCLAMPED:
138 case PIPE_CAP_MIXED_COLORBUFFER_FORMATS:
139 case PIPE_CAP_SM3:
140 return is_r500 ? 1 : 0;
141
142 /* Unsupported features. */
143 case PIPE_CAP_QUERY_TIME_ELAPSED:
144 case PIPE_CAP_QUERY_PIPELINE_STATISTICS:
145 case PIPE_CAP_MAX_DUAL_SOURCE_RENDER_TARGETS:
146 case PIPE_CAP_INDEP_BLEND_ENABLE:
147 case PIPE_CAP_INDEP_BLEND_FUNC:
148 case PIPE_CAP_DEPTH_CLIP_DISABLE:
149 case PIPE_CAP_SHADER_STENCIL_EXPORT:
150 case PIPE_CAP_MAX_TEXTURE_ARRAY_LAYERS:
151 case PIPE_CAP_TGSI_INSTANCEID:
152 case PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT:
153 case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER:
154 case PIPE_CAP_SEAMLESS_CUBE_MAP:
155 case PIPE_CAP_SEAMLESS_CUBE_MAP_PER_TEXTURE:
156 case PIPE_CAP_MIN_TEXEL_OFFSET:
157 case PIPE_CAP_MAX_TEXEL_OFFSET:
158 case PIPE_CAP_MIN_TEXTURE_GATHER_OFFSET:
159 case PIPE_CAP_MAX_TEXTURE_GATHER_OFFSET:
160 case PIPE_CAP_MAX_STREAM_OUTPUT_BUFFERS:
161 case PIPE_CAP_MAX_STREAM_OUTPUT_SEPARATE_COMPONENTS:
162 case PIPE_CAP_MAX_STREAM_OUTPUT_INTERLEAVED_COMPONENTS:
163 case PIPE_CAP_MAX_GEOMETRY_OUTPUT_VERTICES:
164 case PIPE_CAP_MAX_GEOMETRY_TOTAL_OUTPUT_COMPONENTS:
165 case PIPE_CAP_MAX_VERTEX_STREAMS:
166 case PIPE_CAP_STREAM_OUTPUT_PAUSE_RESUME:
167 case PIPE_CAP_FRAGMENT_COLOR_CLAMPED:
168 case PIPE_CAP_QUADS_FOLLOW_PROVOKING_VERTEX_CONVENTION:
169 case PIPE_CAP_COMPUTE:
170 case PIPE_CAP_START_INSTANCE:
171 case PIPE_CAP_QUERY_TIMESTAMP:
172 case PIPE_CAP_TEXTURE_MULTISAMPLE:
173 case PIPE_CAP_CUBE_MAP_ARRAY:
174 case PIPE_CAP_TEXTURE_BUFFER_OBJECTS:
175 case PIPE_CAP_TEXTURE_BUFFER_OFFSET_ALIGNMENT:
176 case PIPE_CAP_TEXTURE_BORDER_COLOR_QUIRK:
177 case PIPE_CAP_MAX_TEXTURE_BUFFER_SIZE:
178 case PIPE_CAP_TGSI_VS_LAYER_VIEWPORT:
179 case PIPE_CAP_MAX_TEXTURE_GATHER_COMPONENTS:
180 case PIPE_CAP_TEXTURE_GATHER_SM5:
181 case PIPE_CAP_TEXTURE_QUERY_LOD:
182 case PIPE_CAP_FAKE_SW_MSAA:
183 case PIPE_CAP_SAMPLE_SHADING:
184 case PIPE_CAP_TEXTURE_GATHER_OFFSETS:
185 case PIPE_CAP_DRAW_INDIRECT:
186 case PIPE_CAP_MULTI_DRAW_INDIRECT:
187 case PIPE_CAP_MULTI_DRAW_INDIRECT_PARAMS:
188 case PIPE_CAP_TGSI_FS_FINE_DERIVATIVE:
189 case PIPE_CAP_CONDITIONAL_RENDER_INVERTED:
190 case PIPE_CAP_SAMPLER_VIEW_TARGET:
191 case PIPE_CAP_VERTEXID_NOBASE:
192 case PIPE_CAP_POLYGON_OFFSET_CLAMP:
193 case PIPE_CAP_MULTISAMPLE_Z_RESOLVE:
194 case PIPE_CAP_RESOURCE_FROM_USER_MEMORY:
195 case PIPE_CAP_DEVICE_RESET_STATUS_QUERY:
196 case PIPE_CAP_MAX_SHADER_PATCH_VARYINGS:
197 case PIPE_CAP_TEXTURE_FLOAT_LINEAR:
198 case PIPE_CAP_TEXTURE_HALF_FLOAT_LINEAR:
199 case PIPE_CAP_DEPTH_BOUNDS_TEST:
200 case PIPE_CAP_TGSI_TXQS:
201 case PIPE_CAP_FORCE_PERSAMPLE_INTERP:
202 case PIPE_CAP_SHAREABLE_SHADERS:
203 case PIPE_CAP_COPY_BETWEEN_COMPRESSED_AND_PLAIN_FORMATS:
204 case PIPE_CAP_CLEAR_TEXTURE:
205 case PIPE_CAP_DRAW_PARAMETERS:
206 case PIPE_CAP_TGSI_PACK_HALF_FLOAT:
207 case PIPE_CAP_TGSI_FS_POSITION_IS_SYSVAL:
208 case PIPE_CAP_TGSI_FS_FACE_IS_INTEGER_SYSVAL:
209 case PIPE_CAP_SHADER_BUFFER_OFFSET_ALIGNMENT:
210 case PIPE_CAP_INVALIDATE_BUFFER:
211 return 0;
212
213 /* SWTCL-only features. */
214 case PIPE_CAP_PRIMITIVE_RESTART:
215 case PIPE_CAP_USER_VERTEX_BUFFERS:
216 case PIPE_CAP_TGSI_VS_WINDOW_SPACE_POSITION:
217 return !r300screen->caps.has_tcl;
218
219 /* HWTCL-only features / limitations. */
220 case PIPE_CAP_VERTEX_BUFFER_OFFSET_4BYTE_ALIGNED_ONLY:
221 case PIPE_CAP_VERTEX_BUFFER_STRIDE_4BYTE_ALIGNED_ONLY:
222 case PIPE_CAP_VERTEX_ELEMENT_SRC_OFFSET_4BYTE_ALIGNED_ONLY:
223 return r300screen->caps.has_tcl;
224 case PIPE_CAP_TGSI_TEXCOORD:
225 return 0;
226
227 /* Texturing. */
228 case PIPE_CAP_MAX_TEXTURE_2D_LEVELS:
229 case PIPE_CAP_MAX_TEXTURE_3D_LEVELS:
230 case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS:
231 /* 13 == 4096, 12 == 2048 */
232 return is_r500 ? 13 : 12;
233
234 /* Render targets. */
235 case PIPE_CAP_MAX_RENDER_TARGETS:
236 return 4;
237 case PIPE_CAP_ENDIANNESS:
238 return PIPE_ENDIAN_LITTLE;
239
240 case PIPE_CAP_MAX_VIEWPORTS:
241 return 1;
242
243 case PIPE_CAP_MAX_VERTEX_ATTRIB_STRIDE:
244 return 2048;
245
246 case PIPE_CAP_VENDOR_ID:
247 return 0x1002;
248 case PIPE_CAP_DEVICE_ID:
249 return r300screen->info.pci_id;
250 case PIPE_CAP_ACCELERATED:
251 return 1;
252 case PIPE_CAP_VIDEO_MEMORY:
253 return r300screen->info.vram_size >> 20;
254 case PIPE_CAP_UMA:
255 return 0;
256 }
257 return 0;
258 }
259
260 static int r300_get_shader_param(struct pipe_screen *pscreen, unsigned shader, enum pipe_shader_cap param)
261 {
262 struct r300_screen* r300screen = r300_screen(pscreen);
263 boolean is_r400 = r300screen->caps.is_r400;
264 boolean is_r500 = r300screen->caps.is_r500;
265
266 switch (shader) {
267 case PIPE_SHADER_FRAGMENT:
268 switch (param)
269 {
270 case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
271 return is_r500 || is_r400 ? 512 : 96;
272 case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
273 return is_r500 || is_r400 ? 512 : 64;
274 case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
275 return is_r500 || is_r400 ? 512 : 32;
276 case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
277 return is_r500 ? 511 : 4;
278 case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:
279 return is_r500 ? 64 : 0; /* Actually unlimited on r500. */
280 /* Fragment shader limits. */
281 case PIPE_SHADER_CAP_MAX_INPUTS:
282 /* 2 colors + 8 texcoords are always supported
283 * (minus fog and wpos).
284 *
285 * R500 has the ability to turn 3rd and 4th color into
286 * additional texcoords but there is no two-sided color
287 * selection then. However the facing bit can be used instead. */
288 return 10;
289 case PIPE_SHADER_CAP_MAX_OUTPUTS:
290 return 4;
291 case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE:
292 return (is_r500 ? 256 : 32) * sizeof(float[4]);
293 case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
294 case PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE:
295 return 1;
296 case PIPE_SHADER_CAP_MAX_TEMPS:
297 return is_r500 ? 128 : is_r400 ? 64 : 32;
298 case PIPE_SHADER_CAP_MAX_PREDS:
299 return 0; /* unused */
300 case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
301 case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS:
302 return r300screen->caps.num_tex_units;
303 case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
304 case PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED:
305 case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
306 case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
307 case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
308 case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
309 case PIPE_SHADER_CAP_SUBROUTINES:
310 case PIPE_SHADER_CAP_INTEGERS:
311 case PIPE_SHADER_CAP_DOUBLES:
312 case PIPE_SHADER_CAP_TGSI_DROUND_SUPPORTED:
313 case PIPE_SHADER_CAP_TGSI_DFRACEXP_DLDEXP_SUPPORTED:
314 case PIPE_SHADER_CAP_TGSI_FMA_SUPPORTED:
315 case PIPE_SHADER_CAP_MAX_SHADER_BUFFERS:
316 return 0;
317 case PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT:
318 return 32;
319 case PIPE_SHADER_CAP_PREFERRED_IR:
320 return PIPE_SHADER_IR_TGSI;
321 }
322 break;
323 case PIPE_SHADER_VERTEX:
324 switch (param)
325 {
326 case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
327 case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS:
328 case PIPE_SHADER_CAP_SUBROUTINES:
329 return 0;
330 default:;
331 }
332
333 if (!r300screen->caps.has_tcl) {
334 return draw_get_shader_param(shader, param);
335 }
336
337 switch (param)
338 {
339 case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
340 case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
341 return is_r500 ? 1024 : 256;
342 case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:
343 return is_r500 ? 4 : 0; /* For loops; not sure about conditionals. */
344 case PIPE_SHADER_CAP_MAX_INPUTS:
345 return 16;
346 case PIPE_SHADER_CAP_MAX_OUTPUTS:
347 return 10;
348 case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE:
349 return 256 * sizeof(float[4]);
350 case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
351 return 1;
352 case PIPE_SHADER_CAP_MAX_TEMPS:
353 return 32;
354 case PIPE_SHADER_CAP_MAX_PREDS:
355 return 0; /* unused */
356 case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
357 case PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE:
358 return 1;
359 case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
360 case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
361 case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
362 case PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED:
363 case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
364 case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
365 case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
366 case PIPE_SHADER_CAP_SUBROUTINES:
367 case PIPE_SHADER_CAP_INTEGERS:
368 case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
369 case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS:
370 case PIPE_SHADER_CAP_DOUBLES:
371 case PIPE_SHADER_CAP_TGSI_DROUND_SUPPORTED:
372 case PIPE_SHADER_CAP_TGSI_DFRACEXP_DLDEXP_SUPPORTED:
373 case PIPE_SHADER_CAP_TGSI_FMA_SUPPORTED:
374 case PIPE_SHADER_CAP_MAX_SHADER_BUFFERS:
375 return 0;
376 case PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT:
377 return 32;
378 case PIPE_SHADER_CAP_PREFERRED_IR:
379 return PIPE_SHADER_IR_TGSI;
380 }
381 break;
382 }
383 return 0;
384 }
385
386 static float r300_get_paramf(struct pipe_screen* pscreen,
387 enum pipe_capf param)
388 {
389 struct r300_screen* r300screen = r300_screen(pscreen);
390
391 switch (param) {
392 case PIPE_CAPF_MAX_LINE_WIDTH:
393 case PIPE_CAPF_MAX_LINE_WIDTH_AA:
394 case PIPE_CAPF_MAX_POINT_WIDTH:
395 case PIPE_CAPF_MAX_POINT_WIDTH_AA:
396 /* The maximum dimensions of the colorbuffer are our practical
397 * rendering limits. 2048 pixels should be enough for anybody. */
398 if (r300screen->caps.is_r500) {
399 return 4096.0f;
400 } else if (r300screen->caps.is_r400) {
401 return 4021.0f;
402 } else {
403 return 2560.0f;
404 }
405 case PIPE_CAPF_MAX_TEXTURE_ANISOTROPY:
406 return 16.0f;
407 case PIPE_CAPF_MAX_TEXTURE_LOD_BIAS:
408 return 16.0f;
409 case PIPE_CAPF_GUARD_BAND_LEFT:
410 case PIPE_CAPF_GUARD_BAND_TOP:
411 case PIPE_CAPF_GUARD_BAND_RIGHT:
412 case PIPE_CAPF_GUARD_BAND_BOTTOM:
413 return 0.0f;
414 default:
415 debug_printf("r300: Warning: Unknown CAP %d in get_paramf.\n",
416 param);
417 return 0.0f;
418 }
419 }
420
421 static int r300_get_video_param(struct pipe_screen *screen,
422 enum pipe_video_profile profile,
423 enum pipe_video_entrypoint entrypoint,
424 enum pipe_video_cap param)
425 {
426 switch (param) {
427 case PIPE_VIDEO_CAP_SUPPORTED:
428 return vl_profile_supported(screen, profile, entrypoint);
429 case PIPE_VIDEO_CAP_NPOT_TEXTURES:
430 return 0;
431 case PIPE_VIDEO_CAP_MAX_WIDTH:
432 case PIPE_VIDEO_CAP_MAX_HEIGHT:
433 return vl_video_buffer_max_size(screen);
434 case PIPE_VIDEO_CAP_PREFERED_FORMAT:
435 return PIPE_FORMAT_NV12;
436 case PIPE_VIDEO_CAP_PREFERS_INTERLACED:
437 return false;
438 case PIPE_VIDEO_CAP_SUPPORTS_INTERLACED:
439 return false;
440 case PIPE_VIDEO_CAP_SUPPORTS_PROGRESSIVE:
441 return true;
442 case PIPE_VIDEO_CAP_MAX_LEVEL:
443 return vl_level_supported(screen, profile);
444 default:
445 return 0;
446 }
447 }
448
449 /**
450 * Whether the format matches:
451 * PIPE_FORMAT_?10?10?10?2_UNORM
452 */
453 static inline boolean
454 util_format_is_rgba1010102_variant(const struct util_format_description *desc)
455 {
456 static const unsigned size[4] = {10, 10, 10, 2};
457 unsigned chan;
458
459 if (desc->block.width != 1 ||
460 desc->block.height != 1 ||
461 desc->block.bits != 32)
462 return FALSE;
463
464 for (chan = 0; chan < 4; ++chan) {
465 if(desc->channel[chan].type != UTIL_FORMAT_TYPE_UNSIGNED &&
466 desc->channel[chan].type != UTIL_FORMAT_TYPE_VOID)
467 return FALSE;
468 if (desc->channel[chan].size != size[chan])
469 return FALSE;
470 }
471
472 return TRUE;
473 }
474
475 static bool r300_is_blending_supported(struct r300_screen *rscreen,
476 enum pipe_format format)
477 {
478 int c;
479 const struct util_format_description *desc =
480 util_format_description(format);
481
482 if (desc->layout != UTIL_FORMAT_LAYOUT_PLAIN)
483 return false;
484
485 c = util_format_get_first_non_void_channel(format);
486
487 /* RGBA16F */
488 if (rscreen->caps.is_r500 &&
489 desc->nr_channels == 4 &&
490 desc->channel[c].size == 16 &&
491 desc->channel[c].type == UTIL_FORMAT_TYPE_FLOAT)
492 return true;
493
494 if (desc->channel[c].normalized &&
495 desc->channel[c].type == UTIL_FORMAT_TYPE_UNSIGNED &&
496 desc->channel[c].size >= 4 &&
497 desc->channel[c].size <= 10) {
498 /* RGB10_A2, RGBA8, RGB5_A1, RGBA4, RGB565 */
499 if (desc->nr_channels >= 3)
500 return true;
501
502 if (format == PIPE_FORMAT_R8G8_UNORM)
503 return true;
504
505 /* R8, I8, L8, A8 */
506 if (desc->nr_channels == 1)
507 return true;
508 }
509
510 return false;
511 }
512
513 static boolean r300_is_format_supported(struct pipe_screen* screen,
514 enum pipe_format format,
515 enum pipe_texture_target target,
516 unsigned sample_count,
517 unsigned usage)
518 {
519 uint32_t retval = 0;
520 boolean drm_2_8_0 = r300_screen(screen)->info.drm_minor >= 8;
521 boolean is_r500 = r300_screen(screen)->caps.is_r500;
522 boolean is_r400 = r300_screen(screen)->caps.is_r400;
523 boolean is_color2101010 = format == PIPE_FORMAT_R10G10B10A2_UNORM ||
524 format == PIPE_FORMAT_R10G10B10X2_SNORM ||
525 format == PIPE_FORMAT_B10G10R10A2_UNORM ||
526 format == PIPE_FORMAT_B10G10R10X2_UNORM ||
527 format == PIPE_FORMAT_R10SG10SB10SA2U_NORM;
528 boolean is_ati1n = format == PIPE_FORMAT_RGTC1_UNORM ||
529 format == PIPE_FORMAT_RGTC1_SNORM ||
530 format == PIPE_FORMAT_LATC1_UNORM ||
531 format == PIPE_FORMAT_LATC1_SNORM;
532 boolean is_ati2n = format == PIPE_FORMAT_RGTC2_UNORM ||
533 format == PIPE_FORMAT_RGTC2_SNORM ||
534 format == PIPE_FORMAT_LATC2_UNORM ||
535 format == PIPE_FORMAT_LATC2_SNORM;
536 boolean is_x16f_xy16f = format == PIPE_FORMAT_R16_FLOAT ||
537 format == PIPE_FORMAT_R16G16_FLOAT ||
538 format == PIPE_FORMAT_A16_FLOAT ||
539 format == PIPE_FORMAT_L16_FLOAT ||
540 format == PIPE_FORMAT_L16A16_FLOAT ||
541 format == PIPE_FORMAT_R16A16_FLOAT ||
542 format == PIPE_FORMAT_I16_FLOAT;
543 boolean is_half_float = format == PIPE_FORMAT_R16_FLOAT ||
544 format == PIPE_FORMAT_R16G16_FLOAT ||
545 format == PIPE_FORMAT_R16G16B16_FLOAT ||
546 format == PIPE_FORMAT_R16G16B16A16_FLOAT ||
547 format == PIPE_FORMAT_R16G16B16X16_FLOAT;
548 const struct util_format_description *desc;
549
550 if (!util_format_is_supported(format, usage))
551 return FALSE;
552
553 /* Check multisampling support. */
554 switch (sample_count) {
555 case 0:
556 case 1:
557 break;
558 case 2:
559 case 4:
560 case 6:
561 /* We need DRM 2.8.0. */
562 if (!drm_2_8_0) {
563 return FALSE;
564 }
565 /* No texturing and scanout. */
566 if (usage & (PIPE_BIND_SAMPLER_VIEW |
567 PIPE_BIND_DISPLAY_TARGET |
568 PIPE_BIND_SCANOUT)) {
569 return FALSE;
570 }
571
572 desc = util_format_description(format);
573
574 if (is_r500) {
575 /* Only allow depth/stencil, RGBA8, RGBA1010102, RGBA16F. */
576 if (!util_format_is_depth_or_stencil(format) &&
577 !util_format_is_rgba8_variant(desc) &&
578 !util_format_is_rgba1010102_variant(desc) &&
579 format != PIPE_FORMAT_R16G16B16A16_FLOAT &&
580 format != PIPE_FORMAT_R16G16B16X16_FLOAT) {
581 return FALSE;
582 }
583 } else {
584 /* Only allow depth/stencil, RGBA8. */
585 if (!util_format_is_depth_or_stencil(format) &&
586 !util_format_is_rgba8_variant(desc)) {
587 return FALSE;
588 }
589 }
590 break;
591 default:
592 return FALSE;
593 }
594
595 /* Check sampler format support. */
596 if ((usage & PIPE_BIND_SAMPLER_VIEW) &&
597 /* these two are broken for an unknown reason */
598 format != PIPE_FORMAT_R8G8B8X8_SNORM &&
599 format != PIPE_FORMAT_R16G16B16X16_SNORM &&
600 /* ATI1N is r5xx-only. */
601 (is_r500 || !is_ati1n) &&
602 /* ATI2N is supported on r4xx-r5xx. */
603 (is_r400 || is_r500 || !is_ati2n) &&
604 /* R16F and RG16F texture support was added in as late as DRM 2.8.0 */
605 (drm_2_8_0 || !is_x16f_xy16f) &&
606 r300_is_sampler_format_supported(format)) {
607 retval |= PIPE_BIND_SAMPLER_VIEW;
608 }
609
610 /* Check colorbuffer format support. */
611 if ((usage & (PIPE_BIND_RENDER_TARGET |
612 PIPE_BIND_DISPLAY_TARGET |
613 PIPE_BIND_SCANOUT |
614 PIPE_BIND_SHARED |
615 PIPE_BIND_BLENDABLE)) &&
616 /* 2101010 cannot be rendered to on non-r5xx. */
617 (!is_color2101010 || (is_r500 && drm_2_8_0)) &&
618 r300_is_colorbuffer_format_supported(format)) {
619 retval |= usage &
620 (PIPE_BIND_RENDER_TARGET |
621 PIPE_BIND_DISPLAY_TARGET |
622 PIPE_BIND_SCANOUT |
623 PIPE_BIND_SHARED);
624
625 if (r300_is_blending_supported(r300_screen(screen), format)) {
626 retval |= usage & PIPE_BIND_BLENDABLE;
627 }
628 }
629
630 /* Check depth-stencil format support. */
631 if (usage & PIPE_BIND_DEPTH_STENCIL &&
632 r300_is_zs_format_supported(format)) {
633 retval |= PIPE_BIND_DEPTH_STENCIL;
634 }
635
636 /* Check vertex buffer format support. */
637 if (usage & PIPE_BIND_VERTEX_BUFFER) {
638 if (r300_screen(screen)->caps.has_tcl) {
639 /* Half float is supported on >= R400. */
640 if ((is_r400 || is_r500 || !is_half_float) &&
641 r300_translate_vertex_data_type(format) != R300_INVALID_FORMAT) {
642 retval |= PIPE_BIND_VERTEX_BUFFER;
643 }
644 } else {
645 /* SW TCL */
646 if (!util_format_is_pure_integer(format)) {
647 retval |= PIPE_BIND_VERTEX_BUFFER;
648 }
649 }
650 }
651
652 /* Transfers are always supported. */
653 if (usage & PIPE_BIND_TRANSFER_READ)
654 retval |= PIPE_BIND_TRANSFER_READ;
655 if (usage & PIPE_BIND_TRANSFER_WRITE)
656 retval |= PIPE_BIND_TRANSFER_WRITE;
657
658 return retval == usage;
659 }
660
661 static void r300_destroy_screen(struct pipe_screen* pscreen)
662 {
663 struct r300_screen* r300screen = r300_screen(pscreen);
664 struct radeon_winsys *rws = radeon_winsys(pscreen);
665
666 if (rws && !rws->unref(rws))
667 return;
668
669 pipe_mutex_destroy(r300screen->cmask_mutex);
670
671 if (rws)
672 rws->destroy(rws);
673
674 FREE(r300screen);
675 }
676
677 static void r300_fence_reference(struct pipe_screen *screen,
678 struct pipe_fence_handle **ptr,
679 struct pipe_fence_handle *fence)
680 {
681 struct radeon_winsys *rws = r300_screen(screen)->rws;
682
683 rws->fence_reference(ptr, fence);
684 }
685
686 static boolean r300_fence_finish(struct pipe_screen *screen,
687 struct pipe_fence_handle *fence,
688 uint64_t timeout)
689 {
690 struct radeon_winsys *rws = r300_screen(screen)->rws;
691
692 return rws->fence_wait(rws, fence, timeout);
693 }
694
695 struct pipe_screen* r300_screen_create(struct radeon_winsys *rws)
696 {
697 struct r300_screen *r300screen = CALLOC_STRUCT(r300_screen);
698
699 if (!r300screen) {
700 FREE(r300screen);
701 return NULL;
702 }
703
704 rws->query_info(rws, &r300screen->info);
705
706 r300_init_debug(r300screen);
707 r300_parse_chipset(r300screen->info.pci_id, &r300screen->caps);
708
709 if (SCREEN_DBG_ON(r300screen, DBG_NO_ZMASK))
710 r300screen->caps.zmask_ram = 0;
711 if (SCREEN_DBG_ON(r300screen, DBG_NO_HIZ))
712 r300screen->caps.hiz_ram = 0;
713
714 if (r300screen->info.drm_minor < 8)
715 r300screen->caps.has_us_format = FALSE;
716
717 r300screen->rws = rws;
718 r300screen->screen.destroy = r300_destroy_screen;
719 r300screen->screen.get_name = r300_get_name;
720 r300screen->screen.get_vendor = r300_get_vendor;
721 r300screen->screen.get_device_vendor = r300_get_device_vendor;
722 r300screen->screen.get_param = r300_get_param;
723 r300screen->screen.get_shader_param = r300_get_shader_param;
724 r300screen->screen.get_paramf = r300_get_paramf;
725 r300screen->screen.get_video_param = r300_get_video_param;
726 r300screen->screen.is_format_supported = r300_is_format_supported;
727 r300screen->screen.is_video_format_supported = vl_video_buffer_is_format_supported;
728 r300screen->screen.context_create = r300_create_context;
729 r300screen->screen.fence_reference = r300_fence_reference;
730 r300screen->screen.fence_finish = r300_fence_finish;
731
732 r300_init_screen_resource_functions(r300screen);
733
734 util_format_s3tc_init();
735 pipe_mutex_init(r300screen->cmask_mutex);
736
737 return &r300screen->screen;
738 }