gallium: add PIPE_CAP_CAN_BIND_CONST_BUFFER_AS_VERTEX
[mesa.git] / src / gallium / drivers / r300 / r300_screen.c
1 /*
2 * Copyright 2008 Corbin Simpson <MostAwesomeDude@gmail.com>
3 * Copyright 2010 Marek Olšák <maraeo@gmail.com>
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * on the rights to use, copy, modify, merge, publish, distribute, sub
9 * license, and/or sell copies of the Software, and to permit persons to whom
10 * the Software is furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
14 * Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
20 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
21 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
22 * USE OR OTHER DEALINGS IN THE SOFTWARE. */
23
24 #include "util/u_format.h"
25 #include "util/u_format_s3tc.h"
26 #include "util/u_memory.h"
27 #include "os/os_time.h"
28 #include "vl/vl_decoder.h"
29 #include "vl/vl_video_buffer.h"
30
31 #include "r300_context.h"
32 #include "r300_texture.h"
33 #include "r300_screen_buffer.h"
34 #include "r300_state_inlines.h"
35 #include "r300_public.h"
36
37 #include "draw/draw_context.h"
38
39 /* Return the identifier behind whom the brave coders responsible for this
40 * amalgamation of code, sweat, and duct tape, routinely obscure their names.
41 *
42 * ...I should have just put "Corbin Simpson", but I'm not that cool.
43 *
44 * (Or egotistical. Yet.) */
45 static const char* r300_get_vendor(struct pipe_screen* pscreen)
46 {
47 return "X.Org R300 Project";
48 }
49
50 static const char* r300_get_device_vendor(struct pipe_screen* pscreen)
51 {
52 return "ATI";
53 }
54
55 static const char* chip_families[] = {
56 "unknown",
57 "ATI R300",
58 "ATI R350",
59 "ATI RV350",
60 "ATI RV370",
61 "ATI RV380",
62 "ATI RS400",
63 "ATI RC410",
64 "ATI RS480",
65 "ATI R420",
66 "ATI R423",
67 "ATI R430",
68 "ATI R480",
69 "ATI R481",
70 "ATI RV410",
71 "ATI RS600",
72 "ATI RS690",
73 "ATI RS740",
74 "ATI RV515",
75 "ATI R520",
76 "ATI RV530",
77 "ATI R580",
78 "ATI RV560",
79 "ATI RV570"
80 };
81
82 static const char* r300_get_name(struct pipe_screen* pscreen)
83 {
84 struct r300_screen* r300screen = r300_screen(pscreen);
85
86 return chip_families[r300screen->caps.family];
87 }
88
89 static int r300_get_param(struct pipe_screen* pscreen, enum pipe_cap param)
90 {
91 struct r300_screen* r300screen = r300_screen(pscreen);
92 boolean is_r500 = r300screen->caps.is_r500;
93
94 switch (param) {
95 /* Supported features (boolean caps). */
96 case PIPE_CAP_NPOT_TEXTURES:
97 case PIPE_CAP_MIXED_FRAMEBUFFER_SIZES:
98 case PIPE_CAP_MIXED_COLOR_DEPTH_BITS:
99 case PIPE_CAP_TWO_SIDED_STENCIL:
100 case PIPE_CAP_ANISOTROPIC_FILTER:
101 case PIPE_CAP_POINT_SPRITE:
102 case PIPE_CAP_OCCLUSION_QUERY:
103 case PIPE_CAP_TEXTURE_SHADOW_MAP:
104 case PIPE_CAP_TEXTURE_MIRROR_CLAMP:
105 case PIPE_CAP_BLEND_EQUATION_SEPARATE:
106 case PIPE_CAP_VERTEX_ELEMENT_INSTANCE_DIVISOR:
107 case PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT:
108 case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER:
109 case PIPE_CAP_CONDITIONAL_RENDER:
110 case PIPE_CAP_TEXTURE_BARRIER:
111 case PIPE_CAP_TGSI_CAN_COMPACT_CONSTANTS:
112 case PIPE_CAP_USER_CONSTANT_BUFFERS:
113 case PIPE_CAP_PREFER_BLIT_BASED_TEXTURE_TRANSFER:
114 case PIPE_CAP_BUFFER_MAP_PERSISTENT_COHERENT:
115 case PIPE_CAP_CLIP_HALFZ:
116 return 1;
117
118 case PIPE_CAP_MIN_MAP_BUFFER_ALIGNMENT:
119 return R300_BUFFER_ALIGNMENT;
120
121 case PIPE_CAP_CONSTANT_BUFFER_OFFSET_ALIGNMENT:
122 return 16;
123
124 case PIPE_CAP_GLSL_FEATURE_LEVEL:
125 return 120;
126
127 /* r300 cannot do swizzling of compressed textures. Supported otherwise. */
128 case PIPE_CAP_TEXTURE_SWIZZLE:
129 return util_format_s3tc_enabled ? r300screen->caps.dxtc_swizzle : 1;
130
131 /* We don't support color clamping on r500, so that we can use color
132 * intepolators for generic varyings. */
133 case PIPE_CAP_VERTEX_COLOR_CLAMPED:
134 return !is_r500;
135
136 /* Supported on r500 only. */
137 case PIPE_CAP_VERTEX_COLOR_UNCLAMPED:
138 case PIPE_CAP_MIXED_COLORBUFFER_FORMATS:
139 case PIPE_CAP_SM3:
140 return is_r500 ? 1 : 0;
141
142 /* Unsupported features. */
143 case PIPE_CAP_QUERY_TIME_ELAPSED:
144 case PIPE_CAP_QUERY_PIPELINE_STATISTICS:
145 case PIPE_CAP_MAX_DUAL_SOURCE_RENDER_TARGETS:
146 case PIPE_CAP_INDEP_BLEND_ENABLE:
147 case PIPE_CAP_INDEP_BLEND_FUNC:
148 case PIPE_CAP_DEPTH_CLIP_DISABLE:
149 case PIPE_CAP_SHADER_STENCIL_EXPORT:
150 case PIPE_CAP_MAX_TEXTURE_ARRAY_LAYERS:
151 case PIPE_CAP_TGSI_INSTANCEID:
152 case PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT:
153 case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER:
154 case PIPE_CAP_SEAMLESS_CUBE_MAP:
155 case PIPE_CAP_SEAMLESS_CUBE_MAP_PER_TEXTURE:
156 case PIPE_CAP_MIN_TEXEL_OFFSET:
157 case PIPE_CAP_MAX_TEXEL_OFFSET:
158 case PIPE_CAP_MIN_TEXTURE_GATHER_OFFSET:
159 case PIPE_CAP_MAX_TEXTURE_GATHER_OFFSET:
160 case PIPE_CAP_MAX_STREAM_OUTPUT_BUFFERS:
161 case PIPE_CAP_MAX_STREAM_OUTPUT_SEPARATE_COMPONENTS:
162 case PIPE_CAP_MAX_STREAM_OUTPUT_INTERLEAVED_COMPONENTS:
163 case PIPE_CAP_MAX_GEOMETRY_OUTPUT_VERTICES:
164 case PIPE_CAP_MAX_GEOMETRY_TOTAL_OUTPUT_COMPONENTS:
165 case PIPE_CAP_MAX_VERTEX_STREAMS:
166 case PIPE_CAP_STREAM_OUTPUT_PAUSE_RESUME:
167 case PIPE_CAP_STREAM_OUTPUT_INTERLEAVE_BUFFERS:
168 case PIPE_CAP_FRAGMENT_COLOR_CLAMPED:
169 case PIPE_CAP_QUADS_FOLLOW_PROVOKING_VERTEX_CONVENTION:
170 case PIPE_CAP_COMPUTE:
171 case PIPE_CAP_START_INSTANCE:
172 case PIPE_CAP_QUERY_TIMESTAMP:
173 case PIPE_CAP_TEXTURE_MULTISAMPLE:
174 case PIPE_CAP_CUBE_MAP_ARRAY:
175 case PIPE_CAP_TEXTURE_BUFFER_OBJECTS:
176 case PIPE_CAP_TEXTURE_BUFFER_OFFSET_ALIGNMENT:
177 case PIPE_CAP_TEXTURE_BORDER_COLOR_QUIRK:
178 case PIPE_CAP_MAX_TEXTURE_BUFFER_SIZE:
179 case PIPE_CAP_TGSI_VS_LAYER_VIEWPORT:
180 case PIPE_CAP_MAX_TEXTURE_GATHER_COMPONENTS:
181 case PIPE_CAP_TEXTURE_GATHER_SM5:
182 case PIPE_CAP_TEXTURE_QUERY_LOD:
183 case PIPE_CAP_FAKE_SW_MSAA:
184 case PIPE_CAP_SAMPLE_SHADING:
185 case PIPE_CAP_TEXTURE_GATHER_OFFSETS:
186 case PIPE_CAP_DRAW_INDIRECT:
187 case PIPE_CAP_MULTI_DRAW_INDIRECT:
188 case PIPE_CAP_MULTI_DRAW_INDIRECT_PARAMS:
189 case PIPE_CAP_TGSI_FS_FINE_DERIVATIVE:
190 case PIPE_CAP_CONDITIONAL_RENDER_INVERTED:
191 case PIPE_CAP_SAMPLER_VIEW_TARGET:
192 case PIPE_CAP_VERTEXID_NOBASE:
193 case PIPE_CAP_POLYGON_OFFSET_CLAMP:
194 case PIPE_CAP_MULTISAMPLE_Z_RESOLVE:
195 case PIPE_CAP_RESOURCE_FROM_USER_MEMORY:
196 case PIPE_CAP_DEVICE_RESET_STATUS_QUERY:
197 case PIPE_CAP_MAX_SHADER_PATCH_VARYINGS:
198 case PIPE_CAP_TEXTURE_FLOAT_LINEAR:
199 case PIPE_CAP_TEXTURE_HALF_FLOAT_LINEAR:
200 case PIPE_CAP_DEPTH_BOUNDS_TEST:
201 case PIPE_CAP_TGSI_TXQS:
202 case PIPE_CAP_FORCE_PERSAMPLE_INTERP:
203 case PIPE_CAP_SHAREABLE_SHADERS:
204 case PIPE_CAP_COPY_BETWEEN_COMPRESSED_AND_PLAIN_FORMATS:
205 case PIPE_CAP_CLEAR_TEXTURE:
206 case PIPE_CAP_DRAW_PARAMETERS:
207 case PIPE_CAP_TGSI_PACK_HALF_FLOAT:
208 case PIPE_CAP_TGSI_FS_POSITION_IS_SYSVAL:
209 case PIPE_CAP_TGSI_FS_FACE_IS_INTEGER_SYSVAL:
210 case PIPE_CAP_SHADER_BUFFER_OFFSET_ALIGNMENT:
211 case PIPE_CAP_INVALIDATE_BUFFER:
212 case PIPE_CAP_GENERATE_MIPMAP:
213 case PIPE_CAP_STRING_MARKER:
214 case PIPE_CAP_BUFFER_SAMPLER_VIEW_RGBA_ONLY:
215 case PIPE_CAP_SURFACE_REINTERPRET_BLOCKS:
216 case PIPE_CAP_QUERY_BUFFER_OBJECT:
217 case PIPE_CAP_QUERY_MEMORY_INFO:
218 case PIPE_CAP_FRAMEBUFFER_NO_ATTACHMENT:
219 case PIPE_CAP_ROBUST_BUFFER_ACCESS_BEHAVIOR:
220 case PIPE_CAP_CULL_DISTANCE:
221 case PIPE_CAP_PRIMITIVE_RESTART_FOR_PATCHES:
222 case PIPE_CAP_TGSI_VOTE:
223 case PIPE_CAP_MAX_WINDOW_RECTANGLES:
224 case PIPE_CAP_POLYGON_OFFSET_UNITS_UNSCALED:
225 case PIPE_CAP_VIEWPORT_SUBPIXEL_BITS:
226 case PIPE_CAP_TGSI_ARRAY_COMPONENTS:
227 case PIPE_CAP_TGSI_CAN_READ_OUTPUTS:
228 case PIPE_CAP_NATIVE_FENCE_FD:
229 case PIPE_CAP_GLSL_OPTIMIZE_CONSERVATIVELY:
230 case PIPE_CAP_TGSI_FS_FBFETCH:
231 case PIPE_CAP_TGSI_MUL_ZERO_WINS:
232 case PIPE_CAP_DOUBLES:
233 case PIPE_CAP_INT64:
234 case PIPE_CAP_INT64_DIVMOD:
235 case PIPE_CAP_TGSI_TEX_TXF_LZ:
236 case PIPE_CAP_TGSI_CLOCK:
237 case PIPE_CAP_POLYGON_MODE_FILL_RECTANGLE:
238 case PIPE_CAP_SPARSE_BUFFER_PAGE_SIZE:
239 case PIPE_CAP_TGSI_BALLOT:
240 case PIPE_CAP_TGSI_TES_LAYER_VIEWPORT:
241 case PIPE_CAP_CAN_BIND_CONST_BUFFER_AS_VERTEX:
242 return 0;
243
244 /* SWTCL-only features. */
245 case PIPE_CAP_PRIMITIVE_RESTART:
246 case PIPE_CAP_USER_VERTEX_BUFFERS:
247 case PIPE_CAP_TGSI_VS_WINDOW_SPACE_POSITION:
248 return !r300screen->caps.has_tcl;
249
250 /* HWTCL-only features / limitations. */
251 case PIPE_CAP_VERTEX_BUFFER_OFFSET_4BYTE_ALIGNED_ONLY:
252 case PIPE_CAP_VERTEX_BUFFER_STRIDE_4BYTE_ALIGNED_ONLY:
253 case PIPE_CAP_VERTEX_ELEMENT_SRC_OFFSET_4BYTE_ALIGNED_ONLY:
254 return r300screen->caps.has_tcl;
255 case PIPE_CAP_TGSI_TEXCOORD:
256 return 0;
257
258 /* Texturing. */
259 case PIPE_CAP_MAX_TEXTURE_2D_LEVELS:
260 case PIPE_CAP_MAX_TEXTURE_3D_LEVELS:
261 case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS:
262 /* 13 == 4096, 12 == 2048 */
263 return is_r500 ? 13 : 12;
264
265 /* Render targets. */
266 case PIPE_CAP_MAX_RENDER_TARGETS:
267 return 4;
268 case PIPE_CAP_ENDIANNESS:
269 return PIPE_ENDIAN_LITTLE;
270
271 case PIPE_CAP_MAX_VIEWPORTS:
272 return 1;
273
274 case PIPE_CAP_MAX_VERTEX_ATTRIB_STRIDE:
275 return 2048;
276
277 case PIPE_CAP_VENDOR_ID:
278 return 0x1002;
279 case PIPE_CAP_DEVICE_ID:
280 return r300screen->info.pci_id;
281 case PIPE_CAP_ACCELERATED:
282 return 1;
283 case PIPE_CAP_VIDEO_MEMORY:
284 return r300screen->info.vram_size >> 20;
285 case PIPE_CAP_UMA:
286 return 0;
287 case PIPE_CAP_PCI_GROUP:
288 return r300screen->info.pci_domain;
289 case PIPE_CAP_PCI_BUS:
290 return r300screen->info.pci_bus;
291 case PIPE_CAP_PCI_DEVICE:
292 return r300screen->info.pci_dev;
293 case PIPE_CAP_PCI_FUNCTION:
294 return r300screen->info.pci_func;
295 }
296 return 0;
297 }
298
299 static int r300_get_shader_param(struct pipe_screen *pscreen,
300 enum pipe_shader_type shader,
301 enum pipe_shader_cap param)
302 {
303 struct r300_screen* r300screen = r300_screen(pscreen);
304 boolean is_r400 = r300screen->caps.is_r400;
305 boolean is_r500 = r300screen->caps.is_r500;
306
307 switch (shader) {
308 case PIPE_SHADER_FRAGMENT:
309 switch (param)
310 {
311 case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
312 return is_r500 || is_r400 ? 512 : 96;
313 case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
314 return is_r500 || is_r400 ? 512 : 64;
315 case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
316 return is_r500 || is_r400 ? 512 : 32;
317 case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
318 return is_r500 ? 511 : 4;
319 case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:
320 return is_r500 ? 64 : 0; /* Actually unlimited on r500. */
321 /* Fragment shader limits. */
322 case PIPE_SHADER_CAP_MAX_INPUTS:
323 /* 2 colors + 8 texcoords are always supported
324 * (minus fog and wpos).
325 *
326 * R500 has the ability to turn 3rd and 4th color into
327 * additional texcoords but there is no two-sided color
328 * selection then. However the facing bit can be used instead. */
329 return 10;
330 case PIPE_SHADER_CAP_MAX_OUTPUTS:
331 return 4;
332 case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE:
333 return (is_r500 ? 256 : 32) * sizeof(float[4]);
334 case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
335 case PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE:
336 return 1;
337 case PIPE_SHADER_CAP_MAX_TEMPS:
338 return is_r500 ? 128 : is_r400 ? 64 : 32;
339 case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
340 case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS:
341 return r300screen->caps.num_tex_units;
342 case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
343 case PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED:
344 case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
345 case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
346 case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
347 case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
348 case PIPE_SHADER_CAP_SUBROUTINES:
349 case PIPE_SHADER_CAP_INTEGERS:
350 case PIPE_SHADER_CAP_TGSI_DROUND_SUPPORTED:
351 case PIPE_SHADER_CAP_TGSI_DFRACEXP_DLDEXP_SUPPORTED:
352 case PIPE_SHADER_CAP_TGSI_FMA_SUPPORTED:
353 case PIPE_SHADER_CAP_MAX_SHADER_BUFFERS:
354 case PIPE_SHADER_CAP_MAX_SHADER_IMAGES:
355 case PIPE_SHADER_CAP_LOWER_IF_THRESHOLD:
356 case PIPE_SHADER_CAP_TGSI_SKIP_MERGE_REGISTERS:
357 return 0;
358 case PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT:
359 return 32;
360 case PIPE_SHADER_CAP_PREFERRED_IR:
361 return PIPE_SHADER_IR_TGSI;
362 case PIPE_SHADER_CAP_SUPPORTED_IRS:
363 return 0;
364 }
365 break;
366 case PIPE_SHADER_VERTEX:
367 switch (param)
368 {
369 case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
370 case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS:
371 case PIPE_SHADER_CAP_SUBROUTINES:
372 return 0;
373 default:;
374 }
375
376 if (!r300screen->caps.has_tcl) {
377 return draw_get_shader_param(shader, param);
378 }
379
380 switch (param)
381 {
382 case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
383 case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
384 return is_r500 ? 1024 : 256;
385 case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:
386 return is_r500 ? 4 : 0; /* For loops; not sure about conditionals. */
387 case PIPE_SHADER_CAP_MAX_INPUTS:
388 return 16;
389 case PIPE_SHADER_CAP_MAX_OUTPUTS:
390 return 10;
391 case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE:
392 return 256 * sizeof(float[4]);
393 case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
394 return 1;
395 case PIPE_SHADER_CAP_MAX_TEMPS:
396 return 32;
397 case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
398 case PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE:
399 return 1;
400 case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
401 case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
402 case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
403 case PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED:
404 case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
405 case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
406 case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
407 case PIPE_SHADER_CAP_SUBROUTINES:
408 case PIPE_SHADER_CAP_INTEGERS:
409 case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
410 case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS:
411 case PIPE_SHADER_CAP_TGSI_DROUND_SUPPORTED:
412 case PIPE_SHADER_CAP_TGSI_DFRACEXP_DLDEXP_SUPPORTED:
413 case PIPE_SHADER_CAP_TGSI_FMA_SUPPORTED:
414 case PIPE_SHADER_CAP_MAX_SHADER_BUFFERS:
415 case PIPE_SHADER_CAP_MAX_SHADER_IMAGES:
416 case PIPE_SHADER_CAP_LOWER_IF_THRESHOLD:
417 case PIPE_SHADER_CAP_TGSI_SKIP_MERGE_REGISTERS:
418 return 0;
419 case PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT:
420 return 32;
421 case PIPE_SHADER_CAP_PREFERRED_IR:
422 return PIPE_SHADER_IR_TGSI;
423 case PIPE_SHADER_CAP_SUPPORTED_IRS:
424 return 0;
425 }
426 break;
427 default:
428 ; /* nothing */
429 }
430 return 0;
431 }
432
433 static float r300_get_paramf(struct pipe_screen* pscreen,
434 enum pipe_capf param)
435 {
436 struct r300_screen* r300screen = r300_screen(pscreen);
437
438 switch (param) {
439 case PIPE_CAPF_MAX_LINE_WIDTH:
440 case PIPE_CAPF_MAX_LINE_WIDTH_AA:
441 case PIPE_CAPF_MAX_POINT_WIDTH:
442 case PIPE_CAPF_MAX_POINT_WIDTH_AA:
443 /* The maximum dimensions of the colorbuffer are our practical
444 * rendering limits. 2048 pixels should be enough for anybody. */
445 if (r300screen->caps.is_r500) {
446 return 4096.0f;
447 } else if (r300screen->caps.is_r400) {
448 return 4021.0f;
449 } else {
450 return 2560.0f;
451 }
452 case PIPE_CAPF_MAX_TEXTURE_ANISOTROPY:
453 return 16.0f;
454 case PIPE_CAPF_MAX_TEXTURE_LOD_BIAS:
455 return 16.0f;
456 case PIPE_CAPF_GUARD_BAND_LEFT:
457 case PIPE_CAPF_GUARD_BAND_TOP:
458 case PIPE_CAPF_GUARD_BAND_RIGHT:
459 case PIPE_CAPF_GUARD_BAND_BOTTOM:
460 return 0.0f;
461 default:
462 debug_printf("r300: Warning: Unknown CAP %d in get_paramf.\n",
463 param);
464 return 0.0f;
465 }
466 }
467
468 static int r300_get_video_param(struct pipe_screen *screen,
469 enum pipe_video_profile profile,
470 enum pipe_video_entrypoint entrypoint,
471 enum pipe_video_cap param)
472 {
473 switch (param) {
474 case PIPE_VIDEO_CAP_SUPPORTED:
475 return vl_profile_supported(screen, profile, entrypoint);
476 case PIPE_VIDEO_CAP_NPOT_TEXTURES:
477 return 0;
478 case PIPE_VIDEO_CAP_MAX_WIDTH:
479 case PIPE_VIDEO_CAP_MAX_HEIGHT:
480 return vl_video_buffer_max_size(screen);
481 case PIPE_VIDEO_CAP_PREFERED_FORMAT:
482 return PIPE_FORMAT_NV12;
483 case PIPE_VIDEO_CAP_PREFERS_INTERLACED:
484 return false;
485 case PIPE_VIDEO_CAP_SUPPORTS_INTERLACED:
486 return false;
487 case PIPE_VIDEO_CAP_SUPPORTS_PROGRESSIVE:
488 return true;
489 case PIPE_VIDEO_CAP_MAX_LEVEL:
490 return vl_level_supported(screen, profile);
491 default:
492 return 0;
493 }
494 }
495
496 /**
497 * Whether the format matches:
498 * PIPE_FORMAT_?10?10?10?2_UNORM
499 */
500 static inline boolean
501 util_format_is_rgba1010102_variant(const struct util_format_description *desc)
502 {
503 static const unsigned size[4] = {10, 10, 10, 2};
504 unsigned chan;
505
506 if (desc->block.width != 1 ||
507 desc->block.height != 1 ||
508 desc->block.bits != 32)
509 return FALSE;
510
511 for (chan = 0; chan < 4; ++chan) {
512 if(desc->channel[chan].type != UTIL_FORMAT_TYPE_UNSIGNED &&
513 desc->channel[chan].type != UTIL_FORMAT_TYPE_VOID)
514 return FALSE;
515 if (desc->channel[chan].size != size[chan])
516 return FALSE;
517 }
518
519 return TRUE;
520 }
521
522 static bool r300_is_blending_supported(struct r300_screen *rscreen,
523 enum pipe_format format)
524 {
525 int c;
526 const struct util_format_description *desc =
527 util_format_description(format);
528
529 if (desc->layout != UTIL_FORMAT_LAYOUT_PLAIN)
530 return false;
531
532 c = util_format_get_first_non_void_channel(format);
533
534 /* RGBA16F */
535 if (rscreen->caps.is_r500 &&
536 desc->nr_channels == 4 &&
537 desc->channel[c].size == 16 &&
538 desc->channel[c].type == UTIL_FORMAT_TYPE_FLOAT)
539 return true;
540
541 if (desc->channel[c].normalized &&
542 desc->channel[c].type == UTIL_FORMAT_TYPE_UNSIGNED &&
543 desc->channel[c].size >= 4 &&
544 desc->channel[c].size <= 10) {
545 /* RGB10_A2, RGBA8, RGB5_A1, RGBA4, RGB565 */
546 if (desc->nr_channels >= 3)
547 return true;
548
549 if (format == PIPE_FORMAT_R8G8_UNORM)
550 return true;
551
552 /* R8, I8, L8, A8 */
553 if (desc->nr_channels == 1)
554 return true;
555 }
556
557 return false;
558 }
559
560 static boolean r300_is_format_supported(struct pipe_screen* screen,
561 enum pipe_format format,
562 enum pipe_texture_target target,
563 unsigned sample_count,
564 unsigned usage)
565 {
566 uint32_t retval = 0;
567 boolean is_r500 = r300_screen(screen)->caps.is_r500;
568 boolean is_r400 = r300_screen(screen)->caps.is_r400;
569 boolean is_color2101010 = format == PIPE_FORMAT_R10G10B10A2_UNORM ||
570 format == PIPE_FORMAT_R10G10B10X2_SNORM ||
571 format == PIPE_FORMAT_B10G10R10A2_UNORM ||
572 format == PIPE_FORMAT_B10G10R10X2_UNORM ||
573 format == PIPE_FORMAT_R10SG10SB10SA2U_NORM;
574 boolean is_ati1n = format == PIPE_FORMAT_RGTC1_UNORM ||
575 format == PIPE_FORMAT_RGTC1_SNORM ||
576 format == PIPE_FORMAT_LATC1_UNORM ||
577 format == PIPE_FORMAT_LATC1_SNORM;
578 boolean is_ati2n = format == PIPE_FORMAT_RGTC2_UNORM ||
579 format == PIPE_FORMAT_RGTC2_SNORM ||
580 format == PIPE_FORMAT_LATC2_UNORM ||
581 format == PIPE_FORMAT_LATC2_SNORM;
582 boolean is_half_float = format == PIPE_FORMAT_R16_FLOAT ||
583 format == PIPE_FORMAT_R16G16_FLOAT ||
584 format == PIPE_FORMAT_R16G16B16_FLOAT ||
585 format == PIPE_FORMAT_R16G16B16A16_FLOAT ||
586 format == PIPE_FORMAT_R16G16B16X16_FLOAT;
587 const struct util_format_description *desc;
588
589 if (!util_format_is_supported(format, usage))
590 return FALSE;
591
592 /* Check multisampling support. */
593 switch (sample_count) {
594 case 0:
595 case 1:
596 break;
597 case 2:
598 case 4:
599 case 6:
600 /* No texturing and scanout. */
601 if (usage & (PIPE_BIND_SAMPLER_VIEW |
602 PIPE_BIND_DISPLAY_TARGET |
603 PIPE_BIND_SCANOUT)) {
604 return FALSE;
605 }
606
607 desc = util_format_description(format);
608
609 if (is_r500) {
610 /* Only allow depth/stencil, RGBA8, RGBA1010102, RGBA16F. */
611 if (!util_format_is_depth_or_stencil(format) &&
612 !util_format_is_rgba8_variant(desc) &&
613 !util_format_is_rgba1010102_variant(desc) &&
614 format != PIPE_FORMAT_R16G16B16A16_FLOAT &&
615 format != PIPE_FORMAT_R16G16B16X16_FLOAT) {
616 return FALSE;
617 }
618 } else {
619 /* Only allow depth/stencil, RGBA8. */
620 if (!util_format_is_depth_or_stencil(format) &&
621 !util_format_is_rgba8_variant(desc)) {
622 return FALSE;
623 }
624 }
625 break;
626 default:
627 return FALSE;
628 }
629
630 /* Check sampler format support. */
631 if ((usage & PIPE_BIND_SAMPLER_VIEW) &&
632 /* these two are broken for an unknown reason */
633 format != PIPE_FORMAT_R8G8B8X8_SNORM &&
634 format != PIPE_FORMAT_R16G16B16X16_SNORM &&
635 /* ATI1N is r5xx-only. */
636 (is_r500 || !is_ati1n) &&
637 /* ATI2N is supported on r4xx-r5xx. */
638 (is_r400 || is_r500 || !is_ati2n) &&
639 r300_is_sampler_format_supported(format)) {
640 retval |= PIPE_BIND_SAMPLER_VIEW;
641 }
642
643 /* Check colorbuffer format support. */
644 if ((usage & (PIPE_BIND_RENDER_TARGET |
645 PIPE_BIND_DISPLAY_TARGET |
646 PIPE_BIND_SCANOUT |
647 PIPE_BIND_SHARED |
648 PIPE_BIND_BLENDABLE)) &&
649 /* 2101010 cannot be rendered to on non-r5xx. */
650 (!is_color2101010 || is_r500) &&
651 r300_is_colorbuffer_format_supported(format)) {
652 retval |= usage &
653 (PIPE_BIND_RENDER_TARGET |
654 PIPE_BIND_DISPLAY_TARGET |
655 PIPE_BIND_SCANOUT |
656 PIPE_BIND_SHARED);
657
658 if (r300_is_blending_supported(r300_screen(screen), format)) {
659 retval |= usage & PIPE_BIND_BLENDABLE;
660 }
661 }
662
663 /* Check depth-stencil format support. */
664 if (usage & PIPE_BIND_DEPTH_STENCIL &&
665 r300_is_zs_format_supported(format)) {
666 retval |= PIPE_BIND_DEPTH_STENCIL;
667 }
668
669 /* Check vertex buffer format support. */
670 if (usage & PIPE_BIND_VERTEX_BUFFER) {
671 if (r300_screen(screen)->caps.has_tcl) {
672 /* Half float is supported on >= R400. */
673 if ((is_r400 || is_r500 || !is_half_float) &&
674 r300_translate_vertex_data_type(format) != R300_INVALID_FORMAT) {
675 retval |= PIPE_BIND_VERTEX_BUFFER;
676 }
677 } else {
678 /* SW TCL */
679 if (!util_format_is_pure_integer(format)) {
680 retval |= PIPE_BIND_VERTEX_BUFFER;
681 }
682 }
683 }
684
685 return retval == usage;
686 }
687
688 static void r300_destroy_screen(struct pipe_screen* pscreen)
689 {
690 struct r300_screen* r300screen = r300_screen(pscreen);
691 struct radeon_winsys *rws = radeon_winsys(pscreen);
692
693 if (rws && !rws->unref(rws))
694 return;
695
696 mtx_destroy(&r300screen->cmask_mutex);
697 slab_destroy_parent(&r300screen->pool_transfers);
698
699 if (rws)
700 rws->destroy(rws);
701
702 FREE(r300screen);
703 }
704
705 static void r300_fence_reference(struct pipe_screen *screen,
706 struct pipe_fence_handle **ptr,
707 struct pipe_fence_handle *fence)
708 {
709 struct radeon_winsys *rws = r300_screen(screen)->rws;
710
711 rws->fence_reference(ptr, fence);
712 }
713
714 static boolean r300_fence_finish(struct pipe_screen *screen,
715 struct pipe_context *ctx,
716 struct pipe_fence_handle *fence,
717 uint64_t timeout)
718 {
719 struct radeon_winsys *rws = r300_screen(screen)->rws;
720
721 return rws->fence_wait(rws, fence, timeout);
722 }
723
724 struct pipe_screen* r300_screen_create(struct radeon_winsys *rws)
725 {
726 struct r300_screen *r300screen = CALLOC_STRUCT(r300_screen);
727
728 if (!r300screen) {
729 FREE(r300screen);
730 return NULL;
731 }
732
733 rws->query_info(rws, &r300screen->info);
734
735 r300_init_debug(r300screen);
736 r300_parse_chipset(r300screen->info.pci_id, &r300screen->caps);
737
738 if (SCREEN_DBG_ON(r300screen, DBG_NO_ZMASK))
739 r300screen->caps.zmask_ram = 0;
740 if (SCREEN_DBG_ON(r300screen, DBG_NO_HIZ))
741 r300screen->caps.hiz_ram = 0;
742
743 r300screen->rws = rws;
744 r300screen->screen.destroy = r300_destroy_screen;
745 r300screen->screen.get_name = r300_get_name;
746 r300screen->screen.get_vendor = r300_get_vendor;
747 r300screen->screen.get_device_vendor = r300_get_device_vendor;
748 r300screen->screen.get_param = r300_get_param;
749 r300screen->screen.get_shader_param = r300_get_shader_param;
750 r300screen->screen.get_paramf = r300_get_paramf;
751 r300screen->screen.get_video_param = r300_get_video_param;
752 r300screen->screen.is_format_supported = r300_is_format_supported;
753 r300screen->screen.is_video_format_supported = vl_video_buffer_is_format_supported;
754 r300screen->screen.context_create = r300_create_context;
755 r300screen->screen.fence_reference = r300_fence_reference;
756 r300screen->screen.fence_finish = r300_fence_finish;
757
758 r300_init_screen_resource_functions(r300screen);
759
760 slab_create_parent(&r300screen->pool_transfers, sizeof(struct pipe_transfer), 64);
761
762 util_format_s3tc_init();
763 (void) mtx_init(&r300screen->cmask_mutex, mtx_plain);
764
765 return &r300screen->screen;
766 }