src/gallium/drivers/r300/r300_screen.c

   1 /*
   2  * Copyright 2008 Corbin Simpson <MostAwesomeDude@gmail.com>
   3  * Copyright 2010 Marek Olšák <maraeo@gmail.com>
   4  *
   5  * Permission is hereby granted, free of charge, to any person obtaining a
   6  * copy of this software and associated documentation files (the "Software"),
   7  * to deal in the Software without restriction, including without limitation
   8  * on the rights to use, copy, modify, merge, publish, distribute, sub
   9  * license, and/or sell copies of the Software, and to permit persons to whom
  10  * the Software is furnished to do so, subject to the following conditions:
  11  *
  12  * The above copyright notice and this permission notice (including the next
  13  * paragraph) shall be included in all copies or substantial portions of the
  14  * Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  19  * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
  20  * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
  21  * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
  22  * USE OR OTHER DEALINGS IN THE SOFTWARE. */
  23
  24 #include "util/u_format.h"
  25 #include "util/u_format_s3tc.h"
  26 #include "util/u_screen.h"
  27 #include "util/u_memory.h"
  28 #include "util/os_time.h"
  29 #include "vl/vl_decoder.h"
  30 #include "vl/vl_video_buffer.h"
  31
  32 #include "r300_context.h"
  33 #include "r300_texture.h"
  34 #include "r300_screen_buffer.h"
  35 #include "r300_state_inlines.h"
  36 #include "r300_public.h"
  37
  38 #include "draw/draw_context.h"
  39
  40 /* Return the identifier behind whom the brave coders responsible for this
  41  * amalgamation of code, sweat, and duct tape, routinely obscure their names.
  42  *
  43  * ...I should have just put "Corbin Simpson", but I'm not that cool.
  44  *
  45  * (Or egotistical. Yet.) */
  46 static const char* r300_get_vendor(struct pipe_screen* pscreen)
  47 {
  48     return "X.Org R300 Project";
  49 }
  50
  51 static const char* r300_get_device_vendor(struct pipe_screen* pscreen)
  52 {
  53     return "ATI";
  54 }
  55
  56 static const char* chip_families[] = {
  57     "unknown",
  58     "ATI R300",
  59     "ATI R350",
  60     "ATI RV350",
  61     "ATI RV370",
  62     "ATI RV380",
  63     "ATI RS400",
  64     "ATI RC410",
  65     "ATI RS480",
  66     "ATI R420",
  67     "ATI R423",
  68     "ATI R430",
  69     "ATI R480",
  70     "ATI R481",
  71     "ATI RV410",
  72     "ATI RS600",
  73     "ATI RS690",
  74     "ATI RS740",
  75     "ATI RV515",
  76     "ATI R520",
  77     "ATI RV530",
  78     "ATI R580",
  79     "ATI RV560",
  80     "ATI RV570"
  81 };
  82
  83 static const char* r300_get_name(struct pipe_screen* pscreen)
  84 {
  85     struct r300_screen* r300screen = r300_screen(pscreen);
  86
  87     return chip_families[r300screen->caps.family];
  88 }
  89
  90 static int r300_get_param(struct pipe_screen* pscreen, enum pipe_cap param)
  91 {
  92     struct r300_screen* r300screen = r300_screen(pscreen);
  93     boolean is_r500 = r300screen->caps.is_r500;
  94
  95     switch (param) {
  96         /* Supported features (boolean caps). */
  97         case PIPE_CAP_NPOT_TEXTURES:
  98         case PIPE_CAP_MIXED_FRAMEBUFFER_SIZES:
  99         case PIPE_CAP_MIXED_COLOR_DEPTH_BITS:
 100         case PIPE_CAP_ANISOTROPIC_FILTER:
 101         case PIPE_CAP_POINT_SPRITE:
 102         case PIPE_CAP_OCCLUSION_QUERY:
 103         case PIPE_CAP_TEXTURE_MIRROR_CLAMP:
 104         case PIPE_CAP_TEXTURE_MIRROR_CLAMP_TO_EDGE:
 105         case PIPE_CAP_BLEND_EQUATION_SEPARATE:
 106         case PIPE_CAP_VERTEX_ELEMENT_INSTANCE_DIVISOR:
 107         case PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT:
 108         case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER:
 109         case PIPE_CAP_CONDITIONAL_RENDER:
 110         case PIPE_CAP_TEXTURE_BARRIER:
 111         case PIPE_CAP_TGSI_CAN_COMPACT_CONSTANTS:
 112         case PIPE_CAP_PREFER_BLIT_BASED_TEXTURE_TRANSFER:
 113         case PIPE_CAP_BUFFER_MAP_PERSISTENT_COHERENT:
 114         case PIPE_CAP_CLIP_HALFZ:
 115         case PIPE_CAP_ALLOW_MAPPED_BUFFERS_DURING_EXECUTION:
 116             return 1;
 117
 118         case PIPE_CAP_MIN_MAP_BUFFER_ALIGNMENT:
 119             return R300_BUFFER_ALIGNMENT;
 120
 121         case PIPE_CAP_CONSTANT_BUFFER_OFFSET_ALIGNMENT:
 122             return 16;
 123
 124         case PIPE_CAP_GLSL_FEATURE_LEVEL:
 125         case PIPE_CAP_GLSL_FEATURE_LEVEL_COMPATIBILITY:
 126             return 120;
 127
 128         /* r300 cannot do swizzling of compressed textures. Supported otherwise. */
 129         case PIPE_CAP_TEXTURE_SWIZZLE:
 130             return r300screen->caps.dxtc_swizzle;
 131
 132         /* We don't support color clamping on r500, so that we can use color
 133          * intepolators for generic varyings. */
 134         case PIPE_CAP_VERTEX_COLOR_CLAMPED:
 135             return !is_r500;
 136
 137         /* Supported on r500 only. */
 138         case PIPE_CAP_VERTEX_COLOR_UNCLAMPED:
 139         case PIPE_CAP_MIXED_COLORBUFFER_FORMATS:
 140         case PIPE_CAP_SM3:
 141             return is_r500 ? 1 : 0;
 142
 143         /* Unsupported features. */
 144         case PIPE_CAP_QUERY_TIME_ELAPSED:
 145         case PIPE_CAP_QUERY_PIPELINE_STATISTICS:
 146         case PIPE_CAP_MAX_DUAL_SOURCE_RENDER_TARGETS:
 147         case PIPE_CAP_INDEP_BLEND_ENABLE:
 148         case PIPE_CAP_INDEP_BLEND_FUNC:
 149         case PIPE_CAP_DEPTH_CLIP_DISABLE:
 150         case PIPE_CAP_DEPTH_CLIP_DISABLE_SEPARATE:
 151         case PIPE_CAP_SHADER_STENCIL_EXPORT:
 152         case PIPE_CAP_MAX_TEXTURE_ARRAY_LAYERS:
 153         case PIPE_CAP_TGSI_INSTANCEID:
 154         case PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT:
 155         case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER:
 156         case PIPE_CAP_SEAMLESS_CUBE_MAP:
 157         case PIPE_CAP_SEAMLESS_CUBE_MAP_PER_TEXTURE:
 158         case PIPE_CAP_MIN_TEXEL_OFFSET:
 159         case PIPE_CAP_MAX_TEXEL_OFFSET:
 160         case PIPE_CAP_MIN_TEXTURE_GATHER_OFFSET:
 161         case PIPE_CAP_MAX_TEXTURE_GATHER_OFFSET:
 162         case PIPE_CAP_MAX_STREAM_OUTPUT_BUFFERS:
 163         case PIPE_CAP_MAX_STREAM_OUTPUT_SEPARATE_COMPONENTS:
 164         case PIPE_CAP_MAX_STREAM_OUTPUT_INTERLEAVED_COMPONENTS:
 165         case PIPE_CAP_MAX_GEOMETRY_OUTPUT_VERTICES:
 166         case PIPE_CAP_MAX_GEOMETRY_TOTAL_OUTPUT_COMPONENTS:
 167         case PIPE_CAP_MAX_VERTEX_STREAMS:
 168         case PIPE_CAP_STREAM_OUTPUT_PAUSE_RESUME:
 169         case PIPE_CAP_STREAM_OUTPUT_INTERLEAVE_BUFFERS:
 170         case PIPE_CAP_FRAGMENT_COLOR_CLAMPED:
 171         case PIPE_CAP_QUADS_FOLLOW_PROVOKING_VERTEX_CONVENTION:
 172         case PIPE_CAP_COMPUTE:
 173         case PIPE_CAP_START_INSTANCE:
 174         case PIPE_CAP_QUERY_TIMESTAMP:
 175         case PIPE_CAP_TEXTURE_MULTISAMPLE:
 176         case PIPE_CAP_CUBE_MAP_ARRAY:
 177         case PIPE_CAP_TEXTURE_BUFFER_OBJECTS:
 178         case PIPE_CAP_TEXTURE_BUFFER_OFFSET_ALIGNMENT:
 179         case PIPE_CAP_TEXTURE_BORDER_COLOR_QUIRK:
 180         case PIPE_CAP_MAX_TEXTURE_BUFFER_SIZE:
 181         case PIPE_CAP_TGSI_VS_LAYER_VIEWPORT:
 182         case PIPE_CAP_MAX_TEXTURE_GATHER_COMPONENTS:
 183         case PIPE_CAP_TEXTURE_GATHER_SM5:
 184         case PIPE_CAP_TEXTURE_QUERY_LOD:
 185         case PIPE_CAP_FAKE_SW_MSAA:
 186         case PIPE_CAP_SAMPLE_SHADING:
 187         case PIPE_CAP_TEXTURE_GATHER_OFFSETS:
 188         case PIPE_CAP_DRAW_INDIRECT:
 189         case PIPE_CAP_MULTI_DRAW_INDIRECT:
 190         case PIPE_CAP_MULTI_DRAW_INDIRECT_PARAMS:
 191         case PIPE_CAP_TGSI_FS_FINE_DERIVATIVE:
 192         case PIPE_CAP_CONDITIONAL_RENDER_INVERTED:
 193         case PIPE_CAP_SAMPLER_VIEW_TARGET:
 194         case PIPE_CAP_VERTEXID_NOBASE:
 195         case PIPE_CAP_POLYGON_OFFSET_CLAMP:
 196         case PIPE_CAP_MULTISAMPLE_Z_RESOLVE:
 197         case PIPE_CAP_RESOURCE_FROM_USER_MEMORY:
 198         case PIPE_CAP_DEVICE_RESET_STATUS_QUERY:
 199         case PIPE_CAP_MAX_SHADER_PATCH_VARYINGS:
 200         case PIPE_CAP_TEXTURE_FLOAT_LINEAR:
 201         case PIPE_CAP_TEXTURE_HALF_FLOAT_LINEAR:
 202         case PIPE_CAP_DEPTH_BOUNDS_TEST:
 203         case PIPE_CAP_TGSI_TXQS:
 204         case PIPE_CAP_FORCE_PERSAMPLE_INTERP:
 205         case PIPE_CAP_SHAREABLE_SHADERS:
 206         case PIPE_CAP_COPY_BETWEEN_COMPRESSED_AND_PLAIN_FORMATS:
 207         case PIPE_CAP_CLEAR_TEXTURE:
 208         case PIPE_CAP_DRAW_PARAMETERS:
 209         case PIPE_CAP_TGSI_PACK_HALF_FLOAT:
 210         case PIPE_CAP_TGSI_FS_POSITION_IS_SYSVAL:
 211         case PIPE_CAP_TGSI_FS_FACE_IS_INTEGER_SYSVAL:
 212         case PIPE_CAP_SHADER_BUFFER_OFFSET_ALIGNMENT:
 213         case PIPE_CAP_INVALIDATE_BUFFER:
 214         case PIPE_CAP_GENERATE_MIPMAP:
 215         case PIPE_CAP_STRING_MARKER:
 216         case PIPE_CAP_BUFFER_SAMPLER_VIEW_RGBA_ONLY:
 217         case PIPE_CAP_SURFACE_REINTERPRET_BLOCKS:
 218         case PIPE_CAP_QUERY_BUFFER_OBJECT:
 219         case PIPE_CAP_QUERY_MEMORY_INFO:
 220         case PIPE_CAP_FRAMEBUFFER_NO_ATTACHMENT:
 221         case PIPE_CAP_ROBUST_BUFFER_ACCESS_BEHAVIOR:
 222         case PIPE_CAP_CULL_DISTANCE:
 223         case PIPE_CAP_PRIMITIVE_RESTART_FOR_PATCHES:
 224         case PIPE_CAP_TGSI_VOTE:
 225         case PIPE_CAP_MAX_WINDOW_RECTANGLES:
 226         case PIPE_CAP_POLYGON_OFFSET_UNITS_UNSCALED:
 227         case PIPE_CAP_VIEWPORT_SUBPIXEL_BITS:
 228         case PIPE_CAP_TGSI_ARRAY_COMPONENTS:
 229         case PIPE_CAP_TGSI_CAN_READ_OUTPUTS:
 230         case PIPE_CAP_NATIVE_FENCE_FD:
 231         case PIPE_CAP_GLSL_OPTIMIZE_CONSERVATIVELY:
 232         case PIPE_CAP_TGSI_FS_FBFETCH:
 233         case PIPE_CAP_TGSI_MUL_ZERO_WINS:
 234         case PIPE_CAP_DOUBLES:
 235         case PIPE_CAP_INT64:
 236         case PIPE_CAP_INT64_DIVMOD:
 237         case PIPE_CAP_TGSI_TEX_TXF_LZ:
 238         case PIPE_CAP_TGSI_CLOCK:
 239         case PIPE_CAP_POLYGON_MODE_FILL_RECTANGLE:
 240         case PIPE_CAP_SPARSE_BUFFER_PAGE_SIZE:
 241         case PIPE_CAP_TGSI_BALLOT:
 242         case PIPE_CAP_TGSI_TES_LAYER_VIEWPORT:
 243         case PIPE_CAP_CAN_BIND_CONST_BUFFER_AS_VERTEX:
 244         case PIPE_CAP_POST_DEPTH_COVERAGE:
 245         case PIPE_CAP_BINDLESS_TEXTURE:
 246         case PIPE_CAP_NIR_SAMPLERS_AS_DEREF:
 247         case PIPE_CAP_QUERY_SO_OVERFLOW:
 248         case PIPE_CAP_MEMOBJ:
 249         case PIPE_CAP_LOAD_CONSTBUF:
 250         case PIPE_CAP_TGSI_ANY_REG_AS_ADDRESS:
 251         case PIPE_CAP_TILE_RASTER_ORDER:
 252         case PIPE_CAP_MAX_COMBINED_SHADER_OUTPUT_RESOURCES:
 253         case PIPE_CAP_FRAMEBUFFER_MSAA_CONSTRAINTS:
 254         case PIPE_CAP_SIGNED_VERTEX_BUFFER_OFFSET:
 255         case PIPE_CAP_CONTEXT_PRIORITY_MASK:
 256         case PIPE_CAP_FENCE_SIGNAL:
 257         case PIPE_CAP_CONSTBUF0_FLAGS:
 258         case PIPE_CAP_PACKED_UNIFORMS:
 259         case PIPE_CAP_CONSERVATIVE_RASTER_POST_SNAP_TRIANGLES:
 260         case PIPE_CAP_CONSERVATIVE_RASTER_POST_SNAP_POINTS_LINES:
 261         case PIPE_CAP_CONSERVATIVE_RASTER_PRE_SNAP_TRIANGLES:
 262         case PIPE_CAP_CONSERVATIVE_RASTER_PRE_SNAP_POINTS_LINES:
 263         case PIPE_CAP_CONSERVATIVE_RASTER_POST_DEPTH_COVERAGE:
 264         case PIPE_CAP_MAX_CONSERVATIVE_RASTER_SUBPIXEL_PRECISION_BIAS:
 265         case PIPE_CAP_PROGRAMMABLE_SAMPLE_LOCATIONS:
 266         case PIPE_CAP_MAX_TEXTURE_UPLOAD_MEMORY_BUDGET:
 267             return 0;
 268
 269         case PIPE_CAP_MAX_GS_INVOCATIONS:
 270             return 32;
 271        case PIPE_CAP_MAX_SHADER_BUFFER_SIZE:
 272             return 1 << 27;
 273
 274         /* SWTCL-only features. */
 275         case PIPE_CAP_PRIMITIVE_RESTART:
 276         case PIPE_CAP_USER_VERTEX_BUFFERS:
 277         case PIPE_CAP_TGSI_VS_WINDOW_SPACE_POSITION:
 278             return !r300screen->caps.has_tcl;
 279
 280         /* HWTCL-only features / limitations. */
 281         case PIPE_CAP_VERTEX_BUFFER_OFFSET_4BYTE_ALIGNED_ONLY:
 282         case PIPE_CAP_VERTEX_BUFFER_STRIDE_4BYTE_ALIGNED_ONLY:
 283         case PIPE_CAP_VERTEX_ELEMENT_SRC_OFFSET_4BYTE_ALIGNED_ONLY:
 284             return r300screen->caps.has_tcl;
 285         case PIPE_CAP_TGSI_TEXCOORD:
 286             return 0;
 287
 288         /* Texturing. */
 289         case PIPE_CAP_MAX_TEXTURE_2D_LEVELS:
 290         case PIPE_CAP_MAX_TEXTURE_3D_LEVELS:
 291         case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS:
 292             /* 13 == 4096, 12 == 2048 */
 293             return is_r500 ? 13 : 12;
 294
 295         /* Render targets. */
 296         case PIPE_CAP_MAX_RENDER_TARGETS:
 297             return 4;
 298         case PIPE_CAP_ENDIANNESS:
 299             return PIPE_ENDIAN_LITTLE;
 300
 301         case PIPE_CAP_MAX_VIEWPORTS:
 302             return 1;
 303
 304         case PIPE_CAP_MAX_VERTEX_ATTRIB_STRIDE:
 305             return 2048;
 306
 307         case PIPE_CAP_VENDOR_ID:
 308                 return 0x1002;
 309         case PIPE_CAP_DEVICE_ID:
 310                 return r300screen->info.pci_id;
 311         case PIPE_CAP_ACCELERATED:
 312                 return 1;
 313         case PIPE_CAP_VIDEO_MEMORY:
 314                 return r300screen->info.vram_size >> 20;
 315         case PIPE_CAP_UMA:
 316                 return 0;
 317         case PIPE_CAP_PCI_GROUP:
 318             return r300screen->info.pci_domain;
 319         case PIPE_CAP_PCI_BUS:
 320             return r300screen->info.pci_bus;
 321         case PIPE_CAP_PCI_DEVICE:
 322             return r300screen->info.pci_dev;
 323         case PIPE_CAP_PCI_FUNCTION:
 324             return r300screen->info.pci_func;
 325         default:
 326             return u_pipe_screen_get_param_defaults(pscreen, param);
 327     }
 328 }
 329
 330 static int r300_get_shader_param(struct pipe_screen *pscreen,
 331                                  enum pipe_shader_type shader,
 332                                  enum pipe_shader_cap param)
 333 {
 334    struct r300_screen* r300screen = r300_screen(pscreen);
 335    boolean is_r400 = r300screen->caps.is_r400;
 336    boolean is_r500 = r300screen->caps.is_r500;
 337
 338    switch (shader) {
 339     case PIPE_SHADER_FRAGMENT:
 340         switch (param)
 341         {
 342         case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
 343             return is_r500 || is_r400 ? 512 : 96;
 344         case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
 345             return is_r500 || is_r400 ? 512 : 64;
 346         case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
 347             return is_r500 || is_r400 ? 512 : 32;
 348         case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
 349             return is_r500 ? 511 : 4;
 350         case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:
 351             return is_r500 ? 64 : 0; /* Actually unlimited on r500. */
 352             /* Fragment shader limits. */
 353         case PIPE_SHADER_CAP_MAX_INPUTS:
 354             /* 2 colors + 8 texcoords are always supported
 355              * (minus fog and wpos).
 356              *
 357              * R500 has the ability to turn 3rd and 4th color into
 358              * additional texcoords but there is no two-sided color
 359              * selection then. However the facing bit can be used instead. */
 360             return 10;
 361         case PIPE_SHADER_CAP_MAX_OUTPUTS:
 362             return 4;
 363         case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE:
 364             return (is_r500 ? 256 : 32) * sizeof(float[4]);
 365         case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
 366         case PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE:
 367             return 1;
 368         case PIPE_SHADER_CAP_MAX_TEMPS:
 369             return is_r500 ? 128 : is_r400 ? 64 : 32;
 370         case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
 371         case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS:
 372            return r300screen->caps.num_tex_units;
 373         case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
 374         case PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED:
 375         case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
 376         case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
 377         case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
 378         case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
 379         case PIPE_SHADER_CAP_SUBROUTINES:
 380         case PIPE_SHADER_CAP_INTEGERS:
 381         case PIPE_SHADER_CAP_INT64_ATOMICS:
 382         case PIPE_SHADER_CAP_FP16:
 383         case PIPE_SHADER_CAP_TGSI_DROUND_SUPPORTED:
 384         case PIPE_SHADER_CAP_TGSI_DFRACEXP_DLDEXP_SUPPORTED:
 385         case PIPE_SHADER_CAP_TGSI_LDEXP_SUPPORTED:
 386         case PIPE_SHADER_CAP_TGSI_FMA_SUPPORTED:
 387         case PIPE_SHADER_CAP_MAX_SHADER_BUFFERS:
 388         case PIPE_SHADER_CAP_MAX_SHADER_IMAGES:
 389         case PIPE_SHADER_CAP_LOWER_IF_THRESHOLD:
 390         case PIPE_SHADER_CAP_TGSI_SKIP_MERGE_REGISTERS:
 391         case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTERS:
 392         case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTER_BUFFERS:
 393             return 0;
 394         case PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT:
 395             return 32;
 396         case PIPE_SHADER_CAP_PREFERRED_IR:
 397             return PIPE_SHADER_IR_TGSI;
 398         case PIPE_SHADER_CAP_SUPPORTED_IRS:
 399             return 0;
 400         }
 401         break;
 402     case PIPE_SHADER_VERTEX:
 403         switch (param)
 404         {
 405         case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
 406         case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS:
 407         case PIPE_SHADER_CAP_SUBROUTINES:
 408             return 0;
 409         default:;
 410         }
 411
 412         if (!r300screen->caps.has_tcl) {
 413             return draw_get_shader_param(shader, param);
 414         }
 415
 416         switch (param)
 417         {
 418         case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
 419         case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
 420             return is_r500 ? 1024 : 256;
 421         case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:
 422             return is_r500 ? 4 : 0; /* For loops; not sure about conditionals. */
 423         case PIPE_SHADER_CAP_MAX_INPUTS:
 424             return 16;
 425         case PIPE_SHADER_CAP_MAX_OUTPUTS:
 426             return 10;
 427         case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE:
 428             return 256 * sizeof(float[4]);
 429         case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
 430             return 1;
 431         case PIPE_SHADER_CAP_MAX_TEMPS:
 432             return 32;
 433         case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
 434         case PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE:
 435             return 1;
 436         case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
 437         case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
 438         case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
 439         case PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED:
 440         case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
 441         case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
 442         case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
 443         case PIPE_SHADER_CAP_SUBROUTINES:
 444         case PIPE_SHADER_CAP_INTEGERS:
 445         case PIPE_SHADER_CAP_FP16:
 446         case PIPE_SHADER_CAP_INT64_ATOMICS:
 447         case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
 448         case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS:
 449         case PIPE_SHADER_CAP_TGSI_DROUND_SUPPORTED:
 450         case PIPE_SHADER_CAP_TGSI_DFRACEXP_DLDEXP_SUPPORTED:
 451         case PIPE_SHADER_CAP_TGSI_LDEXP_SUPPORTED:
 452         case PIPE_SHADER_CAP_TGSI_FMA_SUPPORTED:
 453         case PIPE_SHADER_CAP_MAX_SHADER_BUFFERS:
 454         case PIPE_SHADER_CAP_MAX_SHADER_IMAGES:
 455         case PIPE_SHADER_CAP_LOWER_IF_THRESHOLD:
 456         case PIPE_SHADER_CAP_TGSI_SKIP_MERGE_REGISTERS:
 457         case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTERS:
 458         case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTER_BUFFERS:
 459             return 0;
 460         case PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT:
 461             return 32;
 462         case PIPE_SHADER_CAP_PREFERRED_IR:
 463             return PIPE_SHADER_IR_TGSI;
 464         case PIPE_SHADER_CAP_SUPPORTED_IRS:
 465             return 0;
 466         }
 467         break;
 468     default:
 469         ; /* nothing */
 470     }
 471     return 0;
 472 }
 473
 474 static float r300_get_paramf(struct pipe_screen* pscreen,
 475                              enum pipe_capf param)
 476 {
 477     struct r300_screen* r300screen = r300_screen(pscreen);
 478
 479     switch (param) {
 480         case PIPE_CAPF_MAX_LINE_WIDTH:
 481         case PIPE_CAPF_MAX_LINE_WIDTH_AA:
 482         case PIPE_CAPF_MAX_POINT_WIDTH:
 483         case PIPE_CAPF_MAX_POINT_WIDTH_AA:
 484             /* The maximum dimensions of the colorbuffer are our practical
 485              * rendering limits. 2048 pixels should be enough for anybody. */
 486             if (r300screen->caps.is_r500) {
 487                 return 4096.0f;
 488             } else if (r300screen->caps.is_r400) {
 489                 return 4021.0f;
 490             } else {
 491                 return 2560.0f;
 492             }
 493         case PIPE_CAPF_MAX_TEXTURE_ANISOTROPY:
 494             return 16.0f;
 495         case PIPE_CAPF_MAX_TEXTURE_LOD_BIAS:
 496             return 16.0f;
 497         case PIPE_CAPF_MIN_CONSERVATIVE_RASTER_DILATE:
 498         case PIPE_CAPF_MAX_CONSERVATIVE_RASTER_DILATE:
 499         case PIPE_CAPF_CONSERVATIVE_RASTER_DILATE_GRANULARITY:
 500             return 0.0f;
 501         default:
 502             debug_printf("r300: Warning: Unknown CAP %d in get_paramf.\n",
 503                          param);
 504             return 0.0f;
 505     }
 506 }
 507
 508 static int r300_get_video_param(struct pipe_screen *screen,
 509                                 enum pipe_video_profile profile,
 510                                 enum pipe_video_entrypoint entrypoint,
 511                                 enum pipe_video_cap param)
 512 {
 513    switch (param) {
 514       case PIPE_VIDEO_CAP_SUPPORTED:
 515          return vl_profile_supported(screen, profile, entrypoint);
 516       case PIPE_VIDEO_CAP_NPOT_TEXTURES:
 517          return 0;
 518       case PIPE_VIDEO_CAP_MAX_WIDTH:
 519       case PIPE_VIDEO_CAP_MAX_HEIGHT:
 520          return vl_video_buffer_max_size(screen);
 521       case PIPE_VIDEO_CAP_PREFERED_FORMAT:
 522          return PIPE_FORMAT_NV12;
 523       case PIPE_VIDEO_CAP_PREFERS_INTERLACED:
 524          return false;
 525       case PIPE_VIDEO_CAP_SUPPORTS_INTERLACED:
 526          return false;
 527       case PIPE_VIDEO_CAP_SUPPORTS_PROGRESSIVE:
 528          return true;
 529       case PIPE_VIDEO_CAP_MAX_LEVEL:
 530          return vl_level_supported(screen, profile);
 531       default:
 532          return 0;
 533    }
 534 }
 535
 536 /**
 537  * Whether the format matches:
 538  *   PIPE_FORMAT_?10?10?10?2_UNORM
 539  */
 540 static inline boolean
 541 util_format_is_rgba1010102_variant(const struct util_format_description *desc)
 542 {
 543    static const unsigned size[4] = {10, 10, 10, 2};
 544    unsigned chan;
 545
 546    if (desc->block.width != 1 ||
 547        desc->block.height != 1 ||
 548        desc->block.bits != 32)
 549       return FALSE;
 550
 551    for (chan = 0; chan < 4; ++chan) {
 552       if(desc->channel[chan].type != UTIL_FORMAT_TYPE_UNSIGNED &&
 553          desc->channel[chan].type != UTIL_FORMAT_TYPE_VOID)
 554          return FALSE;
 555       if (desc->channel[chan].size != size[chan])
 556          return FALSE;
 557    }
 558
 559    return TRUE;
 560 }
 561
 562 static bool r300_is_blending_supported(struct r300_screen *rscreen,
 563                                        enum pipe_format format)
 564 {
 565     int c;
 566     const struct util_format_description *desc =
 567         util_format_description(format);
 568
 569     if (desc->layout != UTIL_FORMAT_LAYOUT_PLAIN)
 570         return false;
 571
 572     c = util_format_get_first_non_void_channel(format);
 573
 574     /* RGBA16F */
 575     if (rscreen->caps.is_r500 &&
 576         desc->nr_channels == 4 &&
 577         desc->channel[c].size == 16 &&
 578         desc->channel[c].type == UTIL_FORMAT_TYPE_FLOAT)
 579         return true;
 580
 581     if (desc->channel[c].normalized &&
 582         desc->channel[c].type == UTIL_FORMAT_TYPE_UNSIGNED &&
 583         desc->channel[c].size >= 4 &&
 584         desc->channel[c].size <= 10) {
 585         /* RGB10_A2, RGBA8, RGB5_A1, RGBA4, RGB565 */
 586         if (desc->nr_channels >= 3)
 587             return true;
 588
 589         if (format == PIPE_FORMAT_R8G8_UNORM)
 590             return true;
 591
 592         /* R8, I8, L8, A8 */
 593         if (desc->nr_channels == 1)
 594             return true;
 595     }
 596
 597     return false;
 598 }
 599
 600 static boolean r300_is_format_supported(struct pipe_screen* screen,
 601                                         enum pipe_format format,
 602                                         enum pipe_texture_target target,
 603                                         unsigned sample_count,
 604                                         unsigned storage_sample_count,
 605                                         unsigned usage)
 606 {
 607     uint32_t retval = 0;
 608     boolean is_r500 = r300_screen(screen)->caps.is_r500;
 609     boolean is_r400 = r300_screen(screen)->caps.is_r400;
 610     boolean is_color2101010 = format == PIPE_FORMAT_R10G10B10A2_UNORM ||
 611                               format == PIPE_FORMAT_R10G10B10X2_SNORM ||
 612                               format == PIPE_FORMAT_B10G10R10A2_UNORM ||
 613                               format == PIPE_FORMAT_B10G10R10X2_UNORM ||
 614                               format == PIPE_FORMAT_R10SG10SB10SA2U_NORM;
 615     boolean is_ati1n = format == PIPE_FORMAT_RGTC1_UNORM ||
 616                        format == PIPE_FORMAT_RGTC1_SNORM ||
 617                        format == PIPE_FORMAT_LATC1_UNORM ||
 618                        format == PIPE_FORMAT_LATC1_SNORM;
 619     boolean is_ati2n = format == PIPE_FORMAT_RGTC2_UNORM ||
 620                        format == PIPE_FORMAT_RGTC2_SNORM ||
 621                        format == PIPE_FORMAT_LATC2_UNORM ||
 622                        format == PIPE_FORMAT_LATC2_SNORM;
 623     boolean is_half_float = format == PIPE_FORMAT_R16_FLOAT ||
 624                             format == PIPE_FORMAT_R16G16_FLOAT ||
 625                             format == PIPE_FORMAT_R16G16B16_FLOAT ||
 626                             format == PIPE_FORMAT_R16G16B16A16_FLOAT ||
 627                             format == PIPE_FORMAT_R16G16B16X16_FLOAT;
 628     const struct util_format_description *desc;
 629
 630     if (MAX2(1, sample_count) != MAX2(1, storage_sample_count))
 631         return false;
 632
 633     /* Check multisampling support. */
 634     switch (sample_count) {
 635         case 0:
 636         case 1:
 637             break;
 638         case 2:
 639         case 4:
 640         case 6:
 641             /* No texturing and scanout. */
 642             if (usage & (PIPE_BIND_SAMPLER_VIEW |
 643                          PIPE_BIND_DISPLAY_TARGET |
 644                          PIPE_BIND_SCANOUT)) {
 645                 return FALSE;
 646             }
 647
 648             desc = util_format_description(format);
 649
 650             if (is_r500) {
 651                 /* Only allow depth/stencil, RGBA8, RGBA1010102, RGBA16F. */
 652                 if (!util_format_is_depth_or_stencil(format) &&
 653                     !util_format_is_rgba8_variant(desc) &&
 654                     !util_format_is_rgba1010102_variant(desc) &&
 655                     format != PIPE_FORMAT_R16G16B16A16_FLOAT &&
 656                     format != PIPE_FORMAT_R16G16B16X16_FLOAT) {
 657                     return FALSE;
 658                 }
 659             } else {
 660                 /* Only allow depth/stencil, RGBA8. */
 661                 if (!util_format_is_depth_or_stencil(format) &&
 662                     !util_format_is_rgba8_variant(desc)) {
 663                     return FALSE;
 664                 }
 665             }
 666             break;
 667         default:
 668             return FALSE;
 669     }
 670
 671     /* Check sampler format support. */
 672     if ((usage & PIPE_BIND_SAMPLER_VIEW) &&
 673         /* these two are broken for an unknown reason */
 674         format != PIPE_FORMAT_R8G8B8X8_SNORM &&
 675         format != PIPE_FORMAT_R16G16B16X16_SNORM &&
 676         /* ATI1N is r5xx-only. */
 677         (is_r500 || !is_ati1n) &&
 678         /* ATI2N is supported on r4xx-r5xx. */
 679         (is_r400 || is_r500 || !is_ati2n) &&
 680         r300_is_sampler_format_supported(format)) {
 681         retval |= PIPE_BIND_SAMPLER_VIEW;
 682     }
 683
 684     /* Check colorbuffer format support. */
 685     if ((usage & (PIPE_BIND_RENDER_TARGET |
 686                   PIPE_BIND_DISPLAY_TARGET |
 687                   PIPE_BIND_SCANOUT |
 688                   PIPE_BIND_SHARED |
 689                   PIPE_BIND_BLENDABLE)) &&
 690         /* 2101010 cannot be rendered to on non-r5xx. */
 691         (!is_color2101010 || is_r500) &&
 692         r300_is_colorbuffer_format_supported(format)) {
 693         retval |= usage &
 694             (PIPE_BIND_RENDER_TARGET |
 695              PIPE_BIND_DISPLAY_TARGET |
 696              PIPE_BIND_SCANOUT |
 697              PIPE_BIND_SHARED);
 698
 699         if (r300_is_blending_supported(r300_screen(screen), format)) {
 700             retval |= usage & PIPE_BIND_BLENDABLE;
 701         }
 702     }
 703
 704     /* Check depth-stencil format support. */
 705     if (usage & PIPE_BIND_DEPTH_STENCIL &&
 706         r300_is_zs_format_supported(format)) {
 707         retval |= PIPE_BIND_DEPTH_STENCIL;
 708     }
 709
 710     /* Check vertex buffer format support. */
 711     if (usage & PIPE_BIND_VERTEX_BUFFER) {
 712         if (r300_screen(screen)->caps.has_tcl) {
 713             /* Half float is supported on >= R400. */
 714             if ((is_r400 || is_r500 || !is_half_float) &&
 715                 r300_translate_vertex_data_type(format) != R300_INVALID_FORMAT) {
 716                 retval |= PIPE_BIND_VERTEX_BUFFER;
 717             }
 718         } else {
 719             /* SW TCL */
 720             if (!util_format_is_pure_integer(format)) {
 721                 retval |= PIPE_BIND_VERTEX_BUFFER;
 722             }
 723         }
 724     }
 725
 726     return retval == usage;
 727 }
 728
 729 static void r300_destroy_screen(struct pipe_screen* pscreen)
 730 {
 731     struct r300_screen* r300screen = r300_screen(pscreen);
 732     struct radeon_winsys *rws = radeon_winsys(pscreen);
 733
 734     if (rws && !rws->unref(rws))
 735       return;
 736
 737     mtx_destroy(&r300screen->cmask_mutex);
 738     slab_destroy_parent(&r300screen->pool_transfers);
 739
 740     if (rws)
 741       rws->destroy(rws);
 742
 743     FREE(r300screen);
 744 }
 745
 746 static void r300_fence_reference(struct pipe_screen *screen,
 747                                  struct pipe_fence_handle **ptr,
 748                                  struct pipe_fence_handle *fence)
 749 {
 750     struct radeon_winsys *rws = r300_screen(screen)->rws;
 751
 752     rws->fence_reference(ptr, fence);
 753 }
 754
 755 static boolean r300_fence_finish(struct pipe_screen *screen,
 756                                  struct pipe_context *ctx,
 757                                  struct pipe_fence_handle *fence,
 758                                  uint64_t timeout)
 759 {
 760     struct radeon_winsys *rws = r300_screen(screen)->rws;
 761
 762     return rws->fence_wait(rws, fence, timeout);
 763 }
 764
 765 struct pipe_screen* r300_screen_create(struct radeon_winsys *rws,
 766                                        const struct pipe_screen_config *config)
 767 {
 768     struct r300_screen *r300screen = CALLOC_STRUCT(r300_screen);
 769
 770     if (!r300screen) {
 771         FREE(r300screen);
 772         return NULL;
 773     }
 774
 775     rws->query_info(rws, &r300screen->info);
 776
 777     r300_init_debug(r300screen);
 778     r300_parse_chipset(r300screen->info.pci_id, &r300screen->caps);
 779
 780     if (SCREEN_DBG_ON(r300screen, DBG_NO_ZMASK))
 781         r300screen->caps.zmask_ram = 0;
 782     if (SCREEN_DBG_ON(r300screen, DBG_NO_HIZ))
 783         r300screen->caps.hiz_ram = 0;
 784
 785     r300screen->rws = rws;
 786     r300screen->screen.destroy = r300_destroy_screen;
 787     r300screen->screen.get_name = r300_get_name;
 788     r300screen->screen.get_vendor = r300_get_vendor;
 789     r300screen->screen.get_device_vendor = r300_get_device_vendor;
 790     r300screen->screen.get_param = r300_get_param;
 791     r300screen->screen.get_shader_param = r300_get_shader_param;
 792     r300screen->screen.get_paramf = r300_get_paramf;
 793     r300screen->screen.get_video_param = r300_get_video_param;
 794     r300screen->screen.is_format_supported = r300_is_format_supported;
 795     r300screen->screen.is_video_format_supported = vl_video_buffer_is_format_supported;
 796     r300screen->screen.context_create = r300_create_context;
 797     r300screen->screen.fence_reference = r300_fence_reference;
 798     r300screen->screen.fence_finish = r300_fence_finish;
 799
 800     r300_init_screen_resource_functions(r300screen);
 801
 802     slab_create_parent(&r300screen->pool_transfers, sizeof(struct pipe_transfer), 64);
 803
 804     (void) mtx_init(&r300screen->cmask_mutex, mtx_plain);
 805
 806     return &r300screen->screen;
 807 }