src/gallium/drivers/r300/r300_screen.c

   1 /*
   2  * Copyright 2008 Corbin Simpson <MostAwesomeDude@gmail.com>
   3  * Copyright 2010 Marek Olšák <maraeo@gmail.com>
   4  *
   5  * Permission is hereby granted, free of charge, to any person obtaining a
   6  * copy of this software and associated documentation files (the "Software"),
   7  * to deal in the Software without restriction, including without limitation
   8  * on the rights to use, copy, modify, merge, publish, distribute, sub
   9  * license, and/or sell copies of the Software, and to permit persons to whom
  10  * the Software is furnished to do so, subject to the following conditions:
  11  *
  12  * The above copyright notice and this permission notice (including the next
  13  * paragraph) shall be included in all copies or substantial portions of the
  14  * Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  19  * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
  20  * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
  21  * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
  22  * USE OR OTHER DEALINGS IN THE SOFTWARE. */
  23
  24 #include "util/u_format.h"
  25 #include "util/u_format_s3tc.h"
  26 #include "util/u_memory.h"
  27 #include "util/os_time.h"
  28 #include "vl/vl_decoder.h"
  29 #include "vl/vl_video_buffer.h"
  30
  31 #include "r300_context.h"
  32 #include "r300_texture.h"
  33 #include "r300_screen_buffer.h"
  34 #include "r300_state_inlines.h"
  35 #include "r300_public.h"
  36
  37 #include "draw/draw_context.h"
  38
  39 /* Return the identifier behind whom the brave coders responsible for this
  40  * amalgamation of code, sweat, and duct tape, routinely obscure their names.
  41  *
  42  * ...I should have just put "Corbin Simpson", but I'm not that cool.
  43  *
  44  * (Or egotistical. Yet.) */
  45 static const char* r300_get_vendor(struct pipe_screen* pscreen)
  46 {
  47     return "X.Org R300 Project";
  48 }
  49
  50 static const char* r300_get_device_vendor(struct pipe_screen* pscreen)
  51 {
  52     return "ATI";
  53 }
  54
  55 static const char* chip_families[] = {
  56     "unknown",
  57     "ATI R300",
  58     "ATI R350",
  59     "ATI RV350",
  60     "ATI RV370",
  61     "ATI RV380",
  62     "ATI RS400",
  63     "ATI RC410",
  64     "ATI RS480",
  65     "ATI R420",
  66     "ATI R423",
  67     "ATI R430",
  68     "ATI R480",
  69     "ATI R481",
  70     "ATI RV410",
  71     "ATI RS600",
  72     "ATI RS690",
  73     "ATI RS740",
  74     "ATI RV515",
  75     "ATI R520",
  76     "ATI RV530",
  77     "ATI R580",
  78     "ATI RV560",
  79     "ATI RV570"
  80 };
  81
  82 static const char* r300_get_name(struct pipe_screen* pscreen)
  83 {
  84     struct r300_screen* r300screen = r300_screen(pscreen);
  85
  86     return chip_families[r300screen->caps.family];
  87 }
  88
  89 static int r300_get_param(struct pipe_screen* pscreen, enum pipe_cap param)
  90 {
  91     struct r300_screen* r300screen = r300_screen(pscreen);
  92     boolean is_r500 = r300screen->caps.is_r500;
  93
  94     switch (param) {
  95         /* Supported features (boolean caps). */
  96         case PIPE_CAP_NPOT_TEXTURES:
  97         case PIPE_CAP_MIXED_FRAMEBUFFER_SIZES:
  98         case PIPE_CAP_MIXED_COLOR_DEPTH_BITS:
  99         case PIPE_CAP_ANISOTROPIC_FILTER:
 100         case PIPE_CAP_POINT_SPRITE:
 101         case PIPE_CAP_OCCLUSION_QUERY:
 102         case PIPE_CAP_TEXTURE_MIRROR_CLAMP:
 103         case PIPE_CAP_BLEND_EQUATION_SEPARATE:
 104         case PIPE_CAP_VERTEX_ELEMENT_INSTANCE_DIVISOR:
 105         case PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT:
 106         case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER:
 107         case PIPE_CAP_CONDITIONAL_RENDER:
 108         case PIPE_CAP_TEXTURE_BARRIER:
 109         case PIPE_CAP_TGSI_CAN_COMPACT_CONSTANTS:
 110         case PIPE_CAP_PREFER_BLIT_BASED_TEXTURE_TRANSFER:
 111         case PIPE_CAP_BUFFER_MAP_PERSISTENT_COHERENT:
 112         case PIPE_CAP_CLIP_HALFZ:
 113         case PIPE_CAP_ALLOW_MAPPED_BUFFERS_DURING_EXECUTION:
 114             return 1;
 115
 116         case PIPE_CAP_MIN_MAP_BUFFER_ALIGNMENT:
 117             return R300_BUFFER_ALIGNMENT;
 118
 119         case PIPE_CAP_CONSTANT_BUFFER_OFFSET_ALIGNMENT:
 120             return 16;
 121
 122         case PIPE_CAP_GLSL_FEATURE_LEVEL:
 123             return 120;
 124
 125         /* r300 cannot do swizzling of compressed textures. Supported otherwise. */
 126         case PIPE_CAP_TEXTURE_SWIZZLE:
 127             return r300screen->caps.dxtc_swizzle;
 128
 129         /* We don't support color clamping on r500, so that we can use color
 130          * intepolators for generic varyings. */
 131         case PIPE_CAP_VERTEX_COLOR_CLAMPED:
 132             return !is_r500;
 133
 134         /* Supported on r500 only. */
 135         case PIPE_CAP_VERTEX_COLOR_UNCLAMPED:
 136         case PIPE_CAP_MIXED_COLORBUFFER_FORMATS:
 137         case PIPE_CAP_SM3:
 138             return is_r500 ? 1 : 0;
 139
 140         /* Unsupported features. */
 141         case PIPE_CAP_QUERY_TIME_ELAPSED:
 142         case PIPE_CAP_QUERY_PIPELINE_STATISTICS:
 143         case PIPE_CAP_MAX_DUAL_SOURCE_RENDER_TARGETS:
 144         case PIPE_CAP_INDEP_BLEND_ENABLE:
 145         case PIPE_CAP_INDEP_BLEND_FUNC:
 146         case PIPE_CAP_DEPTH_CLIP_DISABLE:
 147         case PIPE_CAP_SHADER_STENCIL_EXPORT:
 148         case PIPE_CAP_MAX_TEXTURE_ARRAY_LAYERS:
 149         case PIPE_CAP_TGSI_INSTANCEID:
 150         case PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT:
 151         case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER:
 152         case PIPE_CAP_SEAMLESS_CUBE_MAP:
 153         case PIPE_CAP_SEAMLESS_CUBE_MAP_PER_TEXTURE:
 154         case PIPE_CAP_MIN_TEXEL_OFFSET:
 155         case PIPE_CAP_MAX_TEXEL_OFFSET:
 156         case PIPE_CAP_MIN_TEXTURE_GATHER_OFFSET:
 157         case PIPE_CAP_MAX_TEXTURE_GATHER_OFFSET:
 158         case PIPE_CAP_MAX_STREAM_OUTPUT_BUFFERS:
 159         case PIPE_CAP_MAX_STREAM_OUTPUT_SEPARATE_COMPONENTS:
 160         case PIPE_CAP_MAX_STREAM_OUTPUT_INTERLEAVED_COMPONENTS:
 161         case PIPE_CAP_MAX_GEOMETRY_OUTPUT_VERTICES:
 162         case PIPE_CAP_MAX_GEOMETRY_TOTAL_OUTPUT_COMPONENTS:
 163         case PIPE_CAP_MAX_VERTEX_STREAMS:
 164         case PIPE_CAP_STREAM_OUTPUT_PAUSE_RESUME:
 165         case PIPE_CAP_STREAM_OUTPUT_INTERLEAVE_BUFFERS:
 166         case PIPE_CAP_FRAGMENT_COLOR_CLAMPED:
 167         case PIPE_CAP_QUADS_FOLLOW_PROVOKING_VERTEX_CONVENTION:
 168         case PIPE_CAP_COMPUTE:
 169         case PIPE_CAP_START_INSTANCE:
 170         case PIPE_CAP_QUERY_TIMESTAMP:
 171         case PIPE_CAP_TEXTURE_MULTISAMPLE:
 172         case PIPE_CAP_CUBE_MAP_ARRAY:
 173         case PIPE_CAP_TEXTURE_BUFFER_OBJECTS:
 174         case PIPE_CAP_TEXTURE_BUFFER_OFFSET_ALIGNMENT:
 175         case PIPE_CAP_TEXTURE_BORDER_COLOR_QUIRK:
 176         case PIPE_CAP_MAX_TEXTURE_BUFFER_SIZE:
 177         case PIPE_CAP_TGSI_VS_LAYER_VIEWPORT:
 178         case PIPE_CAP_MAX_TEXTURE_GATHER_COMPONENTS:
 179         case PIPE_CAP_TEXTURE_GATHER_SM5:
 180         case PIPE_CAP_TEXTURE_QUERY_LOD:
 181         case PIPE_CAP_FAKE_SW_MSAA:
 182         case PIPE_CAP_SAMPLE_SHADING:
 183         case PIPE_CAP_TEXTURE_GATHER_OFFSETS:
 184         case PIPE_CAP_DRAW_INDIRECT:
 185         case PIPE_CAP_MULTI_DRAW_INDIRECT:
 186         case PIPE_CAP_MULTI_DRAW_INDIRECT_PARAMS:
 187         case PIPE_CAP_TGSI_FS_FINE_DERIVATIVE:
 188         case PIPE_CAP_CONDITIONAL_RENDER_INVERTED:
 189         case PIPE_CAP_SAMPLER_VIEW_TARGET:
 190         case PIPE_CAP_VERTEXID_NOBASE:
 191         case PIPE_CAP_POLYGON_OFFSET_CLAMP:
 192         case PIPE_CAP_MULTISAMPLE_Z_RESOLVE:
 193         case PIPE_CAP_RESOURCE_FROM_USER_MEMORY:
 194         case PIPE_CAP_DEVICE_RESET_STATUS_QUERY:
 195         case PIPE_CAP_MAX_SHADER_PATCH_VARYINGS:
 196         case PIPE_CAP_TEXTURE_FLOAT_LINEAR:
 197         case PIPE_CAP_TEXTURE_HALF_FLOAT_LINEAR:
 198         case PIPE_CAP_DEPTH_BOUNDS_TEST:
 199         case PIPE_CAP_TGSI_TXQS:
 200         case PIPE_CAP_FORCE_PERSAMPLE_INTERP:
 201         case PIPE_CAP_SHAREABLE_SHADERS:
 202         case PIPE_CAP_COPY_BETWEEN_COMPRESSED_AND_PLAIN_FORMATS:
 203         case PIPE_CAP_CLEAR_TEXTURE:
 204         case PIPE_CAP_DRAW_PARAMETERS:
 205         case PIPE_CAP_TGSI_PACK_HALF_FLOAT:
 206         case PIPE_CAP_TGSI_FS_POSITION_IS_SYSVAL:
 207         case PIPE_CAP_TGSI_FS_FACE_IS_INTEGER_SYSVAL:
 208         case PIPE_CAP_SHADER_BUFFER_OFFSET_ALIGNMENT:
 209         case PIPE_CAP_INVALIDATE_BUFFER:
 210         case PIPE_CAP_GENERATE_MIPMAP:
 211         case PIPE_CAP_STRING_MARKER:
 212         case PIPE_CAP_BUFFER_SAMPLER_VIEW_RGBA_ONLY:
 213         case PIPE_CAP_SURFACE_REINTERPRET_BLOCKS:
 214         case PIPE_CAP_QUERY_BUFFER_OBJECT:
 215         case PIPE_CAP_QUERY_MEMORY_INFO:
 216         case PIPE_CAP_FRAMEBUFFER_NO_ATTACHMENT:
 217         case PIPE_CAP_ROBUST_BUFFER_ACCESS_BEHAVIOR:
 218         case PIPE_CAP_CULL_DISTANCE:
 219         case PIPE_CAP_PRIMITIVE_RESTART_FOR_PATCHES:
 220         case PIPE_CAP_TGSI_VOTE:
 221         case PIPE_CAP_MAX_WINDOW_RECTANGLES:
 222         case PIPE_CAP_POLYGON_OFFSET_UNITS_UNSCALED:
 223         case PIPE_CAP_VIEWPORT_SUBPIXEL_BITS:
 224         case PIPE_CAP_TGSI_ARRAY_COMPONENTS:
 225         case PIPE_CAP_TGSI_CAN_READ_OUTPUTS:
 226         case PIPE_CAP_NATIVE_FENCE_FD:
 227         case PIPE_CAP_GLSL_OPTIMIZE_CONSERVATIVELY:
 228         case PIPE_CAP_TGSI_FS_FBFETCH:
 229         case PIPE_CAP_TGSI_MUL_ZERO_WINS:
 230         case PIPE_CAP_DOUBLES:
 231         case PIPE_CAP_INT64:
 232         case PIPE_CAP_INT64_DIVMOD:
 233         case PIPE_CAP_TGSI_TEX_TXF_LZ:
 234         case PIPE_CAP_TGSI_CLOCK:
 235         case PIPE_CAP_POLYGON_MODE_FILL_RECTANGLE:
 236         case PIPE_CAP_SPARSE_BUFFER_PAGE_SIZE:
 237         case PIPE_CAP_TGSI_BALLOT:
 238         case PIPE_CAP_TGSI_TES_LAYER_VIEWPORT:
 239         case PIPE_CAP_CAN_BIND_CONST_BUFFER_AS_VERTEX:
 240         case PIPE_CAP_POST_DEPTH_COVERAGE:
 241         case PIPE_CAP_BINDLESS_TEXTURE:
 242         case PIPE_CAP_NIR_SAMPLERS_AS_DEREF:
 243         case PIPE_CAP_QUERY_SO_OVERFLOW:
 244         case PIPE_CAP_MEMOBJ:
 245         case PIPE_CAP_LOAD_CONSTBUF:
 246         case PIPE_CAP_TGSI_ANY_REG_AS_ADDRESS:
 247         case PIPE_CAP_TILE_RASTER_ORDER:
 248         case PIPE_CAP_MAX_COMBINED_SHADER_OUTPUT_RESOURCES:
 249         case PIPE_CAP_SIGNED_VERTEX_BUFFER_OFFSET:
 250         case PIPE_CAP_CONTEXT_PRIORITY_MASK:
 251         case PIPE_CAP_FENCE_SIGNAL:
 252             return 0;
 253
 254         /* SWTCL-only features. */
 255         case PIPE_CAP_PRIMITIVE_RESTART:
 256         case PIPE_CAP_USER_VERTEX_BUFFERS:
 257         case PIPE_CAP_TGSI_VS_WINDOW_SPACE_POSITION:
 258             return !r300screen->caps.has_tcl;
 259
 260         /* HWTCL-only features / limitations. */
 261         case PIPE_CAP_VERTEX_BUFFER_OFFSET_4BYTE_ALIGNED_ONLY:
 262         case PIPE_CAP_VERTEX_BUFFER_STRIDE_4BYTE_ALIGNED_ONLY:
 263         case PIPE_CAP_VERTEX_ELEMENT_SRC_OFFSET_4BYTE_ALIGNED_ONLY:
 264             return r300screen->caps.has_tcl;
 265         case PIPE_CAP_TGSI_TEXCOORD:
 266             return 0;
 267
 268         /* Texturing. */
 269         case PIPE_CAP_MAX_TEXTURE_2D_LEVELS:
 270         case PIPE_CAP_MAX_TEXTURE_3D_LEVELS:
 271         case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS:
 272             /* 13 == 4096, 12 == 2048 */
 273             return is_r500 ? 13 : 12;
 274
 275         /* Render targets. */
 276         case PIPE_CAP_MAX_RENDER_TARGETS:
 277             return 4;
 278         case PIPE_CAP_ENDIANNESS:
 279             return PIPE_ENDIAN_LITTLE;
 280
 281         case PIPE_CAP_MAX_VIEWPORTS:
 282             return 1;
 283
 284         case PIPE_CAP_MAX_VERTEX_ATTRIB_STRIDE:
 285             return 2048;
 286
 287         case PIPE_CAP_VENDOR_ID:
 288                 return 0x1002;
 289         case PIPE_CAP_DEVICE_ID:
 290                 return r300screen->info.pci_id;
 291         case PIPE_CAP_ACCELERATED:
 292                 return 1;
 293         case PIPE_CAP_VIDEO_MEMORY:
 294                 return r300screen->info.vram_size >> 20;
 295         case PIPE_CAP_UMA:
 296                 return 0;
 297         case PIPE_CAP_PCI_GROUP:
 298             return r300screen->info.pci_domain;
 299         case PIPE_CAP_PCI_BUS:
 300             return r300screen->info.pci_bus;
 301         case PIPE_CAP_PCI_DEVICE:
 302             return r300screen->info.pci_dev;
 303         case PIPE_CAP_PCI_FUNCTION:
 304             return r300screen->info.pci_func;
 305     }
 306     return 0;
 307 }
 308
 309 static int r300_get_shader_param(struct pipe_screen *pscreen,
 310                                  enum pipe_shader_type shader,
 311                                  enum pipe_shader_cap param)
 312 {
 313    struct r300_screen* r300screen = r300_screen(pscreen);
 314    boolean is_r400 = r300screen->caps.is_r400;
 315    boolean is_r500 = r300screen->caps.is_r500;
 316
 317    switch (shader) {
 318     case PIPE_SHADER_FRAGMENT:
 319         switch (param)
 320         {
 321         case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
 322             return is_r500 || is_r400 ? 512 : 96;
 323         case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
 324             return is_r500 || is_r400 ? 512 : 64;
 325         case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
 326             return is_r500 || is_r400 ? 512 : 32;
 327         case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
 328             return is_r500 ? 511 : 4;
 329         case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:
 330             return is_r500 ? 64 : 0; /* Actually unlimited on r500. */
 331             /* Fragment shader limits. */
 332         case PIPE_SHADER_CAP_MAX_INPUTS:
 333             /* 2 colors + 8 texcoords are always supported
 334              * (minus fog and wpos).
 335              *
 336              * R500 has the ability to turn 3rd and 4th color into
 337              * additional texcoords but there is no two-sided color
 338              * selection then. However the facing bit can be used instead. */
 339             return 10;
 340         case PIPE_SHADER_CAP_MAX_OUTPUTS:
 341             return 4;
 342         case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE:
 343             return (is_r500 ? 256 : 32) * sizeof(float[4]);
 344         case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
 345         case PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE:
 346             return 1;
 347         case PIPE_SHADER_CAP_MAX_TEMPS:
 348             return is_r500 ? 128 : is_r400 ? 64 : 32;
 349         case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
 350         case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS:
 351            return r300screen->caps.num_tex_units;
 352         case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
 353         case PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED:
 354         case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
 355         case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
 356         case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
 357         case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
 358         case PIPE_SHADER_CAP_SUBROUTINES:
 359         case PIPE_SHADER_CAP_INTEGERS:
 360         case PIPE_SHADER_CAP_INT64_ATOMICS:
 361         case PIPE_SHADER_CAP_FP16:
 362         case PIPE_SHADER_CAP_TGSI_DROUND_SUPPORTED:
 363         case PIPE_SHADER_CAP_TGSI_DFRACEXP_DLDEXP_SUPPORTED:
 364         case PIPE_SHADER_CAP_TGSI_LDEXP_SUPPORTED:
 365         case PIPE_SHADER_CAP_TGSI_FMA_SUPPORTED:
 366         case PIPE_SHADER_CAP_MAX_SHADER_BUFFERS:
 367         case PIPE_SHADER_CAP_MAX_SHADER_IMAGES:
 368         case PIPE_SHADER_CAP_LOWER_IF_THRESHOLD:
 369         case PIPE_SHADER_CAP_TGSI_SKIP_MERGE_REGISTERS:
 370         case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTERS:
 371         case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTER_BUFFERS:
 372             return 0;
 373         case PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT:
 374             return 32;
 375         case PIPE_SHADER_CAP_PREFERRED_IR:
 376             return PIPE_SHADER_IR_TGSI;
 377         case PIPE_SHADER_CAP_SUPPORTED_IRS:
 378             return 0;
 379         }
 380         break;
 381     case PIPE_SHADER_VERTEX:
 382         switch (param)
 383         {
 384         case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
 385         case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS:
 386         case PIPE_SHADER_CAP_SUBROUTINES:
 387             return 0;
 388         default:;
 389         }
 390
 391         if (!r300screen->caps.has_tcl) {
 392             return draw_get_shader_param(shader, param);
 393         }
 394
 395         switch (param)
 396         {
 397         case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
 398         case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
 399             return is_r500 ? 1024 : 256;
 400         case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:
 401             return is_r500 ? 4 : 0; /* For loops; not sure about conditionals. */
 402         case PIPE_SHADER_CAP_MAX_INPUTS:
 403             return 16;
 404         case PIPE_SHADER_CAP_MAX_OUTPUTS:
 405             return 10;
 406         case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE:
 407             return 256 * sizeof(float[4]);
 408         case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
 409             return 1;
 410         case PIPE_SHADER_CAP_MAX_TEMPS:
 411             return 32;
 412         case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
 413         case PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE:
 414             return 1;
 415         case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
 416         case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
 417         case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
 418         case PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED:
 419         case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
 420         case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
 421         case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
 422         case PIPE_SHADER_CAP_SUBROUTINES:
 423         case PIPE_SHADER_CAP_INTEGERS:
 424         case PIPE_SHADER_CAP_FP16:
 425         case PIPE_SHADER_CAP_INT64_ATOMICS:
 426         case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
 427         case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS:
 428         case PIPE_SHADER_CAP_TGSI_DROUND_SUPPORTED:
 429         case PIPE_SHADER_CAP_TGSI_DFRACEXP_DLDEXP_SUPPORTED:
 430         case PIPE_SHADER_CAP_TGSI_LDEXP_SUPPORTED:
 431         case PIPE_SHADER_CAP_TGSI_FMA_SUPPORTED:
 432         case PIPE_SHADER_CAP_MAX_SHADER_BUFFERS:
 433         case PIPE_SHADER_CAP_MAX_SHADER_IMAGES:
 434         case PIPE_SHADER_CAP_LOWER_IF_THRESHOLD:
 435         case PIPE_SHADER_CAP_TGSI_SKIP_MERGE_REGISTERS:
 436         case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTERS:
 437         case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTER_BUFFERS:
 438             return 0;
 439         case PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT:
 440             return 32;
 441         case PIPE_SHADER_CAP_PREFERRED_IR:
 442             return PIPE_SHADER_IR_TGSI;
 443         case PIPE_SHADER_CAP_SUPPORTED_IRS:
 444             return 0;
 445         }
 446         break;
 447     default:
 448         ; /* nothing */
 449     }
 450     return 0;
 451 }
 452
 453 static float r300_get_paramf(struct pipe_screen* pscreen,
 454                              enum pipe_capf param)
 455 {
 456     struct r300_screen* r300screen = r300_screen(pscreen);
 457
 458     switch (param) {
 459         case PIPE_CAPF_MAX_LINE_WIDTH:
 460         case PIPE_CAPF_MAX_LINE_WIDTH_AA:
 461         case PIPE_CAPF_MAX_POINT_WIDTH:
 462         case PIPE_CAPF_MAX_POINT_WIDTH_AA:
 463             /* The maximum dimensions of the colorbuffer are our practical
 464              * rendering limits. 2048 pixels should be enough for anybody. */
 465             if (r300screen->caps.is_r500) {
 466                 return 4096.0f;
 467             } else if (r300screen->caps.is_r400) {
 468                 return 4021.0f;
 469             } else {
 470                 return 2560.0f;
 471             }
 472         case PIPE_CAPF_MAX_TEXTURE_ANISOTROPY:
 473             return 16.0f;
 474         case PIPE_CAPF_MAX_TEXTURE_LOD_BIAS:
 475             return 16.0f;
 476         default:
 477             debug_printf("r300: Warning: Unknown CAP %d in get_paramf.\n",
 478                          param);
 479             return 0.0f;
 480     }
 481 }
 482
 483 static int r300_get_video_param(struct pipe_screen *screen,
 484                                 enum pipe_video_profile profile,
 485                                 enum pipe_video_entrypoint entrypoint,
 486                                 enum pipe_video_cap param)
 487 {
 488    switch (param) {
 489       case PIPE_VIDEO_CAP_SUPPORTED:
 490          return vl_profile_supported(screen, profile, entrypoint);
 491       case PIPE_VIDEO_CAP_NPOT_TEXTURES:
 492          return 0;
 493       case PIPE_VIDEO_CAP_MAX_WIDTH:
 494       case PIPE_VIDEO_CAP_MAX_HEIGHT:
 495          return vl_video_buffer_max_size(screen);
 496       case PIPE_VIDEO_CAP_PREFERED_FORMAT:
 497          return PIPE_FORMAT_NV12;
 498       case PIPE_VIDEO_CAP_PREFERS_INTERLACED:
 499          return false;
 500       case PIPE_VIDEO_CAP_SUPPORTS_INTERLACED:
 501          return false;
 502       case PIPE_VIDEO_CAP_SUPPORTS_PROGRESSIVE:
 503          return true;
 504       case PIPE_VIDEO_CAP_MAX_LEVEL:
 505          return vl_level_supported(screen, profile);
 506       default:
 507          return 0;
 508    }
 509 }
 510
 511 /**
 512  * Whether the format matches:
 513  *   PIPE_FORMAT_?10?10?10?2_UNORM
 514  */
 515 static inline boolean
 516 util_format_is_rgba1010102_variant(const struct util_format_description *desc)
 517 {
 518    static const unsigned size[4] = {10, 10, 10, 2};
 519    unsigned chan;
 520
 521    if (desc->block.width != 1 ||
 522        desc->block.height != 1 ||
 523        desc->block.bits != 32)
 524       return FALSE;
 525
 526    for (chan = 0; chan < 4; ++chan) {
 527       if(desc->channel[chan].type != UTIL_FORMAT_TYPE_UNSIGNED &&
 528          desc->channel[chan].type != UTIL_FORMAT_TYPE_VOID)
 529          return FALSE;
 530       if (desc->channel[chan].size != size[chan])
 531          return FALSE;
 532    }
 533
 534    return TRUE;
 535 }
 536
 537 static bool r300_is_blending_supported(struct r300_screen *rscreen,
 538                                        enum pipe_format format)
 539 {
 540     int c;
 541     const struct util_format_description *desc =
 542         util_format_description(format);
 543
 544     if (desc->layout != UTIL_FORMAT_LAYOUT_PLAIN)
 545         return false;
 546
 547     c = util_format_get_first_non_void_channel(format);
 548
 549     /* RGBA16F */
 550     if (rscreen->caps.is_r500 &&
 551         desc->nr_channels == 4 &&
 552         desc->channel[c].size == 16 &&
 553         desc->channel[c].type == UTIL_FORMAT_TYPE_FLOAT)
 554         return true;
 555
 556     if (desc->channel[c].normalized &&
 557         desc->channel[c].type == UTIL_FORMAT_TYPE_UNSIGNED &&
 558         desc->channel[c].size >= 4 &&
 559         desc->channel[c].size <= 10) {
 560         /* RGB10_A2, RGBA8, RGB5_A1, RGBA4, RGB565 */
 561         if (desc->nr_channels >= 3)
 562             return true;
 563
 564         if (format == PIPE_FORMAT_R8G8_UNORM)
 565             return true;
 566
 567         /* R8, I8, L8, A8 */
 568         if (desc->nr_channels == 1)
 569             return true;
 570     }
 571
 572     return false;
 573 }
 574
 575 static boolean r300_is_format_supported(struct pipe_screen* screen,
 576                                         enum pipe_format format,
 577                                         enum pipe_texture_target target,
 578                                         unsigned sample_count,
 579                                         unsigned usage)
 580 {
 581     uint32_t retval = 0;
 582     boolean is_r500 = r300_screen(screen)->caps.is_r500;
 583     boolean is_r400 = r300_screen(screen)->caps.is_r400;
 584     boolean is_color2101010 = format == PIPE_FORMAT_R10G10B10A2_UNORM ||
 585                               format == PIPE_FORMAT_R10G10B10X2_SNORM ||
 586                               format == PIPE_FORMAT_B10G10R10A2_UNORM ||
 587                               format == PIPE_FORMAT_B10G10R10X2_UNORM ||
 588                               format == PIPE_FORMAT_R10SG10SB10SA2U_NORM;
 589     boolean is_ati1n = format == PIPE_FORMAT_RGTC1_UNORM ||
 590                        format == PIPE_FORMAT_RGTC1_SNORM ||
 591                        format == PIPE_FORMAT_LATC1_UNORM ||
 592                        format == PIPE_FORMAT_LATC1_SNORM;
 593     boolean is_ati2n = format == PIPE_FORMAT_RGTC2_UNORM ||
 594                        format == PIPE_FORMAT_RGTC2_SNORM ||
 595                        format == PIPE_FORMAT_LATC2_UNORM ||
 596                        format == PIPE_FORMAT_LATC2_SNORM;
 597     boolean is_half_float = format == PIPE_FORMAT_R16_FLOAT ||
 598                             format == PIPE_FORMAT_R16G16_FLOAT ||
 599                             format == PIPE_FORMAT_R16G16B16_FLOAT ||
 600                             format == PIPE_FORMAT_R16G16B16A16_FLOAT ||
 601                             format == PIPE_FORMAT_R16G16B16X16_FLOAT;
 602     const struct util_format_description *desc;
 603
 604     if (!util_format_is_supported(format, usage))
 605        return FALSE;
 606
 607     /* Check multisampling support. */
 608     switch (sample_count) {
 609         case 0:
 610         case 1:
 611             break;
 612         case 2:
 613         case 4:
 614         case 6:
 615             /* No texturing and scanout. */
 616             if (usage & (PIPE_BIND_SAMPLER_VIEW |
 617                          PIPE_BIND_DISPLAY_TARGET |
 618                          PIPE_BIND_SCANOUT)) {
 619                 return FALSE;
 620             }
 621
 622             desc = util_format_description(format);
 623
 624             if (is_r500) {
 625                 /* Only allow depth/stencil, RGBA8, RGBA1010102, RGBA16F. */
 626                 if (!util_format_is_depth_or_stencil(format) &&
 627                     !util_format_is_rgba8_variant(desc) &&
 628                     !util_format_is_rgba1010102_variant(desc) &&
 629                     format != PIPE_FORMAT_R16G16B16A16_FLOAT &&
 630                     format != PIPE_FORMAT_R16G16B16X16_FLOAT) {
 631                     return FALSE;
 632                 }
 633             } else {
 634                 /* Only allow depth/stencil, RGBA8. */
 635                 if (!util_format_is_depth_or_stencil(format) &&
 636                     !util_format_is_rgba8_variant(desc)) {
 637                     return FALSE;
 638                 }
 639             }
 640             break;
 641         default:
 642             return FALSE;
 643     }
 644
 645     /* Check sampler format support. */
 646     if ((usage & PIPE_BIND_SAMPLER_VIEW) &&
 647         /* these two are broken for an unknown reason */
 648         format != PIPE_FORMAT_R8G8B8X8_SNORM &&
 649         format != PIPE_FORMAT_R16G16B16X16_SNORM &&
 650         /* ATI1N is r5xx-only. */
 651         (is_r500 || !is_ati1n) &&
 652         /* ATI2N is supported on r4xx-r5xx. */
 653         (is_r400 || is_r500 || !is_ati2n) &&
 654         r300_is_sampler_format_supported(format)) {
 655         retval |= PIPE_BIND_SAMPLER_VIEW;
 656     }
 657
 658     /* Check colorbuffer format support. */
 659     if ((usage & (PIPE_BIND_RENDER_TARGET |
 660                   PIPE_BIND_DISPLAY_TARGET |
 661                   PIPE_BIND_SCANOUT |
 662                   PIPE_BIND_SHARED |
 663                   PIPE_BIND_BLENDABLE)) &&
 664         /* 2101010 cannot be rendered to on non-r5xx. */
 665         (!is_color2101010 || is_r500) &&
 666         r300_is_colorbuffer_format_supported(format)) {
 667         retval |= usage &
 668             (PIPE_BIND_RENDER_TARGET |
 669              PIPE_BIND_DISPLAY_TARGET |
 670              PIPE_BIND_SCANOUT |
 671              PIPE_BIND_SHARED);
 672
 673         if (r300_is_blending_supported(r300_screen(screen), format)) {
 674             retval |= usage & PIPE_BIND_BLENDABLE;
 675         }
 676     }
 677
 678     /* Check depth-stencil format support. */
 679     if (usage & PIPE_BIND_DEPTH_STENCIL &&
 680         r300_is_zs_format_supported(format)) {
 681         retval |= PIPE_BIND_DEPTH_STENCIL;
 682     }
 683
 684     /* Check vertex buffer format support. */
 685     if (usage & PIPE_BIND_VERTEX_BUFFER) {
 686         if (r300_screen(screen)->caps.has_tcl) {
 687             /* Half float is supported on >= R400. */
 688             if ((is_r400 || is_r500 || !is_half_float) &&
 689                 r300_translate_vertex_data_type(format) != R300_INVALID_FORMAT) {
 690                 retval |= PIPE_BIND_VERTEX_BUFFER;
 691             }
 692         } else {
 693             /* SW TCL */
 694             if (!util_format_is_pure_integer(format)) {
 695                 retval |= PIPE_BIND_VERTEX_BUFFER;
 696             }
 697         }
 698     }
 699
 700     return retval == usage;
 701 }
 702
 703 static void r300_destroy_screen(struct pipe_screen* pscreen)
 704 {
 705     struct r300_screen* r300screen = r300_screen(pscreen);
 706     struct radeon_winsys *rws = radeon_winsys(pscreen);
 707
 708     if (rws && !rws->unref(rws))
 709       return;
 710
 711     mtx_destroy(&r300screen->cmask_mutex);
 712     slab_destroy_parent(&r300screen->pool_transfers);
 713
 714     if (rws)
 715       rws->destroy(rws);
 716
 717     FREE(r300screen);
 718 }
 719
 720 static void r300_fence_reference(struct pipe_screen *screen,
 721                                  struct pipe_fence_handle **ptr,
 722                                  struct pipe_fence_handle *fence)
 723 {
 724     struct radeon_winsys *rws = r300_screen(screen)->rws;
 725
 726     rws->fence_reference(ptr, fence);
 727 }
 728
 729 static boolean r300_fence_finish(struct pipe_screen *screen,
 730                                  struct pipe_context *ctx,
 731                                  struct pipe_fence_handle *fence,
 732                                  uint64_t timeout)
 733 {
 734     struct radeon_winsys *rws = r300_screen(screen)->rws;
 735
 736     return rws->fence_wait(rws, fence, timeout);
 737 }
 738
 739 struct pipe_screen* r300_screen_create(struct radeon_winsys *rws,
 740                                        const struct pipe_screen_config *config)
 741 {
 742     struct r300_screen *r300screen = CALLOC_STRUCT(r300_screen);
 743
 744     if (!r300screen) {
 745         FREE(r300screen);
 746         return NULL;
 747     }
 748
 749     rws->query_info(rws, &r300screen->info);
 750
 751     r300_init_debug(r300screen);
 752     r300_parse_chipset(r300screen->info.pci_id, &r300screen->caps);
 753
 754     if (SCREEN_DBG_ON(r300screen, DBG_NO_ZMASK))
 755         r300screen->caps.zmask_ram = 0;
 756     if (SCREEN_DBG_ON(r300screen, DBG_NO_HIZ))
 757         r300screen->caps.hiz_ram = 0;
 758
 759     r300screen->rws = rws;
 760     r300screen->screen.destroy = r300_destroy_screen;
 761     r300screen->screen.get_name = r300_get_name;
 762     r300screen->screen.get_vendor = r300_get_vendor;
 763     r300screen->screen.get_device_vendor = r300_get_device_vendor;
 764     r300screen->screen.get_param = r300_get_param;
 765     r300screen->screen.get_shader_param = r300_get_shader_param;
 766     r300screen->screen.get_paramf = r300_get_paramf;
 767     r300screen->screen.get_video_param = r300_get_video_param;
 768     r300screen->screen.is_format_supported = r300_is_format_supported;
 769     r300screen->screen.is_video_format_supported = vl_video_buffer_is_format_supported;
 770     r300screen->screen.context_create = r300_create_context;
 771     r300screen->screen.fence_reference = r300_fence_reference;
 772     r300screen->screen.fence_finish = r300_fence_finish;
 773
 774     r300_init_screen_resource_functions(r300screen);
 775
 776     slab_create_parent(&r300screen->pool_transfers, sizeof(struct pipe_transfer), 64);
 777
 778     (void) mtx_init(&r300screen->cmask_mutex, mtx_plain);
 779
 780     return &r300screen->screen;
 781 }