src/gallium/drivers/r300/r300_screen.c

   1 /*
   2  * Copyright 2008 Corbin Simpson <MostAwesomeDude@gmail.com>
   3  * Copyright 2010 Marek Olšák <maraeo@gmail.com>
   4  *
   5  * Permission is hereby granted, free of charge, to any person obtaining a
   6  * copy of this software and associated documentation files (the "Software"),
   7  * to deal in the Software without restriction, including without limitation
   8  * on the rights to use, copy, modify, merge, publish, distribute, sub
   9  * license, and/or sell copies of the Software, and to permit persons to whom
  10  * the Software is furnished to do so, subject to the following conditions:
  11  *
  12  * The above copyright notice and this permission notice (including the next
  13  * paragraph) shall be included in all copies or substantial portions of the
  14  * Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  19  * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
  20  * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
  21  * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
  22  * USE OR OTHER DEALINGS IN THE SOFTWARE. */
  23
  24 #include "util/u_format.h"
  25 #include "util/u_format_s3tc.h"
  26 #include "util/u_memory.h"
  27 #include "os/os_time.h"
  28 #include "vl/vl_decoder.h"
  29 #include "vl/vl_video_buffer.h"
  30
  31 #include "r300_context.h"
  32 #include "r300_texture.h"
  33 #include "r300_screen_buffer.h"
  34 #include "r300_state_inlines.h"
  35 #include "r300_public.h"
  36
  37 #include "draw/draw_context.h"
  38
  39 /* Return the identifier behind whom the brave coders responsible for this
  40  * amalgamation of code, sweat, and duct tape, routinely obscure their names.
  41  *
  42  * ...I should have just put "Corbin Simpson", but I'm not that cool.
  43  *
  44  * (Or egotistical. Yet.) */
  45 static const char* r300_get_vendor(struct pipe_screen* pscreen)
  46 {
  47     return "X.Org R300 Project";
  48 }
  49
  50 static const char* chip_families[] = {
  51     "unknown",
  52     "ATI R300",
  53     "ATI R350",
  54     "ATI RV350",
  55     "ATI RV370",
  56     "ATI RV380",
  57     "ATI RS400",
  58     "ATI RC410",
  59     "ATI RS480",
  60     "ATI R420",
  61     "ATI R423",
  62     "ATI R430",
  63     "ATI R480",
  64     "ATI R481",
  65     "ATI RV410",
  66     "ATI RS600",
  67     "ATI RS690",
  68     "ATI RS740",
  69     "ATI RV515",
  70     "ATI R520",
  71     "ATI RV530",
  72     "ATI R580",
  73     "ATI RV560",
  74     "ATI RV570"
  75 };
  76
  77 static const char* r300_get_name(struct pipe_screen* pscreen)
  78 {
  79     struct r300_screen* r300screen = r300_screen(pscreen);
  80
  81     return chip_families[r300screen->caps.family];
  82 }
  83
  84 static int r300_get_param(struct pipe_screen* pscreen, enum pipe_cap param)
  85 {
  86     struct r300_screen* r300screen = r300_screen(pscreen);
  87     boolean is_r500 = r300screen->caps.is_r500;
  88
  89     switch (param) {
  90         /* Supported features (boolean caps). */
  91         case PIPE_CAP_NPOT_TEXTURES:
  92         case PIPE_CAP_TWO_SIDED_STENCIL:
  93         case PIPE_CAP_ANISOTROPIC_FILTER:
  94         case PIPE_CAP_POINT_SPRITE:
  95         case PIPE_CAP_OCCLUSION_QUERY:
  96         case PIPE_CAP_TEXTURE_SHADOW_MAP:
  97         case PIPE_CAP_TEXTURE_MIRROR_CLAMP:
  98         case PIPE_CAP_BLEND_EQUATION_SEPARATE:
  99         case PIPE_CAP_VERTEX_ELEMENT_INSTANCE_DIVISOR:
 100         case PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT:
 101         case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER:
 102         case PIPE_CAP_CONDITIONAL_RENDER:
 103         case PIPE_CAP_TEXTURE_BARRIER:
 104         case PIPE_CAP_TGSI_CAN_COMPACT_CONSTANTS:
 105         case PIPE_CAP_USER_INDEX_BUFFERS:
 106         case PIPE_CAP_USER_CONSTANT_BUFFERS:
 107         case PIPE_CAP_PREFER_BLIT_BASED_TEXTURE_TRANSFER:
 108             return 1;
 109
 110         case PIPE_CAP_MIN_MAP_BUFFER_ALIGNMENT:
 111             return R300_BUFFER_ALIGNMENT;
 112
 113         case PIPE_CAP_CONSTANT_BUFFER_OFFSET_ALIGNMENT:
 114             return 16;
 115
 116         case PIPE_CAP_GLSL_FEATURE_LEVEL:
 117             return 120;
 118
 119         /* r300 cannot do swizzling of compressed textures. Supported otherwise. */
 120         case PIPE_CAP_TEXTURE_SWIZZLE:
 121             return util_format_s3tc_enabled ? r300screen->caps.dxtc_swizzle : 1;
 122
 123         /* We don't support color clamping on r500, so that we can use color
 124          * intepolators for generic varyings. */
 125         case PIPE_CAP_VERTEX_COLOR_CLAMPED:
 126             return !is_r500;
 127
 128         /* Supported on r500 only. */
 129         case PIPE_CAP_VERTEX_COLOR_UNCLAMPED:
 130         case PIPE_CAP_MIXED_COLORBUFFER_FORMATS:
 131         case PIPE_CAP_SM3:
 132             return is_r500 ? 1 : 0;
 133
 134         /* Unsupported features. */
 135         case PIPE_CAP_QUERY_TIME_ELAPSED:
 136         case PIPE_CAP_QUERY_PIPELINE_STATISTICS:
 137         case PIPE_CAP_MAX_DUAL_SOURCE_RENDER_TARGETS:
 138         case PIPE_CAP_INDEP_BLEND_ENABLE:
 139         case PIPE_CAP_INDEP_BLEND_FUNC:
 140         case PIPE_CAP_DEPTH_CLIP_DISABLE:
 141         case PIPE_CAP_SHADER_STENCIL_EXPORT:
 142         case PIPE_CAP_MAX_TEXTURE_ARRAY_LAYERS:
 143         case PIPE_CAP_TGSI_INSTANCEID:
 144         case PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT:
 145         case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER:
 146         case PIPE_CAP_SEAMLESS_CUBE_MAP:
 147         case PIPE_CAP_SEAMLESS_CUBE_MAP_PER_TEXTURE:
 148         case PIPE_CAP_SCALED_RESOLVE:
 149         case PIPE_CAP_MIN_TEXEL_OFFSET:
 150         case PIPE_CAP_MAX_TEXEL_OFFSET:
 151         case PIPE_CAP_MAX_STREAM_OUTPUT_BUFFERS:
 152         case PIPE_CAP_MAX_STREAM_OUTPUT_SEPARATE_COMPONENTS:
 153         case PIPE_CAP_MAX_STREAM_OUTPUT_INTERLEAVED_COMPONENTS:
 154         case PIPE_CAP_STREAM_OUTPUT_PAUSE_RESUME:
 155         case PIPE_CAP_FRAGMENT_COLOR_CLAMPED:
 156         case PIPE_CAP_QUADS_FOLLOW_PROVOKING_VERTEX_CONVENTION:
 157         case PIPE_CAP_COMPUTE:
 158         case PIPE_CAP_START_INSTANCE:
 159         case PIPE_CAP_QUERY_TIMESTAMP:
 160         case PIPE_CAP_TEXTURE_MULTISAMPLE:
 161         case PIPE_CAP_CUBE_MAP_ARRAY:
 162         case PIPE_CAP_TEXTURE_BUFFER_OBJECTS:
 163         case PIPE_CAP_TEXTURE_BUFFER_OFFSET_ALIGNMENT:
 164         case PIPE_CAP_TEXTURE_BORDER_COLOR_QUIRK:
 165         case PIPE_CAP_MAX_TEXTURE_BUFFER_SIZE:
 166             return 0;
 167
 168         /* SWTCL-only features. */
 169         case PIPE_CAP_PRIMITIVE_RESTART:
 170         case PIPE_CAP_USER_VERTEX_BUFFERS:
 171             return !r300screen->caps.has_tcl;
 172
 173         /* HWTCL-only features / limitations. */
 174         case PIPE_CAP_VERTEX_BUFFER_OFFSET_4BYTE_ALIGNED_ONLY:
 175         case PIPE_CAP_VERTEX_BUFFER_STRIDE_4BYTE_ALIGNED_ONLY:
 176         case PIPE_CAP_VERTEX_ELEMENT_SRC_OFFSET_4BYTE_ALIGNED_ONLY:
 177             return r300screen->caps.has_tcl;
 178         case PIPE_CAP_TGSI_TEXCOORD:
 179             return 0;
 180
 181         /* Texturing. */
 182         case PIPE_CAP_MAX_COMBINED_SAMPLERS:
 183             return r300screen->caps.num_tex_units;
 184         case PIPE_CAP_MAX_TEXTURE_2D_LEVELS:
 185         case PIPE_CAP_MAX_TEXTURE_3D_LEVELS:
 186         case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS:
 187             /* 13 == 4096, 12 == 2048 */
 188             return is_r500 ? 13 : 12;
 189
 190         /* Render targets. */
 191         case PIPE_CAP_MAX_RENDER_TARGETS:
 192             return 4;
 193         case PIPE_CAP_ENDIANNESS:
 194             return PIPE_ENDIAN_LITTLE;
 195     }
 196     return 0;
 197 }
 198
 199 static int r300_get_shader_param(struct pipe_screen *pscreen, unsigned shader, enum pipe_shader_cap param)
 200 {
 201    struct r300_screen* r300screen = r300_screen(pscreen);
 202    boolean is_r400 = r300screen->caps.is_r400;
 203    boolean is_r500 = r300screen->caps.is_r500;
 204
 205    switch (shader) {
 206     case PIPE_SHADER_FRAGMENT:
 207         switch (param)
 208         {
 209         case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
 210             return is_r500 || is_r400 ? 512 : 96;
 211         case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
 212             return is_r500 || is_r400 ? 512 : 64;
 213         case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
 214             return is_r500 || is_r400 ? 512 : 32;
 215         case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
 216             return is_r500 ? 511 : 4;
 217         case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:
 218             return is_r500 ? 64 : 0; /* Actually unlimited on r500. */
 219             /* Fragment shader limits. */
 220         case PIPE_SHADER_CAP_MAX_INPUTS:
 221             /* 2 colors + 8 texcoords are always supported
 222              * (minus fog and wpos).
 223              *
 224              * R500 has the ability to turn 3rd and 4th color into
 225              * additional texcoords but there is no two-sided color
 226              * selection then. However the facing bit can be used instead. */
 227             return 10;
 228         case PIPE_SHADER_CAP_MAX_CONSTS:
 229             return is_r500 ? 256 : 32;
 230         case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
 231             return 1;
 232         case PIPE_SHADER_CAP_MAX_TEMPS:
 233             return is_r500 ? 128 : is_r400 ? 64 : 32;
 234         case PIPE_SHADER_CAP_MAX_PREDS:
 235             return is_r500 ? 1 : 0;
 236         case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
 237            return r300screen->caps.num_tex_units;
 238         case PIPE_SHADER_CAP_MAX_ADDRS:
 239         case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
 240         case PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED:
 241         case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
 242         case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
 243         case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
 244         case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
 245         case PIPE_SHADER_CAP_SUBROUTINES:
 246         case PIPE_SHADER_CAP_INTEGERS:
 247             return 0;
 248         case PIPE_SHADER_CAP_PREFERRED_IR:
 249             return PIPE_SHADER_IR_TGSI;
 250         }
 251         break;
 252     case PIPE_SHADER_VERTEX:
 253         switch (param)
 254         {
 255         case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
 256         case PIPE_SHADER_CAP_SUBROUTINES:
 257             return 0;
 258         default:;
 259         }
 260
 261         if (!r300screen->caps.has_tcl) {
 262             return draw_get_shader_param(shader, param);
 263         }
 264
 265         switch (param)
 266         {
 267         case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
 268         case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
 269             return is_r500 ? 1024 : 256;
 270         case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:
 271             return is_r500 ? 4 : 0; /* For loops; not sure about conditionals. */
 272         case PIPE_SHADER_CAP_MAX_INPUTS:
 273             return 16;
 274         case PIPE_SHADER_CAP_MAX_CONSTS:
 275             return 256;
 276         case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
 277             return 1;
 278         case PIPE_SHADER_CAP_MAX_TEMPS:
 279             return 32;
 280         case PIPE_SHADER_CAP_MAX_ADDRS:
 281             return 1; /* XXX guessed */
 282         case PIPE_SHADER_CAP_MAX_PREDS:
 283             return is_r500 ? 4 : 0; /* XXX guessed. */
 284         case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
 285             return 1;
 286         case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
 287         case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
 288         case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
 289         case PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED:
 290         case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
 291         case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
 292         case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
 293         case PIPE_SHADER_CAP_SUBROUTINES:
 294         case PIPE_SHADER_CAP_INTEGERS:
 295         case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
 296             return 0;
 297         case PIPE_SHADER_CAP_PREFERRED_IR:
 298             return PIPE_SHADER_IR_TGSI;
 299         }
 300         break;
 301     }
 302     return 0;
 303 }
 304
 305 static float r300_get_paramf(struct pipe_screen* pscreen,
 306                              enum pipe_capf param)
 307 {
 308     struct r300_screen* r300screen = r300_screen(pscreen);
 309
 310     switch (param) {
 311         case PIPE_CAPF_MAX_LINE_WIDTH:
 312         case PIPE_CAPF_MAX_LINE_WIDTH_AA:
 313         case PIPE_CAPF_MAX_POINT_WIDTH:
 314         case PIPE_CAPF_MAX_POINT_WIDTH_AA:
 315             /* The maximum dimensions of the colorbuffer are our practical
 316              * rendering limits. 2048 pixels should be enough for anybody. */
 317             if (r300screen->caps.is_r500) {
 318                 return 4096.0f;
 319             } else if (r300screen->caps.is_r400) {
 320                 return 4021.0f;
 321             } else {
 322                 return 2560.0f;
 323             }
 324         case PIPE_CAPF_MAX_TEXTURE_ANISOTROPY:
 325             return 16.0f;
 326         case PIPE_CAPF_MAX_TEXTURE_LOD_BIAS:
 327             return 16.0f;
 328         case PIPE_CAPF_GUARD_BAND_LEFT:
 329         case PIPE_CAPF_GUARD_BAND_TOP:
 330         case PIPE_CAPF_GUARD_BAND_RIGHT:
 331         case PIPE_CAPF_GUARD_BAND_BOTTOM:
 332             /* XXX I don't know what these should be but the least we can do is
 333              * silence the potential error message */
 334             return 0.0f;
 335         default:
 336             debug_printf("r300: Warning: Unknown CAP %d in get_paramf.\n",
 337                          param);
 338             return 0.0f;
 339     }
 340 }
 341
 342 static int r300_get_video_param(struct pipe_screen *screen,
 343                                 enum pipe_video_profile profile,
 344                                 enum pipe_video_entrypoint entrypoint,
 345                                 enum pipe_video_cap param)
 346 {
 347    switch (param) {
 348       case PIPE_VIDEO_CAP_SUPPORTED:
 349          return vl_profile_supported(screen, profile, entrypoint);
 350       case PIPE_VIDEO_CAP_NPOT_TEXTURES:
 351          return 0;
 352       case PIPE_VIDEO_CAP_MAX_WIDTH:
 353       case PIPE_VIDEO_CAP_MAX_HEIGHT:
 354          return vl_video_buffer_max_size(screen);
 355       case PIPE_VIDEO_CAP_PREFERED_FORMAT:
 356          return PIPE_FORMAT_NV12;
 357       case PIPE_VIDEO_CAP_PREFERS_INTERLACED:
 358          return false;
 359       case PIPE_VIDEO_CAP_SUPPORTS_INTERLACED:
 360          return false;
 361       case PIPE_VIDEO_CAP_SUPPORTS_PROGRESSIVE:
 362          return true;
 363       case PIPE_VIDEO_CAP_MAX_LEVEL:
 364          return vl_level_supported(screen, profile);
 365       default:
 366          return 0;
 367    }
 368 }
 369
 370 /**
 371  * Whether the format matches:
 372  *   PIPE_FORMAT_?10?10?10?2_UNORM
 373  */
 374 static INLINE boolean
 375 util_format_is_rgba1010102_variant(const struct util_format_description *desc)
 376 {
 377    static const unsigned size[4] = {10, 10, 10, 2};
 378    unsigned chan;
 379
 380    if (desc->block.width != 1 ||
 381        desc->block.height != 1 ||
 382        desc->block.bits != 32)
 383       return FALSE;
 384
 385    for (chan = 0; chan < 4; ++chan) {
 386       if(desc->channel[chan].type != UTIL_FORMAT_TYPE_UNSIGNED &&
 387          desc->channel[chan].type != UTIL_FORMAT_TYPE_VOID)
 388          return FALSE;
 389       if (desc->channel[chan].size != size[chan])
 390          return FALSE;
 391    }
 392
 393    return TRUE;
 394 }
 395
 396 static boolean r300_is_format_supported(struct pipe_screen* screen,
 397                                         enum pipe_format format,
 398                                         enum pipe_texture_target target,
 399                                         unsigned sample_count,
 400                                         unsigned usage)
 401 {
 402     uint32_t retval = 0;
 403     boolean drm_2_8_0 = r300_screen(screen)->info.drm_minor >= 8;
 404     boolean is_r500 = r300_screen(screen)->caps.is_r500;
 405     boolean is_r400 = r300_screen(screen)->caps.is_r400;
 406     boolean is_color2101010 = format == PIPE_FORMAT_R10G10B10A2_UNORM ||
 407                               format == PIPE_FORMAT_R10G10B10X2_SNORM ||
 408                               format == PIPE_FORMAT_B10G10R10A2_UNORM ||
 409                               format == PIPE_FORMAT_R10SG10SB10SA2U_NORM;
 410     boolean is_ati1n = format == PIPE_FORMAT_RGTC1_UNORM ||
 411                        format == PIPE_FORMAT_RGTC1_SNORM ||
 412                        format == PIPE_FORMAT_LATC1_UNORM ||
 413                        format == PIPE_FORMAT_LATC1_SNORM;
 414     boolean is_ati2n = format == PIPE_FORMAT_RGTC2_UNORM ||
 415                        format == PIPE_FORMAT_RGTC2_SNORM ||
 416                        format == PIPE_FORMAT_LATC2_UNORM ||
 417                        format == PIPE_FORMAT_LATC2_SNORM;
 418     boolean is_x16f_xy16f = format == PIPE_FORMAT_R16_FLOAT ||
 419                             format == PIPE_FORMAT_R16G16_FLOAT ||
 420                             format == PIPE_FORMAT_A16_FLOAT ||
 421                             format == PIPE_FORMAT_L16_FLOAT ||
 422                             format == PIPE_FORMAT_L16A16_FLOAT ||
 423                             format == PIPE_FORMAT_R16A16_FLOAT ||
 424                             format == PIPE_FORMAT_I16_FLOAT;
 425     boolean is_half_float = format == PIPE_FORMAT_R16_FLOAT ||
 426                             format == PIPE_FORMAT_R16G16_FLOAT ||
 427                             format == PIPE_FORMAT_R16G16B16_FLOAT ||
 428                             format == PIPE_FORMAT_R16G16B16A16_FLOAT ||
 429                             format == PIPE_FORMAT_R16G16B16X16_FLOAT;
 430     const struct util_format_description *desc;
 431
 432     if (!util_format_is_supported(format, usage))
 433        return FALSE;
 434
 435     /* Check multisampling support. */
 436     switch (sample_count) {
 437         case 0:
 438         case 1:
 439             break;
 440         case 2:
 441         case 4:
 442         case 6:
 443             /* We need DRM 2.8.0. */
 444             if (!drm_2_8_0) {
 445                 return FALSE;
 446             }
 447             /* Only support R500, because I didn't test older chipsets,
 448              * but MSAA should work there too. */
 449             if (!is_r500 && !debug_get_bool_option("RADEON_MSAA", FALSE)) {
 450                 return FALSE;
 451             }
 452             /* No texturing and scanout. */
 453             if (usage & (PIPE_BIND_SAMPLER_VIEW |
 454                          PIPE_BIND_DISPLAY_TARGET |
 455                          PIPE_BIND_SCANOUT)) {
 456                 return FALSE;
 457             }
 458
 459             desc = util_format_description(format);
 460
 461             if (is_r500) {
 462                 /* Only allow depth/stencil, RGBA8, RGBA1010102, RGBA16F. */
 463                 if (!util_format_is_depth_or_stencil(format) &&
 464                     !util_format_is_rgba8_variant(desc) &&
 465                     !util_format_is_rgba1010102_variant(desc) &&
 466                     format != PIPE_FORMAT_R16G16B16A16_FLOAT &&
 467                     format != PIPE_FORMAT_R16G16B16X16_FLOAT) {
 468                     return FALSE;
 469                 }
 470             } else {
 471                 /* Only allow depth/stencil, RGBA8. */
 472                 if (!util_format_is_depth_or_stencil(format) &&
 473                     !util_format_is_rgba8_variant(desc)) {
 474                     return FALSE;
 475                 }
 476             }
 477             break;
 478         default:
 479             return FALSE;
 480     }
 481
 482     /* Check sampler format support. */
 483     if ((usage & PIPE_BIND_SAMPLER_VIEW) &&
 484         /* these two are broken for an unknown reason */
 485         format != PIPE_FORMAT_R8G8B8X8_SNORM &&
 486         format != PIPE_FORMAT_R16G16B16X16_SNORM &&
 487         /* ATI1N is r5xx-only. */
 488         (is_r500 || !is_ati1n) &&
 489         /* ATI2N is supported on r4xx-r5xx. */
 490         (is_r400 || is_r500 || !is_ati2n) &&
 491         /* R16F and RG16F texture support was added in as late as DRM 2.8.0 */
 492         (drm_2_8_0 || !is_x16f_xy16f) &&
 493         r300_is_sampler_format_supported(format)) {
 494         retval |= PIPE_BIND_SAMPLER_VIEW;
 495     }
 496
 497     /* Check colorbuffer format support. */
 498     if ((usage & (PIPE_BIND_RENDER_TARGET |
 499                   PIPE_BIND_DISPLAY_TARGET |
 500                   PIPE_BIND_SCANOUT |
 501                   PIPE_BIND_SHARED)) &&
 502         /* 2101010 cannot be rendered to on non-r5xx. */
 503         (!is_color2101010 || (is_r500 && drm_2_8_0)) &&
 504         r300_is_colorbuffer_format_supported(format)) {
 505         retval |= usage &
 506             (PIPE_BIND_RENDER_TARGET |
 507              PIPE_BIND_DISPLAY_TARGET |
 508              PIPE_BIND_SCANOUT |
 509              PIPE_BIND_SHARED);
 510     }
 511
 512     /* Check depth-stencil format support. */
 513     if (usage & PIPE_BIND_DEPTH_STENCIL &&
 514         r300_is_zs_format_supported(format)) {
 515         retval |= PIPE_BIND_DEPTH_STENCIL;
 516     }
 517
 518     /* Check vertex buffer format support. */
 519     if (usage & PIPE_BIND_VERTEX_BUFFER) {
 520         if (r300_screen(screen)->caps.has_tcl) {
 521             /* Half float is supported on >= R400. */
 522             if ((is_r400 || is_r500 || !is_half_float) &&
 523                 r300_translate_vertex_data_type(format) != R300_INVALID_FORMAT) {
 524                 retval |= PIPE_BIND_VERTEX_BUFFER;
 525             }
 526         } else {
 527             /* SW TCL */
 528             if (!util_format_is_pure_integer(format)) {
 529                 retval |= PIPE_BIND_VERTEX_BUFFER;
 530             }
 531         }
 532     }
 533
 534     /* Transfers are always supported. */
 535     if (usage & PIPE_BIND_TRANSFER_READ)
 536         retval |= PIPE_BIND_TRANSFER_READ;
 537     if (usage & PIPE_BIND_TRANSFER_WRITE)
 538         retval |= PIPE_BIND_TRANSFER_WRITE;
 539
 540     return retval == usage;
 541 }
 542
 543 static void r300_destroy_screen(struct pipe_screen* pscreen)
 544 {
 545     struct r300_screen* r300screen = r300_screen(pscreen);
 546     struct radeon_winsys *rws = radeon_winsys(pscreen);
 547
 548     pipe_mutex_destroy(r300screen->cmask_mutex);
 549
 550     if (rws)
 551       rws->destroy(rws);
 552
 553     FREE(r300screen);
 554 }
 555
 556 static void r300_fence_reference(struct pipe_screen *screen,
 557                                  struct pipe_fence_handle **ptr,
 558                                  struct pipe_fence_handle *fence)
 559 {
 560     pb_reference((struct pb_buffer**)ptr,
 561                              (struct pb_buffer*)fence);
 562 }
 563
 564 static boolean r300_fence_signalled(struct pipe_screen *screen,
 565                                     struct pipe_fence_handle *fence)
 566 {
 567     struct radeon_winsys *rws = r300_screen(screen)->rws;
 568     struct pb_buffer *rfence = (struct pb_buffer*)fence;
 569
 570     return !rws->buffer_is_busy(rfence, RADEON_USAGE_READWRITE);
 571 }
 572
 573 static boolean r300_fence_finish(struct pipe_screen *screen,
 574                                  struct pipe_fence_handle *fence,
 575                                  uint64_t timeout)
 576 {
 577     struct radeon_winsys *rws = r300_screen(screen)->rws;
 578     struct pb_buffer *rfence = (struct pb_buffer*)fence;
 579
 580     if (timeout != PIPE_TIMEOUT_INFINITE) {
 581         int64_t start_time = os_time_get();
 582
 583         /* Convert to microseconds. */
 584         timeout /= 1000;
 585
 586         /* Wait in a loop. */
 587         while (rws->buffer_is_busy(rfence, RADEON_USAGE_READWRITE)) {
 588             if (os_time_get() - start_time >= timeout) {
 589                 return FALSE;
 590             }
 591             os_time_sleep(10);
 592         }
 593         return TRUE;
 594     }
 595
 596     rws->buffer_wait(rfence, RADEON_USAGE_READWRITE);
 597     return TRUE;
 598 }
 599
 600 struct pipe_screen* r300_screen_create(struct radeon_winsys *rws)
 601 {
 602     struct r300_screen *r300screen = CALLOC_STRUCT(r300_screen);
 603
 604     if (!r300screen) {
 605         FREE(r300screen);
 606         return NULL;
 607     }
 608
 609     rws->query_info(rws, &r300screen->info);
 610
 611     r300_init_debug(r300screen);
 612     r300_parse_chipset(r300screen->info.pci_id, &r300screen->caps);
 613
 614     if (SCREEN_DBG_ON(r300screen, DBG_NO_ZMASK))
 615         r300screen->caps.zmask_ram = 0;
 616     if (SCREEN_DBG_ON(r300screen, DBG_NO_HIZ))
 617         r300screen->caps.hiz_ram = 0;
 618
 619     if (r300screen->info.drm_minor < 8)
 620         r300screen->caps.has_us_format = FALSE;
 621
 622     r300screen->rws = rws;
 623     r300screen->screen.destroy = r300_destroy_screen;
 624     r300screen->screen.get_name = r300_get_name;
 625     r300screen->screen.get_vendor = r300_get_vendor;
 626     r300screen->screen.get_param = r300_get_param;
 627     r300screen->screen.get_shader_param = r300_get_shader_param;
 628     r300screen->screen.get_paramf = r300_get_paramf;
 629     r300screen->screen.get_video_param = r300_get_video_param;
 630     r300screen->screen.is_format_supported = r300_is_format_supported;
 631     r300screen->screen.is_video_format_supported = vl_video_buffer_is_format_supported;
 632     r300screen->screen.context_create = r300_create_context;
 633     r300screen->screen.fence_reference = r300_fence_reference;
 634     r300screen->screen.fence_signalled = r300_fence_signalled;
 635     r300screen->screen.fence_finish = r300_fence_finish;
 636
 637     r300_init_screen_resource_functions(r300screen);
 638
 639     util_format_s3tc_init();
 640     pipe_mutex_init(r300screen->cmask_mutex);
 641
 642     return &r300screen->screen;
 643 }