src/gallium/drivers/r300/r300_screen.c

   1 /*
   2  * Copyright 2008 Corbin Simpson <MostAwesomeDude@gmail.com>
   3  * Copyright 2010 Marek Olšák <maraeo@gmail.com>
   4  *
   5  * Permission is hereby granted, free of charge, to any person obtaining a
   6  * copy of this software and associated documentation files (the "Software"),
   7  * to deal in the Software without restriction, including without limitation
   8  * on the rights to use, copy, modify, merge, publish, distribute, sub
   9  * license, and/or sell copies of the Software, and to permit persons to whom
  10  * the Software is furnished to do so, subject to the following conditions:
  11  *
  12  * The above copyright notice and this permission notice (including the next
  13  * paragraph) shall be included in all copies or substantial portions of the
  14  * Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  19  * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
  20  * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
  21  * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
  22  * USE OR OTHER DEALINGS IN THE SOFTWARE. */
  23
  24 #include "util/u_format.h"
  25 #include "util/u_format_s3tc.h"
  26 #include "util/u_memory.h"
  27 #include "os/os_time.h"
  28 #include "vl/vl_decoder.h"
  29 #include "vl/vl_video_buffer.h"
  30
  31 #include "r300_context.h"
  32 #include "r300_texture.h"
  33 #include "r300_screen_buffer.h"
  34 #include "r300_state_inlines.h"
  35 #include "r300_public.h"
  36
  37 #include "draw/draw_context.h"
  38
  39 /* Return the identifier behind whom the brave coders responsible for this
  40  * amalgamation of code, sweat, and duct tape, routinely obscure their names.
  41  *
  42  * ...I should have just put "Corbin Simpson", but I'm not that cool.
  43  *
  44  * (Or egotistical. Yet.) */
  45 static const char* r300_get_vendor(struct pipe_screen* pscreen)
  46 {
  47     return "X.Org R300 Project";
  48 }
  49
  50 static const char* chip_families[] = {
  51     "unknown",
  52     "ATI R300",
  53     "ATI R350",
  54     "ATI RV350",
  55     "ATI RV370",
  56     "ATI RV380",
  57     "ATI RS400",
  58     "ATI RC410",
  59     "ATI RS480",
  60     "ATI R420",
  61     "ATI R423",
  62     "ATI R430",
  63     "ATI R480",
  64     "ATI R481",
  65     "ATI RV410",
  66     "ATI RS600",
  67     "ATI RS690",
  68     "ATI RS740",
  69     "ATI RV515",
  70     "ATI R520",
  71     "ATI RV530",
  72     "ATI R580",
  73     "ATI RV560",
  74     "ATI RV570"
  75 };
  76
  77 static const char* r300_get_name(struct pipe_screen* pscreen)
  78 {
  79     struct r300_screen* r300screen = r300_screen(pscreen);
  80
  81     return chip_families[r300screen->caps.family];
  82 }
  83
  84 static int r300_get_param(struct pipe_screen* pscreen, enum pipe_cap param)
  85 {
  86     struct r300_screen* r300screen = r300_screen(pscreen);
  87     boolean is_r500 = r300screen->caps.is_r500;
  88
  89     switch (param) {
  90         /* Supported features (boolean caps). */
  91         case PIPE_CAP_NPOT_TEXTURES:
  92         case PIPE_CAP_TWO_SIDED_STENCIL:
  93         case PIPE_CAP_ANISOTROPIC_FILTER:
  94         case PIPE_CAP_POINT_SPRITE:
  95         case PIPE_CAP_OCCLUSION_QUERY:
  96         case PIPE_CAP_TEXTURE_SHADOW_MAP:
  97         case PIPE_CAP_TEXTURE_MIRROR_CLAMP:
  98         case PIPE_CAP_BLEND_EQUATION_SEPARATE:
  99         case PIPE_CAP_VERTEX_ELEMENT_INSTANCE_DIVISOR:
 100         case PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT:
 101         case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER:
 102         case PIPE_CAP_CONDITIONAL_RENDER:
 103         case PIPE_CAP_TEXTURE_BARRIER:
 104         case PIPE_CAP_TGSI_CAN_COMPACT_CONSTANTS:
 105         case PIPE_CAP_USER_INDEX_BUFFERS:
 106         case PIPE_CAP_USER_CONSTANT_BUFFERS:
 107         case PIPE_CAP_PREFER_BLIT_BASED_TEXTURE_TRANSFER:
 108             return 1;
 109
 110         case PIPE_CAP_MIN_MAP_BUFFER_ALIGNMENT:
 111             return R300_BUFFER_ALIGNMENT;
 112
 113         case PIPE_CAP_CONSTANT_BUFFER_OFFSET_ALIGNMENT:
 114             return 16;
 115
 116         case PIPE_CAP_GLSL_FEATURE_LEVEL:
 117             return 120;
 118
 119         /* r300 cannot do swizzling of compressed textures. Supported otherwise. */
 120         case PIPE_CAP_TEXTURE_SWIZZLE:
 121             return util_format_s3tc_enabled ? r300screen->caps.dxtc_swizzle : 1;
 122
 123         /* We don't support color clamping on r500, so that we can use color
 124          * intepolators for generic varyings. */
 125         case PIPE_CAP_VERTEX_COLOR_CLAMPED:
 126             return !is_r500;
 127
 128         /* Supported on r500 only. */
 129         case PIPE_CAP_VERTEX_COLOR_UNCLAMPED:
 130         case PIPE_CAP_MIXED_COLORBUFFER_FORMATS:
 131         case PIPE_CAP_SM3:
 132             return is_r500 ? 1 : 0;
 133
 134         /* Unsupported features. */
 135         case PIPE_CAP_QUERY_TIME_ELAPSED:
 136         case PIPE_CAP_QUERY_PIPELINE_STATISTICS:
 137         case PIPE_CAP_MAX_DUAL_SOURCE_RENDER_TARGETS:
 138         case PIPE_CAP_INDEP_BLEND_ENABLE:
 139         case PIPE_CAP_INDEP_BLEND_FUNC:
 140         case PIPE_CAP_DEPTH_CLIP_DISABLE:
 141         case PIPE_CAP_SHADER_STENCIL_EXPORT:
 142         case PIPE_CAP_MAX_TEXTURE_ARRAY_LAYERS:
 143         case PIPE_CAP_TGSI_INSTANCEID:
 144         case PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT:
 145         case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER:
 146         case PIPE_CAP_SEAMLESS_CUBE_MAP:
 147         case PIPE_CAP_SEAMLESS_CUBE_MAP_PER_TEXTURE:
 148         case PIPE_CAP_SCALED_RESOLVE:
 149         case PIPE_CAP_MIN_TEXEL_OFFSET:
 150         case PIPE_CAP_MAX_TEXEL_OFFSET:
 151         case PIPE_CAP_MAX_STREAM_OUTPUT_BUFFERS:
 152         case PIPE_CAP_MAX_STREAM_OUTPUT_SEPARATE_COMPONENTS:
 153         case PIPE_CAP_MAX_STREAM_OUTPUT_INTERLEAVED_COMPONENTS:
 154         case PIPE_CAP_STREAM_OUTPUT_PAUSE_RESUME:
 155         case PIPE_CAP_FRAGMENT_COLOR_CLAMPED:
 156         case PIPE_CAP_QUADS_FOLLOW_PROVOKING_VERTEX_CONVENTION:
 157         case PIPE_CAP_COMPUTE:
 158         case PIPE_CAP_START_INSTANCE:
 159         case PIPE_CAP_QUERY_TIMESTAMP:
 160         case PIPE_CAP_TEXTURE_MULTISAMPLE:
 161         case PIPE_CAP_CUBE_MAP_ARRAY:
 162         case PIPE_CAP_TEXTURE_BUFFER_OBJECTS:
 163         case PIPE_CAP_TEXTURE_BUFFER_OFFSET_ALIGNMENT:
 164         case PIPE_CAP_TEXTURE_BORDER_COLOR_QUIRK:
 165         case PIPE_CAP_MAX_TEXTURE_BUFFER_SIZE:
 166             return 0;
 167
 168         /* SWTCL-only features. */
 169         case PIPE_CAP_PRIMITIVE_RESTART:
 170         case PIPE_CAP_USER_VERTEX_BUFFERS:
 171             return !r300screen->caps.has_tcl;
 172
 173         /* HWTCL-only features / limitations. */
 174         case PIPE_CAP_VERTEX_BUFFER_OFFSET_4BYTE_ALIGNED_ONLY:
 175         case PIPE_CAP_VERTEX_BUFFER_STRIDE_4BYTE_ALIGNED_ONLY:
 176         case PIPE_CAP_VERTEX_ELEMENT_SRC_OFFSET_4BYTE_ALIGNED_ONLY:
 177             return r300screen->caps.has_tcl;
 178         case PIPE_CAP_TGSI_TEXCOORD:
 179             return 0;
 180
 181         /* Texturing. */
 182         case PIPE_CAP_MAX_COMBINED_SAMPLERS:
 183             return r300screen->caps.num_tex_units;
 184         case PIPE_CAP_MAX_TEXTURE_2D_LEVELS:
 185         case PIPE_CAP_MAX_TEXTURE_3D_LEVELS:
 186         case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS:
 187             /* 13 == 4096, 12 == 2048 */
 188             return is_r500 ? 13 : 12;
 189
 190         /* Render targets. */
 191         case PIPE_CAP_MAX_RENDER_TARGETS:
 192             return 4;
 193         case PIPE_CAP_ENDIANNESS:
 194             return PIPE_ENDIAN_LITTLE;
 195
 196         case PIPE_CAP_MAX_VIEWPORTS:
 197             return 1;
 198     }
 199     return 0;
 200 }
 201
 202 static int r300_get_shader_param(struct pipe_screen *pscreen, unsigned shader, enum pipe_shader_cap param)
 203 {
 204    struct r300_screen* r300screen = r300_screen(pscreen);
 205    boolean is_r400 = r300screen->caps.is_r400;
 206    boolean is_r500 = r300screen->caps.is_r500;
 207
 208    switch (shader) {
 209     case PIPE_SHADER_FRAGMENT:
 210         switch (param)
 211         {
 212         case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
 213             return is_r500 || is_r400 ? 512 : 96;
 214         case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
 215             return is_r500 || is_r400 ? 512 : 64;
 216         case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
 217             return is_r500 || is_r400 ? 512 : 32;
 218         case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
 219             return is_r500 ? 511 : 4;
 220         case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:
 221             return is_r500 ? 64 : 0; /* Actually unlimited on r500. */
 222             /* Fragment shader limits. */
 223         case PIPE_SHADER_CAP_MAX_INPUTS:
 224             /* 2 colors + 8 texcoords are always supported
 225              * (minus fog and wpos).
 226              *
 227              * R500 has the ability to turn 3rd and 4th color into
 228              * additional texcoords but there is no two-sided color
 229              * selection then. However the facing bit can be used instead. */
 230             return 10;
 231         case PIPE_SHADER_CAP_MAX_CONSTS:
 232             return is_r500 ? 256 : 32;
 233         case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
 234             return 1;
 235         case PIPE_SHADER_CAP_MAX_TEMPS:
 236             return is_r500 ? 128 : is_r400 ? 64 : 32;
 237         case PIPE_SHADER_CAP_MAX_PREDS:
 238             return is_r500 ? 1 : 0;
 239         case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
 240            return r300screen->caps.num_tex_units;
 241         case PIPE_SHADER_CAP_MAX_ADDRS:
 242         case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
 243         case PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED:
 244         case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
 245         case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
 246         case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
 247         case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
 248         case PIPE_SHADER_CAP_SUBROUTINES:
 249         case PIPE_SHADER_CAP_INTEGERS:
 250             return 0;
 251         case PIPE_SHADER_CAP_PREFERRED_IR:
 252             return PIPE_SHADER_IR_TGSI;
 253         }
 254         break;
 255     case PIPE_SHADER_VERTEX:
 256         switch (param)
 257         {
 258         case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
 259         case PIPE_SHADER_CAP_SUBROUTINES:
 260             return 0;
 261         default:;
 262         }
 263
 264         if (!r300screen->caps.has_tcl) {
 265             return draw_get_shader_param(shader, param);
 266         }
 267
 268         switch (param)
 269         {
 270         case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
 271         case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
 272             return is_r500 ? 1024 : 256;
 273         case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:
 274             return is_r500 ? 4 : 0; /* For loops; not sure about conditionals. */
 275         case PIPE_SHADER_CAP_MAX_INPUTS:
 276             return 16;
 277         case PIPE_SHADER_CAP_MAX_CONSTS:
 278             return 256;
 279         case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
 280             return 1;
 281         case PIPE_SHADER_CAP_MAX_TEMPS:
 282             return 32;
 283         case PIPE_SHADER_CAP_MAX_ADDRS:
 284             return 1; /* XXX guessed */
 285         case PIPE_SHADER_CAP_MAX_PREDS:
 286             return is_r500 ? 4 : 0; /* XXX guessed. */
 287         case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
 288             return 1;
 289         case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
 290         case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
 291         case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
 292         case PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED:
 293         case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
 294         case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
 295         case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
 296         case PIPE_SHADER_CAP_SUBROUTINES:
 297         case PIPE_SHADER_CAP_INTEGERS:
 298         case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
 299             return 0;
 300         case PIPE_SHADER_CAP_PREFERRED_IR:
 301             return PIPE_SHADER_IR_TGSI;
 302         }
 303         break;
 304     }
 305     return 0;
 306 }
 307
 308 static float r300_get_paramf(struct pipe_screen* pscreen,
 309                              enum pipe_capf param)
 310 {
 311     struct r300_screen* r300screen = r300_screen(pscreen);
 312
 313     switch (param) {
 314         case PIPE_CAPF_MAX_LINE_WIDTH:
 315         case PIPE_CAPF_MAX_LINE_WIDTH_AA:
 316         case PIPE_CAPF_MAX_POINT_WIDTH:
 317         case PIPE_CAPF_MAX_POINT_WIDTH_AA:
 318             /* The maximum dimensions of the colorbuffer are our practical
 319              * rendering limits. 2048 pixels should be enough for anybody. */
 320             if (r300screen->caps.is_r500) {
 321                 return 4096.0f;
 322             } else if (r300screen->caps.is_r400) {
 323                 return 4021.0f;
 324             } else {
 325                 return 2560.0f;
 326             }
 327         case PIPE_CAPF_MAX_TEXTURE_ANISOTROPY:
 328             return 16.0f;
 329         case PIPE_CAPF_MAX_TEXTURE_LOD_BIAS:
 330             return 16.0f;
 331         case PIPE_CAPF_GUARD_BAND_LEFT:
 332         case PIPE_CAPF_GUARD_BAND_TOP:
 333         case PIPE_CAPF_GUARD_BAND_RIGHT:
 334         case PIPE_CAPF_GUARD_BAND_BOTTOM:
 335             /* XXX I don't know what these should be but the least we can do is
 336              * silence the potential error message */
 337             return 0.0f;
 338         default:
 339             debug_printf("r300: Warning: Unknown CAP %d in get_paramf.\n",
 340                          param);
 341             return 0.0f;
 342     }
 343 }
 344
 345 static int r300_get_video_param(struct pipe_screen *screen,
 346                                 enum pipe_video_profile profile,
 347                                 enum pipe_video_entrypoint entrypoint,
 348                                 enum pipe_video_cap param)
 349 {
 350    switch (param) {
 351       case PIPE_VIDEO_CAP_SUPPORTED:
 352          return vl_profile_supported(screen, profile, entrypoint);
 353       case PIPE_VIDEO_CAP_NPOT_TEXTURES:
 354          return 0;
 355       case PIPE_VIDEO_CAP_MAX_WIDTH:
 356       case PIPE_VIDEO_CAP_MAX_HEIGHT:
 357          return vl_video_buffer_max_size(screen);
 358       case PIPE_VIDEO_CAP_PREFERED_FORMAT:
 359          return PIPE_FORMAT_NV12;
 360       case PIPE_VIDEO_CAP_PREFERS_INTERLACED:
 361          return false;
 362       case PIPE_VIDEO_CAP_SUPPORTS_INTERLACED:
 363          return false;
 364       case PIPE_VIDEO_CAP_SUPPORTS_PROGRESSIVE:
 365          return true;
 366       case PIPE_VIDEO_CAP_MAX_LEVEL:
 367          return vl_level_supported(screen, profile);
 368       default:
 369          return 0;
 370    }
 371 }
 372
 373 /**
 374  * Whether the format matches:
 375  *   PIPE_FORMAT_?10?10?10?2_UNORM
 376  */
 377 static INLINE boolean
 378 util_format_is_rgba1010102_variant(const struct util_format_description *desc)
 379 {
 380    static const unsigned size[4] = {10, 10, 10, 2};
 381    unsigned chan;
 382
 383    if (desc->block.width != 1 ||
 384        desc->block.height != 1 ||
 385        desc->block.bits != 32)
 386       return FALSE;
 387
 388    for (chan = 0; chan < 4; ++chan) {
 389       if(desc->channel[chan].type != UTIL_FORMAT_TYPE_UNSIGNED &&
 390          desc->channel[chan].type != UTIL_FORMAT_TYPE_VOID)
 391          return FALSE;
 392       if (desc->channel[chan].size != size[chan])
 393          return FALSE;
 394    }
 395
 396    return TRUE;
 397 }
 398
 399 static boolean r300_is_format_supported(struct pipe_screen* screen,
 400                                         enum pipe_format format,
 401                                         enum pipe_texture_target target,
 402                                         unsigned sample_count,
 403                                         unsigned usage)
 404 {
 405     uint32_t retval = 0;
 406     boolean drm_2_8_0 = r300_screen(screen)->info.drm_minor >= 8;
 407     boolean is_r500 = r300_screen(screen)->caps.is_r500;
 408     boolean is_r400 = r300_screen(screen)->caps.is_r400;
 409     boolean is_color2101010 = format == PIPE_FORMAT_R10G10B10A2_UNORM ||
 410                               format == PIPE_FORMAT_R10G10B10X2_SNORM ||
 411                               format == PIPE_FORMAT_B10G10R10A2_UNORM ||
 412                               format == PIPE_FORMAT_R10SG10SB10SA2U_NORM;
 413     boolean is_ati1n = format == PIPE_FORMAT_RGTC1_UNORM ||
 414                        format == PIPE_FORMAT_RGTC1_SNORM ||
 415                        format == PIPE_FORMAT_LATC1_UNORM ||
 416                        format == PIPE_FORMAT_LATC1_SNORM;
 417     boolean is_ati2n = format == PIPE_FORMAT_RGTC2_UNORM ||
 418                        format == PIPE_FORMAT_RGTC2_SNORM ||
 419                        format == PIPE_FORMAT_LATC2_UNORM ||
 420                        format == PIPE_FORMAT_LATC2_SNORM;
 421     boolean is_x16f_xy16f = format == PIPE_FORMAT_R16_FLOAT ||
 422                             format == PIPE_FORMAT_R16G16_FLOAT ||
 423                             format == PIPE_FORMAT_A16_FLOAT ||
 424                             format == PIPE_FORMAT_L16_FLOAT ||
 425                             format == PIPE_FORMAT_L16A16_FLOAT ||
 426                             format == PIPE_FORMAT_R16A16_FLOAT ||
 427                             format == PIPE_FORMAT_I16_FLOAT;
 428     boolean is_half_float = format == PIPE_FORMAT_R16_FLOAT ||
 429                             format == PIPE_FORMAT_R16G16_FLOAT ||
 430                             format == PIPE_FORMAT_R16G16B16_FLOAT ||
 431                             format == PIPE_FORMAT_R16G16B16A16_FLOAT ||
 432                             format == PIPE_FORMAT_R16G16B16X16_FLOAT;
 433     const struct util_format_description *desc;
 434
 435     if (!util_format_is_supported(format, usage))
 436        return FALSE;
 437
 438     /* Check multisampling support. */
 439     switch (sample_count) {
 440         case 0:
 441         case 1:
 442             break;
 443         case 2:
 444         case 4:
 445         case 6:
 446             /* We need DRM 2.8.0. */
 447             if (!drm_2_8_0) {
 448                 return FALSE;
 449             }
 450             /* No texturing and scanout. */
 451             if (usage & (PIPE_BIND_SAMPLER_VIEW |
 452                          PIPE_BIND_DISPLAY_TARGET |
 453                          PIPE_BIND_SCANOUT)) {
 454                 return FALSE;
 455             }
 456
 457             desc = util_format_description(format);
 458
 459             if (is_r500) {
 460                 /* Only allow depth/stencil, RGBA8, RGBA1010102, RGBA16F. */
 461                 if (!util_format_is_depth_or_stencil(format) &&
 462                     !util_format_is_rgba8_variant(desc) &&
 463                     !util_format_is_rgba1010102_variant(desc) &&
 464                     format != PIPE_FORMAT_R16G16B16A16_FLOAT &&
 465                     format != PIPE_FORMAT_R16G16B16X16_FLOAT) {
 466                     return FALSE;
 467                 }
 468             } else {
 469                 /* Only allow depth/stencil, RGBA8. */
 470                 if (!util_format_is_depth_or_stencil(format) &&
 471                     !util_format_is_rgba8_variant(desc)) {
 472                     return FALSE;
 473                 }
 474             }
 475             break;
 476         default:
 477             return FALSE;
 478     }
 479
 480     /* Check sampler format support. */
 481     if ((usage & PIPE_BIND_SAMPLER_VIEW) &&
 482         /* these two are broken for an unknown reason */
 483         format != PIPE_FORMAT_R8G8B8X8_SNORM &&
 484         format != PIPE_FORMAT_R16G16B16X16_SNORM &&
 485         /* ATI1N is r5xx-only. */
 486         (is_r500 || !is_ati1n) &&
 487         /* ATI2N is supported on r4xx-r5xx. */
 488         (is_r400 || is_r500 || !is_ati2n) &&
 489         /* R16F and RG16F texture support was added in as late as DRM 2.8.0 */
 490         (drm_2_8_0 || !is_x16f_xy16f) &&
 491         r300_is_sampler_format_supported(format)) {
 492         retval |= PIPE_BIND_SAMPLER_VIEW;
 493     }
 494
 495     /* Check colorbuffer format support. */
 496     if ((usage & (PIPE_BIND_RENDER_TARGET |
 497                   PIPE_BIND_DISPLAY_TARGET |
 498                   PIPE_BIND_SCANOUT |
 499                   PIPE_BIND_SHARED)) &&
 500         /* 2101010 cannot be rendered to on non-r5xx. */
 501         (!is_color2101010 || (is_r500 && drm_2_8_0)) &&
 502         r300_is_colorbuffer_format_supported(format)) {
 503         retval |= usage &
 504             (PIPE_BIND_RENDER_TARGET |
 505              PIPE_BIND_DISPLAY_TARGET |
 506              PIPE_BIND_SCANOUT |
 507              PIPE_BIND_SHARED);
 508     }
 509
 510     /* Check depth-stencil format support. */
 511     if (usage & PIPE_BIND_DEPTH_STENCIL &&
 512         r300_is_zs_format_supported(format)) {
 513         retval |= PIPE_BIND_DEPTH_STENCIL;
 514     }
 515
 516     /* Check vertex buffer format support. */
 517     if (usage & PIPE_BIND_VERTEX_BUFFER) {
 518         if (r300_screen(screen)->caps.has_tcl) {
 519             /* Half float is supported on >= R400. */
 520             if ((is_r400 || is_r500 || !is_half_float) &&
 521                 r300_translate_vertex_data_type(format) != R300_INVALID_FORMAT) {
 522                 retval |= PIPE_BIND_VERTEX_BUFFER;
 523             }
 524         } else {
 525             /* SW TCL */
 526             if (!util_format_is_pure_integer(format)) {
 527                 retval |= PIPE_BIND_VERTEX_BUFFER;
 528             }
 529         }
 530     }
 531
 532     /* Transfers are always supported. */
 533     if (usage & PIPE_BIND_TRANSFER_READ)
 534         retval |= PIPE_BIND_TRANSFER_READ;
 535     if (usage & PIPE_BIND_TRANSFER_WRITE)
 536         retval |= PIPE_BIND_TRANSFER_WRITE;
 537
 538     return retval == usage;
 539 }
 540
 541 static void r300_destroy_screen(struct pipe_screen* pscreen)
 542 {
 543     struct r300_screen* r300screen = r300_screen(pscreen);
 544     struct radeon_winsys *rws = radeon_winsys(pscreen);
 545
 546     if (rws && !radeon_winsys_unref(rws))
 547       return;
 548
 549     pipe_mutex_destroy(r300screen->cmask_mutex);
 550
 551     if (rws)
 552       rws->destroy(rws);
 553
 554     FREE(r300screen);
 555 }
 556
 557 static void r300_fence_reference(struct pipe_screen *screen,
 558                                  struct pipe_fence_handle **ptr,
 559                                  struct pipe_fence_handle *fence)
 560 {
 561     pb_reference((struct pb_buffer**)ptr,
 562                              (struct pb_buffer*)fence);
 563 }
 564
 565 static boolean r300_fence_signalled(struct pipe_screen *screen,
 566                                     struct pipe_fence_handle *fence)
 567 {
 568     struct radeon_winsys *rws = r300_screen(screen)->rws;
 569     struct pb_buffer *rfence = (struct pb_buffer*)fence;
 570
 571     return !rws->buffer_is_busy(rfence, RADEON_USAGE_READWRITE);
 572 }
 573
 574 static boolean r300_fence_finish(struct pipe_screen *screen,
 575                                  struct pipe_fence_handle *fence,
 576                                  uint64_t timeout)
 577 {
 578     struct radeon_winsys *rws = r300_screen(screen)->rws;
 579     struct pb_buffer *rfence = (struct pb_buffer*)fence;
 580
 581     if (timeout != PIPE_TIMEOUT_INFINITE) {
 582         int64_t start_time = os_time_get();
 583
 584         /* Convert to microseconds. */
 585         timeout /= 1000;
 586
 587         /* Wait in a loop. */
 588         while (rws->buffer_is_busy(rfence, RADEON_USAGE_READWRITE)) {
 589             if (os_time_get() - start_time >= timeout) {
 590                 return FALSE;
 591             }
 592             os_time_sleep(10);
 593         }
 594         return TRUE;
 595     }
 596
 597     rws->buffer_wait(rfence, RADEON_USAGE_READWRITE);
 598     return TRUE;
 599 }
 600
 601 struct pipe_screen* r300_screen_create(struct radeon_winsys *rws)
 602 {
 603     struct r300_screen *r300screen = CALLOC_STRUCT(r300_screen);
 604
 605     if (!r300screen) {
 606         FREE(r300screen);
 607         return NULL;
 608     }
 609
 610     rws->query_info(rws, &r300screen->info);
 611
 612     r300_init_debug(r300screen);
 613     r300_parse_chipset(r300screen->info.pci_id, &r300screen->caps);
 614
 615     if (SCREEN_DBG_ON(r300screen, DBG_NO_ZMASK))
 616         r300screen->caps.zmask_ram = 0;
 617     if (SCREEN_DBG_ON(r300screen, DBG_NO_HIZ))
 618         r300screen->caps.hiz_ram = 0;
 619
 620     if (r300screen->info.drm_minor < 8)
 621         r300screen->caps.has_us_format = FALSE;
 622
 623     r300screen->rws = rws;
 624     r300screen->screen.destroy = r300_destroy_screen;
 625     r300screen->screen.get_name = r300_get_name;
 626     r300screen->screen.get_vendor = r300_get_vendor;
 627     r300screen->screen.get_param = r300_get_param;
 628     r300screen->screen.get_shader_param = r300_get_shader_param;
 629     r300screen->screen.get_paramf = r300_get_paramf;
 630     r300screen->screen.get_video_param = r300_get_video_param;
 631     r300screen->screen.is_format_supported = r300_is_format_supported;
 632     r300screen->screen.is_video_format_supported = vl_video_buffer_is_format_supported;
 633     r300screen->screen.context_create = r300_create_context;
 634     r300screen->screen.fence_reference = r300_fence_reference;
 635     r300screen->screen.fence_signalled = r300_fence_signalled;
 636     r300screen->screen.fence_finish = r300_fence_finish;
 637
 638     r300_init_screen_resource_functions(r300screen);
 639
 640     util_format_s3tc_init();
 641     pipe_mutex_init(r300screen->cmask_mutex);
 642
 643     return &r300screen->screen;
 644 }