gallium: add a texture target to sampler view and a CAP to use it
[mesa.git] / src / gallium / drivers / r300 / r300_screen.c
1 /*
2 * Copyright 2008 Corbin Simpson <MostAwesomeDude@gmail.com>
3 * Copyright 2010 Marek Olšák <maraeo@gmail.com>
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * on the rights to use, copy, modify, merge, publish, distribute, sub
9 * license, and/or sell copies of the Software, and to permit persons to whom
10 * the Software is furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
14 * Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
20 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
21 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
22 * USE OR OTHER DEALINGS IN THE SOFTWARE. */
23
24 #include "util/u_format.h"
25 #include "util/u_format_s3tc.h"
26 #include "util/u_memory.h"
27 #include "os/os_time.h"
28 #include "vl/vl_decoder.h"
29 #include "vl/vl_video_buffer.h"
30
31 #include "r300_context.h"
32 #include "r300_texture.h"
33 #include "r300_screen_buffer.h"
34 #include "r300_state_inlines.h"
35 #include "r300_public.h"
36
37 #include "draw/draw_context.h"
38
39 /* Return the identifier behind whom the brave coders responsible for this
40 * amalgamation of code, sweat, and duct tape, routinely obscure their names.
41 *
42 * ...I should have just put "Corbin Simpson", but I'm not that cool.
43 *
44 * (Or egotistical. Yet.) */
45 static const char* r300_get_vendor(struct pipe_screen* pscreen)
46 {
47 return "X.Org R300 Project";
48 }
49
50 static const char* chip_families[] = {
51 "unknown",
52 "ATI R300",
53 "ATI R350",
54 "ATI RV350",
55 "ATI RV370",
56 "ATI RV380",
57 "ATI RS400",
58 "ATI RC410",
59 "ATI RS480",
60 "ATI R420",
61 "ATI R423",
62 "ATI R430",
63 "ATI R480",
64 "ATI R481",
65 "ATI RV410",
66 "ATI RS600",
67 "ATI RS690",
68 "ATI RS740",
69 "ATI RV515",
70 "ATI R520",
71 "ATI RV530",
72 "ATI R580",
73 "ATI RV560",
74 "ATI RV570"
75 };
76
77 static const char* r300_get_name(struct pipe_screen* pscreen)
78 {
79 struct r300_screen* r300screen = r300_screen(pscreen);
80
81 return chip_families[r300screen->caps.family];
82 }
83
84 static int r300_get_param(struct pipe_screen* pscreen, enum pipe_cap param)
85 {
86 struct r300_screen* r300screen = r300_screen(pscreen);
87 boolean is_r500 = r300screen->caps.is_r500;
88
89 switch (param) {
90 /* Supported features (boolean caps). */
91 case PIPE_CAP_NPOT_TEXTURES:
92 case PIPE_CAP_MIXED_FRAMEBUFFER_SIZES:
93 case PIPE_CAP_TWO_SIDED_STENCIL:
94 case PIPE_CAP_ANISOTROPIC_FILTER:
95 case PIPE_CAP_POINT_SPRITE:
96 case PIPE_CAP_OCCLUSION_QUERY:
97 case PIPE_CAP_TEXTURE_SHADOW_MAP:
98 case PIPE_CAP_TEXTURE_MIRROR_CLAMP:
99 case PIPE_CAP_BLEND_EQUATION_SEPARATE:
100 case PIPE_CAP_VERTEX_ELEMENT_INSTANCE_DIVISOR:
101 case PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT:
102 case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER:
103 case PIPE_CAP_CONDITIONAL_RENDER:
104 case PIPE_CAP_TEXTURE_BARRIER:
105 case PIPE_CAP_TGSI_CAN_COMPACT_CONSTANTS:
106 case PIPE_CAP_USER_INDEX_BUFFERS:
107 case PIPE_CAP_USER_CONSTANT_BUFFERS:
108 case PIPE_CAP_PREFER_BLIT_BASED_TEXTURE_TRANSFER:
109 case PIPE_CAP_BUFFER_MAP_PERSISTENT_COHERENT:
110 return 1;
111
112 case PIPE_CAP_MIN_MAP_BUFFER_ALIGNMENT:
113 return R300_BUFFER_ALIGNMENT;
114
115 case PIPE_CAP_CONSTANT_BUFFER_OFFSET_ALIGNMENT:
116 return 16;
117
118 case PIPE_CAP_GLSL_FEATURE_LEVEL:
119 return 120;
120
121 /* r300 cannot do swizzling of compressed textures. Supported otherwise. */
122 case PIPE_CAP_TEXTURE_SWIZZLE:
123 return util_format_s3tc_enabled ? r300screen->caps.dxtc_swizzle : 1;
124
125 /* We don't support color clamping on r500, so that we can use color
126 * intepolators for generic varyings. */
127 case PIPE_CAP_VERTEX_COLOR_CLAMPED:
128 return !is_r500;
129
130 /* Supported on r500 only. */
131 case PIPE_CAP_VERTEX_COLOR_UNCLAMPED:
132 case PIPE_CAP_MIXED_COLORBUFFER_FORMATS:
133 case PIPE_CAP_SM3:
134 return is_r500 ? 1 : 0;
135
136 /* Unsupported features. */
137 case PIPE_CAP_QUERY_TIME_ELAPSED:
138 case PIPE_CAP_QUERY_PIPELINE_STATISTICS:
139 case PIPE_CAP_MAX_DUAL_SOURCE_RENDER_TARGETS:
140 case PIPE_CAP_INDEP_BLEND_ENABLE:
141 case PIPE_CAP_INDEP_BLEND_FUNC:
142 case PIPE_CAP_DEPTH_CLIP_DISABLE:
143 case PIPE_CAP_SHADER_STENCIL_EXPORT:
144 case PIPE_CAP_MAX_TEXTURE_ARRAY_LAYERS:
145 case PIPE_CAP_TGSI_INSTANCEID:
146 case PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT:
147 case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER:
148 case PIPE_CAP_SEAMLESS_CUBE_MAP:
149 case PIPE_CAP_SEAMLESS_CUBE_MAP_PER_TEXTURE:
150 case PIPE_CAP_MIN_TEXEL_OFFSET:
151 case PIPE_CAP_MAX_TEXEL_OFFSET:
152 case PIPE_CAP_MIN_TEXTURE_GATHER_OFFSET:
153 case PIPE_CAP_MAX_TEXTURE_GATHER_OFFSET:
154 case PIPE_CAP_MAX_STREAM_OUTPUT_BUFFERS:
155 case PIPE_CAP_MAX_STREAM_OUTPUT_SEPARATE_COMPONENTS:
156 case PIPE_CAP_MAX_STREAM_OUTPUT_INTERLEAVED_COMPONENTS:
157 case PIPE_CAP_MAX_GEOMETRY_OUTPUT_VERTICES:
158 case PIPE_CAP_MAX_GEOMETRY_TOTAL_OUTPUT_COMPONENTS:
159 case PIPE_CAP_MAX_VERTEX_STREAMS:
160 case PIPE_CAP_STREAM_OUTPUT_PAUSE_RESUME:
161 case PIPE_CAP_FRAGMENT_COLOR_CLAMPED:
162 case PIPE_CAP_QUADS_FOLLOW_PROVOKING_VERTEX_CONVENTION:
163 case PIPE_CAP_COMPUTE:
164 case PIPE_CAP_START_INSTANCE:
165 case PIPE_CAP_QUERY_TIMESTAMP:
166 case PIPE_CAP_TEXTURE_MULTISAMPLE:
167 case PIPE_CAP_CUBE_MAP_ARRAY:
168 case PIPE_CAP_TEXTURE_BUFFER_OBJECTS:
169 case PIPE_CAP_TEXTURE_BUFFER_OFFSET_ALIGNMENT:
170 case PIPE_CAP_TEXTURE_BORDER_COLOR_QUIRK:
171 case PIPE_CAP_MAX_TEXTURE_BUFFER_SIZE:
172 case PIPE_CAP_TGSI_VS_LAYER_VIEWPORT:
173 case PIPE_CAP_MAX_TEXTURE_GATHER_COMPONENTS:
174 case PIPE_CAP_TEXTURE_GATHER_SM5:
175 case PIPE_CAP_TEXTURE_QUERY_LOD:
176 case PIPE_CAP_FAKE_SW_MSAA:
177 case PIPE_CAP_SAMPLE_SHADING:
178 case PIPE_CAP_TEXTURE_GATHER_OFFSETS:
179 case PIPE_CAP_TGSI_VS_WINDOW_SPACE_POSITION:
180 case PIPE_CAP_DRAW_INDIRECT:
181 case PIPE_CAP_TGSI_FS_FINE_DERIVATIVE:
182 case PIPE_CAP_CONDITIONAL_RENDER_INVERTED:
183 case PIPE_CAP_SAMPLER_VIEW_TARGET:
184 return 0;
185
186 /* SWTCL-only features. */
187 case PIPE_CAP_PRIMITIVE_RESTART:
188 case PIPE_CAP_USER_VERTEX_BUFFERS:
189 return !r300screen->caps.has_tcl;
190
191 /* HWTCL-only features / limitations. */
192 case PIPE_CAP_VERTEX_BUFFER_OFFSET_4BYTE_ALIGNED_ONLY:
193 case PIPE_CAP_VERTEX_BUFFER_STRIDE_4BYTE_ALIGNED_ONLY:
194 case PIPE_CAP_VERTEX_ELEMENT_SRC_OFFSET_4BYTE_ALIGNED_ONLY:
195 return r300screen->caps.has_tcl;
196 case PIPE_CAP_TGSI_TEXCOORD:
197 return 0;
198
199 /* Texturing. */
200 case PIPE_CAP_MAX_TEXTURE_2D_LEVELS:
201 case PIPE_CAP_MAX_TEXTURE_3D_LEVELS:
202 case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS:
203 /* 13 == 4096, 12 == 2048 */
204 return is_r500 ? 13 : 12;
205
206 /* Render targets. */
207 case PIPE_CAP_MAX_RENDER_TARGETS:
208 return 4;
209 case PIPE_CAP_ENDIANNESS:
210 return PIPE_ENDIAN_LITTLE;
211
212 case PIPE_CAP_MAX_VIEWPORTS:
213 return 1;
214
215 case PIPE_CAP_MAX_VERTEX_ATTRIB_STRIDE:
216 return 2048;
217
218 case PIPE_CAP_VENDOR_ID:
219 return 0x1002;
220 case PIPE_CAP_DEVICE_ID:
221 return r300screen->info.pci_id;
222 case PIPE_CAP_ACCELERATED:
223 return 1;
224 case PIPE_CAP_VIDEO_MEMORY:
225 return r300screen->info.vram_size >> 20;
226 case PIPE_CAP_UMA:
227 return 0;
228 }
229 return 0;
230 }
231
232 static int r300_get_shader_param(struct pipe_screen *pscreen, unsigned shader, enum pipe_shader_cap param)
233 {
234 struct r300_screen* r300screen = r300_screen(pscreen);
235 boolean is_r400 = r300screen->caps.is_r400;
236 boolean is_r500 = r300screen->caps.is_r500;
237
238 switch (shader) {
239 case PIPE_SHADER_FRAGMENT:
240 switch (param)
241 {
242 case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
243 return is_r500 || is_r400 ? 512 : 96;
244 case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
245 return is_r500 || is_r400 ? 512 : 64;
246 case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
247 return is_r500 || is_r400 ? 512 : 32;
248 case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
249 return is_r500 ? 511 : 4;
250 case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:
251 return is_r500 ? 64 : 0; /* Actually unlimited on r500. */
252 /* Fragment shader limits. */
253 case PIPE_SHADER_CAP_MAX_INPUTS:
254 /* 2 colors + 8 texcoords are always supported
255 * (minus fog and wpos).
256 *
257 * R500 has the ability to turn 3rd and 4th color into
258 * additional texcoords but there is no two-sided color
259 * selection then. However the facing bit can be used instead. */
260 return 10;
261 case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE:
262 return (is_r500 ? 256 : 32) * sizeof(float[4]);
263 case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
264 return 1;
265 case PIPE_SHADER_CAP_MAX_TEMPS:
266 return is_r500 ? 128 : is_r400 ? 64 : 32;
267 case PIPE_SHADER_CAP_MAX_PREDS:
268 return is_r500 ? 1 : 0;
269 case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
270 case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS:
271 return r300screen->caps.num_tex_units;
272 case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
273 case PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED:
274 case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
275 case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
276 case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
277 case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
278 case PIPE_SHADER_CAP_SUBROUTINES:
279 case PIPE_SHADER_CAP_INTEGERS:
280 case PIPE_SHADER_CAP_DOUBLES:
281 return 0;
282 case PIPE_SHADER_CAP_PREFERRED_IR:
283 return PIPE_SHADER_IR_TGSI;
284 }
285 break;
286 case PIPE_SHADER_VERTEX:
287 switch (param)
288 {
289 case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
290 case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS:
291 case PIPE_SHADER_CAP_SUBROUTINES:
292 return 0;
293 default:;
294 }
295
296 if (!r300screen->caps.has_tcl) {
297 return draw_get_shader_param(shader, param);
298 }
299
300 switch (param)
301 {
302 case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
303 case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
304 return is_r500 ? 1024 : 256;
305 case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:
306 return is_r500 ? 4 : 0; /* For loops; not sure about conditionals. */
307 case PIPE_SHADER_CAP_MAX_INPUTS:
308 return 16;
309 case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE:
310 return 256 * sizeof(float[4]);
311 case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
312 return 1;
313 case PIPE_SHADER_CAP_MAX_TEMPS:
314 return 32;
315 case PIPE_SHADER_CAP_MAX_PREDS:
316 return is_r500 ? 4 : 0; /* XXX guessed. */
317 case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
318 return 1;
319 case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
320 case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
321 case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
322 case PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED:
323 case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
324 case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
325 case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
326 case PIPE_SHADER_CAP_SUBROUTINES:
327 case PIPE_SHADER_CAP_INTEGERS:
328 case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
329 case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS:
330 case PIPE_SHADER_CAP_DOUBLES:
331 return 0;
332 case PIPE_SHADER_CAP_PREFERRED_IR:
333 return PIPE_SHADER_IR_TGSI;
334 }
335 break;
336 }
337 return 0;
338 }
339
340 static float r300_get_paramf(struct pipe_screen* pscreen,
341 enum pipe_capf param)
342 {
343 struct r300_screen* r300screen = r300_screen(pscreen);
344
345 switch (param) {
346 case PIPE_CAPF_MAX_LINE_WIDTH:
347 case PIPE_CAPF_MAX_LINE_WIDTH_AA:
348 case PIPE_CAPF_MAX_POINT_WIDTH:
349 case PIPE_CAPF_MAX_POINT_WIDTH_AA:
350 /* The maximum dimensions of the colorbuffer are our practical
351 * rendering limits. 2048 pixels should be enough for anybody. */
352 if (r300screen->caps.is_r500) {
353 return 4096.0f;
354 } else if (r300screen->caps.is_r400) {
355 return 4021.0f;
356 } else {
357 return 2560.0f;
358 }
359 case PIPE_CAPF_MAX_TEXTURE_ANISOTROPY:
360 return 16.0f;
361 case PIPE_CAPF_MAX_TEXTURE_LOD_BIAS:
362 return 16.0f;
363 case PIPE_CAPF_GUARD_BAND_LEFT:
364 case PIPE_CAPF_GUARD_BAND_TOP:
365 case PIPE_CAPF_GUARD_BAND_RIGHT:
366 case PIPE_CAPF_GUARD_BAND_BOTTOM:
367 /* XXX I don't know what these should be but the least we can do is
368 * silence the potential error message */
369 return 0.0f;
370 default:
371 debug_printf("r300: Warning: Unknown CAP %d in get_paramf.\n",
372 param);
373 return 0.0f;
374 }
375 }
376
377 static int r300_get_video_param(struct pipe_screen *screen,
378 enum pipe_video_profile profile,
379 enum pipe_video_entrypoint entrypoint,
380 enum pipe_video_cap param)
381 {
382 switch (param) {
383 case PIPE_VIDEO_CAP_SUPPORTED:
384 return vl_profile_supported(screen, profile, entrypoint);
385 case PIPE_VIDEO_CAP_NPOT_TEXTURES:
386 return 0;
387 case PIPE_VIDEO_CAP_MAX_WIDTH:
388 case PIPE_VIDEO_CAP_MAX_HEIGHT:
389 return vl_video_buffer_max_size(screen);
390 case PIPE_VIDEO_CAP_PREFERED_FORMAT:
391 return PIPE_FORMAT_NV12;
392 case PIPE_VIDEO_CAP_PREFERS_INTERLACED:
393 return false;
394 case PIPE_VIDEO_CAP_SUPPORTS_INTERLACED:
395 return false;
396 case PIPE_VIDEO_CAP_SUPPORTS_PROGRESSIVE:
397 return true;
398 case PIPE_VIDEO_CAP_MAX_LEVEL:
399 return vl_level_supported(screen, profile);
400 default:
401 return 0;
402 }
403 }
404
405 /**
406 * Whether the format matches:
407 * PIPE_FORMAT_?10?10?10?2_UNORM
408 */
409 static INLINE boolean
410 util_format_is_rgba1010102_variant(const struct util_format_description *desc)
411 {
412 static const unsigned size[4] = {10, 10, 10, 2};
413 unsigned chan;
414
415 if (desc->block.width != 1 ||
416 desc->block.height != 1 ||
417 desc->block.bits != 32)
418 return FALSE;
419
420 for (chan = 0; chan < 4; ++chan) {
421 if(desc->channel[chan].type != UTIL_FORMAT_TYPE_UNSIGNED &&
422 desc->channel[chan].type != UTIL_FORMAT_TYPE_VOID)
423 return FALSE;
424 if (desc->channel[chan].size != size[chan])
425 return FALSE;
426 }
427
428 return TRUE;
429 }
430
431 static bool r300_is_blending_supported(struct r300_screen *rscreen,
432 enum pipe_format format)
433 {
434 int c;
435 const struct util_format_description *desc =
436 util_format_description(format);
437
438 if (desc->layout != UTIL_FORMAT_LAYOUT_PLAIN)
439 return false;
440
441 c = util_format_get_first_non_void_channel(format);
442
443 /* RGBA16F */
444 if (rscreen->caps.is_r500 &&
445 desc->nr_channels == 4 &&
446 desc->channel[c].size == 16 &&
447 desc->channel[c].type == UTIL_FORMAT_TYPE_FLOAT)
448 return true;
449
450 if (desc->channel[c].normalized &&
451 desc->channel[c].type == UTIL_FORMAT_TYPE_UNSIGNED &&
452 desc->channel[c].size >= 4 &&
453 desc->channel[c].size <= 10) {
454 /* RGB10_A2, RGBA8, RGB5_A1, RGBA4, RGB565 */
455 if (desc->nr_channels >= 3)
456 return true;
457
458 if (format == PIPE_FORMAT_R8G8_UNORM)
459 return true;
460
461 /* R8, I8, L8, A8 */
462 if (desc->nr_channels == 1)
463 return true;
464 }
465
466 return false;
467 }
468
469 static boolean r300_is_format_supported(struct pipe_screen* screen,
470 enum pipe_format format,
471 enum pipe_texture_target target,
472 unsigned sample_count,
473 unsigned usage)
474 {
475 uint32_t retval = 0;
476 boolean drm_2_8_0 = r300_screen(screen)->info.drm_minor >= 8;
477 boolean is_r500 = r300_screen(screen)->caps.is_r500;
478 boolean is_r400 = r300_screen(screen)->caps.is_r400;
479 boolean is_color2101010 = format == PIPE_FORMAT_R10G10B10A2_UNORM ||
480 format == PIPE_FORMAT_R10G10B10X2_SNORM ||
481 format == PIPE_FORMAT_B10G10R10A2_UNORM ||
482 format == PIPE_FORMAT_B10G10R10X2_UNORM ||
483 format == PIPE_FORMAT_R10SG10SB10SA2U_NORM;
484 boolean is_ati1n = format == PIPE_FORMAT_RGTC1_UNORM ||
485 format == PIPE_FORMAT_RGTC1_SNORM ||
486 format == PIPE_FORMAT_LATC1_UNORM ||
487 format == PIPE_FORMAT_LATC1_SNORM;
488 boolean is_ati2n = format == PIPE_FORMAT_RGTC2_UNORM ||
489 format == PIPE_FORMAT_RGTC2_SNORM ||
490 format == PIPE_FORMAT_LATC2_UNORM ||
491 format == PIPE_FORMAT_LATC2_SNORM;
492 boolean is_x16f_xy16f = format == PIPE_FORMAT_R16_FLOAT ||
493 format == PIPE_FORMAT_R16G16_FLOAT ||
494 format == PIPE_FORMAT_A16_FLOAT ||
495 format == PIPE_FORMAT_L16_FLOAT ||
496 format == PIPE_FORMAT_L16A16_FLOAT ||
497 format == PIPE_FORMAT_R16A16_FLOAT ||
498 format == PIPE_FORMAT_I16_FLOAT;
499 boolean is_half_float = format == PIPE_FORMAT_R16_FLOAT ||
500 format == PIPE_FORMAT_R16G16_FLOAT ||
501 format == PIPE_FORMAT_R16G16B16_FLOAT ||
502 format == PIPE_FORMAT_R16G16B16A16_FLOAT ||
503 format == PIPE_FORMAT_R16G16B16X16_FLOAT;
504 const struct util_format_description *desc;
505
506 if (!util_format_is_supported(format, usage))
507 return FALSE;
508
509 /* Check multisampling support. */
510 switch (sample_count) {
511 case 0:
512 case 1:
513 break;
514 case 2:
515 case 4:
516 case 6:
517 /* We need DRM 2.8.0. */
518 if (!drm_2_8_0) {
519 return FALSE;
520 }
521 /* No texturing and scanout. */
522 if (usage & (PIPE_BIND_SAMPLER_VIEW |
523 PIPE_BIND_DISPLAY_TARGET |
524 PIPE_BIND_SCANOUT)) {
525 return FALSE;
526 }
527
528 desc = util_format_description(format);
529
530 if (is_r500) {
531 /* Only allow depth/stencil, RGBA8, RGBA1010102, RGBA16F. */
532 if (!util_format_is_depth_or_stencil(format) &&
533 !util_format_is_rgba8_variant(desc) &&
534 !util_format_is_rgba1010102_variant(desc) &&
535 format != PIPE_FORMAT_R16G16B16A16_FLOAT &&
536 format != PIPE_FORMAT_R16G16B16X16_FLOAT) {
537 return FALSE;
538 }
539 } else {
540 /* Only allow depth/stencil, RGBA8. */
541 if (!util_format_is_depth_or_stencil(format) &&
542 !util_format_is_rgba8_variant(desc)) {
543 return FALSE;
544 }
545 }
546 break;
547 default:
548 return FALSE;
549 }
550
551 /* Check sampler format support. */
552 if ((usage & PIPE_BIND_SAMPLER_VIEW) &&
553 /* these two are broken for an unknown reason */
554 format != PIPE_FORMAT_R8G8B8X8_SNORM &&
555 format != PIPE_FORMAT_R16G16B16X16_SNORM &&
556 /* ATI1N is r5xx-only. */
557 (is_r500 || !is_ati1n) &&
558 /* ATI2N is supported on r4xx-r5xx. */
559 (is_r400 || is_r500 || !is_ati2n) &&
560 /* R16F and RG16F texture support was added in as late as DRM 2.8.0 */
561 (drm_2_8_0 || !is_x16f_xy16f) &&
562 r300_is_sampler_format_supported(format)) {
563 retval |= PIPE_BIND_SAMPLER_VIEW;
564 }
565
566 /* Check colorbuffer format support. */
567 if ((usage & (PIPE_BIND_RENDER_TARGET |
568 PIPE_BIND_DISPLAY_TARGET |
569 PIPE_BIND_SCANOUT |
570 PIPE_BIND_SHARED |
571 PIPE_BIND_BLENDABLE)) &&
572 /* 2101010 cannot be rendered to on non-r5xx. */
573 (!is_color2101010 || (is_r500 && drm_2_8_0)) &&
574 r300_is_colorbuffer_format_supported(format)) {
575 retval |= usage &
576 (PIPE_BIND_RENDER_TARGET |
577 PIPE_BIND_DISPLAY_TARGET |
578 PIPE_BIND_SCANOUT |
579 PIPE_BIND_SHARED);
580
581 if (r300_is_blending_supported(r300_screen(screen), format)) {
582 retval |= usage & PIPE_BIND_BLENDABLE;
583 }
584 }
585
586 /* Check depth-stencil format support. */
587 if (usage & PIPE_BIND_DEPTH_STENCIL &&
588 r300_is_zs_format_supported(format)) {
589 retval |= PIPE_BIND_DEPTH_STENCIL;
590 }
591
592 /* Check vertex buffer format support. */
593 if (usage & PIPE_BIND_VERTEX_BUFFER) {
594 if (r300_screen(screen)->caps.has_tcl) {
595 /* Half float is supported on >= R400. */
596 if ((is_r400 || is_r500 || !is_half_float) &&
597 r300_translate_vertex_data_type(format) != R300_INVALID_FORMAT) {
598 retval |= PIPE_BIND_VERTEX_BUFFER;
599 }
600 } else {
601 /* SW TCL */
602 if (!util_format_is_pure_integer(format)) {
603 retval |= PIPE_BIND_VERTEX_BUFFER;
604 }
605 }
606 }
607
608 /* Transfers are always supported. */
609 if (usage & PIPE_BIND_TRANSFER_READ)
610 retval |= PIPE_BIND_TRANSFER_READ;
611 if (usage & PIPE_BIND_TRANSFER_WRITE)
612 retval |= PIPE_BIND_TRANSFER_WRITE;
613
614 return retval == usage;
615 }
616
617 static void r300_destroy_screen(struct pipe_screen* pscreen)
618 {
619 struct r300_screen* r300screen = r300_screen(pscreen);
620 struct radeon_winsys *rws = radeon_winsys(pscreen);
621
622 if (rws && !rws->unref(rws))
623 return;
624
625 pipe_mutex_destroy(r300screen->cmask_mutex);
626
627 if (rws)
628 rws->destroy(rws);
629
630 FREE(r300screen);
631 }
632
633 static void r300_fence_reference(struct pipe_screen *screen,
634 struct pipe_fence_handle **ptr,
635 struct pipe_fence_handle *fence)
636 {
637 struct radeon_winsys *rws = r300_screen(screen)->rws;
638
639 rws->fence_reference(ptr, fence);
640 }
641
642 static boolean r300_fence_signalled(struct pipe_screen *screen,
643 struct pipe_fence_handle *fence)
644 {
645 struct radeon_winsys *rws = r300_screen(screen)->rws;
646
647 return rws->fence_wait(rws, fence, 0);
648 }
649
650 static boolean r300_fence_finish(struct pipe_screen *screen,
651 struct pipe_fence_handle *fence,
652 uint64_t timeout)
653 {
654 struct radeon_winsys *rws = r300_screen(screen)->rws;
655
656 return rws->fence_wait(rws, fence, timeout);
657 }
658
659 struct pipe_screen* r300_screen_create(struct radeon_winsys *rws)
660 {
661 struct r300_screen *r300screen = CALLOC_STRUCT(r300_screen);
662
663 if (!r300screen) {
664 FREE(r300screen);
665 return NULL;
666 }
667
668 rws->query_info(rws, &r300screen->info);
669
670 r300_init_debug(r300screen);
671 r300_parse_chipset(r300screen->info.pci_id, &r300screen->caps);
672
673 if (SCREEN_DBG_ON(r300screen, DBG_NO_ZMASK))
674 r300screen->caps.zmask_ram = 0;
675 if (SCREEN_DBG_ON(r300screen, DBG_NO_HIZ))
676 r300screen->caps.hiz_ram = 0;
677
678 if (r300screen->info.drm_minor < 8)
679 r300screen->caps.has_us_format = FALSE;
680
681 r300screen->rws = rws;
682 r300screen->screen.destroy = r300_destroy_screen;
683 r300screen->screen.get_name = r300_get_name;
684 r300screen->screen.get_vendor = r300_get_vendor;
685 r300screen->screen.get_param = r300_get_param;
686 r300screen->screen.get_shader_param = r300_get_shader_param;
687 r300screen->screen.get_paramf = r300_get_paramf;
688 r300screen->screen.get_video_param = r300_get_video_param;
689 r300screen->screen.is_format_supported = r300_is_format_supported;
690 r300screen->screen.is_video_format_supported = vl_video_buffer_is_format_supported;
691 r300screen->screen.context_create = r300_create_context;
692 r300screen->screen.fence_reference = r300_fence_reference;
693 r300screen->screen.fence_signalled = r300_fence_signalled;
694 r300screen->screen.fence_finish = r300_fence_finish;
695
696 r300_init_screen_resource_functions(r300screen);
697
698 util_format_s3tc_init();
699 pipe_mutex_init(r300screen->cmask_mutex);
700
701 return &r300screen->screen;
702 }