src/gallium/drivers/r300/r300_screen.c

   1 /*
   2  * Copyright 2008 Corbin Simpson <MostAwesomeDude@gmail.com>
   3  * Copyright 2010 Marek Olšák <maraeo@gmail.com>
   4  *
   5  * Permission is hereby granted, free of charge, to any person obtaining a
   6  * copy of this software and associated documentation files (the "Software"),
   7  * to deal in the Software without restriction, including without limitation
   8  * on the rights to use, copy, modify, merge, publish, distribute, sub
   9  * license, and/or sell copies of the Software, and to permit persons to whom
  10  * the Software is furnished to do so, subject to the following conditions:
  11  *
  12  * The above copyright notice and this permission notice (including the next
  13  * paragraph) shall be included in all copies or substantial portions of the
  14  * Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  19  * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
  20  * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
  21  * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
  22  * USE OR OTHER DEALINGS IN THE SOFTWARE. */
  23
  24 #include "util/u_format.h"
  25 #include "util/u_format_s3tc.h"
  26 #include "util/u_memory.h"
  27 #include "os/os_time.h"
  28 #include "vl/vl_decoder.h"
  29 #include "vl/vl_video_buffer.h"
  30
  31 #include "r300_context.h"
  32 #include "r300_texture.h"
  33 #include "r300_screen_buffer.h"
  34 #include "r300_state_inlines.h"
  35 #include "r300_public.h"
  36
  37 #include "draw/draw_context.h"
  38
  39 /* Return the identifier behind whom the brave coders responsible for this
  40  * amalgamation of code, sweat, and duct tape, routinely obscure their names.
  41  *
  42  * ...I should have just put "Corbin Simpson", but I'm not that cool.
  43  *
  44  * (Or egotistical. Yet.) */
  45 static const char* r300_get_vendor(struct pipe_screen* pscreen)
  46 {
  47     return "X.Org R300 Project";
  48 }
  49
  50 static const char* chip_families[] = {
  51     "unknown",
  52     "ATI R300",
  53     "ATI R350",
  54     "ATI RV350",
  55     "ATI RV370",
  56     "ATI RV380",
  57     "ATI RS400",
  58     "ATI RC410",
  59     "ATI RS480",
  60     "ATI R420",
  61     "ATI R423",
  62     "ATI R430",
  63     "ATI R480",
  64     "ATI R481",
  65     "ATI RV410",
  66     "ATI RS600",
  67     "ATI RS690",
  68     "ATI RS740",
  69     "ATI RV515",
  70     "ATI R520",
  71     "ATI RV530",
  72     "ATI R580",
  73     "ATI RV560",
  74     "ATI RV570"
  75 };
  76
  77 static const char* r300_get_name(struct pipe_screen* pscreen)
  78 {
  79     struct r300_screen* r300screen = r300_screen(pscreen);
  80
  81     return chip_families[r300screen->caps.family];
  82 }
  83
  84 static int r300_get_param(struct pipe_screen* pscreen, enum pipe_cap param)
  85 {
  86     struct r300_screen* r300screen = r300_screen(pscreen);
  87     boolean is_r500 = r300screen->caps.is_r500;
  88
  89     switch (param) {
  90         /* Supported features (boolean caps). */
  91         case PIPE_CAP_NPOT_TEXTURES:
  92         case PIPE_CAP_MIXED_FRAMEBUFFER_SIZES:
  93         case PIPE_CAP_TWO_SIDED_STENCIL:
  94         case PIPE_CAP_ANISOTROPIC_FILTER:
  95         case PIPE_CAP_POINT_SPRITE:
  96         case PIPE_CAP_OCCLUSION_QUERY:
  97         case PIPE_CAP_TEXTURE_SHADOW_MAP:
  98         case PIPE_CAP_TEXTURE_MIRROR_CLAMP:
  99         case PIPE_CAP_BLEND_EQUATION_SEPARATE:
 100         case PIPE_CAP_VERTEX_ELEMENT_INSTANCE_DIVISOR:
 101         case PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT:
 102         case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER:
 103         case PIPE_CAP_CONDITIONAL_RENDER:
 104         case PIPE_CAP_TEXTURE_BARRIER:
 105         case PIPE_CAP_TGSI_CAN_COMPACT_CONSTANTS:
 106         case PIPE_CAP_USER_INDEX_BUFFERS:
 107         case PIPE_CAP_USER_CONSTANT_BUFFERS:
 108         case PIPE_CAP_PREFER_BLIT_BASED_TEXTURE_TRANSFER:
 109         case PIPE_CAP_BUFFER_MAP_PERSISTENT_COHERENT:
 110         case PIPE_CAP_CLIP_HALFZ:
 111             return 1;
 112
 113         case PIPE_CAP_MIN_MAP_BUFFER_ALIGNMENT:
 114             return R300_BUFFER_ALIGNMENT;
 115
 116         case PIPE_CAP_CONSTANT_BUFFER_OFFSET_ALIGNMENT:
 117             return 16;
 118
 119         case PIPE_CAP_GLSL_FEATURE_LEVEL:
 120             return 120;
 121
 122         /* r300 cannot do swizzling of compressed textures. Supported otherwise. */
 123         case PIPE_CAP_TEXTURE_SWIZZLE:
 124             return util_format_s3tc_enabled ? r300screen->caps.dxtc_swizzle : 1;
 125
 126         /* We don't support color clamping on r500, so that we can use color
 127          * intepolators for generic varyings. */
 128         case PIPE_CAP_VERTEX_COLOR_CLAMPED:
 129             return !is_r500;
 130
 131         /* Supported on r500 only. */
 132         case PIPE_CAP_VERTEX_COLOR_UNCLAMPED:
 133         case PIPE_CAP_MIXED_COLORBUFFER_FORMATS:
 134         case PIPE_CAP_SM3:
 135             return is_r500 ? 1 : 0;
 136
 137         /* Unsupported features. */
 138         case PIPE_CAP_QUERY_TIME_ELAPSED:
 139         case PIPE_CAP_QUERY_PIPELINE_STATISTICS:
 140         case PIPE_CAP_MAX_DUAL_SOURCE_RENDER_TARGETS:
 141         case PIPE_CAP_INDEP_BLEND_ENABLE:
 142         case PIPE_CAP_INDEP_BLEND_FUNC:
 143         case PIPE_CAP_DEPTH_CLIP_DISABLE:
 144         case PIPE_CAP_SHADER_STENCIL_EXPORT:
 145         case PIPE_CAP_MAX_TEXTURE_ARRAY_LAYERS:
 146         case PIPE_CAP_TGSI_INSTANCEID:
 147         case PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT:
 148         case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER:
 149         case PIPE_CAP_SEAMLESS_CUBE_MAP:
 150         case PIPE_CAP_SEAMLESS_CUBE_MAP_PER_TEXTURE:
 151         case PIPE_CAP_MIN_TEXEL_OFFSET:
 152         case PIPE_CAP_MAX_TEXEL_OFFSET:
 153         case PIPE_CAP_MIN_TEXTURE_GATHER_OFFSET:
 154         case PIPE_CAP_MAX_TEXTURE_GATHER_OFFSET:
 155         case PIPE_CAP_MAX_STREAM_OUTPUT_BUFFERS:
 156         case PIPE_CAP_MAX_STREAM_OUTPUT_SEPARATE_COMPONENTS:
 157         case PIPE_CAP_MAX_STREAM_OUTPUT_INTERLEAVED_COMPONENTS:
 158         case PIPE_CAP_MAX_GEOMETRY_OUTPUT_VERTICES:
 159         case PIPE_CAP_MAX_GEOMETRY_TOTAL_OUTPUT_COMPONENTS:
 160         case PIPE_CAP_MAX_VERTEX_STREAMS:
 161         case PIPE_CAP_STREAM_OUTPUT_PAUSE_RESUME:
 162         case PIPE_CAP_FRAGMENT_COLOR_CLAMPED:
 163         case PIPE_CAP_QUADS_FOLLOW_PROVOKING_VERTEX_CONVENTION:
 164         case PIPE_CAP_COMPUTE:
 165         case PIPE_CAP_START_INSTANCE:
 166         case PIPE_CAP_QUERY_TIMESTAMP:
 167         case PIPE_CAP_TEXTURE_MULTISAMPLE:
 168         case PIPE_CAP_CUBE_MAP_ARRAY:
 169         case PIPE_CAP_TEXTURE_BUFFER_OBJECTS:
 170         case PIPE_CAP_TEXTURE_BUFFER_OFFSET_ALIGNMENT:
 171         case PIPE_CAP_TEXTURE_BORDER_COLOR_QUIRK:
 172         case PIPE_CAP_MAX_TEXTURE_BUFFER_SIZE:
 173         case PIPE_CAP_TGSI_VS_LAYER_VIEWPORT:
 174         case PIPE_CAP_MAX_TEXTURE_GATHER_COMPONENTS:
 175         case PIPE_CAP_TEXTURE_GATHER_SM5:
 176         case PIPE_CAP_TEXTURE_QUERY_LOD:
 177         case PIPE_CAP_FAKE_SW_MSAA:
 178         case PIPE_CAP_SAMPLE_SHADING:
 179         case PIPE_CAP_TEXTURE_GATHER_OFFSETS:
 180         case PIPE_CAP_DRAW_INDIRECT:
 181         case PIPE_CAP_TGSI_FS_FINE_DERIVATIVE:
 182         case PIPE_CAP_CONDITIONAL_RENDER_INVERTED:
 183         case PIPE_CAP_SAMPLER_VIEW_TARGET:
 184         case PIPE_CAP_VERTEXID_NOBASE:
 185         case PIPE_CAP_POLYGON_OFFSET_CLAMP:
 186         case PIPE_CAP_MULTISAMPLE_Z_RESOLVE:
 187             return 0;
 188
 189         /* SWTCL-only features. */
 190         case PIPE_CAP_PRIMITIVE_RESTART:
 191         case PIPE_CAP_USER_VERTEX_BUFFERS:
 192         case PIPE_CAP_TGSI_VS_WINDOW_SPACE_POSITION:
 193             return !r300screen->caps.has_tcl;
 194
 195         /* HWTCL-only features / limitations. */
 196         case PIPE_CAP_VERTEX_BUFFER_OFFSET_4BYTE_ALIGNED_ONLY:
 197         case PIPE_CAP_VERTEX_BUFFER_STRIDE_4BYTE_ALIGNED_ONLY:
 198         case PIPE_CAP_VERTEX_ELEMENT_SRC_OFFSET_4BYTE_ALIGNED_ONLY:
 199             return r300screen->caps.has_tcl;
 200         case PIPE_CAP_TGSI_TEXCOORD:
 201             return 0;
 202
 203         /* Texturing. */
 204         case PIPE_CAP_MAX_TEXTURE_2D_LEVELS:
 205         case PIPE_CAP_MAX_TEXTURE_3D_LEVELS:
 206         case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS:
 207             /* 13 == 4096, 12 == 2048 */
 208             return is_r500 ? 13 : 12;
 209
 210         /* Render targets. */
 211         case PIPE_CAP_MAX_RENDER_TARGETS:
 212             return 4;
 213         case PIPE_CAP_ENDIANNESS:
 214             return PIPE_ENDIAN_LITTLE;
 215
 216         case PIPE_CAP_MAX_VIEWPORTS:
 217             return 1;
 218
 219         case PIPE_CAP_MAX_VERTEX_ATTRIB_STRIDE:
 220             return 2048;
 221
 222         case PIPE_CAP_VENDOR_ID:
 223                 return 0x1002;
 224         case PIPE_CAP_DEVICE_ID:
 225                 return r300screen->info.pci_id;
 226         case PIPE_CAP_ACCELERATED:
 227                 return 1;
 228         case PIPE_CAP_VIDEO_MEMORY:
 229                 return r300screen->info.vram_size >> 20;
 230         case PIPE_CAP_UMA:
 231                 return 0;
 232     }
 233     return 0;
 234 }
 235
 236 static int r300_get_shader_param(struct pipe_screen *pscreen, unsigned shader, enum pipe_shader_cap param)
 237 {
 238    struct r300_screen* r300screen = r300_screen(pscreen);
 239    boolean is_r400 = r300screen->caps.is_r400;
 240    boolean is_r500 = r300screen->caps.is_r500;
 241
 242    switch (shader) {
 243     case PIPE_SHADER_FRAGMENT:
 244         switch (param)
 245         {
 246         case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
 247             return is_r500 || is_r400 ? 512 : 96;
 248         case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
 249             return is_r500 || is_r400 ? 512 : 64;
 250         case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
 251             return is_r500 || is_r400 ? 512 : 32;
 252         case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
 253             return is_r500 ? 511 : 4;
 254         case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:
 255             return is_r500 ? 64 : 0; /* Actually unlimited on r500. */
 256             /* Fragment shader limits. */
 257         case PIPE_SHADER_CAP_MAX_INPUTS:
 258             /* 2 colors + 8 texcoords are always supported
 259              * (minus fog and wpos).
 260              *
 261              * R500 has the ability to turn 3rd and 4th color into
 262              * additional texcoords but there is no two-sided color
 263              * selection then. However the facing bit can be used instead. */
 264             return 10;
 265         case PIPE_SHADER_CAP_MAX_OUTPUTS:
 266             return 4;
 267         case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE:
 268             return (is_r500 ? 256 : 32) * sizeof(float[4]);
 269         case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
 270             return 1;
 271         case PIPE_SHADER_CAP_MAX_TEMPS:
 272             return is_r500 ? 128 : is_r400 ? 64 : 32;
 273         case PIPE_SHADER_CAP_MAX_PREDS:
 274             return is_r500 ? 1 : 0;
 275         case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
 276         case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS:
 277            return r300screen->caps.num_tex_units;
 278         case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
 279         case PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED:
 280         case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
 281         case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
 282         case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
 283         case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
 284         case PIPE_SHADER_CAP_SUBROUTINES:
 285         case PIPE_SHADER_CAP_INTEGERS:
 286         case PIPE_SHADER_CAP_DOUBLES:
 287             return 0;
 288         case PIPE_SHADER_CAP_PREFERRED_IR:
 289             return PIPE_SHADER_IR_TGSI;
 290         }
 291         break;
 292     case PIPE_SHADER_VERTEX:
 293         switch (param)
 294         {
 295         case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
 296         case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS:
 297         case PIPE_SHADER_CAP_SUBROUTINES:
 298             return 0;
 299         default:;
 300         }
 301
 302         if (!r300screen->caps.has_tcl) {
 303             return draw_get_shader_param(shader, param);
 304         }
 305
 306         switch (param)
 307         {
 308         case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
 309         case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
 310             return is_r500 ? 1024 : 256;
 311         case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:
 312             return is_r500 ? 4 : 0; /* For loops; not sure about conditionals. */
 313         case PIPE_SHADER_CAP_MAX_INPUTS:
 314             return 16;
 315         case PIPE_SHADER_CAP_MAX_OUTPUTS:
 316             return 10;
 317         case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE:
 318             return 256 * sizeof(float[4]);
 319         case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
 320             return 1;
 321         case PIPE_SHADER_CAP_MAX_TEMPS:
 322             return 32;
 323         case PIPE_SHADER_CAP_MAX_PREDS:
 324             return is_r500 ? 4 : 0; /* XXX guessed. */
 325         case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
 326             return 1;
 327         case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
 328         case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
 329         case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
 330         case PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED:
 331         case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
 332         case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
 333         case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
 334         case PIPE_SHADER_CAP_SUBROUTINES:
 335         case PIPE_SHADER_CAP_INTEGERS:
 336         case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
 337         case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS:
 338         case PIPE_SHADER_CAP_DOUBLES:
 339             return 0;
 340         case PIPE_SHADER_CAP_PREFERRED_IR:
 341             return PIPE_SHADER_IR_TGSI;
 342         }
 343         break;
 344     }
 345     return 0;
 346 }
 347
 348 static float r300_get_paramf(struct pipe_screen* pscreen,
 349                              enum pipe_capf param)
 350 {
 351     struct r300_screen* r300screen = r300_screen(pscreen);
 352
 353     switch (param) {
 354         case PIPE_CAPF_MAX_LINE_WIDTH:
 355         case PIPE_CAPF_MAX_LINE_WIDTH_AA:
 356         case PIPE_CAPF_MAX_POINT_WIDTH:
 357         case PIPE_CAPF_MAX_POINT_WIDTH_AA:
 358             /* The maximum dimensions of the colorbuffer are our practical
 359              * rendering limits. 2048 pixels should be enough for anybody. */
 360             if (r300screen->caps.is_r500) {
 361                 return 4096.0f;
 362             } else if (r300screen->caps.is_r400) {
 363                 return 4021.0f;
 364             } else {
 365                 return 2560.0f;
 366             }
 367         case PIPE_CAPF_MAX_TEXTURE_ANISOTROPY:
 368             return 16.0f;
 369         case PIPE_CAPF_MAX_TEXTURE_LOD_BIAS:
 370             return 16.0f;
 371         case PIPE_CAPF_GUARD_BAND_LEFT:
 372         case PIPE_CAPF_GUARD_BAND_TOP:
 373         case PIPE_CAPF_GUARD_BAND_RIGHT:
 374         case PIPE_CAPF_GUARD_BAND_BOTTOM:
 375             /* XXX I don't know what these should be but the least we can do is
 376              * silence the potential error message */
 377             return 0.0f;
 378         default:
 379             debug_printf("r300: Warning: Unknown CAP %d in get_paramf.\n",
 380                          param);
 381             return 0.0f;
 382     }
 383 }
 384
 385 static int r300_get_video_param(struct pipe_screen *screen,
 386                                 enum pipe_video_profile profile,
 387                                 enum pipe_video_entrypoint entrypoint,
 388                                 enum pipe_video_cap param)
 389 {
 390    switch (param) {
 391       case PIPE_VIDEO_CAP_SUPPORTED:
 392          return vl_profile_supported(screen, profile, entrypoint);
 393       case PIPE_VIDEO_CAP_NPOT_TEXTURES:
 394          return 0;
 395       case PIPE_VIDEO_CAP_MAX_WIDTH:
 396       case PIPE_VIDEO_CAP_MAX_HEIGHT:
 397          return vl_video_buffer_max_size(screen);
 398       case PIPE_VIDEO_CAP_PREFERED_FORMAT:
 399          return PIPE_FORMAT_NV12;
 400       case PIPE_VIDEO_CAP_PREFERS_INTERLACED:
 401          return false;
 402       case PIPE_VIDEO_CAP_SUPPORTS_INTERLACED:
 403          return false;
 404       case PIPE_VIDEO_CAP_SUPPORTS_PROGRESSIVE:
 405          return true;
 406       case PIPE_VIDEO_CAP_MAX_LEVEL:
 407          return vl_level_supported(screen, profile);
 408       default:
 409          return 0;
 410    }
 411 }
 412
 413 /**
 414  * Whether the format matches:
 415  *   PIPE_FORMAT_?10?10?10?2_UNORM
 416  */
 417 static INLINE boolean
 418 util_format_is_rgba1010102_variant(const struct util_format_description *desc)
 419 {
 420    static const unsigned size[4] = {10, 10, 10, 2};
 421    unsigned chan;
 422
 423    if (desc->block.width != 1 ||
 424        desc->block.height != 1 ||
 425        desc->block.bits != 32)
 426       return FALSE;
 427
 428    for (chan = 0; chan < 4; ++chan) {
 429       if(desc->channel[chan].type != UTIL_FORMAT_TYPE_UNSIGNED &&
 430          desc->channel[chan].type != UTIL_FORMAT_TYPE_VOID)
 431          return FALSE;
 432       if (desc->channel[chan].size != size[chan])
 433          return FALSE;
 434    }
 435
 436    return TRUE;
 437 }
 438
 439 static bool r300_is_blending_supported(struct r300_screen *rscreen,
 440                                        enum pipe_format format)
 441 {
 442     int c;
 443     const struct util_format_description *desc =
 444         util_format_description(format);
 445
 446     if (desc->layout != UTIL_FORMAT_LAYOUT_PLAIN)
 447         return false;
 448
 449     c = util_format_get_first_non_void_channel(format);
 450
 451     /* RGBA16F */
 452     if (rscreen->caps.is_r500 &&
 453         desc->nr_channels == 4 &&
 454         desc->channel[c].size == 16 &&
 455         desc->channel[c].type == UTIL_FORMAT_TYPE_FLOAT)
 456         return true;
 457
 458     if (desc->channel[c].normalized &&
 459         desc->channel[c].type == UTIL_FORMAT_TYPE_UNSIGNED &&
 460         desc->channel[c].size >= 4 &&
 461         desc->channel[c].size <= 10) {
 462         /* RGB10_A2, RGBA8, RGB5_A1, RGBA4, RGB565 */
 463         if (desc->nr_channels >= 3)
 464             return true;
 465
 466         if (format == PIPE_FORMAT_R8G8_UNORM)
 467             return true;
 468
 469         /* R8, I8, L8, A8 */
 470         if (desc->nr_channels == 1)
 471             return true;
 472     }
 473
 474     return false;
 475 }
 476
 477 static boolean r300_is_format_supported(struct pipe_screen* screen,
 478                                         enum pipe_format format,
 479                                         enum pipe_texture_target target,
 480                                         unsigned sample_count,
 481                                         unsigned usage)
 482 {
 483     uint32_t retval = 0;
 484     boolean drm_2_8_0 = r300_screen(screen)->info.drm_minor >= 8;
 485     boolean is_r500 = r300_screen(screen)->caps.is_r500;
 486     boolean is_r400 = r300_screen(screen)->caps.is_r400;
 487     boolean is_color2101010 = format == PIPE_FORMAT_R10G10B10A2_UNORM ||
 488                               format == PIPE_FORMAT_R10G10B10X2_SNORM ||
 489                               format == PIPE_FORMAT_B10G10R10A2_UNORM ||
 490                               format == PIPE_FORMAT_B10G10R10X2_UNORM ||
 491                               format == PIPE_FORMAT_R10SG10SB10SA2U_NORM;
 492     boolean is_ati1n = format == PIPE_FORMAT_RGTC1_UNORM ||
 493                        format == PIPE_FORMAT_RGTC1_SNORM ||
 494                        format == PIPE_FORMAT_LATC1_UNORM ||
 495                        format == PIPE_FORMAT_LATC1_SNORM;
 496     boolean is_ati2n = format == PIPE_FORMAT_RGTC2_UNORM ||
 497                        format == PIPE_FORMAT_RGTC2_SNORM ||
 498                        format == PIPE_FORMAT_LATC2_UNORM ||
 499                        format == PIPE_FORMAT_LATC2_SNORM;
 500     boolean is_x16f_xy16f = format == PIPE_FORMAT_R16_FLOAT ||
 501                             format == PIPE_FORMAT_R16G16_FLOAT ||
 502                             format == PIPE_FORMAT_A16_FLOAT ||
 503                             format == PIPE_FORMAT_L16_FLOAT ||
 504                             format == PIPE_FORMAT_L16A16_FLOAT ||
 505                             format == PIPE_FORMAT_R16A16_FLOAT ||
 506                             format == PIPE_FORMAT_I16_FLOAT;
 507     boolean is_half_float = format == PIPE_FORMAT_R16_FLOAT ||
 508                             format == PIPE_FORMAT_R16G16_FLOAT ||
 509                             format == PIPE_FORMAT_R16G16B16_FLOAT ||
 510                             format == PIPE_FORMAT_R16G16B16A16_FLOAT ||
 511                             format == PIPE_FORMAT_R16G16B16X16_FLOAT;
 512     const struct util_format_description *desc;
 513
 514     if (!util_format_is_supported(format, usage))
 515        return FALSE;
 516
 517     /* Check multisampling support. */
 518     switch (sample_count) {
 519         case 0:
 520         case 1:
 521             break;
 522         case 2:
 523         case 4:
 524         case 6:
 525             /* We need DRM 2.8.0. */
 526             if (!drm_2_8_0) {
 527                 return FALSE;
 528             }
 529             /* No texturing and scanout. */
 530             if (usage & (PIPE_BIND_SAMPLER_VIEW |
 531                          PIPE_BIND_DISPLAY_TARGET |
 532                          PIPE_BIND_SCANOUT)) {
 533                 return FALSE;
 534             }
 535
 536             desc = util_format_description(format);
 537
 538             if (is_r500) {
 539                 /* Only allow depth/stencil, RGBA8, RGBA1010102, RGBA16F. */
 540                 if (!util_format_is_depth_or_stencil(format) &&
 541                     !util_format_is_rgba8_variant(desc) &&
 542                     !util_format_is_rgba1010102_variant(desc) &&
 543                     format != PIPE_FORMAT_R16G16B16A16_FLOAT &&
 544                     format != PIPE_FORMAT_R16G16B16X16_FLOAT) {
 545                     return FALSE;
 546                 }
 547             } else {
 548                 /* Only allow depth/stencil, RGBA8. */
 549                 if (!util_format_is_depth_or_stencil(format) &&
 550                     !util_format_is_rgba8_variant(desc)) {
 551                     return FALSE;
 552                 }
 553             }
 554             break;
 555         default:
 556             return FALSE;
 557     }
 558
 559     /* Check sampler format support. */
 560     if ((usage & PIPE_BIND_SAMPLER_VIEW) &&
 561         /* these two are broken for an unknown reason */
 562         format != PIPE_FORMAT_R8G8B8X8_SNORM &&
 563         format != PIPE_FORMAT_R16G16B16X16_SNORM &&
 564         /* ATI1N is r5xx-only. */
 565         (is_r500 || !is_ati1n) &&
 566         /* ATI2N is supported on r4xx-r5xx. */
 567         (is_r400 || is_r500 || !is_ati2n) &&
 568         /* R16F and RG16F texture support was added in as late as DRM 2.8.0 */
 569         (drm_2_8_0 || !is_x16f_xy16f) &&
 570         r300_is_sampler_format_supported(format)) {
 571         retval |= PIPE_BIND_SAMPLER_VIEW;
 572     }
 573
 574     /* Check colorbuffer format support. */
 575     if ((usage & (PIPE_BIND_RENDER_TARGET |
 576                   PIPE_BIND_DISPLAY_TARGET |
 577                   PIPE_BIND_SCANOUT |
 578                   PIPE_BIND_SHARED |
 579                   PIPE_BIND_BLENDABLE)) &&
 580         /* 2101010 cannot be rendered to on non-r5xx. */
 581         (!is_color2101010 || (is_r500 && drm_2_8_0)) &&
 582         r300_is_colorbuffer_format_supported(format)) {
 583         retval |= usage &
 584             (PIPE_BIND_RENDER_TARGET |
 585              PIPE_BIND_DISPLAY_TARGET |
 586              PIPE_BIND_SCANOUT |
 587              PIPE_BIND_SHARED);
 588
 589         if (r300_is_blending_supported(r300_screen(screen), format)) {
 590             retval |= usage & PIPE_BIND_BLENDABLE;
 591         }
 592     }
 593
 594     /* Check depth-stencil format support. */
 595     if (usage & PIPE_BIND_DEPTH_STENCIL &&
 596         r300_is_zs_format_supported(format)) {
 597         retval |= PIPE_BIND_DEPTH_STENCIL;
 598     }
 599
 600     /* Check vertex buffer format support. */
 601     if (usage & PIPE_BIND_VERTEX_BUFFER) {
 602         if (r300_screen(screen)->caps.has_tcl) {
 603             /* Half float is supported on >= R400. */
 604             if ((is_r400 || is_r500 || !is_half_float) &&
 605                 r300_translate_vertex_data_type(format) != R300_INVALID_FORMAT) {
 606                 retval |= PIPE_BIND_VERTEX_BUFFER;
 607             }
 608         } else {
 609             /* SW TCL */
 610             if (!util_format_is_pure_integer(format)) {
 611                 retval |= PIPE_BIND_VERTEX_BUFFER;
 612             }
 613         }
 614     }
 615
 616     /* Transfers are always supported. */
 617     if (usage & PIPE_BIND_TRANSFER_READ)
 618         retval |= PIPE_BIND_TRANSFER_READ;
 619     if (usage & PIPE_BIND_TRANSFER_WRITE)
 620         retval |= PIPE_BIND_TRANSFER_WRITE;
 621
 622     return retval == usage;
 623 }
 624
 625 static void r300_destroy_screen(struct pipe_screen* pscreen)
 626 {
 627     struct r300_screen* r300screen = r300_screen(pscreen);
 628     struct radeon_winsys *rws = radeon_winsys(pscreen);
 629
 630     if (rws && !rws->unref(rws))
 631       return;
 632
 633     pipe_mutex_destroy(r300screen->cmask_mutex);
 634
 635     if (rws)
 636       rws->destroy(rws);
 637
 638     FREE(r300screen);
 639 }
 640
 641 static void r300_fence_reference(struct pipe_screen *screen,
 642                                  struct pipe_fence_handle **ptr,
 643                                  struct pipe_fence_handle *fence)
 644 {
 645     struct radeon_winsys *rws = r300_screen(screen)->rws;
 646
 647     rws->fence_reference(ptr, fence);
 648 }
 649
 650 static boolean r300_fence_signalled(struct pipe_screen *screen,
 651                                     struct pipe_fence_handle *fence)
 652 {
 653     struct radeon_winsys *rws = r300_screen(screen)->rws;
 654
 655     return rws->fence_wait(rws, fence, 0);
 656 }
 657
 658 static boolean r300_fence_finish(struct pipe_screen *screen,
 659                                  struct pipe_fence_handle *fence,
 660                                  uint64_t timeout)
 661 {
 662     struct radeon_winsys *rws = r300_screen(screen)->rws;
 663
 664     return rws->fence_wait(rws, fence, timeout);
 665 }
 666
 667 struct pipe_screen* r300_screen_create(struct radeon_winsys *rws)
 668 {
 669     struct r300_screen *r300screen = CALLOC_STRUCT(r300_screen);
 670
 671     if (!r300screen) {
 672         FREE(r300screen);
 673         return NULL;
 674     }
 675
 676     rws->query_info(rws, &r300screen->info);
 677
 678     r300_init_debug(r300screen);
 679     r300_parse_chipset(r300screen->info.pci_id, &r300screen->caps);
 680
 681     if (SCREEN_DBG_ON(r300screen, DBG_NO_ZMASK))
 682         r300screen->caps.zmask_ram = 0;
 683     if (SCREEN_DBG_ON(r300screen, DBG_NO_HIZ))
 684         r300screen->caps.hiz_ram = 0;
 685
 686     if (r300screen->info.drm_minor < 8)
 687         r300screen->caps.has_us_format = FALSE;
 688
 689     r300screen->rws = rws;
 690     r300screen->screen.destroy = r300_destroy_screen;
 691     r300screen->screen.get_name = r300_get_name;
 692     r300screen->screen.get_vendor = r300_get_vendor;
 693     r300screen->screen.get_param = r300_get_param;
 694     r300screen->screen.get_shader_param = r300_get_shader_param;
 695     r300screen->screen.get_paramf = r300_get_paramf;
 696     r300screen->screen.get_video_param = r300_get_video_param;
 697     r300screen->screen.is_format_supported = r300_is_format_supported;
 698     r300screen->screen.is_video_format_supported = vl_video_buffer_is_format_supported;
 699     r300screen->screen.context_create = r300_create_context;
 700     r300screen->screen.fence_reference = r300_fence_reference;
 701     r300screen->screen.fence_signalled = r300_fence_signalled;
 702     r300screen->screen.fence_finish = r300_fence_finish;
 703
 704     r300_init_screen_resource_functions(r300screen);
 705
 706     util_format_s3tc_init();
 707     pipe_mutex_init(r300screen->cmask_mutex);
 708
 709     return &r300screen->screen;
 710 }