gallium: Add and handle PIPE_CAP_CONDITIONAL_RENDER_INVERTED
[mesa.git] / src / gallium / drivers / r300 / r300_screen.c
1 /*
2 * Copyright 2008 Corbin Simpson <MostAwesomeDude@gmail.com>
3 * Copyright 2010 Marek Olšák <maraeo@gmail.com>
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * on the rights to use, copy, modify, merge, publish, distribute, sub
9 * license, and/or sell copies of the Software, and to permit persons to whom
10 * the Software is furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
14 * Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
20 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
21 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
22 * USE OR OTHER DEALINGS IN THE SOFTWARE. */
23
24 #include "util/u_format.h"
25 #include "util/u_format_s3tc.h"
26 #include "util/u_memory.h"
27 #include "os/os_time.h"
28 #include "vl/vl_decoder.h"
29 #include "vl/vl_video_buffer.h"
30
31 #include "r300_context.h"
32 #include "r300_texture.h"
33 #include "r300_screen_buffer.h"
34 #include "r300_state_inlines.h"
35 #include "r300_public.h"
36
37 #include "draw/draw_context.h"
38
39 /* Return the identifier behind whom the brave coders responsible for this
40 * amalgamation of code, sweat, and duct tape, routinely obscure their names.
41 *
42 * ...I should have just put "Corbin Simpson", but I'm not that cool.
43 *
44 * (Or egotistical. Yet.) */
45 static const char* r300_get_vendor(struct pipe_screen* pscreen)
46 {
47 return "X.Org R300 Project";
48 }
49
50 static const char* chip_families[] = {
51 "unknown",
52 "ATI R300",
53 "ATI R350",
54 "ATI RV350",
55 "ATI RV370",
56 "ATI RV380",
57 "ATI RS400",
58 "ATI RC410",
59 "ATI RS480",
60 "ATI R420",
61 "ATI R423",
62 "ATI R430",
63 "ATI R480",
64 "ATI R481",
65 "ATI RV410",
66 "ATI RS600",
67 "ATI RS690",
68 "ATI RS740",
69 "ATI RV515",
70 "ATI R520",
71 "ATI RV530",
72 "ATI R580",
73 "ATI RV560",
74 "ATI RV570"
75 };
76
77 static const char* r300_get_name(struct pipe_screen* pscreen)
78 {
79 struct r300_screen* r300screen = r300_screen(pscreen);
80
81 return chip_families[r300screen->caps.family];
82 }
83
84 static int r300_get_param(struct pipe_screen* pscreen, enum pipe_cap param)
85 {
86 struct r300_screen* r300screen = r300_screen(pscreen);
87 boolean is_r500 = r300screen->caps.is_r500;
88
89 switch (param) {
90 /* Supported features (boolean caps). */
91 case PIPE_CAP_NPOT_TEXTURES:
92 case PIPE_CAP_MIXED_FRAMEBUFFER_SIZES:
93 case PIPE_CAP_TWO_SIDED_STENCIL:
94 case PIPE_CAP_ANISOTROPIC_FILTER:
95 case PIPE_CAP_POINT_SPRITE:
96 case PIPE_CAP_OCCLUSION_QUERY:
97 case PIPE_CAP_TEXTURE_SHADOW_MAP:
98 case PIPE_CAP_TEXTURE_MIRROR_CLAMP:
99 case PIPE_CAP_BLEND_EQUATION_SEPARATE:
100 case PIPE_CAP_VERTEX_ELEMENT_INSTANCE_DIVISOR:
101 case PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT:
102 case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER:
103 case PIPE_CAP_CONDITIONAL_RENDER:
104 case PIPE_CAP_TEXTURE_BARRIER:
105 case PIPE_CAP_TGSI_CAN_COMPACT_CONSTANTS:
106 case PIPE_CAP_USER_INDEX_BUFFERS:
107 case PIPE_CAP_USER_CONSTANT_BUFFERS:
108 case PIPE_CAP_PREFER_BLIT_BASED_TEXTURE_TRANSFER:
109 case PIPE_CAP_BUFFER_MAP_PERSISTENT_COHERENT:
110 return 1;
111
112 case PIPE_CAP_MIN_MAP_BUFFER_ALIGNMENT:
113 return R300_BUFFER_ALIGNMENT;
114
115 case PIPE_CAP_CONSTANT_BUFFER_OFFSET_ALIGNMENT:
116 return 16;
117
118 case PIPE_CAP_GLSL_FEATURE_LEVEL:
119 return 120;
120
121 /* r300 cannot do swizzling of compressed textures. Supported otherwise. */
122 case PIPE_CAP_TEXTURE_SWIZZLE:
123 return util_format_s3tc_enabled ? r300screen->caps.dxtc_swizzle : 1;
124
125 /* We don't support color clamping on r500, so that we can use color
126 * intepolators for generic varyings. */
127 case PIPE_CAP_VERTEX_COLOR_CLAMPED:
128 return !is_r500;
129
130 /* Supported on r500 only. */
131 case PIPE_CAP_VERTEX_COLOR_UNCLAMPED:
132 case PIPE_CAP_MIXED_COLORBUFFER_FORMATS:
133 case PIPE_CAP_SM3:
134 return is_r500 ? 1 : 0;
135
136 /* Unsupported features. */
137 case PIPE_CAP_QUERY_TIME_ELAPSED:
138 case PIPE_CAP_QUERY_PIPELINE_STATISTICS:
139 case PIPE_CAP_MAX_DUAL_SOURCE_RENDER_TARGETS:
140 case PIPE_CAP_INDEP_BLEND_ENABLE:
141 case PIPE_CAP_INDEP_BLEND_FUNC:
142 case PIPE_CAP_DEPTH_CLIP_DISABLE:
143 case PIPE_CAP_SHADER_STENCIL_EXPORT:
144 case PIPE_CAP_MAX_TEXTURE_ARRAY_LAYERS:
145 case PIPE_CAP_TGSI_INSTANCEID:
146 case PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT:
147 case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER:
148 case PIPE_CAP_SEAMLESS_CUBE_MAP:
149 case PIPE_CAP_SEAMLESS_CUBE_MAP_PER_TEXTURE:
150 case PIPE_CAP_MIN_TEXEL_OFFSET:
151 case PIPE_CAP_MAX_TEXEL_OFFSET:
152 case PIPE_CAP_MIN_TEXTURE_GATHER_OFFSET:
153 case PIPE_CAP_MAX_TEXTURE_GATHER_OFFSET:
154 case PIPE_CAP_MAX_STREAM_OUTPUT_BUFFERS:
155 case PIPE_CAP_MAX_STREAM_OUTPUT_SEPARATE_COMPONENTS:
156 case PIPE_CAP_MAX_STREAM_OUTPUT_INTERLEAVED_COMPONENTS:
157 case PIPE_CAP_MAX_GEOMETRY_OUTPUT_VERTICES:
158 case PIPE_CAP_MAX_GEOMETRY_TOTAL_OUTPUT_COMPONENTS:
159 case PIPE_CAP_MAX_VERTEX_STREAMS:
160 case PIPE_CAP_STREAM_OUTPUT_PAUSE_RESUME:
161 case PIPE_CAP_FRAGMENT_COLOR_CLAMPED:
162 case PIPE_CAP_QUADS_FOLLOW_PROVOKING_VERTEX_CONVENTION:
163 case PIPE_CAP_COMPUTE:
164 case PIPE_CAP_START_INSTANCE:
165 case PIPE_CAP_QUERY_TIMESTAMP:
166 case PIPE_CAP_TEXTURE_MULTISAMPLE:
167 case PIPE_CAP_CUBE_MAP_ARRAY:
168 case PIPE_CAP_TEXTURE_BUFFER_OBJECTS:
169 case PIPE_CAP_TEXTURE_BUFFER_OFFSET_ALIGNMENT:
170 case PIPE_CAP_TEXTURE_BORDER_COLOR_QUIRK:
171 case PIPE_CAP_MAX_TEXTURE_BUFFER_SIZE:
172 case PIPE_CAP_TGSI_VS_LAYER_VIEWPORT:
173 case PIPE_CAP_MAX_TEXTURE_GATHER_COMPONENTS:
174 case PIPE_CAP_TEXTURE_GATHER_SM5:
175 case PIPE_CAP_TEXTURE_QUERY_LOD:
176 case PIPE_CAP_FAKE_SW_MSAA:
177 case PIPE_CAP_SAMPLE_SHADING:
178 case PIPE_CAP_TEXTURE_GATHER_OFFSETS:
179 case PIPE_CAP_TGSI_VS_WINDOW_SPACE_POSITION:
180 case PIPE_CAP_DRAW_INDIRECT:
181 case PIPE_CAP_TGSI_FS_FINE_DERIVATIVE:
182 case PIPE_CAP_CONDITIONAL_RENDER_INVERTED:
183 return 0;
184
185 /* SWTCL-only features. */
186 case PIPE_CAP_PRIMITIVE_RESTART:
187 case PIPE_CAP_USER_VERTEX_BUFFERS:
188 return !r300screen->caps.has_tcl;
189
190 /* HWTCL-only features / limitations. */
191 case PIPE_CAP_VERTEX_BUFFER_OFFSET_4BYTE_ALIGNED_ONLY:
192 case PIPE_CAP_VERTEX_BUFFER_STRIDE_4BYTE_ALIGNED_ONLY:
193 case PIPE_CAP_VERTEX_ELEMENT_SRC_OFFSET_4BYTE_ALIGNED_ONLY:
194 return r300screen->caps.has_tcl;
195 case PIPE_CAP_TGSI_TEXCOORD:
196 return 0;
197
198 /* Texturing. */
199 case PIPE_CAP_MAX_TEXTURE_2D_LEVELS:
200 case PIPE_CAP_MAX_TEXTURE_3D_LEVELS:
201 case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS:
202 /* 13 == 4096, 12 == 2048 */
203 return is_r500 ? 13 : 12;
204
205 /* Render targets. */
206 case PIPE_CAP_MAX_RENDER_TARGETS:
207 return 4;
208 case PIPE_CAP_ENDIANNESS:
209 return PIPE_ENDIAN_LITTLE;
210
211 case PIPE_CAP_MAX_VIEWPORTS:
212 return 1;
213
214 case PIPE_CAP_VENDOR_ID:
215 return 0x1002;
216 case PIPE_CAP_DEVICE_ID:
217 return r300screen->info.pci_id;
218 case PIPE_CAP_ACCELERATED:
219 return 1;
220 case PIPE_CAP_VIDEO_MEMORY:
221 return r300screen->info.vram_size >> 20;
222 case PIPE_CAP_UMA:
223 return 0;
224 }
225 return 0;
226 }
227
228 static int r300_get_shader_param(struct pipe_screen *pscreen, unsigned shader, enum pipe_shader_cap param)
229 {
230 struct r300_screen* r300screen = r300_screen(pscreen);
231 boolean is_r400 = r300screen->caps.is_r400;
232 boolean is_r500 = r300screen->caps.is_r500;
233
234 switch (shader) {
235 case PIPE_SHADER_FRAGMENT:
236 switch (param)
237 {
238 case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
239 return is_r500 || is_r400 ? 512 : 96;
240 case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
241 return is_r500 || is_r400 ? 512 : 64;
242 case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
243 return is_r500 || is_r400 ? 512 : 32;
244 case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
245 return is_r500 ? 511 : 4;
246 case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:
247 return is_r500 ? 64 : 0; /* Actually unlimited on r500. */
248 /* Fragment shader limits. */
249 case PIPE_SHADER_CAP_MAX_INPUTS:
250 /* 2 colors + 8 texcoords are always supported
251 * (minus fog and wpos).
252 *
253 * R500 has the ability to turn 3rd and 4th color into
254 * additional texcoords but there is no two-sided color
255 * selection then. However the facing bit can be used instead. */
256 return 10;
257 case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE:
258 return (is_r500 ? 256 : 32) * sizeof(float[4]);
259 case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
260 return 1;
261 case PIPE_SHADER_CAP_MAX_TEMPS:
262 return is_r500 ? 128 : is_r400 ? 64 : 32;
263 case PIPE_SHADER_CAP_MAX_PREDS:
264 return is_r500 ? 1 : 0;
265 case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
266 case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS:
267 return r300screen->caps.num_tex_units;
268 case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
269 case PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED:
270 case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
271 case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
272 case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
273 case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
274 case PIPE_SHADER_CAP_SUBROUTINES:
275 case PIPE_SHADER_CAP_INTEGERS:
276 case PIPE_SHADER_CAP_DOUBLES:
277 return 0;
278 case PIPE_SHADER_CAP_PREFERRED_IR:
279 return PIPE_SHADER_IR_TGSI;
280 }
281 break;
282 case PIPE_SHADER_VERTEX:
283 switch (param)
284 {
285 case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
286 case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS:
287 case PIPE_SHADER_CAP_SUBROUTINES:
288 return 0;
289 default:;
290 }
291
292 if (!r300screen->caps.has_tcl) {
293 return draw_get_shader_param(shader, param);
294 }
295
296 switch (param)
297 {
298 case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
299 case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
300 return is_r500 ? 1024 : 256;
301 case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:
302 return is_r500 ? 4 : 0; /* For loops; not sure about conditionals. */
303 case PIPE_SHADER_CAP_MAX_INPUTS:
304 return 16;
305 case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE:
306 return 256 * sizeof(float[4]);
307 case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
308 return 1;
309 case PIPE_SHADER_CAP_MAX_TEMPS:
310 return 32;
311 case PIPE_SHADER_CAP_MAX_PREDS:
312 return is_r500 ? 4 : 0; /* XXX guessed. */
313 case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
314 return 1;
315 case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
316 case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
317 case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
318 case PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED:
319 case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
320 case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
321 case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
322 case PIPE_SHADER_CAP_SUBROUTINES:
323 case PIPE_SHADER_CAP_INTEGERS:
324 case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
325 case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS:
326 case PIPE_SHADER_CAP_DOUBLES:
327 return 0;
328 case PIPE_SHADER_CAP_PREFERRED_IR:
329 return PIPE_SHADER_IR_TGSI;
330 }
331 break;
332 }
333 return 0;
334 }
335
336 static float r300_get_paramf(struct pipe_screen* pscreen,
337 enum pipe_capf param)
338 {
339 struct r300_screen* r300screen = r300_screen(pscreen);
340
341 switch (param) {
342 case PIPE_CAPF_MAX_LINE_WIDTH:
343 case PIPE_CAPF_MAX_LINE_WIDTH_AA:
344 case PIPE_CAPF_MAX_POINT_WIDTH:
345 case PIPE_CAPF_MAX_POINT_WIDTH_AA:
346 /* The maximum dimensions of the colorbuffer are our practical
347 * rendering limits. 2048 pixels should be enough for anybody. */
348 if (r300screen->caps.is_r500) {
349 return 4096.0f;
350 } else if (r300screen->caps.is_r400) {
351 return 4021.0f;
352 } else {
353 return 2560.0f;
354 }
355 case PIPE_CAPF_MAX_TEXTURE_ANISOTROPY:
356 return 16.0f;
357 case PIPE_CAPF_MAX_TEXTURE_LOD_BIAS:
358 return 16.0f;
359 case PIPE_CAPF_GUARD_BAND_LEFT:
360 case PIPE_CAPF_GUARD_BAND_TOP:
361 case PIPE_CAPF_GUARD_BAND_RIGHT:
362 case PIPE_CAPF_GUARD_BAND_BOTTOM:
363 /* XXX I don't know what these should be but the least we can do is
364 * silence the potential error message */
365 return 0.0f;
366 default:
367 debug_printf("r300: Warning: Unknown CAP %d in get_paramf.\n",
368 param);
369 return 0.0f;
370 }
371 }
372
373 static int r300_get_video_param(struct pipe_screen *screen,
374 enum pipe_video_profile profile,
375 enum pipe_video_entrypoint entrypoint,
376 enum pipe_video_cap param)
377 {
378 switch (param) {
379 case PIPE_VIDEO_CAP_SUPPORTED:
380 return vl_profile_supported(screen, profile, entrypoint);
381 case PIPE_VIDEO_CAP_NPOT_TEXTURES:
382 return 0;
383 case PIPE_VIDEO_CAP_MAX_WIDTH:
384 case PIPE_VIDEO_CAP_MAX_HEIGHT:
385 return vl_video_buffer_max_size(screen);
386 case PIPE_VIDEO_CAP_PREFERED_FORMAT:
387 return PIPE_FORMAT_NV12;
388 case PIPE_VIDEO_CAP_PREFERS_INTERLACED:
389 return false;
390 case PIPE_VIDEO_CAP_SUPPORTS_INTERLACED:
391 return false;
392 case PIPE_VIDEO_CAP_SUPPORTS_PROGRESSIVE:
393 return true;
394 case PIPE_VIDEO_CAP_MAX_LEVEL:
395 return vl_level_supported(screen, profile);
396 default:
397 return 0;
398 }
399 }
400
401 /**
402 * Whether the format matches:
403 * PIPE_FORMAT_?10?10?10?2_UNORM
404 */
405 static INLINE boolean
406 util_format_is_rgba1010102_variant(const struct util_format_description *desc)
407 {
408 static const unsigned size[4] = {10, 10, 10, 2};
409 unsigned chan;
410
411 if (desc->block.width != 1 ||
412 desc->block.height != 1 ||
413 desc->block.bits != 32)
414 return FALSE;
415
416 for (chan = 0; chan < 4; ++chan) {
417 if(desc->channel[chan].type != UTIL_FORMAT_TYPE_UNSIGNED &&
418 desc->channel[chan].type != UTIL_FORMAT_TYPE_VOID)
419 return FALSE;
420 if (desc->channel[chan].size != size[chan])
421 return FALSE;
422 }
423
424 return TRUE;
425 }
426
427 static boolean r300_is_format_supported(struct pipe_screen* screen,
428 enum pipe_format format,
429 enum pipe_texture_target target,
430 unsigned sample_count,
431 unsigned usage)
432 {
433 uint32_t retval = 0;
434 boolean drm_2_8_0 = r300_screen(screen)->info.drm_minor >= 8;
435 boolean is_r500 = r300_screen(screen)->caps.is_r500;
436 boolean is_r400 = r300_screen(screen)->caps.is_r400;
437 boolean is_color2101010 = format == PIPE_FORMAT_R10G10B10A2_UNORM ||
438 format == PIPE_FORMAT_R10G10B10X2_SNORM ||
439 format == PIPE_FORMAT_B10G10R10A2_UNORM ||
440 format == PIPE_FORMAT_B10G10R10X2_UNORM ||
441 format == PIPE_FORMAT_R10SG10SB10SA2U_NORM;
442 boolean is_ati1n = format == PIPE_FORMAT_RGTC1_UNORM ||
443 format == PIPE_FORMAT_RGTC1_SNORM ||
444 format == PIPE_FORMAT_LATC1_UNORM ||
445 format == PIPE_FORMAT_LATC1_SNORM;
446 boolean is_ati2n = format == PIPE_FORMAT_RGTC2_UNORM ||
447 format == PIPE_FORMAT_RGTC2_SNORM ||
448 format == PIPE_FORMAT_LATC2_UNORM ||
449 format == PIPE_FORMAT_LATC2_SNORM;
450 boolean is_x16f_xy16f = format == PIPE_FORMAT_R16_FLOAT ||
451 format == PIPE_FORMAT_R16G16_FLOAT ||
452 format == PIPE_FORMAT_A16_FLOAT ||
453 format == PIPE_FORMAT_L16_FLOAT ||
454 format == PIPE_FORMAT_L16A16_FLOAT ||
455 format == PIPE_FORMAT_R16A16_FLOAT ||
456 format == PIPE_FORMAT_I16_FLOAT;
457 boolean is_half_float = format == PIPE_FORMAT_R16_FLOAT ||
458 format == PIPE_FORMAT_R16G16_FLOAT ||
459 format == PIPE_FORMAT_R16G16B16_FLOAT ||
460 format == PIPE_FORMAT_R16G16B16A16_FLOAT ||
461 format == PIPE_FORMAT_R16G16B16X16_FLOAT;
462 const struct util_format_description *desc;
463
464 if (!util_format_is_supported(format, usage))
465 return FALSE;
466
467 /* Check multisampling support. */
468 switch (sample_count) {
469 case 0:
470 case 1:
471 break;
472 case 2:
473 case 4:
474 case 6:
475 /* We need DRM 2.8.0. */
476 if (!drm_2_8_0) {
477 return FALSE;
478 }
479 /* No texturing and scanout. */
480 if (usage & (PIPE_BIND_SAMPLER_VIEW |
481 PIPE_BIND_DISPLAY_TARGET |
482 PIPE_BIND_SCANOUT)) {
483 return FALSE;
484 }
485
486 desc = util_format_description(format);
487
488 if (is_r500) {
489 /* Only allow depth/stencil, RGBA8, RGBA1010102, RGBA16F. */
490 if (!util_format_is_depth_or_stencil(format) &&
491 !util_format_is_rgba8_variant(desc) &&
492 !util_format_is_rgba1010102_variant(desc) &&
493 format != PIPE_FORMAT_R16G16B16A16_FLOAT &&
494 format != PIPE_FORMAT_R16G16B16X16_FLOAT) {
495 return FALSE;
496 }
497 } else {
498 /* Only allow depth/stencil, RGBA8. */
499 if (!util_format_is_depth_or_stencil(format) &&
500 !util_format_is_rgba8_variant(desc)) {
501 return FALSE;
502 }
503 }
504 break;
505 default:
506 return FALSE;
507 }
508
509 /* Check sampler format support. */
510 if ((usage & PIPE_BIND_SAMPLER_VIEW) &&
511 /* these two are broken for an unknown reason */
512 format != PIPE_FORMAT_R8G8B8X8_SNORM &&
513 format != PIPE_FORMAT_R16G16B16X16_SNORM &&
514 /* ATI1N is r5xx-only. */
515 (is_r500 || !is_ati1n) &&
516 /* ATI2N is supported on r4xx-r5xx. */
517 (is_r400 || is_r500 || !is_ati2n) &&
518 /* R16F and RG16F texture support was added in as late as DRM 2.8.0 */
519 (drm_2_8_0 || !is_x16f_xy16f) &&
520 r300_is_sampler_format_supported(format)) {
521 retval |= PIPE_BIND_SAMPLER_VIEW;
522 }
523
524 /* Check colorbuffer format support. */
525 if ((usage & (PIPE_BIND_RENDER_TARGET |
526 PIPE_BIND_DISPLAY_TARGET |
527 PIPE_BIND_SCANOUT |
528 PIPE_BIND_SHARED)) &&
529 /* 2101010 cannot be rendered to on non-r5xx. */
530 (!is_color2101010 || (is_r500 && drm_2_8_0)) &&
531 r300_is_colorbuffer_format_supported(format)) {
532 retval |= usage &
533 (PIPE_BIND_RENDER_TARGET |
534 PIPE_BIND_DISPLAY_TARGET |
535 PIPE_BIND_SCANOUT |
536 PIPE_BIND_SHARED);
537 }
538
539 /* Check depth-stencil format support. */
540 if (usage & PIPE_BIND_DEPTH_STENCIL &&
541 r300_is_zs_format_supported(format)) {
542 retval |= PIPE_BIND_DEPTH_STENCIL;
543 }
544
545 /* Check vertex buffer format support. */
546 if (usage & PIPE_BIND_VERTEX_BUFFER) {
547 if (r300_screen(screen)->caps.has_tcl) {
548 /* Half float is supported on >= R400. */
549 if ((is_r400 || is_r500 || !is_half_float) &&
550 r300_translate_vertex_data_type(format) != R300_INVALID_FORMAT) {
551 retval |= PIPE_BIND_VERTEX_BUFFER;
552 }
553 } else {
554 /* SW TCL */
555 if (!util_format_is_pure_integer(format)) {
556 retval |= PIPE_BIND_VERTEX_BUFFER;
557 }
558 }
559 }
560
561 /* Transfers are always supported. */
562 if (usage & PIPE_BIND_TRANSFER_READ)
563 retval |= PIPE_BIND_TRANSFER_READ;
564 if (usage & PIPE_BIND_TRANSFER_WRITE)
565 retval |= PIPE_BIND_TRANSFER_WRITE;
566
567 return retval == usage;
568 }
569
570 static void r300_destroy_screen(struct pipe_screen* pscreen)
571 {
572 struct r300_screen* r300screen = r300_screen(pscreen);
573 struct radeon_winsys *rws = radeon_winsys(pscreen);
574
575 if (rws && !rws->unref(rws))
576 return;
577
578 pipe_mutex_destroy(r300screen->cmask_mutex);
579
580 if (rws)
581 rws->destroy(rws);
582
583 FREE(r300screen);
584 }
585
586 static void r300_fence_reference(struct pipe_screen *screen,
587 struct pipe_fence_handle **ptr,
588 struct pipe_fence_handle *fence)
589 {
590 struct radeon_winsys *rws = r300_screen(screen)->rws;
591
592 rws->fence_reference(ptr, fence);
593 }
594
595 static boolean r300_fence_signalled(struct pipe_screen *screen,
596 struct pipe_fence_handle *fence)
597 {
598 struct radeon_winsys *rws = r300_screen(screen)->rws;
599
600 return rws->fence_wait(rws, fence, 0);
601 }
602
603 static boolean r300_fence_finish(struct pipe_screen *screen,
604 struct pipe_fence_handle *fence,
605 uint64_t timeout)
606 {
607 struct radeon_winsys *rws = r300_screen(screen)->rws;
608
609 return rws->fence_wait(rws, fence, timeout);
610 }
611
612 struct pipe_screen* r300_screen_create(struct radeon_winsys *rws)
613 {
614 struct r300_screen *r300screen = CALLOC_STRUCT(r300_screen);
615
616 if (!r300screen) {
617 FREE(r300screen);
618 return NULL;
619 }
620
621 rws->query_info(rws, &r300screen->info);
622
623 r300_init_debug(r300screen);
624 r300_parse_chipset(r300screen->info.pci_id, &r300screen->caps);
625
626 if (SCREEN_DBG_ON(r300screen, DBG_NO_ZMASK))
627 r300screen->caps.zmask_ram = 0;
628 if (SCREEN_DBG_ON(r300screen, DBG_NO_HIZ))
629 r300screen->caps.hiz_ram = 0;
630
631 if (r300screen->info.drm_minor < 8)
632 r300screen->caps.has_us_format = FALSE;
633
634 r300screen->rws = rws;
635 r300screen->screen.destroy = r300_destroy_screen;
636 r300screen->screen.get_name = r300_get_name;
637 r300screen->screen.get_vendor = r300_get_vendor;
638 r300screen->screen.get_param = r300_get_param;
639 r300screen->screen.get_shader_param = r300_get_shader_param;
640 r300screen->screen.get_paramf = r300_get_paramf;
641 r300screen->screen.get_video_param = r300_get_video_param;
642 r300screen->screen.is_format_supported = r300_is_format_supported;
643 r300screen->screen.is_video_format_supported = vl_video_buffer_is_format_supported;
644 r300screen->screen.context_create = r300_create_context;
645 r300screen->screen.fence_reference = r300_fence_reference;
646 r300screen->screen.fence_signalled = r300_fence_signalled;
647 r300screen->screen.fence_finish = r300_fence_finish;
648
649 r300_init_screen_resource_functions(r300screen);
650
651 util_format_s3tc_init();
652 pipe_mutex_init(r300screen->cmask_mutex);
653
654 return &r300screen->screen;
655 }