src/gallium/drivers/r300/r300_screen.c

   1 /*
   2  * Copyright 2008 Corbin Simpson <MostAwesomeDude@gmail.com>
   3  * Copyright 2010 Marek Olšák <maraeo@gmail.com>
   4  *
   5  * Permission is hereby granted, free of charge, to any person obtaining a
   6  * copy of this software and associated documentation files (the "Software"),
   7  * to deal in the Software without restriction, including without limitation
   8  * on the rights to use, copy, modify, merge, publish, distribute, sub
   9  * license, and/or sell copies of the Software, and to permit persons to whom
  10  * the Software is furnished to do so, subject to the following conditions:
  11  *
  12  * The above copyright notice and this permission notice (including the next
  13  * paragraph) shall be included in all copies or substantial portions of the
  14  * Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  19  * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
  20  * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
  21  * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
  22  * USE OR OTHER DEALINGS IN THE SOFTWARE. */
  23
  24 #include "util/u_format.h"
  25 #include "util/u_format_s3tc.h"
  26 #include "util/u_memory.h"
  27 #include "os/os_time.h"
  28 #include "vl/vl_decoder.h"
  29 #include "vl/vl_video_buffer.h"
  30
  31 #include "r300_context.h"
  32 #include "r300_texture.h"
  33 #include "r300_screen_buffer.h"
  34 #include "r300_state_inlines.h"
  35 #include "r300_public.h"
  36
  37 #include "draw/draw_context.h"
  38
  39 /* Return the identifier behind whom the brave coders responsible for this
  40  * amalgamation of code, sweat, and duct tape, routinely obscure their names.
  41  *
  42  * ...I should have just put "Corbin Simpson", but I'm not that cool.
  43  *
  44  * (Or egotistical. Yet.) */
  45 static const char* r300_get_vendor(struct pipe_screen* pscreen)
  46 {
  47     return "X.Org R300 Project";
  48 }
  49
  50 static const char* r300_get_device_vendor(struct pipe_screen* pscreen)
  51 {
  52     return "ATI";
  53 }
  54
  55 static const char* chip_families[] = {
  56     "unknown",
  57     "ATI R300",
  58     "ATI R350",
  59     "ATI RV350",
  60     "ATI RV370",
  61     "ATI RV380",
  62     "ATI RS400",
  63     "ATI RC410",
  64     "ATI RS480",
  65     "ATI R420",
  66     "ATI R423",
  67     "ATI R430",
  68     "ATI R480",
  69     "ATI R481",
  70     "ATI RV410",
  71     "ATI RS600",
  72     "ATI RS690",
  73     "ATI RS740",
  74     "ATI RV515",
  75     "ATI R520",
  76     "ATI RV530",
  77     "ATI R580",
  78     "ATI RV560",
  79     "ATI RV570"
  80 };
  81
  82 static const char* r300_get_name(struct pipe_screen* pscreen)
  83 {
  84     struct r300_screen* r300screen = r300_screen(pscreen);
  85
  86     return chip_families[r300screen->caps.family];
  87 }
  88
  89 static int r300_get_param(struct pipe_screen* pscreen, enum pipe_cap param)
  90 {
  91     struct r300_screen* r300screen = r300_screen(pscreen);
  92     boolean is_r500 = r300screen->caps.is_r500;
  93
  94     switch (param) {
  95         /* Supported features (boolean caps). */
  96         case PIPE_CAP_NPOT_TEXTURES:
  97         case PIPE_CAP_MIXED_FRAMEBUFFER_SIZES:
  98         case PIPE_CAP_MIXED_COLOR_DEPTH_BITS:
  99         case PIPE_CAP_TWO_SIDED_STENCIL:
 100         case PIPE_CAP_ANISOTROPIC_FILTER:
 101         case PIPE_CAP_POINT_SPRITE:
 102         case PIPE_CAP_OCCLUSION_QUERY:
 103         case PIPE_CAP_TEXTURE_SHADOW_MAP:
 104         case PIPE_CAP_TEXTURE_MIRROR_CLAMP:
 105         case PIPE_CAP_BLEND_EQUATION_SEPARATE:
 106         case PIPE_CAP_VERTEX_ELEMENT_INSTANCE_DIVISOR:
 107         case PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT:
 108         case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER:
 109         case PIPE_CAP_CONDITIONAL_RENDER:
 110         case PIPE_CAP_TEXTURE_BARRIER:
 111         case PIPE_CAP_TGSI_CAN_COMPACT_CONSTANTS:
 112         case PIPE_CAP_USER_CONSTANT_BUFFERS:
 113         case PIPE_CAP_PREFER_BLIT_BASED_TEXTURE_TRANSFER:
 114         case PIPE_CAP_BUFFER_MAP_PERSISTENT_COHERENT:
 115         case PIPE_CAP_CLIP_HALFZ:
 116             return 1;
 117
 118         case PIPE_CAP_MIN_MAP_BUFFER_ALIGNMENT:
 119             return R300_BUFFER_ALIGNMENT;
 120
 121         case PIPE_CAP_CONSTANT_BUFFER_OFFSET_ALIGNMENT:
 122             return 16;
 123
 124         case PIPE_CAP_GLSL_FEATURE_LEVEL:
 125             return 120;
 126
 127         /* r300 cannot do swizzling of compressed textures. Supported otherwise. */
 128         case PIPE_CAP_TEXTURE_SWIZZLE:
 129             return util_format_s3tc_enabled ? r300screen->caps.dxtc_swizzle : 1;
 130
 131         /* We don't support color clamping on r500, so that we can use color
 132          * intepolators for generic varyings. */
 133         case PIPE_CAP_VERTEX_COLOR_CLAMPED:
 134             return !is_r500;
 135
 136         /* Supported on r500 only. */
 137         case PIPE_CAP_VERTEX_COLOR_UNCLAMPED:
 138         case PIPE_CAP_MIXED_COLORBUFFER_FORMATS:
 139         case PIPE_CAP_SM3:
 140             return is_r500 ? 1 : 0;
 141
 142         /* Unsupported features. */
 143         case PIPE_CAP_QUERY_TIME_ELAPSED:
 144         case PIPE_CAP_QUERY_PIPELINE_STATISTICS:
 145         case PIPE_CAP_MAX_DUAL_SOURCE_RENDER_TARGETS:
 146         case PIPE_CAP_INDEP_BLEND_ENABLE:
 147         case PIPE_CAP_INDEP_BLEND_FUNC:
 148         case PIPE_CAP_DEPTH_CLIP_DISABLE:
 149         case PIPE_CAP_SHADER_STENCIL_EXPORT:
 150         case PIPE_CAP_MAX_TEXTURE_ARRAY_LAYERS:
 151         case PIPE_CAP_TGSI_INSTANCEID:
 152         case PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT:
 153         case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER:
 154         case PIPE_CAP_SEAMLESS_CUBE_MAP:
 155         case PIPE_CAP_SEAMLESS_CUBE_MAP_PER_TEXTURE:
 156         case PIPE_CAP_MIN_TEXEL_OFFSET:
 157         case PIPE_CAP_MAX_TEXEL_OFFSET:
 158         case PIPE_CAP_MIN_TEXTURE_GATHER_OFFSET:
 159         case PIPE_CAP_MAX_TEXTURE_GATHER_OFFSET:
 160         case PIPE_CAP_MAX_STREAM_OUTPUT_BUFFERS:
 161         case PIPE_CAP_MAX_STREAM_OUTPUT_SEPARATE_COMPONENTS:
 162         case PIPE_CAP_MAX_STREAM_OUTPUT_INTERLEAVED_COMPONENTS:
 163         case PIPE_CAP_MAX_GEOMETRY_OUTPUT_VERTICES:
 164         case PIPE_CAP_MAX_GEOMETRY_TOTAL_OUTPUT_COMPONENTS:
 165         case PIPE_CAP_MAX_VERTEX_STREAMS:
 166         case PIPE_CAP_STREAM_OUTPUT_PAUSE_RESUME:
 167         case PIPE_CAP_STREAM_OUTPUT_INTERLEAVE_BUFFERS:
 168         case PIPE_CAP_FRAGMENT_COLOR_CLAMPED:
 169         case PIPE_CAP_QUADS_FOLLOW_PROVOKING_VERTEX_CONVENTION:
 170         case PIPE_CAP_COMPUTE:
 171         case PIPE_CAP_START_INSTANCE:
 172         case PIPE_CAP_QUERY_TIMESTAMP:
 173         case PIPE_CAP_TEXTURE_MULTISAMPLE:
 174         case PIPE_CAP_CUBE_MAP_ARRAY:
 175         case PIPE_CAP_TEXTURE_BUFFER_OBJECTS:
 176         case PIPE_CAP_TEXTURE_BUFFER_OFFSET_ALIGNMENT:
 177         case PIPE_CAP_TEXTURE_BORDER_COLOR_QUIRK:
 178         case PIPE_CAP_MAX_TEXTURE_BUFFER_SIZE:
 179         case PIPE_CAP_TGSI_VS_LAYER_VIEWPORT:
 180         case PIPE_CAP_MAX_TEXTURE_GATHER_COMPONENTS:
 181         case PIPE_CAP_TEXTURE_GATHER_SM5:
 182         case PIPE_CAP_TEXTURE_QUERY_LOD:
 183         case PIPE_CAP_FAKE_SW_MSAA:
 184         case PIPE_CAP_SAMPLE_SHADING:
 185         case PIPE_CAP_TEXTURE_GATHER_OFFSETS:
 186         case PIPE_CAP_DRAW_INDIRECT:
 187         case PIPE_CAP_MULTI_DRAW_INDIRECT:
 188         case PIPE_CAP_MULTI_DRAW_INDIRECT_PARAMS:
 189         case PIPE_CAP_TGSI_FS_FINE_DERIVATIVE:
 190         case PIPE_CAP_CONDITIONAL_RENDER_INVERTED:
 191         case PIPE_CAP_SAMPLER_VIEW_TARGET:
 192         case PIPE_CAP_VERTEXID_NOBASE:
 193         case PIPE_CAP_POLYGON_OFFSET_CLAMP:
 194         case PIPE_CAP_MULTISAMPLE_Z_RESOLVE:
 195         case PIPE_CAP_RESOURCE_FROM_USER_MEMORY:
 196         case PIPE_CAP_DEVICE_RESET_STATUS_QUERY:
 197         case PIPE_CAP_MAX_SHADER_PATCH_VARYINGS:
 198         case PIPE_CAP_TEXTURE_FLOAT_LINEAR:
 199         case PIPE_CAP_TEXTURE_HALF_FLOAT_LINEAR:
 200         case PIPE_CAP_DEPTH_BOUNDS_TEST:
 201         case PIPE_CAP_TGSI_TXQS:
 202         case PIPE_CAP_FORCE_PERSAMPLE_INTERP:
 203         case PIPE_CAP_SHAREABLE_SHADERS:
 204         case PIPE_CAP_COPY_BETWEEN_COMPRESSED_AND_PLAIN_FORMATS:
 205         case PIPE_CAP_CLEAR_TEXTURE:
 206         case PIPE_CAP_DRAW_PARAMETERS:
 207         case PIPE_CAP_TGSI_PACK_HALF_FLOAT:
 208         case PIPE_CAP_TGSI_FS_POSITION_IS_SYSVAL:
 209         case PIPE_CAP_TGSI_FS_FACE_IS_INTEGER_SYSVAL:
 210         case PIPE_CAP_SHADER_BUFFER_OFFSET_ALIGNMENT:
 211         case PIPE_CAP_INVALIDATE_BUFFER:
 212         case PIPE_CAP_GENERATE_MIPMAP:
 213         case PIPE_CAP_STRING_MARKER:
 214         case PIPE_CAP_BUFFER_SAMPLER_VIEW_RGBA_ONLY:
 215         case PIPE_CAP_SURFACE_REINTERPRET_BLOCKS:
 216         case PIPE_CAP_QUERY_BUFFER_OBJECT:
 217         case PIPE_CAP_QUERY_MEMORY_INFO:
 218         case PIPE_CAP_FRAMEBUFFER_NO_ATTACHMENT:
 219         case PIPE_CAP_ROBUST_BUFFER_ACCESS_BEHAVIOR:
 220         case PIPE_CAP_CULL_DISTANCE:
 221         case PIPE_CAP_PRIMITIVE_RESTART_FOR_PATCHES:
 222         case PIPE_CAP_TGSI_VOTE:
 223         case PIPE_CAP_MAX_WINDOW_RECTANGLES:
 224         case PIPE_CAP_POLYGON_OFFSET_UNITS_UNSCALED:
 225         case PIPE_CAP_VIEWPORT_SUBPIXEL_BITS:
 226         case PIPE_CAP_TGSI_ARRAY_COMPONENTS:
 227         case PIPE_CAP_TGSI_CAN_READ_OUTPUTS:
 228         case PIPE_CAP_NATIVE_FENCE_FD:
 229         case PIPE_CAP_GLSL_OPTIMIZE_CONSERVATIVELY:
 230         case PIPE_CAP_TGSI_FS_FBFETCH:
 231         case PIPE_CAP_TGSI_MUL_ZERO_WINS:
 232         case PIPE_CAP_DOUBLES:
 233         case PIPE_CAP_INT64:
 234         case PIPE_CAP_INT64_DIVMOD:
 235         case PIPE_CAP_TGSI_TEX_TXF_LZ:
 236         case PIPE_CAP_TGSI_CLOCK:
 237         case PIPE_CAP_POLYGON_MODE_FILL_RECTANGLE:
 238             return 0;
 239
 240         /* SWTCL-only features. */
 241         case PIPE_CAP_PRIMITIVE_RESTART:
 242         case PIPE_CAP_USER_VERTEX_BUFFERS:
 243         case PIPE_CAP_TGSI_VS_WINDOW_SPACE_POSITION:
 244             return !r300screen->caps.has_tcl;
 245
 246         /* HWTCL-only features / limitations. */
 247         case PIPE_CAP_VERTEX_BUFFER_OFFSET_4BYTE_ALIGNED_ONLY:
 248         case PIPE_CAP_VERTEX_BUFFER_STRIDE_4BYTE_ALIGNED_ONLY:
 249         case PIPE_CAP_VERTEX_ELEMENT_SRC_OFFSET_4BYTE_ALIGNED_ONLY:
 250             return r300screen->caps.has_tcl;
 251         case PIPE_CAP_TGSI_TEXCOORD:
 252             return 0;
 253
 254         /* Texturing. */
 255         case PIPE_CAP_MAX_TEXTURE_2D_LEVELS:
 256         case PIPE_CAP_MAX_TEXTURE_3D_LEVELS:
 257         case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS:
 258             /* 13 == 4096, 12 == 2048 */
 259             return is_r500 ? 13 : 12;
 260
 261         /* Render targets. */
 262         case PIPE_CAP_MAX_RENDER_TARGETS:
 263             return 4;
 264         case PIPE_CAP_ENDIANNESS:
 265             return PIPE_ENDIAN_LITTLE;
 266
 267         case PIPE_CAP_MAX_VIEWPORTS:
 268             return 1;
 269
 270         case PIPE_CAP_MAX_VERTEX_ATTRIB_STRIDE:
 271             return 2048;
 272
 273         case PIPE_CAP_VENDOR_ID:
 274                 return 0x1002;
 275         case PIPE_CAP_DEVICE_ID:
 276                 return r300screen->info.pci_id;
 277         case PIPE_CAP_ACCELERATED:
 278                 return 1;
 279         case PIPE_CAP_VIDEO_MEMORY:
 280                 return r300screen->info.vram_size >> 20;
 281         case PIPE_CAP_UMA:
 282                 return 0;
 283         case PIPE_CAP_PCI_GROUP:
 284             return r300screen->info.pci_domain;
 285         case PIPE_CAP_PCI_BUS:
 286             return r300screen->info.pci_bus;
 287         case PIPE_CAP_PCI_DEVICE:
 288             return r300screen->info.pci_dev;
 289         case PIPE_CAP_PCI_FUNCTION:
 290             return r300screen->info.pci_func;
 291     }
 292     return 0;
 293 }
 294
 295 static int r300_get_shader_param(struct pipe_screen *pscreen,
 296                                  enum pipe_shader_type shader,
 297                                  enum pipe_shader_cap param)
 298 {
 299    struct r300_screen* r300screen = r300_screen(pscreen);
 300    boolean is_r400 = r300screen->caps.is_r400;
 301    boolean is_r500 = r300screen->caps.is_r500;
 302
 303    switch (shader) {
 304     case PIPE_SHADER_FRAGMENT:
 305         switch (param)
 306         {
 307         case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
 308             return is_r500 || is_r400 ? 512 : 96;
 309         case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
 310             return is_r500 || is_r400 ? 512 : 64;
 311         case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
 312             return is_r500 || is_r400 ? 512 : 32;
 313         case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
 314             return is_r500 ? 511 : 4;
 315         case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:
 316             return is_r500 ? 64 : 0; /* Actually unlimited on r500. */
 317             /* Fragment shader limits. */
 318         case PIPE_SHADER_CAP_MAX_INPUTS:
 319             /* 2 colors + 8 texcoords are always supported
 320              * (minus fog and wpos).
 321              *
 322              * R500 has the ability to turn 3rd and 4th color into
 323              * additional texcoords but there is no two-sided color
 324              * selection then. However the facing bit can be used instead. */
 325             return 10;
 326         case PIPE_SHADER_CAP_MAX_OUTPUTS:
 327             return 4;
 328         case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE:
 329             return (is_r500 ? 256 : 32) * sizeof(float[4]);
 330         case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
 331         case PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE:
 332             return 1;
 333         case PIPE_SHADER_CAP_MAX_TEMPS:
 334             return is_r500 ? 128 : is_r400 ? 64 : 32;
 335         case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
 336         case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS:
 337            return r300screen->caps.num_tex_units;
 338         case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
 339         case PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED:
 340         case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
 341         case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
 342         case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
 343         case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
 344         case PIPE_SHADER_CAP_SUBROUTINES:
 345         case PIPE_SHADER_CAP_INTEGERS:
 346         case PIPE_SHADER_CAP_TGSI_DROUND_SUPPORTED:
 347         case PIPE_SHADER_CAP_TGSI_DFRACEXP_DLDEXP_SUPPORTED:
 348         case PIPE_SHADER_CAP_TGSI_FMA_SUPPORTED:
 349         case PIPE_SHADER_CAP_MAX_SHADER_BUFFERS:
 350         case PIPE_SHADER_CAP_MAX_SHADER_IMAGES:
 351         case PIPE_SHADER_CAP_LOWER_IF_THRESHOLD:
 352             return 0;
 353         case PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT:
 354             return 32;
 355         case PIPE_SHADER_CAP_PREFERRED_IR:
 356             return PIPE_SHADER_IR_TGSI;
 357         case PIPE_SHADER_CAP_SUPPORTED_IRS:
 358             return 0;
 359         }
 360         break;
 361     case PIPE_SHADER_VERTEX:
 362         switch (param)
 363         {
 364         case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
 365         case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS:
 366         case PIPE_SHADER_CAP_SUBROUTINES:
 367             return 0;
 368         default:;
 369         }
 370
 371         if (!r300screen->caps.has_tcl) {
 372             return draw_get_shader_param(shader, param);
 373         }
 374
 375         switch (param)
 376         {
 377         case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
 378         case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
 379             return is_r500 ? 1024 : 256;
 380         case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:
 381             return is_r500 ? 4 : 0; /* For loops; not sure about conditionals. */
 382         case PIPE_SHADER_CAP_MAX_INPUTS:
 383             return 16;
 384         case PIPE_SHADER_CAP_MAX_OUTPUTS:
 385             return 10;
 386         case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE:
 387             return 256 * sizeof(float[4]);
 388         case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
 389             return 1;
 390         case PIPE_SHADER_CAP_MAX_TEMPS:
 391             return 32;
 392         case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
 393         case PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE:
 394             return 1;
 395         case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
 396         case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
 397         case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
 398         case PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED:
 399         case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
 400         case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
 401         case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
 402         case PIPE_SHADER_CAP_SUBROUTINES:
 403         case PIPE_SHADER_CAP_INTEGERS:
 404         case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
 405         case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS:
 406         case PIPE_SHADER_CAP_TGSI_DROUND_SUPPORTED:
 407         case PIPE_SHADER_CAP_TGSI_DFRACEXP_DLDEXP_SUPPORTED:
 408         case PIPE_SHADER_CAP_TGSI_FMA_SUPPORTED:
 409         case PIPE_SHADER_CAP_MAX_SHADER_BUFFERS:
 410         case PIPE_SHADER_CAP_MAX_SHADER_IMAGES:
 411         case PIPE_SHADER_CAP_LOWER_IF_THRESHOLD:
 412             return 0;
 413         case PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT:
 414             return 32;
 415         case PIPE_SHADER_CAP_PREFERRED_IR:
 416             return PIPE_SHADER_IR_TGSI;
 417         case PIPE_SHADER_CAP_SUPPORTED_IRS:
 418             return 0;
 419         }
 420         break;
 421     default:
 422         ; /* nothing */
 423     }
 424     return 0;
 425 }
 426
 427 static float r300_get_paramf(struct pipe_screen* pscreen,
 428                              enum pipe_capf param)
 429 {
 430     struct r300_screen* r300screen = r300_screen(pscreen);
 431
 432     switch (param) {
 433         case PIPE_CAPF_MAX_LINE_WIDTH:
 434         case PIPE_CAPF_MAX_LINE_WIDTH_AA:
 435         case PIPE_CAPF_MAX_POINT_WIDTH:
 436         case PIPE_CAPF_MAX_POINT_WIDTH_AA:
 437             /* The maximum dimensions of the colorbuffer are our practical
 438              * rendering limits. 2048 pixels should be enough for anybody. */
 439             if (r300screen->caps.is_r500) {
 440                 return 4096.0f;
 441             } else if (r300screen->caps.is_r400) {
 442                 return 4021.0f;
 443             } else {
 444                 return 2560.0f;
 445             }
 446         case PIPE_CAPF_MAX_TEXTURE_ANISOTROPY:
 447             return 16.0f;
 448         case PIPE_CAPF_MAX_TEXTURE_LOD_BIAS:
 449             return 16.0f;
 450         case PIPE_CAPF_GUARD_BAND_LEFT:
 451         case PIPE_CAPF_GUARD_BAND_TOP:
 452         case PIPE_CAPF_GUARD_BAND_RIGHT:
 453         case PIPE_CAPF_GUARD_BAND_BOTTOM:
 454             return 0.0f;
 455         default:
 456             debug_printf("r300: Warning: Unknown CAP %d in get_paramf.\n",
 457                          param);
 458             return 0.0f;
 459     }
 460 }
 461
 462 static int r300_get_video_param(struct pipe_screen *screen,
 463                                 enum pipe_video_profile profile,
 464                                 enum pipe_video_entrypoint entrypoint,
 465                                 enum pipe_video_cap param)
 466 {
 467    switch (param) {
 468       case PIPE_VIDEO_CAP_SUPPORTED:
 469          return vl_profile_supported(screen, profile, entrypoint);
 470       case PIPE_VIDEO_CAP_NPOT_TEXTURES:
 471          return 0;
 472       case PIPE_VIDEO_CAP_MAX_WIDTH:
 473       case PIPE_VIDEO_CAP_MAX_HEIGHT:
 474          return vl_video_buffer_max_size(screen);
 475       case PIPE_VIDEO_CAP_PREFERED_FORMAT:
 476          return PIPE_FORMAT_NV12;
 477       case PIPE_VIDEO_CAP_PREFERS_INTERLACED:
 478          return false;
 479       case PIPE_VIDEO_CAP_SUPPORTS_INTERLACED:
 480          return false;
 481       case PIPE_VIDEO_CAP_SUPPORTS_PROGRESSIVE:
 482          return true;
 483       case PIPE_VIDEO_CAP_MAX_LEVEL:
 484          return vl_level_supported(screen, profile);
 485       default:
 486          return 0;
 487    }
 488 }
 489
 490 /**
 491  * Whether the format matches:
 492  *   PIPE_FORMAT_?10?10?10?2_UNORM
 493  */
 494 static inline boolean
 495 util_format_is_rgba1010102_variant(const struct util_format_description *desc)
 496 {
 497    static const unsigned size[4] = {10, 10, 10, 2};
 498    unsigned chan;
 499
 500    if (desc->block.width != 1 ||
 501        desc->block.height != 1 ||
 502        desc->block.bits != 32)
 503       return FALSE;
 504
 505    for (chan = 0; chan < 4; ++chan) {
 506       if(desc->channel[chan].type != UTIL_FORMAT_TYPE_UNSIGNED &&
 507          desc->channel[chan].type != UTIL_FORMAT_TYPE_VOID)
 508          return FALSE;
 509       if (desc->channel[chan].size != size[chan])
 510          return FALSE;
 511    }
 512
 513    return TRUE;
 514 }
 515
 516 static bool r300_is_blending_supported(struct r300_screen *rscreen,
 517                                        enum pipe_format format)
 518 {
 519     int c;
 520     const struct util_format_description *desc =
 521         util_format_description(format);
 522
 523     if (desc->layout != UTIL_FORMAT_LAYOUT_PLAIN)
 524         return false;
 525
 526     c = util_format_get_first_non_void_channel(format);
 527
 528     /* RGBA16F */
 529     if (rscreen->caps.is_r500 &&
 530         desc->nr_channels == 4 &&
 531         desc->channel[c].size == 16 &&
 532         desc->channel[c].type == UTIL_FORMAT_TYPE_FLOAT)
 533         return true;
 534
 535     if (desc->channel[c].normalized &&
 536         desc->channel[c].type == UTIL_FORMAT_TYPE_UNSIGNED &&
 537         desc->channel[c].size >= 4 &&
 538         desc->channel[c].size <= 10) {
 539         /* RGB10_A2, RGBA8, RGB5_A1, RGBA4, RGB565 */
 540         if (desc->nr_channels >= 3)
 541             return true;
 542
 543         if (format == PIPE_FORMAT_R8G8_UNORM)
 544             return true;
 545
 546         /* R8, I8, L8, A8 */
 547         if (desc->nr_channels == 1)
 548             return true;
 549     }
 550
 551     return false;
 552 }
 553
 554 static boolean r300_is_format_supported(struct pipe_screen* screen,
 555                                         enum pipe_format format,
 556                                         enum pipe_texture_target target,
 557                                         unsigned sample_count,
 558                                         unsigned usage)
 559 {
 560     uint32_t retval = 0;
 561     boolean is_r500 = r300_screen(screen)->caps.is_r500;
 562     boolean is_r400 = r300_screen(screen)->caps.is_r400;
 563     boolean is_color2101010 = format == PIPE_FORMAT_R10G10B10A2_UNORM ||
 564                               format == PIPE_FORMAT_R10G10B10X2_SNORM ||
 565                               format == PIPE_FORMAT_B10G10R10A2_UNORM ||
 566                               format == PIPE_FORMAT_B10G10R10X2_UNORM ||
 567                               format == PIPE_FORMAT_R10SG10SB10SA2U_NORM;
 568     boolean is_ati1n = format == PIPE_FORMAT_RGTC1_UNORM ||
 569                        format == PIPE_FORMAT_RGTC1_SNORM ||
 570                        format == PIPE_FORMAT_LATC1_UNORM ||
 571                        format == PIPE_FORMAT_LATC1_SNORM;
 572     boolean is_ati2n = format == PIPE_FORMAT_RGTC2_UNORM ||
 573                        format == PIPE_FORMAT_RGTC2_SNORM ||
 574                        format == PIPE_FORMAT_LATC2_UNORM ||
 575                        format == PIPE_FORMAT_LATC2_SNORM;
 576     boolean is_half_float = format == PIPE_FORMAT_R16_FLOAT ||
 577                             format == PIPE_FORMAT_R16G16_FLOAT ||
 578                             format == PIPE_FORMAT_R16G16B16_FLOAT ||
 579                             format == PIPE_FORMAT_R16G16B16A16_FLOAT ||
 580                             format == PIPE_FORMAT_R16G16B16X16_FLOAT;
 581     const struct util_format_description *desc;
 582
 583     if (!util_format_is_supported(format, usage))
 584        return FALSE;
 585
 586     /* Check multisampling support. */
 587     switch (sample_count) {
 588         case 0:
 589         case 1:
 590             break;
 591         case 2:
 592         case 4:
 593         case 6:
 594             /* No texturing and scanout. */
 595             if (usage & (PIPE_BIND_SAMPLER_VIEW |
 596                          PIPE_BIND_DISPLAY_TARGET |
 597                          PIPE_BIND_SCANOUT)) {
 598                 return FALSE;
 599             }
 600
 601             desc = util_format_description(format);
 602
 603             if (is_r500) {
 604                 /* Only allow depth/stencil, RGBA8, RGBA1010102, RGBA16F. */
 605                 if (!util_format_is_depth_or_stencil(format) &&
 606                     !util_format_is_rgba8_variant(desc) &&
 607                     !util_format_is_rgba1010102_variant(desc) &&
 608                     format != PIPE_FORMAT_R16G16B16A16_FLOAT &&
 609                     format != PIPE_FORMAT_R16G16B16X16_FLOAT) {
 610                     return FALSE;
 611                 }
 612             } else {
 613                 /* Only allow depth/stencil, RGBA8. */
 614                 if (!util_format_is_depth_or_stencil(format) &&
 615                     !util_format_is_rgba8_variant(desc)) {
 616                     return FALSE;
 617                 }
 618             }
 619             break;
 620         default:
 621             return FALSE;
 622     }
 623
 624     /* Check sampler format support. */
 625     if ((usage & PIPE_BIND_SAMPLER_VIEW) &&
 626         /* these two are broken for an unknown reason */
 627         format != PIPE_FORMAT_R8G8B8X8_SNORM &&
 628         format != PIPE_FORMAT_R16G16B16X16_SNORM &&
 629         /* ATI1N is r5xx-only. */
 630         (is_r500 || !is_ati1n) &&
 631         /* ATI2N is supported on r4xx-r5xx. */
 632         (is_r400 || is_r500 || !is_ati2n) &&
 633         r300_is_sampler_format_supported(format)) {
 634         retval |= PIPE_BIND_SAMPLER_VIEW;
 635     }
 636
 637     /* Check colorbuffer format support. */
 638     if ((usage & (PIPE_BIND_RENDER_TARGET |
 639                   PIPE_BIND_DISPLAY_TARGET |
 640                   PIPE_BIND_SCANOUT |
 641                   PIPE_BIND_SHARED |
 642                   PIPE_BIND_BLENDABLE)) &&
 643         /* 2101010 cannot be rendered to on non-r5xx. */
 644         (!is_color2101010 || is_r500) &&
 645         r300_is_colorbuffer_format_supported(format)) {
 646         retval |= usage &
 647             (PIPE_BIND_RENDER_TARGET |
 648              PIPE_BIND_DISPLAY_TARGET |
 649              PIPE_BIND_SCANOUT |
 650              PIPE_BIND_SHARED);
 651
 652         if (r300_is_blending_supported(r300_screen(screen), format)) {
 653             retval |= usage & PIPE_BIND_BLENDABLE;
 654         }
 655     }
 656
 657     /* Check depth-stencil format support. */
 658     if (usage & PIPE_BIND_DEPTH_STENCIL &&
 659         r300_is_zs_format_supported(format)) {
 660         retval |= PIPE_BIND_DEPTH_STENCIL;
 661     }
 662
 663     /* Check vertex buffer format support. */
 664     if (usage & PIPE_BIND_VERTEX_BUFFER) {
 665         if (r300_screen(screen)->caps.has_tcl) {
 666             /* Half float is supported on >= R400. */
 667             if ((is_r400 || is_r500 || !is_half_float) &&
 668                 r300_translate_vertex_data_type(format) != R300_INVALID_FORMAT) {
 669                 retval |= PIPE_BIND_VERTEX_BUFFER;
 670             }
 671         } else {
 672             /* SW TCL */
 673             if (!util_format_is_pure_integer(format)) {
 674                 retval |= PIPE_BIND_VERTEX_BUFFER;
 675             }
 676         }
 677     }
 678
 679     return retval == usage;
 680 }
 681
 682 static void r300_destroy_screen(struct pipe_screen* pscreen)
 683 {
 684     struct r300_screen* r300screen = r300_screen(pscreen);
 685     struct radeon_winsys *rws = radeon_winsys(pscreen);
 686
 687     if (rws && !rws->unref(rws))
 688       return;
 689
 690     mtx_destroy(&r300screen->cmask_mutex);
 691     slab_destroy_parent(&r300screen->pool_transfers);
 692
 693     if (rws)
 694       rws->destroy(rws);
 695
 696     FREE(r300screen);
 697 }
 698
 699 static void r300_fence_reference(struct pipe_screen *screen,
 700                                  struct pipe_fence_handle **ptr,
 701                                  struct pipe_fence_handle *fence)
 702 {
 703     struct radeon_winsys *rws = r300_screen(screen)->rws;
 704
 705     rws->fence_reference(ptr, fence);
 706 }
 707
 708 static boolean r300_fence_finish(struct pipe_screen *screen,
 709                                  struct pipe_context *ctx,
 710                                  struct pipe_fence_handle *fence,
 711                                  uint64_t timeout)
 712 {
 713     struct radeon_winsys *rws = r300_screen(screen)->rws;
 714
 715     return rws->fence_wait(rws, fence, timeout);
 716 }
 717
 718 struct pipe_screen* r300_screen_create(struct radeon_winsys *rws)
 719 {
 720     struct r300_screen *r300screen = CALLOC_STRUCT(r300_screen);
 721
 722     if (!r300screen) {
 723         FREE(r300screen);
 724         return NULL;
 725     }
 726
 727     rws->query_info(rws, &r300screen->info);
 728
 729     r300_init_debug(r300screen);
 730     r300_parse_chipset(r300screen->info.pci_id, &r300screen->caps);
 731
 732     if (SCREEN_DBG_ON(r300screen, DBG_NO_ZMASK))
 733         r300screen->caps.zmask_ram = 0;
 734     if (SCREEN_DBG_ON(r300screen, DBG_NO_HIZ))
 735         r300screen->caps.hiz_ram = 0;
 736
 737     r300screen->rws = rws;
 738     r300screen->screen.destroy = r300_destroy_screen;
 739     r300screen->screen.get_name = r300_get_name;
 740     r300screen->screen.get_vendor = r300_get_vendor;
 741     r300screen->screen.get_device_vendor = r300_get_device_vendor;
 742     r300screen->screen.get_param = r300_get_param;
 743     r300screen->screen.get_shader_param = r300_get_shader_param;
 744     r300screen->screen.get_paramf = r300_get_paramf;
 745     r300screen->screen.get_video_param = r300_get_video_param;
 746     r300screen->screen.is_format_supported = r300_is_format_supported;
 747     r300screen->screen.is_video_format_supported = vl_video_buffer_is_format_supported;
 748     r300screen->screen.context_create = r300_create_context;
 749     r300screen->screen.fence_reference = r300_fence_reference;
 750     r300screen->screen.fence_finish = r300_fence_finish;
 751
 752     r300_init_screen_resource_functions(r300screen);
 753
 754     slab_create_parent(&r300screen->pool_transfers, sizeof(struct pipe_transfer), 64);
 755
 756     util_format_s3tc_init();
 757     (void) mtx_init(&r300screen->cmask_mutex, mtx_plain);
 758
 759     return &r300screen->screen;
 760 }