2 * Copyright 2008 Corbin Simpson <MostAwesomeDude@gmail.com>
3 * Copyright 2009 Marek Olšák <maraeo@gmail.com>
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * on the rights to use, copy, modify, merge, publish, distribute, sub
9 * license, and/or sell copies of the Software, and to permit persons to whom
10 * the Software is furnished to do so, subject to the following conditions:
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
20 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
21 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
22 * USE OR OTHER DEALINGS IN THE SOFTWARE. */
24 #include "draw/draw_context.h"
26 #include "util/u_blitter.h"
27 #include "util/u_math.h"
28 #include "util/u_memory.h"
29 #include "util/u_pack_color.h"
31 #include "tgsi/tgsi_parse.h"
33 #include "pipe/p_config.h"
36 #include "r300_context.h"
37 #include "r300_emit.h"
39 #include "r300_screen.h"
40 #include "r300_screen_buffer.h"
41 #include "r300_state_inlines.h"
43 #include "r300_texture.h"
45 #include "r300_winsys.h"
47 /* r300_state: Functions used to intialize state context by translating
48 * Gallium state objects into semi-native r300 state objects. */
50 #define UPDATE_STATE(cso, atom) \
51 if (cso != atom.state) { \
56 static boolean
blend_discard_if_src_alpha_0(unsigned srcRGB
, unsigned srcA
,
57 unsigned dstRGB
, unsigned dstA
)
59 /* If the blend equation is ADD or REVERSE_SUBTRACT,
60 * SRC_ALPHA == 0, and the following state is set, the colorbuffer
61 * will not be changed.
62 * Notice that the dst factors are the src factors inverted. */
63 return (srcRGB
== PIPE_BLENDFACTOR_SRC_ALPHA
||
64 srcRGB
== PIPE_BLENDFACTOR_SRC_ALPHA_SATURATE
||
65 srcRGB
== PIPE_BLENDFACTOR_ZERO
) &&
66 (srcA
== PIPE_BLENDFACTOR_SRC_COLOR
||
67 srcA
== PIPE_BLENDFACTOR_SRC_ALPHA
||
68 srcA
== PIPE_BLENDFACTOR_SRC_ALPHA_SATURATE
||
69 srcA
== PIPE_BLENDFACTOR_ZERO
) &&
70 (dstRGB
== PIPE_BLENDFACTOR_INV_SRC_ALPHA
||
71 dstRGB
== PIPE_BLENDFACTOR_ONE
) &&
72 (dstA
== PIPE_BLENDFACTOR_INV_SRC_COLOR
||
73 dstA
== PIPE_BLENDFACTOR_INV_SRC_ALPHA
||
74 dstA
== PIPE_BLENDFACTOR_ONE
);
77 static boolean
blend_discard_if_src_alpha_1(unsigned srcRGB
, unsigned srcA
,
78 unsigned dstRGB
, unsigned dstA
)
80 /* If the blend equation is ADD or REVERSE_SUBTRACT,
81 * SRC_ALPHA == 1, and the following state is set, the colorbuffer
82 * will not be changed.
83 * Notice that the dst factors are the src factors inverted. */
84 return (srcRGB
== PIPE_BLENDFACTOR_INV_SRC_ALPHA
||
85 srcRGB
== PIPE_BLENDFACTOR_ZERO
) &&
86 (srcA
== PIPE_BLENDFACTOR_INV_SRC_COLOR
||
87 srcA
== PIPE_BLENDFACTOR_INV_SRC_ALPHA
||
88 srcA
== PIPE_BLENDFACTOR_ZERO
) &&
89 (dstRGB
== PIPE_BLENDFACTOR_SRC_ALPHA
||
90 dstRGB
== PIPE_BLENDFACTOR_ONE
) &&
91 (dstA
== PIPE_BLENDFACTOR_SRC_COLOR
||
92 dstA
== PIPE_BLENDFACTOR_SRC_ALPHA
||
93 dstA
== PIPE_BLENDFACTOR_ONE
);
96 static boolean
blend_discard_if_src_color_0(unsigned srcRGB
, unsigned srcA
,
97 unsigned dstRGB
, unsigned dstA
)
99 /* If the blend equation is ADD or REVERSE_SUBTRACT,
100 * SRC_COLOR == (0,0,0), and the following state is set, the colorbuffer
101 * will not be changed.
102 * Notice that the dst factors are the src factors inverted. */
103 return (srcRGB
== PIPE_BLENDFACTOR_SRC_COLOR
||
104 srcRGB
== PIPE_BLENDFACTOR_ZERO
) &&
105 (srcA
== PIPE_BLENDFACTOR_ZERO
) &&
106 (dstRGB
== PIPE_BLENDFACTOR_INV_SRC_COLOR
||
107 dstRGB
== PIPE_BLENDFACTOR_ONE
) &&
108 (dstA
== PIPE_BLENDFACTOR_ONE
);
111 static boolean
blend_discard_if_src_color_1(unsigned srcRGB
, unsigned srcA
,
112 unsigned dstRGB
, unsigned dstA
)
114 /* If the blend equation is ADD or REVERSE_SUBTRACT,
115 * SRC_COLOR == (1,1,1), and the following state is set, the colorbuffer
116 * will not be changed.
117 * Notice that the dst factors are the src factors inverted. */
118 return (srcRGB
== PIPE_BLENDFACTOR_INV_SRC_COLOR
||
119 srcRGB
== PIPE_BLENDFACTOR_ZERO
) &&
120 (srcA
== PIPE_BLENDFACTOR_ZERO
) &&
121 (dstRGB
== PIPE_BLENDFACTOR_SRC_COLOR
||
122 dstRGB
== PIPE_BLENDFACTOR_ONE
) &&
123 (dstA
== PIPE_BLENDFACTOR_ONE
);
126 static boolean
blend_discard_if_src_alpha_color_0(unsigned srcRGB
, unsigned srcA
,
127 unsigned dstRGB
, unsigned dstA
)
129 /* If the blend equation is ADD or REVERSE_SUBTRACT,
130 * SRC_ALPHA_COLOR == (0,0,0,0), and the following state is set,
131 * the colorbuffer will not be changed.
132 * Notice that the dst factors are the src factors inverted. */
133 return (srcRGB
== PIPE_BLENDFACTOR_SRC_COLOR
||
134 srcRGB
== PIPE_BLENDFACTOR_SRC_ALPHA
||
135 srcRGB
== PIPE_BLENDFACTOR_SRC_ALPHA_SATURATE
||
136 srcRGB
== PIPE_BLENDFACTOR_ZERO
) &&
137 (srcA
== PIPE_BLENDFACTOR_SRC_COLOR
||
138 srcA
== PIPE_BLENDFACTOR_SRC_ALPHA
||
139 srcA
== PIPE_BLENDFACTOR_SRC_ALPHA_SATURATE
||
140 srcA
== PIPE_BLENDFACTOR_ZERO
) &&
141 (dstRGB
== PIPE_BLENDFACTOR_INV_SRC_COLOR
||
142 dstRGB
== PIPE_BLENDFACTOR_INV_SRC_ALPHA
||
143 dstRGB
== PIPE_BLENDFACTOR_ONE
) &&
144 (dstA
== PIPE_BLENDFACTOR_INV_SRC_COLOR
||
145 dstA
== PIPE_BLENDFACTOR_INV_SRC_ALPHA
||
146 dstA
== PIPE_BLENDFACTOR_ONE
);
149 static boolean
blend_discard_if_src_alpha_color_1(unsigned srcRGB
, unsigned srcA
,
150 unsigned dstRGB
, unsigned dstA
)
152 /* If the blend equation is ADD or REVERSE_SUBTRACT,
153 * SRC_ALPHA_COLOR == (1,1,1,1), and the following state is set,
154 * the colorbuffer will not be changed.
155 * Notice that the dst factors are the src factors inverted. */
156 return (srcRGB
== PIPE_BLENDFACTOR_INV_SRC_COLOR
||
157 srcRGB
== PIPE_BLENDFACTOR_INV_SRC_ALPHA
||
158 srcRGB
== PIPE_BLENDFACTOR_ZERO
) &&
159 (srcA
== PIPE_BLENDFACTOR_INV_SRC_COLOR
||
160 srcA
== PIPE_BLENDFACTOR_INV_SRC_ALPHA
||
161 srcA
== PIPE_BLENDFACTOR_ZERO
) &&
162 (dstRGB
== PIPE_BLENDFACTOR_SRC_COLOR
||
163 dstRGB
== PIPE_BLENDFACTOR_SRC_ALPHA
||
164 dstRGB
== PIPE_BLENDFACTOR_ONE
) &&
165 (dstA
== PIPE_BLENDFACTOR_SRC_COLOR
||
166 dstA
== PIPE_BLENDFACTOR_SRC_ALPHA
||
167 dstA
== PIPE_BLENDFACTOR_ONE
);
170 static unsigned bgra_cmask(unsigned mask
)
172 /* Gallium uses RGBA color ordering while R300 expects BGRA. */
174 return ((mask
& PIPE_MASK_R
) << 2) |
175 ((mask
& PIPE_MASK_B
) >> 2) |
176 (mask
& (PIPE_MASK_G
| PIPE_MASK_A
));
179 /* Create a new blend state based on the CSO blend state.
181 * This encompasses alpha blending, logic/raster ops, and blend dithering. */
182 static void* r300_create_blend_state(struct pipe_context
* pipe
,
183 const struct pipe_blend_state
* state
)
185 struct r300_screen
* r300screen
= r300_screen(pipe
->screen
);
186 struct r300_blend_state
* blend
= CALLOC_STRUCT(r300_blend_state
);
187 uint32_t blend_control
= 0; /* R300_RB3D_CBLEND: 0x4e04 */
188 uint32_t alpha_blend_control
= 0; /* R300_RB3D_ABLEND: 0x4e08 */
189 uint32_t color_channel_mask
= 0; /* R300_RB3D_COLOR_CHANNEL_MASK: 0x4e0c */
190 uint32_t rop
= 0; /* R300_RB3D_ROPCNTL: 0x4e18 */
191 uint32_t dither
= 0; /* R300_RB3D_DITHER_CTL: 0x4e50 */
194 if (state
->rt
[0].blend_enable
)
196 unsigned eqRGB
= state
->rt
[0].rgb_func
;
197 unsigned srcRGB
= state
->rt
[0].rgb_src_factor
;
198 unsigned dstRGB
= state
->rt
[0].rgb_dst_factor
;
200 unsigned eqA
= state
->rt
[0].alpha_func
;
201 unsigned srcA
= state
->rt
[0].alpha_src_factor
;
202 unsigned dstA
= state
->rt
[0].alpha_dst_factor
;
204 /* despite the name, ALPHA_BLEND_ENABLE has nothing to do with alpha,
205 * this is just the crappy D3D naming */
206 blend_control
= R300_ALPHA_BLEND_ENABLE
|
207 r300_translate_blend_function(eqRGB
) |
208 ( r300_translate_blend_factor(srcRGB
) << R300_SRC_BLEND_SHIFT
) |
209 ( r300_translate_blend_factor(dstRGB
) << R300_DST_BLEND_SHIFT
);
211 /* Optimization: some operations do not require the destination color.
213 * When SRC_ALPHA_SATURATE is used, colorbuffer reads must be enabled,
214 * otherwise blending gives incorrect results. It seems to be
216 if (eqRGB
== PIPE_BLEND_MIN
|| eqA
== PIPE_BLEND_MIN
||
217 eqRGB
== PIPE_BLEND_MAX
|| eqA
== PIPE_BLEND_MAX
||
218 dstRGB
!= PIPE_BLENDFACTOR_ZERO
||
219 dstA
!= PIPE_BLENDFACTOR_ZERO
||
220 srcRGB
== PIPE_BLENDFACTOR_DST_COLOR
||
221 srcRGB
== PIPE_BLENDFACTOR_DST_ALPHA
||
222 srcRGB
== PIPE_BLENDFACTOR_INV_DST_COLOR
||
223 srcRGB
== PIPE_BLENDFACTOR_INV_DST_ALPHA
||
224 srcA
== PIPE_BLENDFACTOR_DST_COLOR
||
225 srcA
== PIPE_BLENDFACTOR_DST_ALPHA
||
226 srcA
== PIPE_BLENDFACTOR_INV_DST_COLOR
||
227 srcA
== PIPE_BLENDFACTOR_INV_DST_ALPHA
||
228 srcRGB
== PIPE_BLENDFACTOR_SRC_ALPHA_SATURATE
) {
229 /* Enable reading from the colorbuffer. */
230 blend_control
|= R300_READ_ENABLE
;
232 if (r300screen
->caps
.is_r500
) {
233 /* Optimization: Depending on incoming pixels, we can
234 * conditionally disable the reading in hardware... */
235 if (eqRGB
!= PIPE_BLEND_MIN
&& eqA
!= PIPE_BLEND_MIN
&&
236 eqRGB
!= PIPE_BLEND_MAX
&& eqA
!= PIPE_BLEND_MAX
) {
237 /* Disable reading if SRC_ALPHA == 0. */
238 if ((dstRGB
== PIPE_BLENDFACTOR_SRC_ALPHA
||
239 dstRGB
== PIPE_BLENDFACTOR_ZERO
) &&
240 (dstA
== PIPE_BLENDFACTOR_SRC_COLOR
||
241 dstA
== PIPE_BLENDFACTOR_SRC_ALPHA
||
242 dstA
== PIPE_BLENDFACTOR_ZERO
)) {
243 blend_control
|= R500_SRC_ALPHA_0_NO_READ
;
246 /* Disable reading if SRC_ALPHA == 1. */
247 if ((dstRGB
== PIPE_BLENDFACTOR_INV_SRC_ALPHA
||
248 dstRGB
== PIPE_BLENDFACTOR_ZERO
) &&
249 (dstA
== PIPE_BLENDFACTOR_INV_SRC_COLOR
||
250 dstA
== PIPE_BLENDFACTOR_INV_SRC_ALPHA
||
251 dstA
== PIPE_BLENDFACTOR_ZERO
)) {
252 blend_control
|= R500_SRC_ALPHA_1_NO_READ
;
258 /* Optimization: discard pixels which don't change the colorbuffer.
260 * The code below is non-trivial and some math is involved.
262 * Discarding pixels must be disabled when FP16 AA is enabled.
263 * This is a hardware bug. Also, this implementation wouldn't work
264 * with FP blending enabled and equation clamping disabled.
266 * Equations other than ADD are rarely used and therefore won't be
268 if ((eqRGB
== PIPE_BLEND_ADD
|| eqRGB
== PIPE_BLEND_REVERSE_SUBTRACT
) &&
269 (eqA
== PIPE_BLEND_ADD
|| eqA
== PIPE_BLEND_REVERSE_SUBTRACT
)) {
271 * REVERSE_SUBTRACT: Y-X
274 * If X = src*srcFactor = 0 and Y = dst*dstFactor = 1,
275 * then CB will not be changed.
277 * Given the srcFactor and dstFactor variables, we can derive
278 * what src and dst should be equal to and discard appropriate
281 if (blend_discard_if_src_alpha_0(srcRGB
, srcA
, dstRGB
, dstA
)) {
282 blend_control
|= R300_DISCARD_SRC_PIXELS_SRC_ALPHA_0
;
283 } else if (blend_discard_if_src_alpha_1(srcRGB
, srcA
,
285 blend_control
|= R300_DISCARD_SRC_PIXELS_SRC_ALPHA_1
;
286 } else if (blend_discard_if_src_color_0(srcRGB
, srcA
,
288 blend_control
|= R300_DISCARD_SRC_PIXELS_SRC_COLOR_0
;
289 } else if (blend_discard_if_src_color_1(srcRGB
, srcA
,
291 blend_control
|= R300_DISCARD_SRC_PIXELS_SRC_COLOR_1
;
292 } else if (blend_discard_if_src_alpha_color_0(srcRGB
, srcA
,
295 R300_DISCARD_SRC_PIXELS_SRC_ALPHA_COLOR_0
;
296 } else if (blend_discard_if_src_alpha_color_1(srcRGB
, srcA
,
299 R300_DISCARD_SRC_PIXELS_SRC_ALPHA_COLOR_1
;
304 if (srcA
!= srcRGB
|| dstA
!= dstRGB
|| eqA
!= eqRGB
) {
305 blend_control
|= R300_SEPARATE_ALPHA_ENABLE
;
306 alpha_blend_control
=
307 r300_translate_blend_function(eqA
) |
308 (r300_translate_blend_factor(srcA
) << R300_SRC_BLEND_SHIFT
) |
309 (r300_translate_blend_factor(dstA
) << R300_DST_BLEND_SHIFT
);
313 /* PIPE_LOGICOP_* don't need to be translated, fortunately. */
314 if (state
->logicop_enable
) {
315 rop
= R300_RB3D_ROPCNTL_ROP_ENABLE
|
316 (state
->logicop_func
) << R300_RB3D_ROPCNTL_ROP_SHIFT
;
319 /* Color channel masks for all MRTs. */
320 color_channel_mask
= bgra_cmask(state
->rt
[0].colormask
);
321 if (r300screen
->caps
.is_r500
&& state
->independent_blend_enable
) {
322 if (state
->rt
[1].blend_enable
) {
323 color_channel_mask
|= bgra_cmask(state
->rt
[1].colormask
) << 4;
325 if (state
->rt
[2].blend_enable
) {
326 color_channel_mask
|= bgra_cmask(state
->rt
[2].colormask
) << 8;
328 if (state
->rt
[3].blend_enable
) {
329 color_channel_mask
|= bgra_cmask(state
->rt
[3].colormask
) << 12;
333 /* Neither fglrx nor classic r300 ever set this, regardless of dithering
334 * state. Since it's an optional implementation detail, we can leave it
335 * out and never dither.
337 * This could be revisited if we ever get quality or conformance hints.
340 dither = R300_RB3D_DITHER_CTL_DITHER_MODE_LUT |
341 R300_RB3D_DITHER_CTL_ALPHA_DITHER_MODE_LUT;
345 /* Build a command buffer. */
346 BEGIN_CB(blend
->cb
, 8);
347 OUT_CB_REG(R300_RB3D_ROPCNTL
, rop
);
348 OUT_CB_REG_SEQ(R300_RB3D_CBLEND
, 3);
349 OUT_CB(blend_control
);
350 OUT_CB(alpha_blend_control
);
351 OUT_CB(color_channel_mask
);
352 OUT_CB_REG(R300_RB3D_DITHER_CTL
, dither
);
355 /* The same as above, but with no colorbuffer reads and writes. */
356 BEGIN_CB(blend
->cb_no_readwrite
, 8);
357 OUT_CB_REG(R300_RB3D_ROPCNTL
, rop
);
358 OUT_CB_REG_SEQ(R300_RB3D_CBLEND
, 3);
362 OUT_CB_REG(R300_RB3D_DITHER_CTL
, dither
);
368 /* Bind blend state. */
369 static void r300_bind_blend_state(struct pipe_context
* pipe
,
372 struct r300_context
* r300
= r300_context(pipe
);
374 UPDATE_STATE(state
, r300
->blend_state
);
377 /* Free blend state. */
378 static void r300_delete_blend_state(struct pipe_context
* pipe
,
384 /* Convert float to 10bit integer */
385 static unsigned float_to_fixed10(float f
)
387 return CLAMP((unsigned)(f
* 1023.9f
), 0, 1023);
391 * Setup both R300 and R500 registers, figure out later which one to write. */
392 static void r300_set_blend_color(struct pipe_context
* pipe
,
393 const struct pipe_blend_color
* color
)
395 struct r300_context
* r300
= r300_context(pipe
);
396 struct r300_blend_color_state
* state
=
397 (struct r300_blend_color_state
*)r300
->blend_color_state
.state
;
400 if (r300
->screen
->caps
.is_r500
) {
401 /* XXX if FP16 blending is enabled, we should use the FP16 format */
402 BEGIN_CB(state
->cb
, 3);
403 OUT_CB_REG_SEQ(R500_RB3D_CONSTANT_COLOR_AR
, 2);
404 OUT_CB(float_to_fixed10(color
->color
[0]) |
405 (float_to_fixed10(color
->color
[3]) << 16));
406 OUT_CB(float_to_fixed10(color
->color
[2]) |
407 (float_to_fixed10(color
->color
[1]) << 16));
411 util_pack_color(color
->color
, PIPE_FORMAT_B8G8R8A8_UNORM
, &uc
);
413 BEGIN_CB(state
->cb
, 2);
414 OUT_CB_REG(R300_RB3D_BLEND_COLOR
, uc
.ui
);
418 r300
->blend_color_state
.dirty
= TRUE
;
421 static void r300_set_clip_state(struct pipe_context
* pipe
,
422 const struct pipe_clip_state
* state
)
424 struct r300_context
* r300
= r300_context(pipe
);
425 struct r300_clip_state
*clip
=
426 (struct r300_clip_state
*)r300
->clip_state
.state
;
431 if (r300
->screen
->caps
.has_tcl
) {
432 BEGIN_CB(clip
->cb
, 29);
433 OUT_CB_REG(R300_VAP_PVS_VECTOR_INDX_REG
,
434 (r300
->screen
->caps
.is_r500
?
435 R500_PVS_UCP_START
: R300_PVS_UCP_START
));
436 OUT_CB_ONE_REG(R300_VAP_PVS_UPLOAD_DATA
, 6 * 4);
437 OUT_CB_TABLE(state
->ucp
, 6 * 4);
438 OUT_CB_REG(R300_VAP_CLIP_CNTL
, ((1 << state
->nr
) - 1) |
439 R300_PS_UCP_MODE_CLIP_AS_TRIFAN
);
442 r300
->clip_state
.dirty
= TRUE
;
444 draw_flush(r300
->draw
);
445 draw_set_clip_state(r300
->draw
, state
);
450 r300_set_sample_mask(struct pipe_context
*pipe
,
451 unsigned sample_mask
)
456 /* Create a new depth, stencil, and alpha state based on the CSO dsa state.
458 * This contains the depth buffer, stencil buffer, alpha test, and such.
459 * On the Radeon, depth and stencil buffer setup are intertwined, which is
460 * the reason for some of the strange-looking assignments across registers. */
462 r300_create_dsa_state(struct pipe_context
* pipe
,
463 const struct pipe_depth_stencil_alpha_state
* state
)
465 struct r300_capabilities
*caps
= &r300_screen(pipe
->screen
)->caps
;
466 struct r300_dsa_state
* dsa
= CALLOC_STRUCT(r300_dsa_state
);
471 /* Depth test setup. */
472 if (state
->depth
.enabled
) {
473 dsa
->z_buffer_control
|= R300_Z_ENABLE
;
475 if (state
->depth
.writemask
) {
476 dsa
->z_buffer_control
|= R300_Z_WRITE_ENABLE
;
479 dsa
->z_stencil_control
|=
480 (r300_translate_depth_stencil_function(state
->depth
.func
) <<
484 /* Stencil buffer setup. */
485 if (state
->stencil
[0].enabled
) {
486 dsa
->z_buffer_control
|= R300_STENCIL_ENABLE
;
487 dsa
->z_stencil_control
|=
488 (r300_translate_depth_stencil_function(state
->stencil
[0].func
) <<
489 R300_S_FRONT_FUNC_SHIFT
) |
490 (r300_translate_stencil_op(state
->stencil
[0].fail_op
) <<
491 R300_S_FRONT_SFAIL_OP_SHIFT
) |
492 (r300_translate_stencil_op(state
->stencil
[0].zpass_op
) <<
493 R300_S_FRONT_ZPASS_OP_SHIFT
) |
494 (r300_translate_stencil_op(state
->stencil
[0].zfail_op
) <<
495 R300_S_FRONT_ZFAIL_OP_SHIFT
);
497 dsa
->stencil_ref_mask
=
498 (state
->stencil
[0].valuemask
<< R300_STENCILMASK_SHIFT
) |
499 (state
->stencil
[0].writemask
<< R300_STENCILWRITEMASK_SHIFT
);
501 if (state
->stencil
[1].enabled
) {
502 dsa
->two_sided
= TRUE
;
504 dsa
->z_buffer_control
|= R300_STENCIL_FRONT_BACK
;
505 dsa
->z_stencil_control
|=
506 (r300_translate_depth_stencil_function(state
->stencil
[1].func
) <<
507 R300_S_BACK_FUNC_SHIFT
) |
508 (r300_translate_stencil_op(state
->stencil
[1].fail_op
) <<
509 R300_S_BACK_SFAIL_OP_SHIFT
) |
510 (r300_translate_stencil_op(state
->stencil
[1].zpass_op
) <<
511 R300_S_BACK_ZPASS_OP_SHIFT
) |
512 (r300_translate_stencil_op(state
->stencil
[1].zfail_op
) <<
513 R300_S_BACK_ZFAIL_OP_SHIFT
);
515 dsa
->stencil_ref_bf
=
516 (state
->stencil
[1].valuemask
<< R300_STENCILMASK_SHIFT
) |
517 (state
->stencil
[1].writemask
<< R300_STENCILWRITEMASK_SHIFT
);
520 dsa
->z_buffer_control
|= R500_STENCIL_REFMASK_FRONT_BACK
;
522 dsa
->two_sided_stencil_ref
=
523 (state
->stencil
[0].valuemask
!= state
->stencil
[1].valuemask
||
524 state
->stencil
[0].writemask
!= state
->stencil
[1].writemask
);
529 /* Alpha test setup. */
530 if (state
->alpha
.enabled
) {
531 dsa
->alpha_function
=
532 r300_translate_alpha_function(state
->alpha
.func
) |
533 R300_FG_ALPHA_FUNC_ENABLE
;
535 /* We could use 10bit alpha ref but who needs that? */
536 dsa
->alpha_function
|= float_to_ubyte(state
->alpha
.ref_value
);
539 dsa
->alpha_function
|= R500_FG_ALPHA_FUNC_8BIT
;
542 BEGIN_CB(&dsa
->cb_begin
, 8);
543 OUT_CB_REG(R300_FG_ALPHA_FUNC
, dsa
->alpha_function
);
544 OUT_CB_REG_SEQ(R300_ZB_CNTL
, 3);
545 OUT_CB(dsa
->z_buffer_control
);
546 OUT_CB(dsa
->z_stencil_control
);
547 OUT_CB(dsa
->stencil_ref_mask
);
548 OUT_CB_REG(R500_ZB_STENCILREFMASK_BF
, dsa
->stencil_ref_bf
);
551 BEGIN_CB(dsa
->cb_no_readwrite
, 8);
552 OUT_CB_REG(R300_FG_ALPHA_FUNC
, dsa
->alpha_function
);
553 OUT_CB_REG_SEQ(R300_ZB_CNTL
, 3);
557 OUT_CB_REG(R500_ZB_STENCILREFMASK_BF
, 0);
563 static void r300_dsa_inject_stencilref(struct r300_context
*r300
)
565 struct r300_dsa_state
*dsa
=
566 (struct r300_dsa_state
*)r300
->dsa_state
.state
;
571 dsa
->stencil_ref_mask
=
572 (dsa
->stencil_ref_mask
& ~R300_STENCILREF_MASK
) |
573 r300
->stencil_ref
.ref_value
[0];
574 dsa
->stencil_ref_bf
=
575 (dsa
->stencil_ref_bf
& ~R300_STENCILREF_MASK
) |
576 r300
->stencil_ref
.ref_value
[1];
579 /* Bind DSA state. */
580 static void r300_bind_dsa_state(struct pipe_context
* pipe
,
583 struct r300_context
* r300
= r300_context(pipe
);
589 UPDATE_STATE(state
, r300
->dsa_state
);
591 r300_dsa_inject_stencilref(r300
);
594 /* Free DSA state. */
595 static void r300_delete_dsa_state(struct pipe_context
* pipe
,
601 static void r300_set_stencil_ref(struct pipe_context
* pipe
,
602 const struct pipe_stencil_ref
* sr
)
604 struct r300_context
* r300
= r300_context(pipe
);
606 r300
->stencil_ref
= *sr
;
608 r300_dsa_inject_stencilref(r300
);
609 r300
->dsa_state
.dirty
= TRUE
;
612 static void r300_tex_set_tiling_flags(struct r300_context
*r300
,
613 struct r300_texture
*tex
, unsigned level
)
615 /* Check if the macrotile flag needs to be changed.
616 * Skip changing the flags otherwise. */
617 if (tex
->mip_macrotile
[tex
->surface_level
] != tex
->mip_macrotile
[level
]) {
618 /* Tiling determines how DRM treats the buffer data.
619 * We must flush CS when changing it if the buffer is referenced. */
620 if (r300
->rws
->cs_is_buffer_referenced(r300
->cs
,
621 tex
->buffer
, R300_REF_CS
))
622 r300
->context
.flush(&r300
->context
, 0, NULL
);
624 r300
->rws
->buffer_set_tiling(r300
->rws
, tex
->buffer
,
625 tex
->microtile
, tex
->mip_macrotile
[level
],
626 tex
->pitch
[0] * util_format_get_blocksize(tex
->b
.b
.format
));
628 tex
->surface_level
= level
;
632 /* This switcheroo is needed just because of goddamned MACRO_SWITCH. */
633 static void r300_fb_set_tiling_flags(struct r300_context
*r300
,
634 const struct pipe_framebuffer_state
*state
)
638 /* Set tiling flags for new surfaces. */
639 for (i
= 0; i
< state
->nr_cbufs
; i
++) {
640 r300_tex_set_tiling_flags(r300
,
641 r300_texture(state
->cbufs
[i
]->texture
),
642 state
->cbufs
[i
]->level
);
645 r300_tex_set_tiling_flags(r300
,
646 r300_texture(state
->zsbuf
->texture
),
647 state
->zsbuf
->level
);
651 static void r300_print_fb_surf_info(struct pipe_surface
*surf
, unsigned index
,
654 struct pipe_resource
*tex
= surf
->texture
;
655 struct r300_texture
*rtex
= r300_texture(tex
);
658 "r300: %s[%i] Dim: %ix%i, Offset: %i, ZSlice: %i, "
659 "Face: %i, Level: %i, Format: %s\n"
661 "r300: TEX: Macro: %s, Micro: %s, Pitch: %i, "
662 "Dim: %ix%ix%i, LastLevel: %i, Format: %s\n",
664 binding
, index
, surf
->width
, surf
->height
, surf
->offset
,
665 surf
->zslice
, surf
->face
, surf
->level
,
666 util_format_short_name(surf
->format
),
668 rtex
->macrotile
? "YES" : " NO", rtex
->microtile
? "YES" : " NO",
669 rtex
->hwpitch
[0], tex
->width0
, tex
->height0
, tex
->depth0
,
670 tex
->last_level
, util_format_short_name(tex
->format
));
673 void r300_mark_fb_state_dirty(struct r300_context
*r300
,
674 enum r300_fb_state_change change
)
676 struct pipe_framebuffer_state
*state
= r300
->fb_state
.state
;
678 /* What is marked as dirty depends on the enum r300_fb_state_change. */
679 r300
->gpu_flush
.dirty
= TRUE
;
680 r300
->fb_state
.dirty
= TRUE
;
681 r300
->hyperz_state
.dirty
= TRUE
;
683 if (change
== R300_CHANGED_FB_STATE
) {
684 r300
->aa_state
.dirty
= TRUE
;
685 r300
->fb_state_pipelined
.dirty
= TRUE
;
688 /* Now compute the fb_state atom size. */
689 r300
->fb_state
.size
= 2 + (8 * state
->nr_cbufs
);
691 if (r300
->cbzb_clear
)
692 r300
->fb_state
.size
+= 10;
693 else if (state
->zsbuf
)
694 r300
->fb_state
.size
+= r300
->screen
->caps
.has_hiz
? 18 : 14;
696 /* The size of the rest of atoms stays the same. */
700 r300_set_framebuffer_state(struct pipe_context
* pipe
,
701 const struct pipe_framebuffer_state
* state
)
703 struct r300_context
* r300
= r300_context(pipe
);
704 struct r300_aa_state
*aa
= (struct r300_aa_state
*)r300
->aa_state
.state
;
705 struct pipe_framebuffer_state
*old_state
= r300
->fb_state
.state
;
706 unsigned max_width
, max_height
, i
;
707 uint32_t zbuffer_bpp
= 0;
709 if (r300
->screen
->caps
.is_r500
) {
710 max_width
= max_height
= 4096;
711 } else if (r300
->screen
->caps
.is_r400
) {
712 max_width
= max_height
= 4021;
714 max_width
= max_height
= 2560;
717 if (state
->width
> max_width
|| state
->height
> max_height
) {
718 fprintf(stderr
, "r300: Implementation error: Render targets are too "
719 "big in %s, refusing to bind framebuffer state!\n", __FUNCTION__
);
724 draw_flush(r300
->draw
);
727 /* If nr_cbufs is changed from zero to non-zero or vice versa... */
728 if (!!old_state
->nr_cbufs
!= !!state
->nr_cbufs
) {
729 r300
->blend_state
.dirty
= TRUE
;
731 /* If zsbuf is set from NULL to non-NULL or vice versa.. */
732 if (!!old_state
->zsbuf
!= !!state
->zsbuf
) {
733 r300
->dsa_state
.dirty
= TRUE
;
736 /* The tiling flags are dependent on the surface miplevel, unfortunately. */
737 r300_fb_set_tiling_flags(r300
, state
);
739 util_assign_framebuffer_state(r300
->fb_state
.state
, state
);
741 r300_mark_fb_state_dirty(r300
, R300_CHANGED_FB_STATE
);
743 /* Polygon offset depends on the zbuffer bit depth. */
744 if (state
->zsbuf
&& r300
->polygon_offset_enabled
) {
745 switch (util_format_get_blocksize(state
->zsbuf
->texture
->format
)) {
754 if (r300
->zbuffer_bpp
!= zbuffer_bpp
) {
755 r300
->zbuffer_bpp
= zbuffer_bpp
;
756 r300
->rs_state
.dirty
= TRUE
;
760 /* Set up AA config. */
761 if (r300
->rws
->get_value(r300
->rws
, R300_VID_DRM_2_3_0
)) {
762 if (state
->nr_cbufs
&& state
->cbufs
[0]->texture
->nr_samples
> 1) {
763 aa
->aa_config
= R300_GB_AA_CONFIG_AA_ENABLE
;
765 switch (state
->cbufs
[0]->texture
->nr_samples
) {
767 aa
->aa_config
|= R300_GB_AA_CONFIG_NUM_AA_SUBSAMPLES_2
;
770 aa
->aa_config
|= R300_GB_AA_CONFIG_NUM_AA_SUBSAMPLES_3
;
773 aa
->aa_config
|= R300_GB_AA_CONFIG_NUM_AA_SUBSAMPLES_4
;
776 aa
->aa_config
|= R300_GB_AA_CONFIG_NUM_AA_SUBSAMPLES_6
;
784 if (DBG_ON(r300
, DBG_FB
)) {
785 fprintf(stderr
, "r300: set_framebuffer_state:\n");
786 for (i
= 0; i
< state
->nr_cbufs
; i
++) {
787 r300_print_fb_surf_info(state
->cbufs
[i
], i
, "CB");
790 r300_print_fb_surf_info(state
->zsbuf
, 0, "ZB");
795 /* Create fragment shader state. */
796 static void* r300_create_fs_state(struct pipe_context
* pipe
,
797 const struct pipe_shader_state
* shader
)
799 struct r300_fragment_shader
* fs
= NULL
;
801 fs
= (struct r300_fragment_shader
*)CALLOC_STRUCT(r300_fragment_shader
);
803 /* Copy state directly into shader. */
805 fs
->state
.tokens
= tgsi_dup_tokens(shader
->tokens
);
810 void r300_mark_fs_code_dirty(struct r300_context
*r300
)
812 struct r300_fragment_shader
* fs
= r300_fs(r300
);
814 r300
->fs
.dirty
= TRUE
;
815 r300
->fs_rc_constant_state
.dirty
= TRUE
;
816 r300
->fs_constants
.dirty
= TRUE
;
817 r300
->fs
.size
= fs
->shader
->cb_code_size
;
819 if (r300
->screen
->caps
.is_r500
) {
820 r300
->fs_rc_constant_state
.size
= fs
->shader
->rc_state_count
* 7;
821 r300
->fs_constants
.size
= fs
->shader
->externals_count
* 4 + 3;
823 r300
->fs_rc_constant_state
.size
= fs
->shader
->rc_state_count
* 5;
824 r300
->fs_constants
.size
= fs
->shader
->externals_count
* 4 + 1;
828 /* Bind fragment shader state. */
829 static void r300_bind_fs_state(struct pipe_context
* pipe
, void* shader
)
831 struct r300_context
* r300
= r300_context(pipe
);
832 struct r300_fragment_shader
* fs
= (struct r300_fragment_shader
*)shader
;
835 r300
->fs
.state
= NULL
;
840 r300_pick_fragment_shader(r300
);
841 r300_mark_fs_code_dirty(r300
);
843 r300
->rs_block_state
.dirty
= TRUE
; /* Will be updated before the emission. */
846 /* Delete fragment shader state. */
847 static void r300_delete_fs_state(struct pipe_context
* pipe
, void* shader
)
849 struct r300_fragment_shader
* fs
= (struct r300_fragment_shader
*)shader
;
850 struct r300_fragment_shader_code
*tmp
, *ptr
= fs
->first
;
855 rc_constants_destroy(&tmp
->code
.constants
);
859 FREE((void*)fs
->state
.tokens
);
863 static void r300_set_polygon_stipple(struct pipe_context
* pipe
,
864 const struct pipe_poly_stipple
* state
)
866 /* XXX no idea how to set this up, but not terribly important */
869 /* Create a new rasterizer state based on the CSO rasterizer state.
871 * This is a very large chunk of state, and covers most of the graphics
872 * backend (GB), geometry assembly (GA), and setup unit (SU) blocks.
874 * In a not entirely unironic sidenote, this state has nearly nothing to do
875 * with the actual block on the Radeon called the rasterizer (RS). */
876 static void* r300_create_rs_state(struct pipe_context
* pipe
,
877 const struct pipe_rasterizer_state
* state
)
879 struct r300_rs_state
* rs
= CALLOC_STRUCT(r300_rs_state
);
882 uint32_t vap_control_status
; /* R300_VAP_CNTL_STATUS: 0x2140 */
883 uint32_t point_size
; /* R300_GA_POINT_SIZE: 0x421c */
884 uint32_t point_minmax
; /* R300_GA_POINT_MINMAX: 0x4230 */
885 uint32_t line_control
; /* R300_GA_LINE_CNTL: 0x4234 */
886 uint32_t polygon_offset_enable
; /* R300_SU_POLY_OFFSET_ENABLE: 0x42b4 */
887 uint32_t cull_mode
; /* R300_SU_CULL_MODE: 0x42b8 */
888 uint32_t line_stipple_config
; /* R300_GA_LINE_STIPPLE_CONFIG: 0x4328 */
889 uint32_t line_stipple_value
; /* R300_GA_LINE_STIPPLE_VALUE: 0x4260 */
890 uint32_t polygon_mode
; /* R300_GA_POLY_MODE: 0x4288 */
891 uint32_t clip_rule
; /* R300_SC_CLIP_RULE: 0x43D0 */
893 /* Specifies top of Raster pipe specific enable controls,
894 * i.e. texture coordinates stuffing for points, lines, triangles */
895 uint32_t stuffing_enable
; /* R300_GB_ENABLE: 0x4008 */
897 /* Point sprites texture coordinates, 0: lower left, 1: upper right */
898 float point_texcoord_left
; /* R300_GA_POINT_S0: 0x4200 */
899 float point_texcoord_bottom
= 0;/* R300_GA_POINT_T0: 0x4204 */
900 float point_texcoord_right
; /* R300_GA_POINT_S1: 0x4208 */
901 float point_texcoord_top
= 0; /* R300_GA_POINT_T1: 0x420c */
904 /* Copy rasterizer state. */
906 rs
->rs_draw
= *state
;
908 /* Override some states for Draw. */
909 rs
->rs_draw
.sprite_coord_enable
= 0; /* We can do this in HW. */
911 #ifdef PIPE_ARCH_LITTLE_ENDIAN
912 vap_control_status
= R300_VC_NO_SWAP
;
914 vap_control_status
= R300_VC_32BIT_SWAP
;
917 /* If no TCL engine is present, turn off the HW TCL. */
918 if (!r300_screen(pipe
->screen
)->caps
.has_tcl
) {
919 vap_control_status
|= R300_VAP_TCL_BYPASS
;
922 /* Point size width and height. */
924 pack_float_16_6x(state
->point_size
) |
925 (pack_float_16_6x(state
->point_size
) << R300_POINTSIZE_X_SHIFT
);
927 /* Point size clamping. */
928 if (state
->point_size_per_vertex
) {
929 /* Per-vertex point size.
930 * Clamp to [0, max FB size] */
931 psiz
= pipe
->screen
->get_paramf(pipe
->screen
,
932 PIPE_CAP_MAX_POINT_WIDTH
);
934 pack_float_16_6x(psiz
) << R300_GA_POINT_MINMAX_MAX_SHIFT
;
936 /* We cannot disable the point-size vertex output,
938 psiz
= state
->point_size
;
940 (pack_float_16_6x(psiz
) << R300_GA_POINT_MINMAX_MIN_SHIFT
) |
941 (pack_float_16_6x(psiz
) << R300_GA_POINT_MINMAX_MAX_SHIFT
);
945 line_control
= pack_float_16_6x(state
->line_width
) |
946 R300_GA_LINE_CNTL_END_TYPE_COMP
;
948 /* Enable polygon mode */
950 if (state
->fill_front
!= PIPE_POLYGON_MODE_FILL
||
951 state
->fill_back
!= PIPE_POLYGON_MODE_FILL
) {
952 polygon_mode
= R300_GA_POLY_MODE_DUAL
;
956 if (state
->front_ccw
)
957 cull_mode
= R300_FRONT_FACE_CCW
;
959 cull_mode
= R300_FRONT_FACE_CW
;
962 polygon_offset_enable
= 0;
963 if (util_get_offset(state
, state
->fill_front
)) {
964 polygon_offset_enable
|= R300_FRONT_ENABLE
;
966 if (util_get_offset(state
, state
->fill_back
)) {
967 polygon_offset_enable
|= R300_BACK_ENABLE
;
970 rs
->polygon_offset_enable
= polygon_offset_enable
!= 0;
975 r300_translate_polygon_mode_front(state
->fill_front
);
977 r300_translate_polygon_mode_back(state
->fill_back
);
980 if (state
->cull_face
& PIPE_FACE_FRONT
) {
981 cull_mode
|= R300_CULL_FRONT
;
983 if (state
->cull_face
& PIPE_FACE_BACK
) {
984 cull_mode
|= R300_CULL_BACK
;
987 if (state
->line_stipple_enable
) {
988 line_stipple_config
=
989 R300_GA_LINE_STIPPLE_CONFIG_LINE_RESET_LINE
|
990 (fui((float)state
->line_stipple_factor
) &
991 R300_GA_LINE_STIPPLE_CONFIG_STIPPLE_SCALE_MASK
);
992 /* XXX this might need to be scaled up */
993 line_stipple_value
= state
->line_stipple_pattern
;
995 line_stipple_config
= 0;
996 line_stipple_value
= 0;
999 if (state
->flatshade
) {
1000 rs
->color_control
= R300_SHADE_MODEL_FLAT
;
1002 rs
->color_control
= R300_SHADE_MODEL_SMOOTH
;
1005 clip_rule
= state
->scissor
? 0xAAAA : 0xFFFF;
1008 stuffing_enable
= 0;
1009 if (state
->sprite_coord_enable
) {
1010 stuffing_enable
= R300_GB_POINT_STUFF_ENABLE
;
1011 for (i
= 0; i
< 8; i
++) {
1012 if (state
->sprite_coord_enable
& (1 << i
))
1014 R300_GB_TEX_STR
<< (R300_GB_TEX0_SOURCE_SHIFT
+ (i
*2));
1017 point_texcoord_left
= 0.0f
;
1018 point_texcoord_right
= 1.0f
;
1020 switch (state
->sprite_coord_mode
) {
1021 case PIPE_SPRITE_COORD_UPPER_LEFT
:
1022 point_texcoord_top
= 0.0f
;
1023 point_texcoord_bottom
= 1.0f
;
1025 case PIPE_SPRITE_COORD_LOWER_LEFT
:
1026 point_texcoord_top
= 1.0f
;
1027 point_texcoord_bottom
= 0.0f
;
1032 /* Build the main command buffer. */
1033 BEGIN_CB(rs
->cb_main
, 25);
1034 OUT_CB_REG(R300_VAP_CNTL_STATUS
, vap_control_status
);
1035 OUT_CB_REG(R300_GA_POINT_SIZE
, point_size
);
1036 OUT_CB_REG_SEQ(R300_GA_POINT_MINMAX
, 2);
1037 OUT_CB(point_minmax
);
1038 OUT_CB(line_control
);
1039 OUT_CB_REG_SEQ(R300_SU_POLY_OFFSET_ENABLE
, 2);
1040 OUT_CB(polygon_offset_enable
);
1041 rs
->cull_mode_index
= 9;
1043 OUT_CB_REG(R300_GA_LINE_STIPPLE_CONFIG
, line_stipple_config
);
1044 OUT_CB_REG(R300_GA_LINE_STIPPLE_VALUE
, line_stipple_value
);
1045 OUT_CB_REG(R300_GA_POLY_MODE
, polygon_mode
);
1046 OUT_CB_REG(R300_SC_CLIP_RULE
, clip_rule
);
1047 OUT_CB_REG(R300_GB_ENABLE
, stuffing_enable
);
1048 OUT_CB_REG_SEQ(R300_GA_POINT_S0
, 4);
1049 OUT_CB_32F(point_texcoord_left
);
1050 OUT_CB_32F(point_texcoord_bottom
);
1051 OUT_CB_32F(point_texcoord_right
);
1052 OUT_CB_32F(point_texcoord_top
);
1055 /* Build the two command buffers for polygon offset setup. */
1056 if (polygon_offset_enable
) {
1057 float scale
= state
->offset_scale
* 12;
1058 float offset
= state
->offset_units
* 4;
1060 BEGIN_CB(rs
->cb_poly_offset_zb16
, 5);
1061 OUT_CB_REG_SEQ(R300_SU_POLY_OFFSET_FRONT_SCALE
, 4);
1068 offset
= state
->offset_units
* 2;
1070 BEGIN_CB(rs
->cb_poly_offset_zb24
, 5);
1071 OUT_CB_REG_SEQ(R300_SU_POLY_OFFSET_FRONT_SCALE
, 4);
1082 /* Bind rasterizer state. */
1083 static void r300_bind_rs_state(struct pipe_context
* pipe
, void* state
)
1085 struct r300_context
* r300
= r300_context(pipe
);
1086 struct r300_rs_state
* rs
= (struct r300_rs_state
*)state
;
1087 int last_sprite_coord_enable
= r300
->sprite_coord_enable
;
1088 boolean last_two_sided_color
= r300
->two_sided_color
;
1090 if (r300
->draw
&& rs
) {
1091 draw_flush(r300
->draw
);
1092 draw_set_rasterizer_state(r300
->draw
, &rs
->rs_draw
, state
);
1096 r300
->polygon_offset_enabled
= (rs
->rs
.offset_point
||
1097 rs
->rs
.offset_line
||
1099 r300
->sprite_coord_enable
= rs
->rs
.sprite_coord_enable
;
1100 r300
->two_sided_color
= rs
->rs
.light_twoside
;
1102 r300
->polygon_offset_enabled
= FALSE
;
1103 r300
->sprite_coord_enable
= 0;
1104 r300
->two_sided_color
= FALSE
;
1107 UPDATE_STATE(state
, r300
->rs_state
);
1108 r300
->rs_state
.size
= 25 + (r300
->polygon_offset_enabled
? 5 : 0);
1110 if (last_sprite_coord_enable
!= r300
->sprite_coord_enable
||
1111 last_two_sided_color
!= r300
->two_sided_color
) {
1112 r300
->rs_block_state
.dirty
= TRUE
;
1116 /* Free rasterizer state. */
1117 static void r300_delete_rs_state(struct pipe_context
* pipe
, void* state
)
1123 r300_create_sampler_state(struct pipe_context
* pipe
,
1124 const struct pipe_sampler_state
* state
)
1126 struct r300_context
* r300
= r300_context(pipe
);
1127 struct r300_sampler_state
* sampler
= CALLOC_STRUCT(r300_sampler_state
);
1128 boolean is_r500
= r300
->screen
->caps
.is_r500
;
1130 union util_color uc
;
1132 sampler
->state
= *state
;
1134 /* r300 doesn't handle CLAMP and MIRROR_CLAMP correctly when either MAG
1135 * or MIN filter is NEAREST. Since texwrap produces same results
1136 * for CLAMP and CLAMP_TO_EDGE, we use them instead. */
1137 if (sampler
->state
.min_img_filter
== PIPE_TEX_FILTER_NEAREST
||
1138 sampler
->state
.mag_img_filter
== PIPE_TEX_FILTER_NEAREST
) {
1140 if (sampler
->state
.wrap_s
== PIPE_TEX_WRAP_CLAMP
)
1141 sampler
->state
.wrap_s
= PIPE_TEX_WRAP_CLAMP_TO_EDGE
;
1142 else if (sampler
->state
.wrap_s
== PIPE_TEX_WRAP_MIRROR_CLAMP
)
1143 sampler
->state
.wrap_s
= PIPE_TEX_WRAP_MIRROR_CLAMP_TO_EDGE
;
1146 if (sampler
->state
.wrap_t
== PIPE_TEX_WRAP_CLAMP
)
1147 sampler
->state
.wrap_t
= PIPE_TEX_WRAP_CLAMP_TO_EDGE
;
1148 else if (sampler
->state
.wrap_t
== PIPE_TEX_WRAP_MIRROR_CLAMP
)
1149 sampler
->state
.wrap_t
= PIPE_TEX_WRAP_MIRROR_CLAMP_TO_EDGE
;
1152 if (sampler
->state
.wrap_r
== PIPE_TEX_WRAP_CLAMP
)
1153 sampler
->state
.wrap_r
= PIPE_TEX_WRAP_CLAMP_TO_EDGE
;
1154 else if (sampler
->state
.wrap_r
== PIPE_TEX_WRAP_MIRROR_CLAMP
)
1155 sampler
->state
.wrap_r
= PIPE_TEX_WRAP_MIRROR_CLAMP_TO_EDGE
;
1159 (r300_translate_wrap(sampler
->state
.wrap_s
) << R300_TX_WRAP_S_SHIFT
) |
1160 (r300_translate_wrap(sampler
->state
.wrap_t
) << R300_TX_WRAP_T_SHIFT
) |
1161 (r300_translate_wrap(sampler
->state
.wrap_r
) << R300_TX_WRAP_R_SHIFT
);
1163 sampler
->filter0
|= r300_translate_tex_filters(state
->min_img_filter
,
1164 state
->mag_img_filter
,
1165 state
->min_mip_filter
,
1166 state
->max_anisotropy
> 0);
1168 sampler
->filter0
|= r300_anisotropy(state
->max_anisotropy
);
1170 /* Unfortunately, r300-r500 don't support floating-point mipmap lods. */
1171 /* We must pass these to the merge function to clamp them properly. */
1172 sampler
->min_lod
= MAX2((unsigned)state
->min_lod
, 0);
1173 sampler
->max_lod
= MAX2((unsigned)ceilf(state
->max_lod
), 0);
1175 lod_bias
= CLAMP((int)(state
->lod_bias
* 32 + 1), -(1 << 9), (1 << 9) - 1);
1177 sampler
->filter1
|= (lod_bias
<< R300_LOD_BIAS_SHIFT
) & R300_LOD_BIAS_MASK
;
1179 /* This is very high quality anisotropic filtering for R5xx.
1180 * It's good for benchmarking the performance of texturing but
1181 * in practice we don't want to slow down the driver because it's
1182 * a pretty good performance killer. Feel free to play with it. */
1183 if (DBG_ON(r300
, DBG_ANISOHQ
) && is_r500
) {
1184 sampler
->filter1
|= r500_anisotropy(state
->max_anisotropy
);
1187 util_pack_color(state
->border_color
, PIPE_FORMAT_B8G8R8A8_UNORM
, &uc
);
1188 sampler
->border_color
= uc
.ui
;
1190 /* R500-specific fixups and optimizations */
1191 if (r300
->screen
->caps
.is_r500
) {
1192 sampler
->filter1
|= R500_BORDER_FIX
;
1195 return (void*)sampler
;
1198 static void r300_bind_sampler_states(struct pipe_context
* pipe
,
1202 struct r300_context
* r300
= r300_context(pipe
);
1203 struct r300_textures_state
* state
=
1204 (struct r300_textures_state
*)r300
->textures_state
.state
;
1205 unsigned tex_units
= r300
->screen
->caps
.num_tex_units
;
1207 if (count
> tex_units
) {
1211 memcpy(state
->sampler_states
, states
, sizeof(void*) * count
);
1212 state
->sampler_state_count
= count
;
1214 r300
->textures_state
.dirty
= TRUE
;
1217 static void r300_lacks_vertex_textures(struct pipe_context
* pipe
,
1223 static void r300_delete_sampler_state(struct pipe_context
* pipe
, void* state
)
1228 static uint32_t r300_assign_texture_cache_region(unsigned index
, unsigned num
)
1230 /* This looks like a hack, but I believe it's suppose to work like
1231 * that. To illustrate how this works, let's assume you have 5 textures.
1232 * From docs, 5 and the successive numbers are:
1240 * First 3 textures will get 3/4 of size of the cache, divived evenly
1241 * between them. The last 1/4 of the cache must be divided between
1242 * the last 2 textures, each will therefore get 1/8 of the cache.
1243 * Why not just to use "5 + texture_index" ?
1245 * This simple trick works for all "num" <= 16.
1248 return R300_TX_CACHE(R300_TX_CACHE_WHOLE
);
1250 return R300_TX_CACHE(num
+ index
);
1253 static void r300_set_fragment_sampler_views(struct pipe_context
* pipe
,
1255 struct pipe_sampler_view
** views
)
1257 struct r300_context
* r300
= r300_context(pipe
);
1258 struct r300_textures_state
* state
=
1259 (struct r300_textures_state
*)r300
->textures_state
.state
;
1260 struct r300_texture
*texture
;
1261 unsigned i
, real_num_views
= 0, view_index
= 0;
1262 unsigned tex_units
= r300
->screen
->caps
.num_tex_units
;
1263 boolean dirty_tex
= FALSE
;
1265 if (count
> tex_units
) {
1269 /* Calculate the real number of views. */
1270 for (i
= 0; i
< count
; i
++) {
1275 for (i
= 0; i
< count
; i
++) {
1276 if (&state
->sampler_views
[i
]->base
!= views
[i
]) {
1277 pipe_sampler_view_reference(
1278 (struct pipe_sampler_view
**)&state
->sampler_views
[i
],
1285 /* A new sampler view (= texture)... */
1288 /* Set the texrect factor in the fragment shader.
1289 * Needed for RECT and NPOT fallback. */
1290 texture
= r300_texture(views
[i
]->texture
);
1291 if (texture
->uses_pitch
) {
1292 r300
->fs_rc_constant_state
.dirty
= TRUE
;
1295 state
->sampler_views
[i
]->texcache_region
=
1296 r300_assign_texture_cache_region(view_index
, real_num_views
);
1301 for (i
= count
; i
< tex_units
; i
++) {
1302 if (state
->sampler_views
[i
]) {
1303 pipe_sampler_view_reference(
1304 (struct pipe_sampler_view
**)&state
->sampler_views
[i
],
1309 state
->sampler_view_count
= count
;
1311 r300
->textures_state
.dirty
= TRUE
;
1314 r300
->texture_cache_inval
.dirty
= TRUE
;
1318 static struct pipe_sampler_view
*
1319 r300_create_sampler_view(struct pipe_context
*pipe
,
1320 struct pipe_resource
*texture
,
1321 const struct pipe_sampler_view
*templ
)
1323 struct r300_sampler_view
*view
= CALLOC_STRUCT(r300_sampler_view
);
1324 struct r300_texture
*tex
= r300_texture(texture
);
1327 view
->base
= *templ
;
1328 view
->base
.reference
.count
= 1;
1329 view
->base
.context
= pipe
;
1330 view
->base
.texture
= NULL
;
1331 pipe_resource_reference(&view
->base
.texture
, texture
);
1333 view
->swizzle
[0] = templ
->swizzle_r
;
1334 view
->swizzle
[1] = templ
->swizzle_g
;
1335 view
->swizzle
[2] = templ
->swizzle_b
;
1336 view
->swizzle
[3] = templ
->swizzle_a
;
1338 view
->format
= tex
->tx_format
;
1339 view
->format
.format1
|= r300_translate_texformat(templ
->format
,
1341 if (r300_screen(pipe
->screen
)->caps
.is_r500
) {
1342 view
->format
.format2
|= r500_tx_format_msb_bit(templ
->format
);
1346 return (struct pipe_sampler_view
*)view
;
1350 r300_sampler_view_destroy(struct pipe_context
*pipe
,
1351 struct pipe_sampler_view
*view
)
1353 pipe_resource_reference(&view
->texture
, NULL
);
1357 static void r300_set_scissor_state(struct pipe_context
* pipe
,
1358 const struct pipe_scissor_state
* state
)
1360 struct r300_context
* r300
= r300_context(pipe
);
1362 memcpy(r300
->scissor_state
.state
, state
,
1363 sizeof(struct pipe_scissor_state
));
1365 r300
->scissor_state
.dirty
= TRUE
;
1368 static void r300_set_viewport_state(struct pipe_context
* pipe
,
1369 const struct pipe_viewport_state
* state
)
1371 struct r300_context
* r300
= r300_context(pipe
);
1372 struct r300_viewport_state
* viewport
=
1373 (struct r300_viewport_state
*)r300
->viewport_state
.state
;
1375 r300
->viewport
= *state
;
1378 draw_flush(r300
->draw
);
1379 draw_set_viewport_state(r300
->draw
, state
);
1380 viewport
->vte_control
= R300_VTX_XY_FMT
| R300_VTX_Z_FMT
;
1384 /* Do the transform in HW. */
1385 viewport
->vte_control
= R300_VTX_W0_FMT
;
1387 if (state
->scale
[0] != 1.0f
) {
1388 viewport
->xscale
= state
->scale
[0];
1389 viewport
->vte_control
|= R300_VPORT_X_SCALE_ENA
;
1391 if (state
->scale
[1] != 1.0f
) {
1392 viewport
->yscale
= state
->scale
[1];
1393 viewport
->vte_control
|= R300_VPORT_Y_SCALE_ENA
;
1395 if (state
->scale
[2] != 1.0f
) {
1396 viewport
->zscale
= state
->scale
[2];
1397 viewport
->vte_control
|= R300_VPORT_Z_SCALE_ENA
;
1399 if (state
->translate
[0] != 0.0f
) {
1400 viewport
->xoffset
= state
->translate
[0];
1401 viewport
->vte_control
|= R300_VPORT_X_OFFSET_ENA
;
1403 if (state
->translate
[1] != 0.0f
) {
1404 viewport
->yoffset
= state
->translate
[1];
1405 viewport
->vte_control
|= R300_VPORT_Y_OFFSET_ENA
;
1407 if (state
->translate
[2] != 0.0f
) {
1408 viewport
->zoffset
= state
->translate
[2];
1409 viewport
->vte_control
|= R300_VPORT_Z_OFFSET_ENA
;
1412 r300
->viewport_state
.dirty
= TRUE
;
1413 if (r300
->fs
.state
&& r300_fs(r300
)->shader
->inputs
.wpos
!= ATTR_UNUSED
) {
1414 r300
->fs_rc_constant_state
.dirty
= TRUE
;
1418 static void r300_set_vertex_buffers(struct pipe_context
* pipe
,
1420 const struct pipe_vertex_buffer
* buffers
)
1422 struct r300_context
* r300
= r300_context(pipe
);
1423 struct pipe_vertex_buffer
*vbo
;
1424 unsigned i
, max_index
= (1 << 24) - 1;
1425 boolean any_user_buffer
= FALSE
;
1427 if (count
== r300
->vertex_buffer_count
&&
1428 memcmp(r300
->vertex_buffer
, buffers
,
1429 sizeof(struct pipe_vertex_buffer
) * count
) == 0) {
1433 if (r300
->screen
->caps
.has_tcl
) {
1435 r300
->incompatible_vb_layout
= FALSE
;
1437 /* Check if the strides and offsets are aligned to the size of DWORD. */
1438 for (i
= 0; i
< count
; i
++) {
1439 if (buffers
[i
].buffer
) {
1440 if (buffers
[i
].stride
% 4 != 0 ||
1441 buffers
[i
].buffer_offset
% 4 != 0) {
1442 r300
->incompatible_vb_layout
= TRUE
;
1448 for (i
= 0; i
< count
; i
++) {
1449 /* Why, yes, I AM casting away constness. How did you know? */
1450 vbo
= (struct pipe_vertex_buffer
*)&buffers
[i
];
1452 /* Skip NULL buffers */
1453 if (!buffers
[i
].buffer
) {
1457 if (r300_buffer_is_user_buffer(vbo
->buffer
)) {
1458 any_user_buffer
= TRUE
;
1461 if (vbo
->max_index
== ~0) {
1462 /* if no VBO stride then only one vertex value so max index is 1 */
1463 /* should think about converting to VS constants like svga does */
1468 (vbo
->buffer
->width0
- vbo
->buffer_offset
) / vbo
->stride
;
1471 max_index
= MIN2(vbo
->max_index
, max_index
);
1474 r300
->any_user_vbs
= any_user_buffer
;
1475 r300
->vertex_buffer_max_index
= max_index
;
1479 draw_flush(r300
->draw
);
1480 draw_set_vertex_buffers(r300
->draw
, count
, buffers
);
1484 for (i
= 0; i
< count
; i
++) {
1485 /* Reference our buffer. */
1486 pipe_resource_reference(&r300
->vertex_buffer
[i
].buffer
, buffers
[i
].buffer
);
1488 for (; i
< r300
->vertex_buffer_count
; i
++) {
1489 /* Dereference any old buffers. */
1490 pipe_resource_reference(&r300
->vertex_buffer
[i
].buffer
, NULL
);
1493 memcpy(r300
->vertex_buffer
, buffers
,
1494 sizeof(struct pipe_vertex_buffer
) * count
);
1495 r300
->vertex_buffer_count
= count
;
1498 /* Initialize the PSC tables. */
1499 static void r300_vertex_psc(struct r300_vertex_element_state
*velems
)
1501 struct r300_vertex_stream_state
*vstream
= &velems
->vertex_stream
;
1502 uint16_t type
, swizzle
;
1503 enum pipe_format format
;
1506 if (velems
->count
> 16) {
1507 fprintf(stderr
, "r300: More than 16 vertex elements are not supported,"
1508 " requested %i, using 16.\n", velems
->count
);
1512 /* Vertex shaders have no semantics on their inputs,
1513 * so PSC should just route stuff based on the vertex elements,
1514 * and not on attrib information. */
1515 for (i
= 0; i
< velems
->count
; i
++) {
1516 format
= velems
->hw_format
[i
];
1518 type
= r300_translate_vertex_data_type(format
);
1519 if (type
== R300_INVALID_FORMAT
) {
1520 fprintf(stderr
, "r300: Bad vertex format %s.\n",
1521 util_format_short_name(format
));
1526 type
|= i
<< R300_DST_VEC_LOC_SHIFT
;
1527 swizzle
= r300_translate_vertex_data_swizzle(format
);
1530 vstream
->vap_prog_stream_cntl
[i
>> 1] |= type
<< 16;
1531 vstream
->vap_prog_stream_cntl_ext
[i
>> 1] |= swizzle
<< 16;
1533 vstream
->vap_prog_stream_cntl
[i
>> 1] |= type
;
1534 vstream
->vap_prog_stream_cntl_ext
[i
>> 1] |= swizzle
;
1538 /* Set the last vector in the PSC. */
1542 vstream
->vap_prog_stream_cntl
[i
>> 1] |=
1543 (R300_LAST_VEC
<< (i
& 1 ? 16 : 0));
1545 vstream
->count
= (i
>> 1) + 1;
1548 #define FORMAT_REPLACE(what, withwhat) \
1549 case PIPE_FORMAT_##what: *format = PIPE_FORMAT_##withwhat; break
1551 static void* r300_create_vertex_elements_state(struct pipe_context
* pipe
,
1553 const struct pipe_vertex_element
* attribs
)
1555 struct r300_vertex_element_state
*velems
;
1557 enum pipe_format
*format
;
1559 assert(count
<= PIPE_MAX_ATTRIBS
);
1560 velems
= CALLOC_STRUCT(r300_vertex_element_state
);
1561 if (velems
!= NULL
) {
1562 velems
->count
= count
;
1563 memcpy(velems
->velem
, attribs
, sizeof(struct pipe_vertex_element
) * count
);
1565 if (r300_screen(pipe
->screen
)->caps
.has_tcl
) {
1566 /* Set the best hw format in case the original format is not
1567 * supported by hw. */
1568 for (i
= 0; i
< count
; i
++) {
1569 velems
->hw_format
[i
] = velems
->velem
[i
].src_format
;
1570 format
= &velems
->hw_format
[i
];
1572 /* This is basically the list of unsupported formats.
1573 * For now we don't care about the alignment, that's going to
1574 * be sorted out after the PSC setup. */
1576 FORMAT_REPLACE(R64_FLOAT
, R32_FLOAT
);
1577 FORMAT_REPLACE(R64G64_FLOAT
, R32G32_FLOAT
);
1578 FORMAT_REPLACE(R64G64B64_FLOAT
, R32G32B32_FLOAT
);
1579 FORMAT_REPLACE(R64G64B64A64_FLOAT
, R32G32B32A32_FLOAT
);
1581 FORMAT_REPLACE(R32_UNORM
, R32_FLOAT
);
1582 FORMAT_REPLACE(R32G32_UNORM
, R32G32_FLOAT
);
1583 FORMAT_REPLACE(R32G32B32_UNORM
, R32G32B32_FLOAT
);
1584 FORMAT_REPLACE(R32G32B32A32_UNORM
, R32G32B32A32_FLOAT
);
1586 FORMAT_REPLACE(R32_USCALED
, R32_FLOAT
);
1587 FORMAT_REPLACE(R32G32_USCALED
, R32G32_FLOAT
);
1588 FORMAT_REPLACE(R32G32B32_USCALED
, R32G32B32_FLOAT
);
1589 FORMAT_REPLACE(R32G32B32A32_USCALED
,R32G32B32A32_FLOAT
);
1591 FORMAT_REPLACE(R32_SNORM
, R32_FLOAT
);
1592 FORMAT_REPLACE(R32G32_SNORM
, R32G32_FLOAT
);
1593 FORMAT_REPLACE(R32G32B32_SNORM
, R32G32B32_FLOAT
);
1594 FORMAT_REPLACE(R32G32B32A32_SNORM
, R32G32B32A32_FLOAT
);
1596 FORMAT_REPLACE(R32_SSCALED
, R32_FLOAT
);
1597 FORMAT_REPLACE(R32G32_SSCALED
, R32G32_FLOAT
);
1598 FORMAT_REPLACE(R32G32B32_SSCALED
, R32G32B32_FLOAT
);
1599 FORMAT_REPLACE(R32G32B32A32_SSCALED
,R32G32B32A32_FLOAT
);
1601 FORMAT_REPLACE(R32_FIXED
, R32_FLOAT
);
1602 FORMAT_REPLACE(R32G32_FIXED
, R32G32_FLOAT
);
1603 FORMAT_REPLACE(R32G32B32_FIXED
, R32G32B32_FLOAT
);
1604 FORMAT_REPLACE(R32G32B32A32_FIXED
, R32G32B32A32_FLOAT
);
1609 velems
->incompatible_layout
=
1610 velems
->incompatible_layout
||
1611 velems
->velem
[i
].src_format
!= velems
->hw_format
[i
] ||
1612 velems
->velem
[i
].src_offset
% 4 != 0;
1616 * The unused components will be replaced by (..., 0, 1). */
1617 r300_vertex_psc(velems
);
1619 /* Align the formats to the size of DWORD.
1620 * We only care about the blocksizes of the formats since
1621 * swizzles are already set up.
1622 * Also compute the vertex size. */
1623 for (i
= 0; i
< count
; i
++) {
1624 /* This is OK because we check for aligned strides too. */
1625 velems
->hw_format_size
[i
] =
1626 align(util_format_get_blocksize(velems
->hw_format
[i
]), 4);
1627 velems
->vertex_size_dwords
+= velems
->hw_format_size
[i
] / 4;
1634 static void r300_bind_vertex_elements_state(struct pipe_context
*pipe
,
1637 struct r300_context
*r300
= r300_context(pipe
);
1638 struct r300_vertex_element_state
*velems
= state
;
1640 if (velems
== NULL
) {
1644 r300
->velems
= velems
;
1647 draw_flush(r300
->draw
);
1648 draw_set_vertex_elements(r300
->draw
, velems
->count
, velems
->velem
);
1652 UPDATE_STATE(&velems
->vertex_stream
, r300
->vertex_stream_state
);
1653 r300
->vertex_stream_state
.size
= (1 + velems
->vertex_stream
.count
) * 2;
1656 static void r300_delete_vertex_elements_state(struct pipe_context
*pipe
, void *state
)
1661 static void* r300_create_vs_state(struct pipe_context
* pipe
,
1662 const struct pipe_shader_state
* shader
)
1664 struct r300_context
* r300
= r300_context(pipe
);
1665 struct r300_vertex_shader
* vs
= CALLOC_STRUCT(r300_vertex_shader
);
1667 /* Copy state directly into shader. */
1668 vs
->state
= *shader
;
1669 vs
->state
.tokens
= tgsi_dup_tokens(shader
->tokens
);
1671 if (r300
->screen
->caps
.has_tcl
) {
1672 r300_init_vs_outputs(vs
);
1673 r300_translate_vertex_shader(r300
, vs
);
1675 r300_draw_init_vertex_shader(r300
->draw
, vs
);
1681 static void r300_bind_vs_state(struct pipe_context
* pipe
, void* shader
)
1683 struct r300_context
* r300
= r300_context(pipe
);
1684 struct r300_vertex_shader
* vs
= (struct r300_vertex_shader
*)shader
;
1687 r300
->vs_state
.state
= NULL
;
1690 if (vs
== r300
->vs_state
.state
) {
1693 r300
->vs_state
.state
= vs
;
1695 /* The majority of the RS block bits is dependent on the vertex shader. */
1696 r300
->rs_block_state
.dirty
= TRUE
; /* Will be updated before the emission. */
1698 if (r300
->screen
->caps
.has_tcl
) {
1699 r300
->vs_state
.dirty
= TRUE
;
1700 r300
->vs_state
.size
=
1701 vs
->code
.length
+ 9 +
1702 (vs
->immediates_count
? vs
->immediates_count
* 4 + 3 : 0);
1704 if (vs
->externals_count
) {
1705 r300
->vs_constants
.dirty
= TRUE
;
1706 r300
->vs_constants
.size
= vs
->externals_count
* 4 + 3;
1708 r300
->vs_constants
.size
= 0;
1711 r300
->pvs_flush
.dirty
= TRUE
;
1713 draw_flush(r300
->draw
);
1714 draw_bind_vertex_shader(r300
->draw
,
1715 (struct draw_vertex_shader
*)vs
->draw_vs
);
1719 static void r300_delete_vs_state(struct pipe_context
* pipe
, void* shader
)
1721 struct r300_context
* r300
= r300_context(pipe
);
1722 struct r300_vertex_shader
* vs
= (struct r300_vertex_shader
*)shader
;
1724 if (r300
->screen
->caps
.has_tcl
) {
1725 rc_constants_destroy(&vs
->code
.constants
);
1727 draw_delete_vertex_shader(r300
->draw
,
1728 (struct draw_vertex_shader
*)vs
->draw_vs
);
1731 FREE((void*)vs
->state
.tokens
);
1735 static void r300_set_constant_buffer(struct pipe_context
*pipe
,
1736 uint shader
, uint index
,
1737 struct pipe_resource
*buf
)
1739 struct r300_context
* r300
= r300_context(pipe
);
1740 struct r300_constant_buffer
*cbuf
;
1741 uint32_t *mapped
= r300_buffer(buf
)->user_buffer
;
1742 int max_size
= 0, max_size_bytes
= 0, clamped_size
= 0;
1745 case PIPE_SHADER_VERTEX
:
1746 cbuf
= (struct r300_constant_buffer
*)r300
->vs_constants
.state
;
1749 case PIPE_SHADER_FRAGMENT
:
1750 cbuf
= (struct r300_constant_buffer
*)r300
->fs_constants
.state
;
1751 if (r300
->screen
->caps
.is_r500
) {
1761 max_size_bytes
= max_size
* 4 * sizeof(float);
1763 if (buf
== NULL
|| buf
->width0
== 0 ||
1764 (mapped
= r300_buffer(buf
)->constant_buffer
) == NULL
) {
1769 if (shader
== PIPE_SHADER_FRAGMENT
||
1770 (shader
== PIPE_SHADER_VERTEX
&& r300
->screen
->caps
.has_tcl
)) {
1771 assert((buf
->width0
% (4 * sizeof(float))) == 0);
1773 /* Check the size of the constant buffer. */
1774 /* XXX Subtract immediates and RC_STATE_* variables. */
1775 if (buf
->width0
> max_size_bytes
) {
1776 fprintf(stderr
, "r300: Max size of the constant buffer is "
1777 "%i*4 floats.\n", max_size
);
1780 clamped_size
= MIN2(buf
->width0
, max_size_bytes
);
1781 cbuf
->count
= clamped_size
/ (4 * sizeof(float));
1785 if (shader
== PIPE_SHADER_VERTEX
) {
1786 if (r300
->screen
->caps
.has_tcl
) {
1787 if (r300
->vs_constants
.size
) {
1788 r300
->vs_constants
.dirty
= TRUE
;
1790 r300
->pvs_flush
.dirty
= TRUE
;
1791 } else if (r300
->draw
) {
1792 draw_set_mapped_constant_buffer(r300
->draw
, PIPE_SHADER_VERTEX
,
1793 0, mapped
, buf
->width0
);
1795 } else if (shader
== PIPE_SHADER_FRAGMENT
) {
1796 r300
->fs_constants
.dirty
= TRUE
;
1800 void r300_init_state_functions(struct r300_context
* r300
)
1802 r300
->context
.create_blend_state
= r300_create_blend_state
;
1803 r300
->context
.bind_blend_state
= r300_bind_blend_state
;
1804 r300
->context
.delete_blend_state
= r300_delete_blend_state
;
1806 r300
->context
.set_blend_color
= r300_set_blend_color
;
1808 r300
->context
.set_clip_state
= r300_set_clip_state
;
1809 r300
->context
.set_sample_mask
= r300_set_sample_mask
;
1811 r300
->context
.set_constant_buffer
= r300_set_constant_buffer
;
1813 r300
->context
.create_depth_stencil_alpha_state
= r300_create_dsa_state
;
1814 r300
->context
.bind_depth_stencil_alpha_state
= r300_bind_dsa_state
;
1815 r300
->context
.delete_depth_stencil_alpha_state
= r300_delete_dsa_state
;
1817 r300
->context
.set_stencil_ref
= r300_set_stencil_ref
;
1819 r300
->context
.set_framebuffer_state
= r300_set_framebuffer_state
;
1821 r300
->context
.create_fs_state
= r300_create_fs_state
;
1822 r300
->context
.bind_fs_state
= r300_bind_fs_state
;
1823 r300
->context
.delete_fs_state
= r300_delete_fs_state
;
1825 r300
->context
.set_polygon_stipple
= r300_set_polygon_stipple
;
1827 r300
->context
.create_rasterizer_state
= r300_create_rs_state
;
1828 r300
->context
.bind_rasterizer_state
= r300_bind_rs_state
;
1829 r300
->context
.delete_rasterizer_state
= r300_delete_rs_state
;
1831 r300
->context
.create_sampler_state
= r300_create_sampler_state
;
1832 r300
->context
.bind_fragment_sampler_states
= r300_bind_sampler_states
;
1833 r300
->context
.bind_vertex_sampler_states
= r300_lacks_vertex_textures
;
1834 r300
->context
.delete_sampler_state
= r300_delete_sampler_state
;
1836 r300
->context
.set_fragment_sampler_views
= r300_set_fragment_sampler_views
;
1837 r300
->context
.create_sampler_view
= r300_create_sampler_view
;
1838 r300
->context
.sampler_view_destroy
= r300_sampler_view_destroy
;
1840 r300
->context
.set_scissor_state
= r300_set_scissor_state
;
1842 r300
->context
.set_viewport_state
= r300_set_viewport_state
;
1844 r300
->context
.set_vertex_buffers
= r300_set_vertex_buffers
;
1846 r300
->context
.create_vertex_elements_state
= r300_create_vertex_elements_state
;
1847 r300
->context
.bind_vertex_elements_state
= r300_bind_vertex_elements_state
;
1848 r300
->context
.delete_vertex_elements_state
= r300_delete_vertex_elements_state
;
1850 r300
->context
.create_vs_state
= r300_create_vs_state
;
1851 r300
->context
.bind_vs_state
= r300_bind_vs_state
;
1852 r300
->context
.delete_vs_state
= r300_delete_vs_state
;