2 * Copyright 2008 Corbin Simpson <MostAwesomeDude@gmail.com>
3 * Copyright 2009 Marek Olšák <maraeo@gmail.com>
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * on the rights to use, copy, modify, merge, publish, distribute, sub
9 * license, and/or sell copies of the Software, and to permit persons to whom
10 * the Software is furnished to do so, subject to the following conditions:
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
20 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
21 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
22 * USE OR OTHER DEALINGS IN THE SOFTWARE. */
24 #include "draw/draw_context.h"
26 #include "util/u_framebuffer.h"
27 #include "util/u_half.h"
28 #include "util/u_math.h"
29 #include "util/u_mm.h"
30 #include "util/u_memory.h"
31 #include "util/u_pack_color.h"
32 #include "util/u_transfer.h"
34 #include "tgsi/tgsi_parse.h"
36 #include "pipe/p_config.h"
39 #include "r300_context.h"
40 #include "r300_emit.h"
42 #include "r300_screen.h"
43 #include "r300_screen_buffer.h"
44 #include "r300_state_inlines.h"
46 #include "r300_texture.h"
49 /* r300_state: Functions used to intialize state context by translating
50 * Gallium state objects into semi-native r300 state objects. */
52 #define UPDATE_STATE(cso, atom) \
53 if (cso != atom.state) { \
55 r300_mark_atom_dirty(r300, &(atom)); \
58 static boolean
blend_discard_if_src_alpha_0(unsigned srcRGB
, unsigned srcA
,
59 unsigned dstRGB
, unsigned dstA
)
61 /* If the blend equation is ADD or REVERSE_SUBTRACT,
62 * SRC_ALPHA == 0, and the following state is set, the colorbuffer
63 * will not be changed.
64 * Notice that the dst factors are the src factors inverted. */
65 return (srcRGB
== PIPE_BLENDFACTOR_SRC_ALPHA
||
66 srcRGB
== PIPE_BLENDFACTOR_SRC_ALPHA_SATURATE
||
67 srcRGB
== PIPE_BLENDFACTOR_ZERO
) &&
68 (srcA
== PIPE_BLENDFACTOR_SRC_COLOR
||
69 srcA
== PIPE_BLENDFACTOR_SRC_ALPHA
||
70 srcA
== PIPE_BLENDFACTOR_SRC_ALPHA_SATURATE
||
71 srcA
== PIPE_BLENDFACTOR_ZERO
) &&
72 (dstRGB
== PIPE_BLENDFACTOR_INV_SRC_ALPHA
||
73 dstRGB
== PIPE_BLENDFACTOR_ONE
) &&
74 (dstA
== PIPE_BLENDFACTOR_INV_SRC_COLOR
||
75 dstA
== PIPE_BLENDFACTOR_INV_SRC_ALPHA
||
76 dstA
== PIPE_BLENDFACTOR_ONE
);
79 static boolean
blend_discard_if_src_alpha_1(unsigned srcRGB
, unsigned srcA
,
80 unsigned dstRGB
, unsigned dstA
)
82 /* If the blend equation is ADD or REVERSE_SUBTRACT,
83 * SRC_ALPHA == 1, and the following state is set, the colorbuffer
84 * will not be changed.
85 * Notice that the dst factors are the src factors inverted. */
86 return (srcRGB
== PIPE_BLENDFACTOR_INV_SRC_ALPHA
||
87 srcRGB
== PIPE_BLENDFACTOR_ZERO
) &&
88 (srcA
== PIPE_BLENDFACTOR_INV_SRC_COLOR
||
89 srcA
== PIPE_BLENDFACTOR_INV_SRC_ALPHA
||
90 srcA
== PIPE_BLENDFACTOR_ZERO
) &&
91 (dstRGB
== PIPE_BLENDFACTOR_SRC_ALPHA
||
92 dstRGB
== PIPE_BLENDFACTOR_ONE
) &&
93 (dstA
== PIPE_BLENDFACTOR_SRC_COLOR
||
94 dstA
== PIPE_BLENDFACTOR_SRC_ALPHA
||
95 dstA
== PIPE_BLENDFACTOR_ONE
);
98 static boolean
blend_discard_if_src_color_0(unsigned srcRGB
, unsigned srcA
,
99 unsigned dstRGB
, unsigned dstA
)
101 /* If the blend equation is ADD or REVERSE_SUBTRACT,
102 * SRC_COLOR == (0,0,0), and the following state is set, the colorbuffer
103 * will not be changed.
104 * Notice that the dst factors are the src factors inverted. */
105 return (srcRGB
== PIPE_BLENDFACTOR_SRC_COLOR
||
106 srcRGB
== PIPE_BLENDFACTOR_ZERO
) &&
107 (srcA
== PIPE_BLENDFACTOR_ZERO
) &&
108 (dstRGB
== PIPE_BLENDFACTOR_INV_SRC_COLOR
||
109 dstRGB
== PIPE_BLENDFACTOR_ONE
) &&
110 (dstA
== PIPE_BLENDFACTOR_ONE
);
113 static boolean
blend_discard_if_src_color_1(unsigned srcRGB
, unsigned srcA
,
114 unsigned dstRGB
, unsigned dstA
)
116 /* If the blend equation is ADD or REVERSE_SUBTRACT,
117 * SRC_COLOR == (1,1,1), and the following state is set, the colorbuffer
118 * will not be changed.
119 * Notice that the dst factors are the src factors inverted. */
120 return (srcRGB
== PIPE_BLENDFACTOR_INV_SRC_COLOR
||
121 srcRGB
== PIPE_BLENDFACTOR_ZERO
) &&
122 (srcA
== PIPE_BLENDFACTOR_ZERO
) &&
123 (dstRGB
== PIPE_BLENDFACTOR_SRC_COLOR
||
124 dstRGB
== PIPE_BLENDFACTOR_ONE
) &&
125 (dstA
== PIPE_BLENDFACTOR_ONE
);
128 static boolean
blend_discard_if_src_alpha_color_0(unsigned srcRGB
, unsigned srcA
,
129 unsigned dstRGB
, unsigned dstA
)
131 /* If the blend equation is ADD or REVERSE_SUBTRACT,
132 * SRC_ALPHA_COLOR == (0,0,0,0), and the following state is set,
133 * the colorbuffer will not be changed.
134 * Notice that the dst factors are the src factors inverted. */
135 return (srcRGB
== PIPE_BLENDFACTOR_SRC_COLOR
||
136 srcRGB
== PIPE_BLENDFACTOR_SRC_ALPHA
||
137 srcRGB
== PIPE_BLENDFACTOR_SRC_ALPHA_SATURATE
||
138 srcRGB
== PIPE_BLENDFACTOR_ZERO
) &&
139 (srcA
== PIPE_BLENDFACTOR_SRC_COLOR
||
140 srcA
== PIPE_BLENDFACTOR_SRC_ALPHA
||
141 srcA
== PIPE_BLENDFACTOR_SRC_ALPHA_SATURATE
||
142 srcA
== PIPE_BLENDFACTOR_ZERO
) &&
143 (dstRGB
== PIPE_BLENDFACTOR_INV_SRC_COLOR
||
144 dstRGB
== PIPE_BLENDFACTOR_INV_SRC_ALPHA
||
145 dstRGB
== PIPE_BLENDFACTOR_ONE
) &&
146 (dstA
== PIPE_BLENDFACTOR_INV_SRC_COLOR
||
147 dstA
== PIPE_BLENDFACTOR_INV_SRC_ALPHA
||
148 dstA
== PIPE_BLENDFACTOR_ONE
);
151 static boolean
blend_discard_if_src_alpha_color_1(unsigned srcRGB
, unsigned srcA
,
152 unsigned dstRGB
, unsigned dstA
)
154 /* If the blend equation is ADD or REVERSE_SUBTRACT,
155 * SRC_ALPHA_COLOR == (1,1,1,1), and the following state is set,
156 * the colorbuffer will not be changed.
157 * Notice that the dst factors are the src factors inverted. */
158 return (srcRGB
== PIPE_BLENDFACTOR_INV_SRC_COLOR
||
159 srcRGB
== PIPE_BLENDFACTOR_INV_SRC_ALPHA
||
160 srcRGB
== PIPE_BLENDFACTOR_ZERO
) &&
161 (srcA
== PIPE_BLENDFACTOR_INV_SRC_COLOR
||
162 srcA
== PIPE_BLENDFACTOR_INV_SRC_ALPHA
||
163 srcA
== PIPE_BLENDFACTOR_ZERO
) &&
164 (dstRGB
== PIPE_BLENDFACTOR_SRC_COLOR
||
165 dstRGB
== PIPE_BLENDFACTOR_SRC_ALPHA
||
166 dstRGB
== PIPE_BLENDFACTOR_ONE
) &&
167 (dstA
== PIPE_BLENDFACTOR_SRC_COLOR
||
168 dstA
== PIPE_BLENDFACTOR_SRC_ALPHA
||
169 dstA
== PIPE_BLENDFACTOR_ONE
);
172 static unsigned bgra_cmask(unsigned mask
)
174 /* Gallium uses RGBA color ordering while R300 expects BGRA. */
176 return ((mask
& PIPE_MASK_R
) << 2) |
177 ((mask
& PIPE_MASK_B
) >> 2) |
178 (mask
& (PIPE_MASK_G
| PIPE_MASK_A
));
181 /* Create a new blend state based on the CSO blend state.
183 * This encompasses alpha blending, logic/raster ops, and blend dithering. */
184 static void* r300_create_blend_state(struct pipe_context
* pipe
,
185 const struct pipe_blend_state
* state
)
187 struct r300_screen
* r300screen
= r300_screen(pipe
->screen
);
188 struct r300_blend_state
* blend
= CALLOC_STRUCT(r300_blend_state
);
189 uint32_t blend_control
= 0; /* R300_RB3D_CBLEND: 0x4e04 */
190 uint32_t blend_control_noclamp
= 0; /* R300_RB3D_CBLEND: 0x4e04 */
191 uint32_t alpha_blend_control
= 0; /* R300_RB3D_ABLEND: 0x4e08 */
192 uint32_t alpha_blend_control_noclamp
= 0; /* R300_RB3D_ABLEND: 0x4e08 */
193 uint32_t color_channel_mask
= 0; /* R300_RB3D_COLOR_CHANNEL_MASK: 0x4e0c */
194 uint32_t rop
= 0; /* R300_RB3D_ROPCNTL: 0x4e18 */
195 uint32_t dither
= 0; /* R300_RB3D_DITHER_CTL: 0x4e50 */
198 blend
->state
= *state
;
200 if (state
->rt
[0].blend_enable
)
202 unsigned eqRGB
= state
->rt
[0].rgb_func
;
203 unsigned srcRGB
= state
->rt
[0].rgb_src_factor
;
204 unsigned dstRGB
= state
->rt
[0].rgb_dst_factor
;
206 unsigned eqA
= state
->rt
[0].alpha_func
;
207 unsigned srcA
= state
->rt
[0].alpha_src_factor
;
208 unsigned dstA
= state
->rt
[0].alpha_dst_factor
;
210 /* despite the name, ALPHA_BLEND_ENABLE has nothing to do with alpha,
211 * this is just the crappy D3D naming */
212 blend_control
= blend_control_noclamp
=
213 R300_ALPHA_BLEND_ENABLE
|
214 ( r300_translate_blend_factor(srcRGB
) << R300_SRC_BLEND_SHIFT
) |
215 ( r300_translate_blend_factor(dstRGB
) << R300_DST_BLEND_SHIFT
);
217 r300_translate_blend_function(eqRGB
, TRUE
);
218 blend_control_noclamp
|=
219 r300_translate_blend_function(eqRGB
, FALSE
);
221 /* Optimization: some operations do not require the destination color.
223 * When SRC_ALPHA_SATURATE is used, colorbuffer reads must be enabled,
224 * otherwise blending gives incorrect results. It seems to be
226 if (eqRGB
== PIPE_BLEND_MIN
|| eqA
== PIPE_BLEND_MIN
||
227 eqRGB
== PIPE_BLEND_MAX
|| eqA
== PIPE_BLEND_MAX
||
228 dstRGB
!= PIPE_BLENDFACTOR_ZERO
||
229 dstA
!= PIPE_BLENDFACTOR_ZERO
||
230 srcRGB
== PIPE_BLENDFACTOR_DST_COLOR
||
231 srcRGB
== PIPE_BLENDFACTOR_DST_ALPHA
||
232 srcRGB
== PIPE_BLENDFACTOR_INV_DST_COLOR
||
233 srcRGB
== PIPE_BLENDFACTOR_INV_DST_ALPHA
||
234 srcA
== PIPE_BLENDFACTOR_DST_COLOR
||
235 srcA
== PIPE_BLENDFACTOR_DST_ALPHA
||
236 srcA
== PIPE_BLENDFACTOR_INV_DST_COLOR
||
237 srcA
== PIPE_BLENDFACTOR_INV_DST_ALPHA
||
238 srcRGB
== PIPE_BLENDFACTOR_SRC_ALPHA_SATURATE
) {
239 /* Enable reading from the colorbuffer. */
240 blend_control
|= R300_READ_ENABLE
;
241 blend_control_noclamp
|= R300_READ_ENABLE
;
243 if (r300screen
->caps
.is_r500
) {
244 /* Optimization: Depending on incoming pixels, we can
245 * conditionally disable the reading in hardware... */
246 if (eqRGB
!= PIPE_BLEND_MIN
&& eqA
!= PIPE_BLEND_MIN
&&
247 eqRGB
!= PIPE_BLEND_MAX
&& eqA
!= PIPE_BLEND_MAX
) {
248 /* Disable reading if SRC_ALPHA == 0. */
249 if ((dstRGB
== PIPE_BLENDFACTOR_SRC_ALPHA
||
250 dstRGB
== PIPE_BLENDFACTOR_ZERO
) &&
251 (dstA
== PIPE_BLENDFACTOR_SRC_COLOR
||
252 dstA
== PIPE_BLENDFACTOR_SRC_ALPHA
||
253 dstA
== PIPE_BLENDFACTOR_ZERO
)) {
254 blend_control
|= R500_SRC_ALPHA_0_NO_READ
;
257 /* Disable reading if SRC_ALPHA == 1. */
258 if ((dstRGB
== PIPE_BLENDFACTOR_INV_SRC_ALPHA
||
259 dstRGB
== PIPE_BLENDFACTOR_ZERO
) &&
260 (dstA
== PIPE_BLENDFACTOR_INV_SRC_COLOR
||
261 dstA
== PIPE_BLENDFACTOR_INV_SRC_ALPHA
||
262 dstA
== PIPE_BLENDFACTOR_ZERO
)) {
263 blend_control
|= R500_SRC_ALPHA_1_NO_READ
;
269 /* Optimization: discard pixels which don't change the colorbuffer.
271 * The code below is non-trivial and some math is involved.
273 * Discarding pixels must be disabled when FP16 AA is enabled.
274 * This is a hardware bug. Also, this implementation wouldn't work
275 * with FP blending enabled and equation clamping disabled.
277 * Equations other than ADD are rarely used and therefore won't be
279 if ((eqRGB
== PIPE_BLEND_ADD
|| eqRGB
== PIPE_BLEND_REVERSE_SUBTRACT
) &&
280 (eqA
== PIPE_BLEND_ADD
|| eqA
== PIPE_BLEND_REVERSE_SUBTRACT
)) {
282 * REVERSE_SUBTRACT: Y-X
285 * If X = src*srcFactor = 0 and Y = dst*dstFactor = 1,
286 * then CB will not be changed.
288 * Given the srcFactor and dstFactor variables, we can derive
289 * what src and dst should be equal to and discard appropriate
292 if (blend_discard_if_src_alpha_0(srcRGB
, srcA
, dstRGB
, dstA
)) {
293 blend_control
|= R300_DISCARD_SRC_PIXELS_SRC_ALPHA_0
;
294 } else if (blend_discard_if_src_alpha_1(srcRGB
, srcA
,
296 blend_control
|= R300_DISCARD_SRC_PIXELS_SRC_ALPHA_1
;
297 } else if (blend_discard_if_src_color_0(srcRGB
, srcA
,
299 blend_control
|= R300_DISCARD_SRC_PIXELS_SRC_COLOR_0
;
300 } else if (blend_discard_if_src_color_1(srcRGB
, srcA
,
302 blend_control
|= R300_DISCARD_SRC_PIXELS_SRC_COLOR_1
;
303 } else if (blend_discard_if_src_alpha_color_0(srcRGB
, srcA
,
306 R300_DISCARD_SRC_PIXELS_SRC_ALPHA_COLOR_0
;
307 } else if (blend_discard_if_src_alpha_color_1(srcRGB
, srcA
,
310 R300_DISCARD_SRC_PIXELS_SRC_ALPHA_COLOR_1
;
315 if (srcA
!= srcRGB
|| dstA
!= dstRGB
|| eqA
!= eqRGB
) {
316 blend_control
|= R300_SEPARATE_ALPHA_ENABLE
;
317 blend_control_noclamp
|= R300_SEPARATE_ALPHA_ENABLE
;
318 alpha_blend_control
= alpha_blend_control_noclamp
=
319 (r300_translate_blend_factor(srcA
) << R300_SRC_BLEND_SHIFT
) |
320 (r300_translate_blend_factor(dstA
) << R300_DST_BLEND_SHIFT
);
321 alpha_blend_control
|=
322 r300_translate_blend_function(eqA
, TRUE
);
323 alpha_blend_control_noclamp
|=
324 r300_translate_blend_function(eqA
, FALSE
);
328 /* PIPE_LOGICOP_* don't need to be translated, fortunately. */
329 if (state
->logicop_enable
) {
330 rop
= R300_RB3D_ROPCNTL_ROP_ENABLE
|
331 (state
->logicop_func
) << R300_RB3D_ROPCNTL_ROP_SHIFT
;
334 /* Color channel masks for all MRTs. */
335 color_channel_mask
= bgra_cmask(state
->rt
[0].colormask
);
336 if (r300screen
->caps
.is_r500
&& state
->independent_blend_enable
) {
337 if (state
->rt
[1].blend_enable
) {
338 color_channel_mask
|= bgra_cmask(state
->rt
[1].colormask
) << 4;
340 if (state
->rt
[2].blend_enable
) {
341 color_channel_mask
|= bgra_cmask(state
->rt
[2].colormask
) << 8;
343 if (state
->rt
[3].blend_enable
) {
344 color_channel_mask
|= bgra_cmask(state
->rt
[3].colormask
) << 12;
348 /* Neither fglrx nor classic r300 ever set this, regardless of dithering
349 * state. Since it's an optional implementation detail, we can leave it
350 * out and never dither.
352 * This could be revisited if we ever get quality or conformance hints.
355 dither = R300_RB3D_DITHER_CTL_DITHER_MODE_LUT |
356 R300_RB3D_DITHER_CTL_ALPHA_DITHER_MODE_LUT;
360 /* Build a command buffer. */
361 BEGIN_CB(blend
->cb_clamp
, 8);
362 OUT_CB_REG(R300_RB3D_ROPCNTL
, rop
);
363 OUT_CB_REG_SEQ(R300_RB3D_CBLEND
, 3);
364 OUT_CB(blend_control
);
365 OUT_CB(alpha_blend_control
);
366 OUT_CB(color_channel_mask
);
367 OUT_CB_REG(R300_RB3D_DITHER_CTL
, dither
);
370 /* Build a command buffer. */
371 BEGIN_CB(blend
->cb_noclamp
, 8);
372 OUT_CB_REG(R300_RB3D_ROPCNTL
, rop
);
373 OUT_CB_REG_SEQ(R300_RB3D_CBLEND
, 3);
374 OUT_CB(blend_control_noclamp
);
375 OUT_CB(alpha_blend_control_noclamp
);
376 OUT_CB(color_channel_mask
);
377 OUT_CB_REG(R300_RB3D_DITHER_CTL
, dither
);
380 /* The same as above, but with no colorbuffer reads and writes. */
381 BEGIN_CB(blend
->cb_no_readwrite
, 8);
382 OUT_CB_REG(R300_RB3D_ROPCNTL
, rop
);
383 OUT_CB_REG_SEQ(R300_RB3D_CBLEND
, 3);
387 OUT_CB_REG(R300_RB3D_DITHER_CTL
, dither
);
393 /* Bind blend state. */
394 static void r300_bind_blend_state(struct pipe_context
* pipe
,
397 struct r300_context
* r300
= r300_context(pipe
);
399 UPDATE_STATE(state
, r300
->blend_state
);
402 /* Free blend state. */
403 static void r300_delete_blend_state(struct pipe_context
* pipe
,
409 /* Convert float to 10bit integer */
410 static unsigned float_to_fixed10(float f
)
412 return CLAMP((unsigned)(f
* 1023.9f
), 0, 1023);
416 * Setup both R300 and R500 registers, figure out later which one to write. */
417 static void r300_set_blend_color(struct pipe_context
* pipe
,
418 const struct pipe_blend_color
* color
)
420 struct r300_context
* r300
= r300_context(pipe
);
421 struct pipe_framebuffer_state
*fb
= r300
->fb_state
.state
;
422 struct r300_blend_color_state
*state
=
423 (struct r300_blend_color_state
*)r300
->blend_color_state
.state
;
424 struct pipe_blend_color c
;
425 enum pipe_format format
= fb
->nr_cbufs
? fb
->cbufs
[0]->format
: 0;
428 state
->state
= *color
; /* Save it, so that we can reuse it in set_fb_state */
431 /* The blend color is dependent on the colorbuffer format. */
434 case PIPE_FORMAT_R8_UNORM
:
435 case PIPE_FORMAT_L8_UNORM
:
436 case PIPE_FORMAT_I8_UNORM
:
437 c
.color
[1] = c
.color
[0];
440 case PIPE_FORMAT_A8_UNORM
:
441 c
.color
[1] = c
.color
[3];
444 case PIPE_FORMAT_R8G8_UNORM
:
445 c
.color
[2] = c
.color
[1];
448 case PIPE_FORMAT_L8A8_UNORM
:
449 c
.color
[2] = c
.color
[3];
456 if (r300
->screen
->caps
.is_r500
) {
457 BEGIN_CB(state
->cb
, 3);
458 OUT_CB_REG_SEQ(R500_RB3D_CONSTANT_COLOR_AR
, 2);
461 case PIPE_FORMAT_R16G16B16A16_FLOAT
:
462 OUT_CB(util_float_to_half(c
.color
[2]) |
463 (util_float_to_half(c
.color
[3]) << 16));
464 OUT_CB(util_float_to_half(c
.color
[0]) |
465 (util_float_to_half(c
.color
[1]) << 16));
469 OUT_CB(float_to_fixed10(c
.color
[0]) |
470 (float_to_fixed10(c
.color
[3]) << 16));
471 OUT_CB(float_to_fixed10(c
.color
[2]) |
472 (float_to_fixed10(c
.color
[1]) << 16));
478 util_pack_color(c
.color
, PIPE_FORMAT_B8G8R8A8_UNORM
, &uc
);
480 BEGIN_CB(state
->cb
, 2);
481 OUT_CB_REG(R300_RB3D_BLEND_COLOR
, uc
.ui
);
485 r300_mark_atom_dirty(r300
, &r300
->blend_color_state
);
488 static void r300_set_clip_state(struct pipe_context
* pipe
,
489 const struct pipe_clip_state
* state
)
491 struct r300_context
* r300
= r300_context(pipe
);
492 struct r300_clip_state
*clip
=
493 (struct r300_clip_state
*)r300
->clip_state
.state
;
496 if (r300
->screen
->caps
.has_tcl
) {
497 BEGIN_CB(clip
->cb
, r300
->clip_state
.size
);
498 OUT_CB_REG(R300_VAP_PVS_VECTOR_INDX_REG
,
499 (r300
->screen
->caps
.is_r500
?
500 R500_PVS_UCP_START
: R300_PVS_UCP_START
));
501 OUT_CB_ONE_REG(R300_VAP_PVS_UPLOAD_DATA
, 6 * 4);
502 OUT_CB_TABLE(state
->ucp
, 6 * 4);
505 r300_mark_atom_dirty(r300
, &r300
->clip_state
);
507 draw_set_clip_state(r300
->draw
, state
);
512 r300_set_sample_mask(struct pipe_context
*pipe
,
513 unsigned sample_mask
)
518 /* Create a new depth, stencil, and alpha state based on the CSO dsa state.
520 * This contains the depth buffer, stencil buffer, alpha test, and such.
521 * On the Radeon, depth and stencil buffer setup are intertwined, which is
522 * the reason for some of the strange-looking assignments across registers. */
524 r300_create_dsa_state(struct pipe_context
* pipe
,
525 const struct pipe_depth_stencil_alpha_state
* state
)
527 struct r300_capabilities
*caps
= &r300_screen(pipe
->screen
)->caps
;
528 struct r300_dsa_state
* dsa
= CALLOC_STRUCT(r300_dsa_state
);
533 /* Depth test setup. - separate write mask depth for decomp flush */
534 if (state
->depth
.writemask
) {
535 dsa
->z_buffer_control
|= R300_Z_WRITE_ENABLE
;
538 if (state
->depth
.enabled
) {
539 dsa
->z_buffer_control
|= R300_Z_ENABLE
;
541 dsa
->z_stencil_control
|=
542 (r300_translate_depth_stencil_function(state
->depth
.func
) <<
545 /* We must enable depth test, otherwise occlusion queries won't work. */
546 dsa
->z_buffer_control
|= R300_Z_ENABLE
;
547 dsa
->z_stencil_control
|= R300_ZS_ALWAYS
;
550 /* Stencil buffer setup. */
551 if (state
->stencil
[0].enabled
) {
552 dsa
->z_buffer_control
|= R300_STENCIL_ENABLE
;
553 dsa
->z_stencil_control
|=
554 (r300_translate_depth_stencil_function(state
->stencil
[0].func
) <<
555 R300_S_FRONT_FUNC_SHIFT
) |
556 (r300_translate_stencil_op(state
->stencil
[0].fail_op
) <<
557 R300_S_FRONT_SFAIL_OP_SHIFT
) |
558 (r300_translate_stencil_op(state
->stencil
[0].zpass_op
) <<
559 R300_S_FRONT_ZPASS_OP_SHIFT
) |
560 (r300_translate_stencil_op(state
->stencil
[0].zfail_op
) <<
561 R300_S_FRONT_ZFAIL_OP_SHIFT
);
563 dsa
->stencil_ref_mask
=
564 (state
->stencil
[0].valuemask
<< R300_STENCILMASK_SHIFT
) |
565 (state
->stencil
[0].writemask
<< R300_STENCILWRITEMASK_SHIFT
);
567 if (state
->stencil
[1].enabled
) {
568 dsa
->two_sided
= TRUE
;
570 dsa
->z_buffer_control
|= R300_STENCIL_FRONT_BACK
;
571 dsa
->z_stencil_control
|=
572 (r300_translate_depth_stencil_function(state
->stencil
[1].func
) <<
573 R300_S_BACK_FUNC_SHIFT
) |
574 (r300_translate_stencil_op(state
->stencil
[1].fail_op
) <<
575 R300_S_BACK_SFAIL_OP_SHIFT
) |
576 (r300_translate_stencil_op(state
->stencil
[1].zpass_op
) <<
577 R300_S_BACK_ZPASS_OP_SHIFT
) |
578 (r300_translate_stencil_op(state
->stencil
[1].zfail_op
) <<
579 R300_S_BACK_ZFAIL_OP_SHIFT
);
581 dsa
->stencil_ref_bf
=
582 (state
->stencil
[1].valuemask
<< R300_STENCILMASK_SHIFT
) |
583 (state
->stencil
[1].writemask
<< R300_STENCILWRITEMASK_SHIFT
);
586 dsa
->z_buffer_control
|= R500_STENCIL_REFMASK_FRONT_BACK
;
588 dsa
->two_sided_stencil_ref
=
589 (state
->stencil
[0].valuemask
!= state
->stencil
[1].valuemask
||
590 state
->stencil
[0].writemask
!= state
->stencil
[1].writemask
);
595 /* Alpha test setup. */
596 if (state
->alpha
.enabled
) {
597 dsa
->alpha_function
=
598 r300_translate_alpha_function(state
->alpha
.func
) |
599 R300_FG_ALPHA_FUNC_ENABLE
;
601 dsa
->alpha_function
|= float_to_ubyte(state
->alpha
.ref_value
);
602 dsa
->alpha_value
= util_float_to_half(state
->alpha
.ref_value
);
605 dsa
->alpha_function_fp16
= dsa
->alpha_function
|
606 R500_FG_ALPHA_FUNC_FP16_ENABLE
;
607 dsa
->alpha_function
|= R500_FG_ALPHA_FUNC_8BIT
;
611 BEGIN_CB(&dsa
->cb_begin
, 10);
612 OUT_CB_REG(R300_FG_ALPHA_FUNC
, dsa
->alpha_function
);
613 OUT_CB_REG_SEQ(R300_ZB_CNTL
, 3);
614 OUT_CB(dsa
->z_buffer_control
);
615 OUT_CB(dsa
->z_stencil_control
);
616 OUT_CB(dsa
->stencil_ref_mask
);
617 OUT_CB_REG(R500_ZB_STENCILREFMASK_BF
, dsa
->stencil_ref_bf
);
618 OUT_CB_REG(R500_FG_ALPHA_VALUE
, dsa
->alpha_value
);
621 BEGIN_CB(&dsa
->cb_begin_fp16
, 10);
622 OUT_CB_REG(R300_FG_ALPHA_FUNC
, dsa
->alpha_function_fp16
);
623 OUT_CB_REG_SEQ(R300_ZB_CNTL
, 3);
624 OUT_CB(dsa
->z_buffer_control
);
625 OUT_CB(dsa
->z_stencil_control
);
626 OUT_CB(dsa
->stencil_ref_mask
);
627 OUT_CB_REG(R500_ZB_STENCILREFMASK_BF
, dsa
->stencil_ref_bf
);
628 OUT_CB_REG(R500_FG_ALPHA_VALUE
, dsa
->alpha_value
);
631 /* We must enable depth test, otherwise occlusion queries won't work.
632 * We setup a dummy zbuffer to silent the CS checker, see emit_fb_state. */
633 BEGIN_CB(dsa
->cb_zb_no_readwrite
, 10);
634 OUT_CB_REG(R300_FG_ALPHA_FUNC
, dsa
->alpha_function
);
635 OUT_CB_REG_SEQ(R300_ZB_CNTL
, 3);
636 OUT_CB(R300_Z_ENABLE
);
637 OUT_CB(R300_ZS_ALWAYS
);
639 OUT_CB_REG(R500_ZB_STENCILREFMASK_BF
, 0);
640 OUT_CB_REG(R500_FG_ALPHA_VALUE
, dsa
->alpha_value
);
643 BEGIN_CB(dsa
->cb_fp16_zb_no_readwrite
, 10);
644 OUT_CB_REG(R300_FG_ALPHA_FUNC
, dsa
->alpha_function_fp16
);
645 OUT_CB_REG_SEQ(R300_ZB_CNTL
, 3);
646 OUT_CB(R300_Z_ENABLE
);
647 OUT_CB(R300_ZS_ALWAYS
);
649 OUT_CB_REG(R500_ZB_STENCILREFMASK_BF
, 0);
650 OUT_CB_REG(R500_FG_ALPHA_VALUE
, dsa
->alpha_value
);
656 static void r300_dsa_inject_stencilref(struct r300_context
*r300
)
658 struct r300_dsa_state
*dsa
=
659 (struct r300_dsa_state
*)r300
->dsa_state
.state
;
664 dsa
->stencil_ref_mask
=
665 (dsa
->stencil_ref_mask
& ~R300_STENCILREF_MASK
) |
666 r300
->stencil_ref
.ref_value
[0];
667 dsa
->stencil_ref_bf
=
668 (dsa
->stencil_ref_bf
& ~R300_STENCILREF_MASK
) |
669 r300
->stencil_ref
.ref_value
[1];
672 /* Bind DSA state. */
673 static void r300_bind_dsa_state(struct pipe_context
* pipe
,
676 struct r300_context
* r300
= r300_context(pipe
);
682 UPDATE_STATE(state
, r300
->dsa_state
);
684 r300_mark_atom_dirty(r300
, &r300
->hyperz_state
); /* Will be updated before the emission. */
685 r300_dsa_inject_stencilref(r300
);
688 /* Free DSA state. */
689 static void r300_delete_dsa_state(struct pipe_context
* pipe
,
695 static void r300_set_stencil_ref(struct pipe_context
* pipe
,
696 const struct pipe_stencil_ref
* sr
)
698 struct r300_context
* r300
= r300_context(pipe
);
700 r300
->stencil_ref
= *sr
;
702 r300_dsa_inject_stencilref(r300
);
703 r300_mark_atom_dirty(r300
, &r300
->dsa_state
);
706 static void r300_tex_set_tiling_flags(struct r300_context
*r300
,
707 struct r300_resource
*tex
,
710 /* Check if the macrotile flag needs to be changed.
711 * Skip changing the flags otherwise. */
712 if (tex
->tex
.macrotile
[tex
->surface_level
] !=
713 tex
->tex
.macrotile
[level
]) {
714 r300
->rws
->buffer_set_tiling(tex
->buf
, r300
->cs
,
715 tex
->tex
.microtile
, tex
->tex
.macrotile
[level
],
716 tex
->tex
.stride_in_bytes
[0]);
718 tex
->surface_level
= level
;
722 /* This switcheroo is needed just because of goddamned MACRO_SWITCH. */
723 static void r300_fb_set_tiling_flags(struct r300_context
*r300
,
724 const struct pipe_framebuffer_state
*state
)
728 /* Set tiling flags for new surfaces. */
729 for (i
= 0; i
< state
->nr_cbufs
; i
++) {
730 r300_tex_set_tiling_flags(r300
,
731 r300_resource(state
->cbufs
[i
]->texture
),
732 state
->cbufs
[i
]->u
.tex
.level
);
735 r300_tex_set_tiling_flags(r300
,
736 r300_resource(state
->zsbuf
->texture
),
737 state
->zsbuf
->u
.tex
.level
);
741 static void r300_print_fb_surf_info(struct pipe_surface
*surf
, unsigned index
,
744 struct pipe_resource
*tex
= surf
->texture
;
745 struct r300_resource
*rtex
= r300_resource(tex
);
748 "r300: %s[%i] Dim: %ix%i, Firstlayer: %i, "
749 "Lastlayer: %i, Level: %i, Format: %s\n"
751 "r300: TEX: Macro: %s, Micro: %s, "
752 "Dim: %ix%ix%i, LastLevel: %i, Format: %s\n",
754 binding
, index
, surf
->width
, surf
->height
,
755 surf
->u
.tex
.first_layer
, surf
->u
.tex
.last_layer
, surf
->u
.tex
.level
,
756 util_format_short_name(surf
->format
),
758 rtex
->tex
.macrotile
[0] ? "YES" : " NO",
759 rtex
->tex
.microtile
? "YES" : " NO",
760 tex
->width0
, tex
->height0
, tex
->depth0
,
761 tex
->last_level
, util_format_short_name(surf
->format
));
764 void r300_mark_fb_state_dirty(struct r300_context
*r300
,
765 enum r300_fb_state_change change
)
767 struct pipe_framebuffer_state
*state
= r300
->fb_state
.state
;
769 r300_mark_atom_dirty(r300
, &r300
->gpu_flush
);
770 r300_mark_atom_dirty(r300
, &r300
->fb_state
);
772 /* What is marked as dirty depends on the enum r300_fb_state_change. */
773 if (change
== R300_CHANGED_FB_STATE
) {
774 r300_mark_atom_dirty(r300
, &r300
->aa_state
);
775 r300_mark_atom_dirty(r300
, &r300
->dsa_state
); /* for AlphaRef */
776 r300_set_blend_color(&r300
->context
, r300
->blend_color_state
.state
);
779 if (change
== R300_CHANGED_FB_STATE
||
780 change
== R300_CHANGED_HYPERZ_FLAG
) {
781 r300_mark_atom_dirty(r300
, &r300
->hyperz_state
);
784 if (change
== R300_CHANGED_FB_STATE
||
785 change
== R300_CHANGED_MULTIWRITE
) {
786 r300_mark_atom_dirty(r300
, &r300
->fb_state_pipelined
);
789 /* Now compute the fb_state atom size. */
790 r300
->fb_state
.size
= 2 + (8 * state
->nr_cbufs
);
792 if (r300
->cbzb_clear
) {
793 r300
->fb_state
.size
+= 10;
794 } else if (state
->zsbuf
) {
795 r300
->fb_state
.size
+= 10;
796 if (r300
->hyperz_enabled
)
797 r300
->fb_state
.size
+= 8;
798 } else if (state
->nr_cbufs
) {
799 r300
->fb_state
.size
+= 10;
802 /* The size of the rest of atoms stays the same. */
806 r300_set_framebuffer_state(struct pipe_context
* pipe
,
807 const struct pipe_framebuffer_state
* state
)
809 struct r300_context
* r300
= r300_context(pipe
);
810 struct r300_aa_state
*aa
= (struct r300_aa_state
*)r300
->aa_state
.state
;
811 struct pipe_framebuffer_state
*old_state
= r300
->fb_state
.state
;
812 unsigned max_width
, max_height
, i
;
813 uint32_t zbuffer_bpp
= 0;
814 boolean unlock_zbuffer
= FALSE
;
816 if (r300
->screen
->caps
.is_r500
) {
817 max_width
= max_height
= 4096;
818 } else if (r300
->screen
->caps
.is_r400
) {
819 max_width
= max_height
= 4021;
821 max_width
= max_height
= 2560;
824 if (state
->width
> max_width
|| state
->height
> max_height
) {
825 fprintf(stderr
, "r300: Implementation error: Render targets are too "
826 "big in %s, refusing to bind framebuffer state!\n", __FUNCTION__
);
830 if (old_state
->zsbuf
&& r300
->zmask_in_use
&& !r300
->locked_zbuffer
) {
831 /* There is a zmask in use, what are we gonna do? */
833 if (!pipe_surface_equal(old_state
->zsbuf
, state
->zsbuf
)) {
834 /* Decompress the currently bound zbuffer before we bind another one. */
835 r300_decompress_zmask(r300
);
836 r300
->hiz_in_use
= FALSE
;
839 /* We don't bind another zbuffer, so lock the current one. */
840 pipe_surface_reference(&r300
->locked_zbuffer
, old_state
->zsbuf
);
842 } else if (r300
->locked_zbuffer
) {
843 /* We have a locked zbuffer now, what are we gonna do? */
845 if (!pipe_surface_equal(r300
->locked_zbuffer
, state
->zsbuf
)) {
846 /* We are binding some other zbuffer, so decompress the locked one,
847 * it gets unlocked automatically. */
848 r300_decompress_zmask_locked_unsafe(r300
);
849 r300
->hiz_in_use
= FALSE
;
851 /* We are binding the locked zbuffer again, so unlock it. */
852 unlock_zbuffer
= TRUE
;
856 assert(state
->zsbuf
|| (r300
->locked_zbuffer
&& !unlock_zbuffer
) || !r300
->zmask_in_use
);
858 /* Need to reset clamping or colormask. */
859 r300_mark_atom_dirty(r300
, &r300
->blend_state
);
861 /* If zsbuf is set from NULL to non-NULL or vice versa.. */
862 if (!!old_state
->zsbuf
!= !!state
->zsbuf
) {
863 r300_mark_atom_dirty(r300
, &r300
->dsa_state
);
866 if (r300
->screen
->info
.drm_minor
< 12) {
867 /* The tiling flags are dependent on the surface miplevel, unfortunately.
868 * This workarounds a bad design decision in old kernels which were
869 * rewriting tile fields in registers. */
870 r300_fb_set_tiling_flags(r300
, state
);
873 util_copy_framebuffer_state(r300
->fb_state
.state
, state
);
875 if (unlock_zbuffer
) {
876 pipe_surface_reference(&r300
->locked_zbuffer
, NULL
);
879 r300_mark_fb_state_dirty(r300
, R300_CHANGED_FB_STATE
);
882 switch (util_format_get_blocksize(state
->zsbuf
->format
)) {
891 /* Polygon offset depends on the zbuffer bit depth. */
892 if (r300
->zbuffer_bpp
!= zbuffer_bpp
) {
893 r300
->zbuffer_bpp
= zbuffer_bpp
;
895 if (r300
->polygon_offset_enabled
)
896 r300_mark_atom_dirty(r300
, &r300
->rs_state
);
900 /* Set up AA config. */
901 if (state
->nr_cbufs
&& state
->cbufs
[0]->texture
->nr_samples
> 1) {
902 aa
->aa_config
= R300_GB_AA_CONFIG_AA_ENABLE
;
904 switch (state
->cbufs
[0]->texture
->nr_samples
) {
906 aa
->aa_config
|= R300_GB_AA_CONFIG_NUM_AA_SUBSAMPLES_2
;
909 aa
->aa_config
|= R300_GB_AA_CONFIG_NUM_AA_SUBSAMPLES_3
;
912 aa
->aa_config
|= R300_GB_AA_CONFIG_NUM_AA_SUBSAMPLES_4
;
915 aa
->aa_config
|= R300_GB_AA_CONFIG_NUM_AA_SUBSAMPLES_6
;
922 if (DBG_ON(r300
, DBG_FB
)) {
923 fprintf(stderr
, "r300: set_framebuffer_state:\n");
924 for (i
= 0; i
< state
->nr_cbufs
; i
++) {
925 r300_print_fb_surf_info(state
->cbufs
[i
], i
, "CB");
928 r300_print_fb_surf_info(state
->zsbuf
, 0, "ZB");
933 /* Create fragment shader state. */
934 static void* r300_create_fs_state(struct pipe_context
* pipe
,
935 const struct pipe_shader_state
* shader
)
937 struct r300_fragment_shader
* fs
= NULL
;
939 fs
= (struct r300_fragment_shader
*)CALLOC_STRUCT(r300_fragment_shader
);
941 /* Copy state directly into shader. */
943 fs
->state
.tokens
= tgsi_dup_tokens(shader
->tokens
);
948 void r300_mark_fs_code_dirty(struct r300_context
*r300
)
950 struct r300_fragment_shader
* fs
= r300_fs(r300
);
952 r300_mark_atom_dirty(r300
, &r300
->fs
);
953 r300_mark_atom_dirty(r300
, &r300
->fs_rc_constant_state
);
954 r300_mark_atom_dirty(r300
, &r300
->fs_constants
);
955 r300
->fs
.size
= fs
->shader
->cb_code_size
;
957 if (r300
->screen
->caps
.is_r500
) {
958 r300
->fs_rc_constant_state
.size
= fs
->shader
->rc_state_count
* 7;
959 r300
->fs_constants
.size
= fs
->shader
->externals_count
* 4 + 3;
961 r300
->fs_rc_constant_state
.size
= fs
->shader
->rc_state_count
* 5;
962 r300
->fs_constants
.size
= fs
->shader
->externals_count
* 4 + 1;
965 ((struct r300_constant_buffer
*)r300
->fs_constants
.state
)->remap_table
=
966 fs
->shader
->code
.constants_remap_table
;
969 /* Bind fragment shader state. */
970 static void r300_bind_fs_state(struct pipe_context
* pipe
, void* shader
)
972 struct r300_context
* r300
= r300_context(pipe
);
973 struct r300_fragment_shader
* fs
= (struct r300_fragment_shader
*)shader
;
976 r300
->fs
.state
= NULL
;
981 r300
->fs_status
= FRAGMENT_SHADER_DIRTY
;
983 r300_mark_atom_dirty(r300
, &r300
->rs_block_state
); /* Will be updated before the emission. */
986 /* Delete fragment shader state. */
987 static void r300_delete_fs_state(struct pipe_context
* pipe
, void* shader
)
989 struct r300_fragment_shader
* fs
= (struct r300_fragment_shader
*)shader
;
990 struct r300_fragment_shader_code
*tmp
, *ptr
= fs
->first
;
995 rc_constants_destroy(&tmp
->code
.constants
);
999 FREE((void*)fs
->state
.tokens
);
1003 static void r300_set_polygon_stipple(struct pipe_context
* pipe
,
1004 const struct pipe_poly_stipple
* state
)
1006 /* XXX no idea how to set this up, but not terribly important */
1009 /* Create a new rasterizer state based on the CSO rasterizer state.
1011 * This is a very large chunk of state, and covers most of the graphics
1012 * backend (GB), geometry assembly (GA), and setup unit (SU) blocks.
1014 * In a not entirely unironic sidenote, this state has nearly nothing to do
1015 * with the actual block on the Radeon called the rasterizer (RS). */
1016 static void* r300_create_rs_state(struct pipe_context
* pipe
,
1017 const struct pipe_rasterizer_state
* state
)
1019 struct r300_rs_state
* rs
= CALLOC_STRUCT(r300_rs_state
);
1020 uint32_t vap_control_status
; /* R300_VAP_CNTL_STATUS: 0x2140 */
1021 uint32_t vap_clip_cntl
; /* R300_VAP_CLIP_CNTL: 0x221C */
1022 uint32_t point_size
; /* R300_GA_POINT_SIZE: 0x421c */
1023 uint32_t point_minmax
; /* R300_GA_POINT_MINMAX: 0x4230 */
1024 uint32_t line_control
; /* R300_GA_LINE_CNTL: 0x4234 */
1025 uint32_t polygon_offset_enable
; /* R300_SU_POLY_OFFSET_ENABLE: 0x42b4 */
1026 uint32_t cull_mode
; /* R300_SU_CULL_MODE: 0x42b8 */
1027 uint32_t line_stipple_config
; /* R300_GA_LINE_STIPPLE_CONFIG: 0x4328 */
1028 uint32_t line_stipple_value
; /* R300_GA_LINE_STIPPLE_VALUE: 0x4260 */
1029 uint32_t polygon_mode
; /* R300_GA_POLY_MODE: 0x4288 */
1030 uint32_t clip_rule
; /* R300_SC_CLIP_RULE: 0x43D0 */
1031 uint32_t round_mode
; /* R300_GA_ROUND_MODE: 0x428c */
1033 /* Point sprites texture coordinates, 0: lower left, 1: upper right */
1034 float point_texcoord_left
= 0; /* R300_GA_POINT_S0: 0x4200 */
1035 float point_texcoord_bottom
= 0;/* R300_GA_POINT_T0: 0x4204 */
1036 float point_texcoord_right
= 1; /* R300_GA_POINT_S1: 0x4208 */
1037 float point_texcoord_top
= 0; /* R300_GA_POINT_T1: 0x420c */
1038 boolean vclamp
= state
->clamp_vertex_color
||
1039 !r300_context(pipe
)->screen
->caps
.is_r500
;
1042 /* Copy rasterizer state. */
1044 rs
->rs_draw
= *state
;
1046 rs
->rs
.sprite_coord_enable
= state
->point_quad_rasterization
*
1047 state
->sprite_coord_enable
;
1049 /* Override some states for Draw. */
1050 rs
->rs_draw
.sprite_coord_enable
= 0; /* We can do this in HW. */
1052 #ifdef PIPE_ARCH_LITTLE_ENDIAN
1053 vap_control_status
= R300_VC_NO_SWAP
;
1055 vap_control_status
= R300_VC_32BIT_SWAP
;
1058 /* If no TCL engine is present, turn off the HW TCL. */
1059 if (!r300_screen(pipe
->screen
)->caps
.has_tcl
) {
1060 vap_control_status
|= R300_VAP_TCL_BYPASS
;
1063 /* Point size width and height. */
1065 pack_float_16_6x(state
->point_size
) |
1066 (pack_float_16_6x(state
->point_size
) << R300_POINTSIZE_X_SHIFT
);
1068 /* Point size clamping. */
1069 if (state
->point_size_per_vertex
) {
1070 /* Per-vertex point size.
1071 * Clamp to [0, max FB size] */
1072 float min_psiz
= util_get_min_point_size(state
);
1073 float max_psiz
= pipe
->screen
->get_paramf(pipe
->screen
,
1074 PIPE_CAPF_MAX_POINT_WIDTH
);
1076 (pack_float_16_6x(min_psiz
) << R300_GA_POINT_MINMAX_MIN_SHIFT
) |
1077 (pack_float_16_6x(max_psiz
) << R300_GA_POINT_MINMAX_MAX_SHIFT
);
1079 /* We cannot disable the point-size vertex output,
1081 float psiz
= state
->point_size
;
1083 (pack_float_16_6x(psiz
) << R300_GA_POINT_MINMAX_MIN_SHIFT
) |
1084 (pack_float_16_6x(psiz
) << R300_GA_POINT_MINMAX_MAX_SHIFT
);
1088 line_control
= pack_float_16_6x(state
->line_width
) |
1089 R300_GA_LINE_CNTL_END_TYPE_COMP
;
1091 /* Enable polygon mode */
1093 if (state
->fill_front
!= PIPE_POLYGON_MODE_FILL
||
1094 state
->fill_back
!= PIPE_POLYGON_MODE_FILL
) {
1095 polygon_mode
= R300_GA_POLY_MODE_DUAL
;
1099 if (state
->front_ccw
)
1100 cull_mode
= R300_FRONT_FACE_CCW
;
1102 cull_mode
= R300_FRONT_FACE_CW
;
1104 /* Polygon offset */
1105 polygon_offset_enable
= 0;
1106 if (util_get_offset(state
, state
->fill_front
)) {
1107 polygon_offset_enable
|= R300_FRONT_ENABLE
;
1109 if (util_get_offset(state
, state
->fill_back
)) {
1110 polygon_offset_enable
|= R300_BACK_ENABLE
;
1113 rs
->polygon_offset_enable
= polygon_offset_enable
!= 0;
1118 r300_translate_polygon_mode_front(state
->fill_front
);
1120 r300_translate_polygon_mode_back(state
->fill_back
);
1123 if (state
->cull_face
& PIPE_FACE_FRONT
) {
1124 cull_mode
|= R300_CULL_FRONT
;
1126 if (state
->cull_face
& PIPE_FACE_BACK
) {
1127 cull_mode
|= R300_CULL_BACK
;
1130 if (state
->line_stipple_enable
) {
1131 line_stipple_config
=
1132 R300_GA_LINE_STIPPLE_CONFIG_LINE_RESET_LINE
|
1133 (fui((float)state
->line_stipple_factor
) &
1134 R300_GA_LINE_STIPPLE_CONFIG_STIPPLE_SCALE_MASK
);
1135 /* XXX this might need to be scaled up */
1136 line_stipple_value
= state
->line_stipple_pattern
;
1138 line_stipple_config
= 0;
1139 line_stipple_value
= 0;
1142 if (state
->flatshade
) {
1143 rs
->color_control
= R300_SHADE_MODEL_FLAT
;
1145 rs
->color_control
= R300_SHADE_MODEL_SMOOTH
;
1148 clip_rule
= state
->scissor
? 0xAAAA : 0xFFFF;
1150 /* Point sprites coord mode */
1151 if (rs
->rs
.sprite_coord_enable
) {
1152 switch (state
->sprite_coord_mode
) {
1153 case PIPE_SPRITE_COORD_UPPER_LEFT
:
1154 point_texcoord_top
= 0.0f
;
1155 point_texcoord_bottom
= 1.0f
;
1157 case PIPE_SPRITE_COORD_LOWER_LEFT
:
1158 point_texcoord_top
= 1.0f
;
1159 point_texcoord_bottom
= 0.0f
;
1164 if (r300_screen(pipe
->screen
)->caps
.has_tcl
) {
1165 vap_clip_cntl
= (state
->clip_plane_enable
& 63) |
1166 R300_PS_UCP_MODE_CLIP_AS_TRIFAN
;
1168 vap_clip_cntl
= R300_CLIP_DISABLE
;
1171 /* Vertex color clamping. FP20 means no clamping. */
1173 R300_GA_ROUND_MODE_GEOMETRY_ROUND_NEAREST
|
1174 (!vclamp
? (R300_GA_ROUND_MODE_RGB_CLAMP_FP20
|
1175 R300_GA_ROUND_MODE_ALPHA_CLAMP_FP20
) : 0);
1177 /* Build the main command buffer. */
1178 BEGIN_CB(rs
->cb_main
, RS_STATE_MAIN_SIZE
);
1179 OUT_CB_REG(R300_VAP_CNTL_STATUS
, vap_control_status
);
1180 OUT_CB_REG(R300_VAP_CLIP_CNTL
, vap_clip_cntl
);
1181 OUT_CB_REG(R300_GA_POINT_SIZE
, point_size
);
1182 OUT_CB_REG_SEQ(R300_GA_POINT_MINMAX
, 2);
1183 OUT_CB(point_minmax
);
1184 OUT_CB(line_control
);
1185 OUT_CB_REG_SEQ(R300_SU_POLY_OFFSET_ENABLE
, 2);
1186 OUT_CB(polygon_offset_enable
);
1187 rs
->cull_mode_index
= 11;
1189 OUT_CB_REG(R300_GA_LINE_STIPPLE_CONFIG
, line_stipple_config
);
1190 OUT_CB_REG(R300_GA_LINE_STIPPLE_VALUE
, line_stipple_value
);
1191 OUT_CB_REG(R300_GA_POLY_MODE
, polygon_mode
);
1192 OUT_CB_REG(R300_GA_ROUND_MODE
, round_mode
);
1193 OUT_CB_REG(R300_SC_CLIP_RULE
, clip_rule
);
1194 OUT_CB_REG_SEQ(R300_GA_POINT_S0
, 4);
1195 OUT_CB_32F(point_texcoord_left
);
1196 OUT_CB_32F(point_texcoord_bottom
);
1197 OUT_CB_32F(point_texcoord_right
);
1198 OUT_CB_32F(point_texcoord_top
);
1201 /* Build the two command buffers for polygon offset setup. */
1202 if (polygon_offset_enable
) {
1203 float scale
= state
->offset_scale
* 12;
1204 float offset
= state
->offset_units
* 4;
1206 BEGIN_CB(rs
->cb_poly_offset_zb16
, 5);
1207 OUT_CB_REG_SEQ(R300_SU_POLY_OFFSET_FRONT_SCALE
, 4);
1214 offset
= state
->offset_units
* 2;
1216 BEGIN_CB(rs
->cb_poly_offset_zb24
, 5);
1217 OUT_CB_REG_SEQ(R300_SU_POLY_OFFSET_FRONT_SCALE
, 4);
1228 /* Bind rasterizer state. */
1229 static void r300_bind_rs_state(struct pipe_context
* pipe
, void* state
)
1231 struct r300_context
* r300
= r300_context(pipe
);
1232 struct r300_rs_state
* rs
= (struct r300_rs_state
*)state
;
1233 int last_sprite_coord_enable
= r300
->sprite_coord_enable
;
1234 boolean last_two_sided_color
= r300
->two_sided_color
;
1236 if (r300
->draw
&& rs
) {
1237 draw_set_rasterizer_state(r300
->draw
, &rs
->rs_draw
, state
);
1241 r300
->polygon_offset_enabled
= rs
->polygon_offset_enable
;
1242 r300
->sprite_coord_enable
= rs
->rs
.sprite_coord_enable
;
1243 r300
->two_sided_color
= rs
->rs
.light_twoside
;
1245 r300
->polygon_offset_enabled
= FALSE
;
1246 r300
->sprite_coord_enable
= 0;
1247 r300
->two_sided_color
= FALSE
;
1250 UPDATE_STATE(state
, r300
->rs_state
);
1251 r300
->rs_state
.size
= RS_STATE_MAIN_SIZE
+ (r300
->polygon_offset_enabled
? 5 : 0);
1253 if (last_sprite_coord_enable
!= r300
->sprite_coord_enable
||
1254 last_two_sided_color
!= r300
->two_sided_color
) {
1255 r300_mark_atom_dirty(r300
, &r300
->rs_block_state
);
1259 /* Free rasterizer state. */
1260 static void r300_delete_rs_state(struct pipe_context
* pipe
, void* state
)
1266 r300_create_sampler_state(struct pipe_context
* pipe
,
1267 const struct pipe_sampler_state
* state
)
1269 struct r300_context
* r300
= r300_context(pipe
);
1270 struct r300_sampler_state
* sampler
= CALLOC_STRUCT(r300_sampler_state
);
1271 boolean is_r500
= r300
->screen
->caps
.is_r500
;
1274 sampler
->state
= *state
;
1276 /* r300 doesn't handle CLAMP and MIRROR_CLAMP correctly when either MAG
1277 * or MIN filter is NEAREST. Since texwrap produces same results
1278 * for CLAMP and CLAMP_TO_EDGE, we use them instead. */
1279 if (sampler
->state
.min_img_filter
== PIPE_TEX_FILTER_NEAREST
||
1280 sampler
->state
.mag_img_filter
== PIPE_TEX_FILTER_NEAREST
) {
1282 if (sampler
->state
.wrap_s
== PIPE_TEX_WRAP_CLAMP
)
1283 sampler
->state
.wrap_s
= PIPE_TEX_WRAP_CLAMP_TO_EDGE
;
1284 else if (sampler
->state
.wrap_s
== PIPE_TEX_WRAP_MIRROR_CLAMP
)
1285 sampler
->state
.wrap_s
= PIPE_TEX_WRAP_MIRROR_CLAMP_TO_EDGE
;
1288 if (sampler
->state
.wrap_t
== PIPE_TEX_WRAP_CLAMP
)
1289 sampler
->state
.wrap_t
= PIPE_TEX_WRAP_CLAMP_TO_EDGE
;
1290 else if (sampler
->state
.wrap_t
== PIPE_TEX_WRAP_MIRROR_CLAMP
)
1291 sampler
->state
.wrap_t
= PIPE_TEX_WRAP_MIRROR_CLAMP_TO_EDGE
;
1294 if (sampler
->state
.wrap_r
== PIPE_TEX_WRAP_CLAMP
)
1295 sampler
->state
.wrap_r
= PIPE_TEX_WRAP_CLAMP_TO_EDGE
;
1296 else if (sampler
->state
.wrap_r
== PIPE_TEX_WRAP_MIRROR_CLAMP
)
1297 sampler
->state
.wrap_r
= PIPE_TEX_WRAP_MIRROR_CLAMP_TO_EDGE
;
1301 (r300_translate_wrap(sampler
->state
.wrap_s
) << R300_TX_WRAP_S_SHIFT
) |
1302 (r300_translate_wrap(sampler
->state
.wrap_t
) << R300_TX_WRAP_T_SHIFT
) |
1303 (r300_translate_wrap(sampler
->state
.wrap_r
) << R300_TX_WRAP_R_SHIFT
);
1305 sampler
->filter0
|= r300_translate_tex_filters(state
->min_img_filter
,
1306 state
->mag_img_filter
,
1307 state
->min_mip_filter
,
1308 state
->max_anisotropy
> 1);
1310 sampler
->filter0
|= r300_anisotropy(state
->max_anisotropy
);
1312 /* Unfortunately, r300-r500 don't support floating-point mipmap lods. */
1313 /* We must pass these to the merge function to clamp them properly. */
1314 sampler
->min_lod
= (unsigned)MAX2(state
->min_lod
, 0);
1315 sampler
->max_lod
= (unsigned)MAX2(ceilf(state
->max_lod
), 0);
1317 lod_bias
= CLAMP((int)(state
->lod_bias
* 32 + 1), -(1 << 9), (1 << 9) - 1);
1319 sampler
->filter1
|= (lod_bias
<< R300_LOD_BIAS_SHIFT
) & R300_LOD_BIAS_MASK
;
1321 /* This is very high quality anisotropic filtering for R5xx.
1322 * It's good for benchmarking the performance of texturing but
1323 * in practice we don't want to slow down the driver because it's
1324 * a pretty good performance killer. Feel free to play with it. */
1325 if (DBG_ON(r300
, DBG_ANISOHQ
) && is_r500
) {
1326 sampler
->filter1
|= r500_anisotropy(state
->max_anisotropy
);
1329 /* R500-specific fixups and optimizations */
1330 if (r300
->screen
->caps
.is_r500
) {
1331 sampler
->filter1
|= R500_BORDER_FIX
;
1334 return (void*)sampler
;
1337 static void r300_bind_sampler_states(struct pipe_context
* pipe
,
1341 struct r300_context
* r300
= r300_context(pipe
);
1342 struct r300_textures_state
* state
=
1343 (struct r300_textures_state
*)r300
->textures_state
.state
;
1344 unsigned tex_units
= r300
->screen
->caps
.num_tex_units
;
1346 if (count
> tex_units
) {
1350 memcpy(state
->sampler_states
, states
, sizeof(void*) * count
);
1351 state
->sampler_state_count
= count
;
1353 r300_mark_atom_dirty(r300
, &r300
->textures_state
);
1356 static void r300_lacks_vertex_textures(struct pipe_context
* pipe
,
1362 static void r300_delete_sampler_state(struct pipe_context
* pipe
, void* state
)
1367 static uint32_t r300_assign_texture_cache_region(unsigned index
, unsigned num
)
1369 /* This looks like a hack, but I believe it's suppose to work like
1370 * that. To illustrate how this works, let's assume you have 5 textures.
1371 * From docs, 5 and the successive numbers are:
1379 * First 3 textures will get 3/4 of size of the cache, divived evenly
1380 * between them. The last 1/4 of the cache must be divided between
1381 * the last 2 textures, each will therefore get 1/8 of the cache.
1382 * Why not just to use "5 + texture_index" ?
1384 * This simple trick works for all "num" <= 16.
1387 return R300_TX_CACHE(R300_TX_CACHE_WHOLE
);
1389 return R300_TX_CACHE(num
+ index
);
1392 static void r300_set_fragment_sampler_views(struct pipe_context
* pipe
,
1394 struct pipe_sampler_view
** views
)
1396 struct r300_context
* r300
= r300_context(pipe
);
1397 struct r300_textures_state
* state
=
1398 (struct r300_textures_state
*)r300
->textures_state
.state
;
1399 struct r300_resource
*texture
;
1400 unsigned i
, real_num_views
= 0, view_index
= 0;
1401 unsigned tex_units
= r300
->screen
->caps
.num_tex_units
;
1402 boolean dirty_tex
= FALSE
;
1404 if (count
> tex_units
) {
1408 /* Calculate the real number of views. */
1409 for (i
= 0; i
< count
; i
++) {
1414 for (i
= 0; i
< count
; i
++) {
1415 pipe_sampler_view_reference(
1416 (struct pipe_sampler_view
**)&state
->sampler_views
[i
],
1423 /* A new sampler view (= texture)... */
1426 /* Set the texrect factor in the fragment shader.
1427 * Needed for RECT and NPOT fallback. */
1428 texture
= r300_resource(views
[i
]->texture
);
1429 if (texture
->tex
.is_npot
) {
1430 r300_mark_atom_dirty(r300
, &r300
->fs_rc_constant_state
);
1433 state
->sampler_views
[i
]->texcache_region
=
1434 r300_assign_texture_cache_region(view_index
, real_num_views
);
1438 for (i
= count
; i
< tex_units
; i
++) {
1439 if (state
->sampler_views
[i
]) {
1440 pipe_sampler_view_reference(
1441 (struct pipe_sampler_view
**)&state
->sampler_views
[i
],
1446 state
->sampler_view_count
= count
;
1448 r300_mark_atom_dirty(r300
, &r300
->textures_state
);
1451 r300_mark_atom_dirty(r300
, &r300
->texture_cache_inval
);
1455 struct pipe_sampler_view
*
1456 r300_create_sampler_view_custom(struct pipe_context
*pipe
,
1457 struct pipe_resource
*texture
,
1458 const struct pipe_sampler_view
*templ
,
1459 unsigned width0_override
,
1460 unsigned height0_override
)
1462 struct r300_sampler_view
*view
= CALLOC_STRUCT(r300_sampler_view
);
1463 struct r300_resource
*tex
= r300_resource(texture
);
1464 boolean is_r500
= r300_screen(pipe
->screen
)->caps
.is_r500
;
1465 boolean dxtc_swizzle
= r300_screen(pipe
->screen
)->caps
.dxtc_swizzle
;
1470 view
->base
= *templ
;
1471 view
->base
.reference
.count
= 1;
1472 view
->base
.context
= pipe
;
1473 view
->base
.texture
= NULL
;
1474 pipe_resource_reference(&view
->base
.texture
, texture
);
1476 view
->width0_override
= width0_override
;
1477 view
->height0_override
= height0_override
;
1478 view
->swizzle
[0] = templ
->swizzle_r
;
1479 view
->swizzle
[1] = templ
->swizzle_g
;
1480 view
->swizzle
[2] = templ
->swizzle_b
;
1481 view
->swizzle
[3] = templ
->swizzle_a
;
1483 hwformat
= r300_translate_texformat(templ
->format
,
1488 if (hwformat
== ~0) {
1489 fprintf(stderr
, "r300: Ooops. Got unsupported format %s in %s.\n",
1490 util_format_short_name(templ
->format
), __func__
);
1492 assert(hwformat
!= ~0);
1494 r300_texture_setup_format_state(r300_screen(pipe
->screen
), tex
,
1496 width0_override
, height0_override
,
1498 view
->format
.format1
|= hwformat
;
1500 view
->format
.format2
|= r500_tx_format_msb_bit(templ
->format
);
1504 return (struct pipe_sampler_view
*)view
;
1507 static struct pipe_sampler_view
*
1508 r300_create_sampler_view(struct pipe_context
*pipe
,
1509 struct pipe_resource
*texture
,
1510 const struct pipe_sampler_view
*templ
)
1512 return r300_create_sampler_view_custom(pipe
, texture
, templ
,
1513 r300_resource(texture
)->tex
.width0
,
1514 r300_resource(texture
)->tex
.height0
);
1519 r300_sampler_view_destroy(struct pipe_context
*pipe
,
1520 struct pipe_sampler_view
*view
)
1522 pipe_resource_reference(&view
->texture
, NULL
);
1526 static void r300_set_scissor_state(struct pipe_context
* pipe
,
1527 const struct pipe_scissor_state
* state
)
1529 struct r300_context
* r300
= r300_context(pipe
);
1531 memcpy(r300
->scissor_state
.state
, state
,
1532 sizeof(struct pipe_scissor_state
));
1534 r300_mark_atom_dirty(r300
, &r300
->scissor_state
);
1537 static void r300_set_viewport_state(struct pipe_context
* pipe
,
1538 const struct pipe_viewport_state
* state
)
1540 struct r300_context
* r300
= r300_context(pipe
);
1541 struct r300_viewport_state
* viewport
=
1542 (struct r300_viewport_state
*)r300
->viewport_state
.state
;
1544 r300
->viewport
= *state
;
1547 draw_set_viewport_state(r300
->draw
, state
);
1548 viewport
->vte_control
= R300_VTX_XY_FMT
| R300_VTX_Z_FMT
;
1552 /* Do the transform in HW. */
1553 viewport
->vte_control
= R300_VTX_W0_FMT
;
1555 if (state
->scale
[0] != 1.0f
) {
1556 viewport
->xscale
= state
->scale
[0];
1557 viewport
->vte_control
|= R300_VPORT_X_SCALE_ENA
;
1559 if (state
->scale
[1] != 1.0f
) {
1560 viewport
->yscale
= state
->scale
[1];
1561 viewport
->vte_control
|= R300_VPORT_Y_SCALE_ENA
;
1563 if (state
->scale
[2] != 1.0f
) {
1564 viewport
->zscale
= state
->scale
[2];
1565 viewport
->vte_control
|= R300_VPORT_Z_SCALE_ENA
;
1567 if (state
->translate
[0] != 0.0f
) {
1568 viewport
->xoffset
= state
->translate
[0];
1569 viewport
->vte_control
|= R300_VPORT_X_OFFSET_ENA
;
1571 if (state
->translate
[1] != 0.0f
) {
1572 viewport
->yoffset
= state
->translate
[1];
1573 viewport
->vte_control
|= R300_VPORT_Y_OFFSET_ENA
;
1575 if (state
->translate
[2] != 0.0f
) {
1576 viewport
->zoffset
= state
->translate
[2];
1577 viewport
->vte_control
|= R300_VPORT_Z_OFFSET_ENA
;
1580 r300_mark_atom_dirty(r300
, &r300
->viewport_state
);
1581 if (r300
->fs
.state
&& r300_fs(r300
)->shader
&&
1582 r300_fs(r300
)->shader
->inputs
.wpos
!= ATTR_UNUSED
) {
1583 r300_mark_atom_dirty(r300
, &r300
->fs_rc_constant_state
);
1587 static void r300_set_vertex_buffers(struct pipe_context
* pipe
,
1589 const struct pipe_vertex_buffer
* buffers
)
1591 struct r300_context
* r300
= r300_context(pipe
);
1593 struct pipe_vertex_buffer dummy_vb
= {0};
1595 /* There must be at least one vertex buffer set, otherwise it locks up. */
1597 dummy_vb
.buffer
= r300
->dummy_vb
;
1598 buffers
= &dummy_vb
;
1602 u_vbuf_set_vertex_buffers(r300
->vbuf_mgr
, count
, buffers
);
1604 if (r300
->screen
->caps
.has_tcl
) {
1606 for (i
= 0; i
< count
; i
++) {
1607 if (buffers
[i
].buffer
&&
1608 !r300_resource(buffers
[i
].buffer
)->b
.user_ptr
) {
1611 r300
->vertex_arrays_dirty
= TRUE
;
1614 draw_set_vertex_buffers(r300
->draw
, count
, buffers
);
1618 static void r300_set_index_buffer(struct pipe_context
* pipe
,
1619 const struct pipe_index_buffer
*ib
)
1621 struct r300_context
* r300
= r300_context(pipe
);
1623 u_vbuf_set_index_buffer(r300
->vbuf_mgr
, ib
);
1625 if (!r300
->screen
->caps
.has_tcl
) {
1626 draw_set_index_buffer(r300
->draw
, ib
);
1630 /* Initialize the PSC tables. */
1631 static void r300_vertex_psc(struct r300_vertex_element_state
*velems
)
1633 struct r300_vertex_stream_state
*vstream
= &velems
->vertex_stream
;
1634 uint16_t type
, swizzle
;
1635 enum pipe_format format
;
1638 /* Vertex shaders have no semantics on their inputs,
1639 * so PSC should just route stuff based on the vertex elements,
1640 * and not on attrib information. */
1641 for (i
= 0; i
< velems
->count
; i
++) {
1642 format
= velems
->velem
[i
].src_format
;
1644 type
= r300_translate_vertex_data_type(format
);
1645 if (type
== R300_INVALID_FORMAT
) {
1646 fprintf(stderr
, "r300: Bad vertex format %s.\n",
1647 util_format_short_name(format
));
1652 type
|= i
<< R300_DST_VEC_LOC_SHIFT
;
1653 swizzle
= r300_translate_vertex_data_swizzle(format
);
1656 vstream
->vap_prog_stream_cntl
[i
>> 1] |= type
<< 16;
1657 vstream
->vap_prog_stream_cntl_ext
[i
>> 1] |= swizzle
<< 16;
1659 vstream
->vap_prog_stream_cntl
[i
>> 1] |= type
;
1660 vstream
->vap_prog_stream_cntl_ext
[i
>> 1] |= swizzle
;
1664 /* Set the last vector in the PSC. */
1668 vstream
->vap_prog_stream_cntl
[i
>> 1] |=
1669 (R300_LAST_VEC
<< (i
& 1 ? 16 : 0));
1671 vstream
->count
= (i
>> 1) + 1;
1674 static void* r300_create_vertex_elements_state(struct pipe_context
* pipe
,
1676 const struct pipe_vertex_element
* attribs
)
1678 struct r300_context
*r300
= r300_context(pipe
);
1679 struct r300_vertex_element_state
*velems
;
1681 struct pipe_vertex_element dummy_attrib
= {0};
1683 /* R300 Programmable Stream Control (PSC) doesn't support 0 vertex elements. */
1685 dummy_attrib
.src_format
= PIPE_FORMAT_R8G8B8A8_UNORM
;
1686 attribs
= &dummy_attrib
;
1688 } else if (count
> 16) {
1689 fprintf(stderr
, "r300: More than 16 vertex elements are not supported,"
1690 " requested %i, using 16.\n", count
);
1694 velems
= CALLOC_STRUCT(r300_vertex_element_state
);
1698 velems
->count
= count
;
1699 velems
->vmgr_elements
=
1700 u_vbuf_create_vertex_elements(r300
->vbuf_mgr
, count
, attribs
,
1703 if (r300_screen(pipe
->screen
)->caps
.has_tcl
) {
1705 * The unused components will be replaced by (..., 0, 1). */
1706 r300_vertex_psc(velems
);
1708 for (i
= 0; i
< count
; i
++) {
1709 velems
->format_size
[i
] =
1710 align(util_format_get_blocksize(velems
->velem
[i
].src_format
), 4);
1711 velems
->vertex_size_dwords
+= velems
->format_size
[i
] / 4;
1718 static void r300_bind_vertex_elements_state(struct pipe_context
*pipe
,
1721 struct r300_context
*r300
= r300_context(pipe
);
1722 struct r300_vertex_element_state
*velems
= state
;
1724 if (velems
== NULL
) {
1728 r300
->velems
= velems
;
1730 u_vbuf_bind_vertex_elements(r300
->vbuf_mgr
, state
, velems
->vmgr_elements
);
1733 draw_set_vertex_elements(r300
->draw
, velems
->count
, velems
->velem
);
1737 UPDATE_STATE(&velems
->vertex_stream
, r300
->vertex_stream_state
);
1738 r300
->vertex_stream_state
.size
= (1 + velems
->vertex_stream
.count
) * 2;
1739 r300
->vertex_arrays_dirty
= TRUE
;
1742 static void r300_delete_vertex_elements_state(struct pipe_context
*pipe
, void *state
)
1744 struct r300_context
*r300
= r300_context(pipe
);
1745 struct r300_vertex_element_state
*velems
= state
;
1747 u_vbuf_destroy_vertex_elements(r300
->vbuf_mgr
, velems
->vmgr_elements
);
1751 static void* r300_create_vs_state(struct pipe_context
* pipe
,
1752 const struct pipe_shader_state
* shader
)
1754 struct r300_context
* r300
= r300_context(pipe
);
1755 struct r300_vertex_shader
* vs
= CALLOC_STRUCT(r300_vertex_shader
);
1757 /* Copy state directly into shader. */
1758 vs
->state
= *shader
;
1759 vs
->state
.tokens
= tgsi_dup_tokens(shader
->tokens
);
1761 if (r300
->screen
->caps
.has_tcl
) {
1762 r300_init_vs_outputs(vs
);
1763 r300_translate_vertex_shader(r300
, vs
);
1765 r300_draw_init_vertex_shader(r300
->draw
, vs
);
1771 static void r300_bind_vs_state(struct pipe_context
* pipe
, void* shader
)
1773 struct r300_context
* r300
= r300_context(pipe
);
1774 struct r300_vertex_shader
* vs
= (struct r300_vertex_shader
*)shader
;
1777 r300
->vs_state
.state
= NULL
;
1780 if (vs
== r300
->vs_state
.state
) {
1783 r300
->vs_state
.state
= vs
;
1785 /* The majority of the RS block bits is dependent on the vertex shader. */
1786 r300_mark_atom_dirty(r300
, &r300
->rs_block_state
); /* Will be updated before the emission. */
1788 if (r300
->screen
->caps
.has_tcl
) {
1789 unsigned fc_op_dwords
= r300
->screen
->caps
.is_r500
? 3 : 2;
1790 r300_mark_atom_dirty(r300
, &r300
->vs_state
);
1791 r300
->vs_state
.size
=
1792 vs
->code
.length
+ 9 +
1793 (vs
->code
.num_fc_ops
? vs
->code
.num_fc_ops
* fc_op_dwords
+ 4 : 0);
1795 r300_mark_atom_dirty(r300
, &r300
->vs_constants
);
1796 r300
->vs_constants
.size
=
1798 (vs
->externals_count
? vs
->externals_count
* 4 + 3 : 0) +
1799 (vs
->immediates_count
? vs
->immediates_count
* 4 + 3 : 0);
1801 ((struct r300_constant_buffer
*)r300
->vs_constants
.state
)->remap_table
=
1802 vs
->code
.constants_remap_table
;
1804 r300_mark_atom_dirty(r300
, &r300
->pvs_flush
);
1806 draw_bind_vertex_shader(r300
->draw
,
1807 (struct draw_vertex_shader
*)vs
->draw_vs
);
1811 static void r300_delete_vs_state(struct pipe_context
* pipe
, void* shader
)
1813 struct r300_context
* r300
= r300_context(pipe
);
1814 struct r300_vertex_shader
* vs
= (struct r300_vertex_shader
*)shader
;
1816 if (r300
->screen
->caps
.has_tcl
) {
1817 rc_constants_destroy(&vs
->code
.constants
);
1818 if (vs
->code
.constants_remap_table
)
1819 FREE(vs
->code
.constants_remap_table
);
1821 draw_delete_vertex_shader(r300
->draw
,
1822 (struct draw_vertex_shader
*)vs
->draw_vs
);
1825 FREE((void*)vs
->state
.tokens
);
1829 static void r300_set_constant_buffer(struct pipe_context
*pipe
,
1830 uint shader
, uint index
,
1831 struct pipe_resource
*buf
)
1833 struct r300_context
* r300
= r300_context(pipe
);
1834 struct r300_constant_buffer
*cbuf
;
1835 struct r300_resource
*rbuf
= r300_resource(buf
);
1839 case PIPE_SHADER_VERTEX
:
1840 cbuf
= (struct r300_constant_buffer
*)r300
->vs_constants
.state
;
1842 case PIPE_SHADER_FRAGMENT
:
1843 cbuf
= (struct r300_constant_buffer
*)r300
->fs_constants
.state
;
1849 if (buf
== NULL
|| buf
->width0
== 0)
1852 if (rbuf
->b
.user_ptr
)
1853 mapped
= (uint32_t*)rbuf
->b
.user_ptr
;
1854 else if (rbuf
->constant_buffer
)
1855 mapped
= (uint32_t*)rbuf
->constant_buffer
;
1859 if (shader
== PIPE_SHADER_FRAGMENT
||
1860 (shader
== PIPE_SHADER_VERTEX
&& r300
->screen
->caps
.has_tcl
)) {
1864 if (shader
== PIPE_SHADER_VERTEX
) {
1865 if (r300
->screen
->caps
.has_tcl
) {
1866 struct r300_vertex_shader
*vs
=
1867 (struct r300_vertex_shader
*)r300
->vs_state
.state
;
1870 cbuf
->buffer_base
= 0;
1874 cbuf
->buffer_base
= r300
->vs_const_base
;
1875 r300
->vs_const_base
+= vs
->code
.constants
.Count
;
1876 if (r300
->vs_const_base
> R500_MAX_PVS_CONST_VECS
) {
1877 r300
->vs_const_base
= vs
->code
.constants
.Count
;
1878 cbuf
->buffer_base
= 0;
1879 r300_mark_atom_dirty(r300
, &r300
->pvs_flush
);
1881 r300_mark_atom_dirty(r300
, &r300
->vs_constants
);
1882 } else if (r300
->draw
) {
1883 draw_set_mapped_constant_buffer(r300
->draw
, PIPE_SHADER_VERTEX
,
1884 0, mapped
, buf
->width0
);
1886 } else if (shader
== PIPE_SHADER_FRAGMENT
) {
1887 r300_mark_atom_dirty(r300
, &r300
->fs_constants
);
1891 static void r300_texture_barrier(struct pipe_context
*pipe
)
1893 struct r300_context
*r300
= r300_context(pipe
);
1895 r300_mark_atom_dirty(r300
, &r300
->gpu_flush
);
1896 r300_mark_atom_dirty(r300
, &r300
->texture_cache_inval
);
1899 void r300_init_state_functions(struct r300_context
* r300
)
1901 r300
->context
.create_blend_state
= r300_create_blend_state
;
1902 r300
->context
.bind_blend_state
= r300_bind_blend_state
;
1903 r300
->context
.delete_blend_state
= r300_delete_blend_state
;
1905 r300
->context
.set_blend_color
= r300_set_blend_color
;
1907 r300
->context
.set_clip_state
= r300_set_clip_state
;
1908 r300
->context
.set_sample_mask
= r300_set_sample_mask
;
1910 r300
->context
.set_constant_buffer
= r300_set_constant_buffer
;
1912 r300
->context
.create_depth_stencil_alpha_state
= r300_create_dsa_state
;
1913 r300
->context
.bind_depth_stencil_alpha_state
= r300_bind_dsa_state
;
1914 r300
->context
.delete_depth_stencil_alpha_state
= r300_delete_dsa_state
;
1916 r300
->context
.set_stencil_ref
= r300_set_stencil_ref
;
1918 r300
->context
.set_framebuffer_state
= r300_set_framebuffer_state
;
1920 r300
->context
.create_fs_state
= r300_create_fs_state
;
1921 r300
->context
.bind_fs_state
= r300_bind_fs_state
;
1922 r300
->context
.delete_fs_state
= r300_delete_fs_state
;
1924 r300
->context
.set_polygon_stipple
= r300_set_polygon_stipple
;
1926 r300
->context
.create_rasterizer_state
= r300_create_rs_state
;
1927 r300
->context
.bind_rasterizer_state
= r300_bind_rs_state
;
1928 r300
->context
.delete_rasterizer_state
= r300_delete_rs_state
;
1930 r300
->context
.create_sampler_state
= r300_create_sampler_state
;
1931 r300
->context
.bind_fragment_sampler_states
= r300_bind_sampler_states
;
1932 r300
->context
.bind_vertex_sampler_states
= r300_lacks_vertex_textures
;
1933 r300
->context
.delete_sampler_state
= r300_delete_sampler_state
;
1935 r300
->context
.set_fragment_sampler_views
= r300_set_fragment_sampler_views
;
1936 r300
->context
.create_sampler_view
= r300_create_sampler_view
;
1937 r300
->context
.sampler_view_destroy
= r300_sampler_view_destroy
;
1939 r300
->context
.set_scissor_state
= r300_set_scissor_state
;
1941 r300
->context
.set_viewport_state
= r300_set_viewport_state
;
1943 r300
->context
.set_vertex_buffers
= r300_set_vertex_buffers
;
1944 r300
->context
.set_index_buffer
= r300_set_index_buffer
;
1945 r300
->context
.redefine_user_buffer
= u_default_redefine_user_buffer
;
1947 r300
->context
.create_vertex_elements_state
= r300_create_vertex_elements_state
;
1948 r300
->context
.bind_vertex_elements_state
= r300_bind_vertex_elements_state
;
1949 r300
->context
.delete_vertex_elements_state
= r300_delete_vertex_elements_state
;
1951 r300
->context
.create_vs_state
= r300_create_vs_state
;
1952 r300
->context
.bind_vs_state
= r300_bind_vs_state
;
1953 r300
->context
.delete_vs_state
= r300_delete_vs_state
;
1955 r300
->context
.texture_barrier
= r300_texture_barrier
;