Merge branch '7.8'
[mesa.git] / src / gallium / drivers / r300 / r300_state.c
1 /*
2 * Copyright 2008 Corbin Simpson <MostAwesomeDude@gmail.com>
3 * Copyright 2009 Marek Olšák <maraeo@gmail.com>
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * on the rights to use, copy, modify, merge, publish, distribute, sub
9 * license, and/or sell copies of the Software, and to permit persons to whom
10 * the Software is furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
14 * Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
20 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
21 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
22 * USE OR OTHER DEALINGS IN THE SOFTWARE. */
23
24 #include "draw/draw_context.h"
25
26 #include "util/u_math.h"
27 #include "util/u_memory.h"
28 #include "util/u_pack_color.h"
29
30 #include "tgsi/tgsi_parse.h"
31
32 #include "pipe/p_config.h"
33
34 #include "r300_context.h"
35 #include "r300_emit.h"
36 #include "r300_reg.h"
37 #include "r300_screen.h"
38 #include "r300_screen_buffer.h"
39 #include "r300_state.h"
40 #include "r300_state_inlines.h"
41 #include "r300_fs.h"
42 #include "r300_texture.h"
43 #include "r300_vs.h"
44 #include "r300_winsys.h"
45
46 /* r300_state: Functions used to intialize state context by translating
47 * Gallium state objects into semi-native r300 state objects. */
48
49 #define UPDATE_STATE(cso, atom) \
50 if (cso != atom.state) { \
51 atom.state = cso; \
52 atom.dirty = TRUE; \
53 }
54
55 static boolean blend_discard_if_src_alpha_0(unsigned srcRGB, unsigned srcA,
56 unsigned dstRGB, unsigned dstA)
57 {
58 /* If the blend equation is ADD or REVERSE_SUBTRACT,
59 * SRC_ALPHA == 0, and the following state is set, the colorbuffer
60 * will not be changed.
61 * Notice that the dst factors are the src factors inverted. */
62 return (srcRGB == PIPE_BLENDFACTOR_SRC_ALPHA ||
63 srcRGB == PIPE_BLENDFACTOR_SRC_ALPHA_SATURATE ||
64 srcRGB == PIPE_BLENDFACTOR_ZERO) &&
65 (srcA == PIPE_BLENDFACTOR_SRC_COLOR ||
66 srcA == PIPE_BLENDFACTOR_SRC_ALPHA ||
67 srcA == PIPE_BLENDFACTOR_SRC_ALPHA_SATURATE ||
68 srcA == PIPE_BLENDFACTOR_ZERO) &&
69 (dstRGB == PIPE_BLENDFACTOR_INV_SRC_ALPHA ||
70 dstRGB == PIPE_BLENDFACTOR_ONE) &&
71 (dstA == PIPE_BLENDFACTOR_INV_SRC_COLOR ||
72 dstA == PIPE_BLENDFACTOR_INV_SRC_ALPHA ||
73 dstA == PIPE_BLENDFACTOR_ONE);
74 }
75
76 static boolean blend_discard_if_src_alpha_1(unsigned srcRGB, unsigned srcA,
77 unsigned dstRGB, unsigned dstA)
78 {
79 /* If the blend equation is ADD or REVERSE_SUBTRACT,
80 * SRC_ALPHA == 1, and the following state is set, the colorbuffer
81 * will not be changed.
82 * Notice that the dst factors are the src factors inverted. */
83 return (srcRGB == PIPE_BLENDFACTOR_INV_SRC_ALPHA ||
84 srcRGB == PIPE_BLENDFACTOR_ZERO) &&
85 (srcA == PIPE_BLENDFACTOR_INV_SRC_COLOR ||
86 srcA == PIPE_BLENDFACTOR_INV_SRC_ALPHA ||
87 srcA == PIPE_BLENDFACTOR_ZERO) &&
88 (dstRGB == PIPE_BLENDFACTOR_SRC_ALPHA ||
89 dstRGB == PIPE_BLENDFACTOR_ONE) &&
90 (dstA == PIPE_BLENDFACTOR_SRC_COLOR ||
91 dstA == PIPE_BLENDFACTOR_SRC_ALPHA ||
92 dstA == PIPE_BLENDFACTOR_ONE);
93 }
94
95 static boolean blend_discard_if_src_color_0(unsigned srcRGB, unsigned srcA,
96 unsigned dstRGB, unsigned dstA)
97 {
98 /* If the blend equation is ADD or REVERSE_SUBTRACT,
99 * SRC_COLOR == (0,0,0), and the following state is set, the colorbuffer
100 * will not be changed.
101 * Notice that the dst factors are the src factors inverted. */
102 return (srcRGB == PIPE_BLENDFACTOR_SRC_COLOR ||
103 srcRGB == PIPE_BLENDFACTOR_ZERO) &&
104 (srcA == PIPE_BLENDFACTOR_ZERO) &&
105 (dstRGB == PIPE_BLENDFACTOR_INV_SRC_COLOR ||
106 dstRGB == PIPE_BLENDFACTOR_ONE) &&
107 (dstA == PIPE_BLENDFACTOR_ONE);
108 }
109
110 static boolean blend_discard_if_src_color_1(unsigned srcRGB, unsigned srcA,
111 unsigned dstRGB, unsigned dstA)
112 {
113 /* If the blend equation is ADD or REVERSE_SUBTRACT,
114 * SRC_COLOR == (1,1,1), and the following state is set, the colorbuffer
115 * will not be changed.
116 * Notice that the dst factors are the src factors inverted. */
117 return (srcRGB == PIPE_BLENDFACTOR_INV_SRC_COLOR ||
118 srcRGB == PIPE_BLENDFACTOR_ZERO) &&
119 (srcA == PIPE_BLENDFACTOR_ZERO) &&
120 (dstRGB == PIPE_BLENDFACTOR_SRC_COLOR ||
121 dstRGB == PIPE_BLENDFACTOR_ONE) &&
122 (dstA == PIPE_BLENDFACTOR_ONE);
123 }
124
125 static boolean blend_discard_if_src_alpha_color_0(unsigned srcRGB, unsigned srcA,
126 unsigned dstRGB, unsigned dstA)
127 {
128 /* If the blend equation is ADD or REVERSE_SUBTRACT,
129 * SRC_ALPHA_COLOR == (0,0,0,0), and the following state is set,
130 * the colorbuffer will not be changed.
131 * Notice that the dst factors are the src factors inverted. */
132 return (srcRGB == PIPE_BLENDFACTOR_SRC_COLOR ||
133 srcRGB == PIPE_BLENDFACTOR_SRC_ALPHA ||
134 srcRGB == PIPE_BLENDFACTOR_SRC_ALPHA_SATURATE ||
135 srcRGB == PIPE_BLENDFACTOR_ZERO) &&
136 (srcA == PIPE_BLENDFACTOR_SRC_COLOR ||
137 srcA == PIPE_BLENDFACTOR_SRC_ALPHA ||
138 srcA == PIPE_BLENDFACTOR_SRC_ALPHA_SATURATE ||
139 srcA == PIPE_BLENDFACTOR_ZERO) &&
140 (dstRGB == PIPE_BLENDFACTOR_INV_SRC_COLOR ||
141 dstRGB == PIPE_BLENDFACTOR_INV_SRC_ALPHA ||
142 dstRGB == PIPE_BLENDFACTOR_ONE) &&
143 (dstA == PIPE_BLENDFACTOR_INV_SRC_COLOR ||
144 dstA == PIPE_BLENDFACTOR_INV_SRC_ALPHA ||
145 dstA == PIPE_BLENDFACTOR_ONE);
146 }
147
148 static boolean blend_discard_if_src_alpha_color_1(unsigned srcRGB, unsigned srcA,
149 unsigned dstRGB, unsigned dstA)
150 {
151 /* If the blend equation is ADD or REVERSE_SUBTRACT,
152 * SRC_ALPHA_COLOR == (1,1,1,1), and the following state is set,
153 * the colorbuffer will not be changed.
154 * Notice that the dst factors are the src factors inverted. */
155 return (srcRGB == PIPE_BLENDFACTOR_INV_SRC_COLOR ||
156 srcRGB == PIPE_BLENDFACTOR_INV_SRC_ALPHA ||
157 srcRGB == PIPE_BLENDFACTOR_ZERO) &&
158 (srcA == PIPE_BLENDFACTOR_INV_SRC_COLOR ||
159 srcA == PIPE_BLENDFACTOR_INV_SRC_ALPHA ||
160 srcA == PIPE_BLENDFACTOR_ZERO) &&
161 (dstRGB == PIPE_BLENDFACTOR_SRC_COLOR ||
162 dstRGB == PIPE_BLENDFACTOR_SRC_ALPHA ||
163 dstRGB == PIPE_BLENDFACTOR_ONE) &&
164 (dstA == PIPE_BLENDFACTOR_SRC_COLOR ||
165 dstA == PIPE_BLENDFACTOR_SRC_ALPHA ||
166 dstA == PIPE_BLENDFACTOR_ONE);
167 }
168
169 static unsigned bgra_cmask(unsigned mask)
170 {
171 /* Gallium uses RGBA color ordering while R300 expects BGRA. */
172
173 return ((mask & PIPE_MASK_R) << 2) |
174 ((mask & PIPE_MASK_B) >> 2) |
175 (mask & (PIPE_MASK_G | PIPE_MASK_A));
176 }
177
178 /* Create a new blend state based on the CSO blend state.
179 *
180 * This encompasses alpha blending, logic/raster ops, and blend dithering. */
181 static void* r300_create_blend_state(struct pipe_context* pipe,
182 const struct pipe_blend_state* state)
183 {
184 struct r300_screen* r300screen = r300_screen(pipe->screen);
185 struct r300_blend_state* blend = CALLOC_STRUCT(r300_blend_state);
186
187 if (state->rt[0].blend_enable)
188 {
189 unsigned eqRGB = state->rt[0].rgb_func;
190 unsigned srcRGB = state->rt[0].rgb_src_factor;
191 unsigned dstRGB = state->rt[0].rgb_dst_factor;
192
193 unsigned eqA = state->rt[0].alpha_func;
194 unsigned srcA = state->rt[0].alpha_src_factor;
195 unsigned dstA = state->rt[0].alpha_dst_factor;
196
197 /* despite the name, ALPHA_BLEND_ENABLE has nothing to do with alpha,
198 * this is just the crappy D3D naming */
199 blend->blend_control = R300_ALPHA_BLEND_ENABLE |
200 r300_translate_blend_function(eqRGB) |
201 ( r300_translate_blend_factor(srcRGB) << R300_SRC_BLEND_SHIFT) |
202 ( r300_translate_blend_factor(dstRGB) << R300_DST_BLEND_SHIFT);
203
204 /* Optimization: some operations do not require the destination color.
205 *
206 * When SRC_ALPHA_SATURATE is used, colorbuffer reads must be enabled,
207 * otherwise blending gives incorrect results. It seems to be
208 * a hardware bug. */
209 if (eqRGB == PIPE_BLEND_MIN || eqA == PIPE_BLEND_MIN ||
210 eqRGB == PIPE_BLEND_MAX || eqA == PIPE_BLEND_MAX ||
211 dstRGB != PIPE_BLENDFACTOR_ZERO ||
212 dstA != PIPE_BLENDFACTOR_ZERO ||
213 srcRGB == PIPE_BLENDFACTOR_DST_COLOR ||
214 srcRGB == PIPE_BLENDFACTOR_DST_ALPHA ||
215 srcRGB == PIPE_BLENDFACTOR_INV_DST_COLOR ||
216 srcRGB == PIPE_BLENDFACTOR_INV_DST_ALPHA ||
217 srcA == PIPE_BLENDFACTOR_DST_COLOR ||
218 srcA == PIPE_BLENDFACTOR_DST_ALPHA ||
219 srcA == PIPE_BLENDFACTOR_INV_DST_COLOR ||
220 srcA == PIPE_BLENDFACTOR_INV_DST_ALPHA ||
221 srcRGB == PIPE_BLENDFACTOR_SRC_ALPHA_SATURATE) {
222 /* Enable reading from the colorbuffer. */
223 blend->blend_control |= R300_READ_ENABLE;
224
225 if (r300screen->caps.is_r500) {
226 /* Optimization: Depending on incoming pixels, we can
227 * conditionally disable the reading in hardware... */
228 if (eqRGB != PIPE_BLEND_MIN && eqA != PIPE_BLEND_MIN &&
229 eqRGB != PIPE_BLEND_MAX && eqA != PIPE_BLEND_MAX) {
230 /* Disable reading if SRC_ALPHA == 0. */
231 if ((dstRGB == PIPE_BLENDFACTOR_SRC_ALPHA ||
232 dstRGB == PIPE_BLENDFACTOR_ZERO) &&
233 (dstA == PIPE_BLENDFACTOR_SRC_COLOR ||
234 dstA == PIPE_BLENDFACTOR_SRC_ALPHA ||
235 dstA == PIPE_BLENDFACTOR_ZERO)) {
236 blend->blend_control |= R500_SRC_ALPHA_0_NO_READ;
237 }
238
239 /* Disable reading if SRC_ALPHA == 1. */
240 if ((dstRGB == PIPE_BLENDFACTOR_INV_SRC_ALPHA ||
241 dstRGB == PIPE_BLENDFACTOR_ZERO) &&
242 (dstA == PIPE_BLENDFACTOR_INV_SRC_COLOR ||
243 dstA == PIPE_BLENDFACTOR_INV_SRC_ALPHA ||
244 dstA == PIPE_BLENDFACTOR_ZERO)) {
245 blend->blend_control |= R500_SRC_ALPHA_1_NO_READ;
246 }
247 }
248 }
249 }
250
251 /* Optimization: discard pixels which don't change the colorbuffer.
252 *
253 * The code below is non-trivial and some math is involved.
254 *
255 * Discarding pixels must be disabled when FP16 AA is enabled.
256 * This is a hardware bug. Also, this implementation wouldn't work
257 * with FP blending enabled and equation clamping disabled.
258 *
259 * Equations other than ADD are rarely used and therefore won't be
260 * optimized. */
261 if ((eqRGB == PIPE_BLEND_ADD || eqRGB == PIPE_BLEND_REVERSE_SUBTRACT) &&
262 (eqA == PIPE_BLEND_ADD || eqA == PIPE_BLEND_REVERSE_SUBTRACT)) {
263 /* ADD: X+Y
264 * REVERSE_SUBTRACT: Y-X
265 *
266 * The idea is:
267 * If X = src*srcFactor = 0 and Y = dst*dstFactor = 1,
268 * then CB will not be changed.
269 *
270 * Given the srcFactor and dstFactor variables, we can derive
271 * what src and dst should be equal to and discard appropriate
272 * pixels.
273 */
274 if (blend_discard_if_src_alpha_0(srcRGB, srcA, dstRGB, dstA)) {
275 blend->blend_control |= R300_DISCARD_SRC_PIXELS_SRC_ALPHA_0;
276 } else if (blend_discard_if_src_alpha_1(srcRGB, srcA,
277 dstRGB, dstA)) {
278 blend->blend_control |= R300_DISCARD_SRC_PIXELS_SRC_ALPHA_1;
279 } else if (blend_discard_if_src_color_0(srcRGB, srcA,
280 dstRGB, dstA)) {
281 blend->blend_control |= R300_DISCARD_SRC_PIXELS_SRC_COLOR_0;
282 } else if (blend_discard_if_src_color_1(srcRGB, srcA,
283 dstRGB, dstA)) {
284 blend->blend_control |= R300_DISCARD_SRC_PIXELS_SRC_COLOR_1;
285 } else if (blend_discard_if_src_alpha_color_0(srcRGB, srcA,
286 dstRGB, dstA)) {
287 blend->blend_control |=
288 R300_DISCARD_SRC_PIXELS_SRC_ALPHA_COLOR_0;
289 } else if (blend_discard_if_src_alpha_color_1(srcRGB, srcA,
290 dstRGB, dstA)) {
291 blend->blend_control |=
292 R300_DISCARD_SRC_PIXELS_SRC_ALPHA_COLOR_1;
293 }
294 }
295
296 /* separate alpha */
297 if (srcA != srcRGB || dstA != dstRGB || eqA != eqRGB) {
298 blend->blend_control |= R300_SEPARATE_ALPHA_ENABLE;
299 blend->alpha_blend_control =
300 r300_translate_blend_function(eqA) |
301 (r300_translate_blend_factor(srcA) << R300_SRC_BLEND_SHIFT) |
302 (r300_translate_blend_factor(dstA) << R300_DST_BLEND_SHIFT);
303 }
304 }
305
306 /* PIPE_LOGICOP_* don't need to be translated, fortunately. */
307 if (state->logicop_enable) {
308 blend->rop = R300_RB3D_ROPCNTL_ROP_ENABLE |
309 (state->logicop_func) << R300_RB3D_ROPCNTL_ROP_SHIFT;
310 }
311
312 /* Color channel masks for all MRTs. */
313 blend->color_channel_mask = bgra_cmask(state->rt[0].colormask);
314 if (r300screen->caps.is_r500 && state->independent_blend_enable) {
315 if (state->rt[1].blend_enable) {
316 blend->color_channel_mask |= bgra_cmask(state->rt[1].colormask) << 4;
317 }
318 if (state->rt[2].blend_enable) {
319 blend->color_channel_mask |= bgra_cmask(state->rt[2].colormask) << 8;
320 }
321 if (state->rt[3].blend_enable) {
322 blend->color_channel_mask |= bgra_cmask(state->rt[3].colormask) << 12;
323 }
324 }
325
326 /* Neither fglrx nor classic r300 ever set this, regardless of dithering
327 * state. Since it's an optional implementation detail, we can leave it
328 * out and never dither.
329 *
330 * This could be revisited if we ever get quality or conformance hints.
331 *
332 if (state->dither) {
333 blend->dither = R300_RB3D_DITHER_CTL_DITHER_MODE_LUT |
334 R300_RB3D_DITHER_CTL_ALPHA_DITHER_MODE_LUT;
335 }
336 */
337
338 return (void*)blend;
339 }
340
341 /* Bind blend state. */
342 static void r300_bind_blend_state(struct pipe_context* pipe,
343 void* state)
344 {
345 struct r300_context* r300 = r300_context(pipe);
346
347 UPDATE_STATE(state, r300->blend_state);
348 }
349
350 /* Free blend state. */
351 static void r300_delete_blend_state(struct pipe_context* pipe,
352 void* state)
353 {
354 FREE(state);
355 }
356
357 /* Convert float to 10bit integer */
358 static unsigned float_to_fixed10(float f)
359 {
360 return CLAMP((unsigned)(f * 1023.9f), 0, 1023);
361 }
362
363 /* Set blend color.
364 * Setup both R300 and R500 registers, figure out later which one to write. */
365 static void r300_set_blend_color(struct pipe_context* pipe,
366 const struct pipe_blend_color* color)
367 {
368 struct r300_context* r300 = r300_context(pipe);
369 struct r300_blend_color_state* state =
370 (struct r300_blend_color_state*)r300->blend_color_state.state;
371 union util_color uc;
372
373 util_pack_color(color->color, PIPE_FORMAT_B8G8R8A8_UNORM, &uc);
374 state->blend_color = uc.ui;
375
376 /* XXX if FP16 blending is enabled, we should use the FP16 format */
377 state->blend_color_red_alpha =
378 float_to_fixed10(color->color[0]) |
379 (float_to_fixed10(color->color[3]) << 16);
380 state->blend_color_green_blue =
381 float_to_fixed10(color->color[2]) |
382 (float_to_fixed10(color->color[1]) << 16);
383
384 r300->blend_color_state.size = r300->screen->caps.is_r500 ? 3 : 2;
385 r300->blend_color_state.dirty = TRUE;
386 }
387
388 static void r300_set_clip_state(struct pipe_context* pipe,
389 const struct pipe_clip_state* state)
390 {
391 struct r300_context* r300 = r300_context(pipe);
392
393 r300->clip = *state;
394
395 if (r300->screen->caps.has_tcl) {
396 memcpy(r300->clip_state.state, state, sizeof(struct pipe_clip_state));
397 r300->clip_state.size = 29;
398 } else {
399 draw_flush(r300->draw);
400 draw_set_clip_state(r300->draw, state);
401 r300->clip_state.size = 2;
402 }
403
404 r300->clip_state.dirty = TRUE;
405 }
406
407 /* Create a new depth, stencil, and alpha state based on the CSO dsa state.
408 *
409 * This contains the depth buffer, stencil buffer, alpha test, and such.
410 * On the Radeon, depth and stencil buffer setup are intertwined, which is
411 * the reason for some of the strange-looking assignments across registers. */
412 static void*
413 r300_create_dsa_state(struct pipe_context* pipe,
414 const struct pipe_depth_stencil_alpha_state* state)
415 {
416 struct r300_capabilities *caps = &r300_screen(pipe->screen)->caps;
417 struct r300_dsa_state* dsa = CALLOC_STRUCT(r300_dsa_state);
418
419 /* Depth test setup. */
420 if (state->depth.enabled) {
421 dsa->z_buffer_control |= R300_Z_ENABLE;
422
423 if (state->depth.writemask) {
424 dsa->z_buffer_control |= R300_Z_WRITE_ENABLE;
425 }
426
427 dsa->z_stencil_control |=
428 (r300_translate_depth_stencil_function(state->depth.func) <<
429 R300_Z_FUNC_SHIFT);
430 }
431
432 /* Stencil buffer setup. */
433 if (state->stencil[0].enabled) {
434 dsa->z_buffer_control |= R300_STENCIL_ENABLE;
435 dsa->z_stencil_control |=
436 (r300_translate_depth_stencil_function(state->stencil[0].func) <<
437 R300_S_FRONT_FUNC_SHIFT) |
438 (r300_translate_stencil_op(state->stencil[0].fail_op) <<
439 R300_S_FRONT_SFAIL_OP_SHIFT) |
440 (r300_translate_stencil_op(state->stencil[0].zpass_op) <<
441 R300_S_FRONT_ZPASS_OP_SHIFT) |
442 (r300_translate_stencil_op(state->stencil[0].zfail_op) <<
443 R300_S_FRONT_ZFAIL_OP_SHIFT);
444
445 dsa->stencil_ref_mask =
446 (state->stencil[0].valuemask << R300_STENCILMASK_SHIFT) |
447 (state->stencil[0].writemask << R300_STENCILWRITEMASK_SHIFT);
448
449 if (state->stencil[1].enabled) {
450 dsa->two_sided = TRUE;
451
452 dsa->z_buffer_control |= R300_STENCIL_FRONT_BACK;
453 dsa->z_stencil_control |=
454 (r300_translate_depth_stencil_function(state->stencil[1].func) <<
455 R300_S_BACK_FUNC_SHIFT) |
456 (r300_translate_stencil_op(state->stencil[1].fail_op) <<
457 R300_S_BACK_SFAIL_OP_SHIFT) |
458 (r300_translate_stencil_op(state->stencil[1].zpass_op) <<
459 R300_S_BACK_ZPASS_OP_SHIFT) |
460 (r300_translate_stencil_op(state->stencil[1].zfail_op) <<
461 R300_S_BACK_ZFAIL_OP_SHIFT);
462
463 dsa->stencil_ref_bf =
464 (state->stencil[1].valuemask << R300_STENCILMASK_SHIFT) |
465 (state->stencil[1].writemask << R300_STENCILWRITEMASK_SHIFT);
466
467 if (caps->is_r500) {
468 dsa->z_buffer_control |= R500_STENCIL_REFMASK_FRONT_BACK;
469 } else {
470 dsa->stencil_ref_bf_fallback =
471 (state->stencil[0].valuemask != state->stencil[1].valuemask ||
472 state->stencil[0].writemask != state->stencil[1].writemask);
473 }
474 }
475 }
476
477 /* Alpha test setup. */
478 if (state->alpha.enabled) {
479 dsa->alpha_function =
480 r300_translate_alpha_function(state->alpha.func) |
481 R300_FG_ALPHA_FUNC_ENABLE;
482
483 /* We could use 10bit alpha ref but who needs that? */
484 dsa->alpha_function |= float_to_ubyte(state->alpha.ref_value);
485
486 if (caps->is_r500)
487 dsa->alpha_function |= R500_FG_ALPHA_FUNC_8BIT;
488 }
489
490 return (void*)dsa;
491 }
492
493 static void r300_update_stencil_ref_fallback_status(struct r300_context *r300)
494 {
495 struct r300_dsa_state *dsa = (struct r300_dsa_state*)r300->dsa_state.state;
496
497 if (r300->screen->caps.is_r500) {
498 return;
499 }
500
501 r300->stencil_ref_bf_fallback =
502 dsa->stencil_ref_bf_fallback ||
503 (dsa->two_sided &&
504 r300->stencil_ref.ref_value[0] != r300->stencil_ref.ref_value[1]);
505 }
506
507 /* Bind DSA state. */
508 static void r300_bind_dsa_state(struct pipe_context* pipe,
509 void* state)
510 {
511 struct r300_context* r300 = r300_context(pipe);
512
513 if (!state) {
514 return;
515 }
516
517 UPDATE_STATE(state, r300->dsa_state);
518
519 r300_update_stencil_ref_fallback_status(r300);
520 }
521
522 /* Free DSA state. */
523 static void r300_delete_dsa_state(struct pipe_context* pipe,
524 void* state)
525 {
526 FREE(state);
527 }
528
529 static void r300_set_stencil_ref(struct pipe_context* pipe,
530 const struct pipe_stencil_ref* sr)
531 {
532 struct r300_context* r300 = r300_context(pipe);
533
534 r300->stencil_ref = *sr;
535 r300->dsa_state.dirty = TRUE;
536
537 r300_update_stencil_ref_fallback_status(r300);
538 }
539
540 /* This switcheroo is needed just because of goddamned MACRO_SWITCH. */
541 static void r300_fb_update_tiling_flags(struct r300_context *r300,
542 const struct pipe_framebuffer_state *old_state,
543 const struct pipe_framebuffer_state *new_state)
544 {
545 struct r300_texture *tex;
546 unsigned i, j, level;
547
548 /* Reset tiling flags for old surfaces to default values. */
549 for (i = 0; i < old_state->nr_cbufs; i++) {
550 for (j = 0; j < new_state->nr_cbufs; j++) {
551 if (old_state->cbufs[i]->texture == new_state->cbufs[j]->texture) {
552 break;
553 }
554 }
555 /* If not binding the surface again... */
556 if (j != new_state->nr_cbufs) {
557 continue;
558 }
559
560 tex = r300_texture(old_state->cbufs[i]->texture);
561
562 if (tex) {
563 r300->rws->buffer_set_tiling(r300->rws, tex->buffer,
564 tex->pitch[0],
565 tex->microtile,
566 tex->macrotile);
567 }
568 }
569 if (old_state->zsbuf &&
570 (!new_state->zsbuf ||
571 old_state->zsbuf->texture != new_state->zsbuf->texture)) {
572 tex = r300_texture(old_state->zsbuf->texture);
573
574 if (tex) {
575 r300->rws->buffer_set_tiling(r300->rws, tex->buffer,
576 tex->pitch[0],
577 tex->microtile,
578 tex->macrotile);
579 }
580 }
581
582 /* Set tiling flags for new surfaces. */
583 for (i = 0; i < new_state->nr_cbufs; i++) {
584 tex = r300_texture(new_state->cbufs[i]->texture);
585 level = new_state->cbufs[i]->level;
586
587 r300->rws->buffer_set_tiling(r300->rws, tex->buffer,
588 tex->pitch[level],
589 tex->microtile,
590 tex->mip_macrotile[level]);
591 }
592 if (new_state->zsbuf) {
593 tex = r300_texture(new_state->zsbuf->texture);
594 level = new_state->zsbuf->level;
595
596 r300->rws->buffer_set_tiling(r300->rws, tex->buffer,
597 tex->pitch[level],
598 tex->microtile,
599 tex->mip_macrotile[level]);
600 }
601 }
602
603 static void
604 r300_set_framebuffer_state(struct pipe_context* pipe,
605 const struct pipe_framebuffer_state* state)
606 {
607 struct r300_context* r300 = r300_context(pipe);
608 struct pipe_framebuffer_state *old_state = r300->fb_state.state;
609 unsigned max_width, max_height;
610 uint32_t zbuffer_bpp = 0;
611
612 if (state->nr_cbufs > 4) {
613 fprintf(stderr, "r300: Implementation error: Too many MRTs in %s, "
614 "refusing to bind framebuffer state!\n", __FUNCTION__);
615 return;
616 }
617
618 if (r300->screen->caps.is_r500) {
619 max_width = max_height = 4096;
620 } else if (r300->screen->caps.is_r400) {
621 max_width = max_height = 4021;
622 } else {
623 max_width = max_height = 2560;
624 }
625
626 if (state->width > max_width || state->height > max_height) {
627 fprintf(stderr, "r300: Implementation error: Render targets are too "
628 "big in %s, refusing to bind framebuffer state!\n", __FUNCTION__);
629 return;
630 }
631
632 if (r300->draw) {
633 draw_flush(r300->draw);
634 }
635
636 r300->fb_state.dirty = TRUE;
637
638 /* If nr_cbufs is changed from zero to non-zero or vice versa... */
639 if (!!old_state->nr_cbufs != !!state->nr_cbufs) {
640 r300->blend_state.dirty = TRUE;
641 }
642 /* If zsbuf is set from NULL to non-NULL or vice versa.. */
643 if (!!old_state->zsbuf != !!state->zsbuf) {
644 r300->dsa_state.dirty = TRUE;
645 }
646
647 r300_fb_update_tiling_flags(r300, r300->fb_state.state, state);
648
649 memcpy(r300->fb_state.state, state, sizeof(struct pipe_framebuffer_state));
650
651 r300->fb_state.size = (10 * state->nr_cbufs) + (2 * (4 - state->nr_cbufs)) +
652 (state->zsbuf ? 10 : 0) + 11;
653
654 /* Polygon offset depends on the zbuffer bit depth. */
655 if (state->zsbuf && r300->polygon_offset_enabled) {
656 switch (util_format_get_blocksize(state->zsbuf->texture->format)) {
657 case 2:
658 zbuffer_bpp = 16;
659 break;
660 case 4:
661 zbuffer_bpp = 24;
662 break;
663 }
664
665 if (r300->zbuffer_bpp != zbuffer_bpp) {
666 r300->zbuffer_bpp = zbuffer_bpp;
667 r300->rs_state.dirty = TRUE;
668 }
669 }
670 }
671
672 /* Create fragment shader state. */
673 static void* r300_create_fs_state(struct pipe_context* pipe,
674 const struct pipe_shader_state* shader)
675 {
676 struct r300_fragment_shader* fs = NULL;
677
678 fs = (struct r300_fragment_shader*)CALLOC_STRUCT(r300_fragment_shader);
679
680 /* Copy state directly into shader. */
681 fs->state = *shader;
682 fs->state.tokens = tgsi_dup_tokens(shader->tokens);
683
684 return (void*)fs;
685 }
686
687 void r300_mark_fs_code_dirty(struct r300_context *r300)
688 {
689 struct r300_fragment_shader* fs = r300_fs(r300);
690
691 r300->fs.dirty = TRUE;
692 r300->fs_rc_constant_state.dirty = TRUE;
693 r300->fs_constants.dirty = TRUE;
694
695 if (r300->screen->caps.is_r500) {
696 r300->fs.size = r500_get_fs_atom_size(r300);
697 r300->fs_rc_constant_state.size = fs->shader->rc_state_count * 7;
698 r300->fs_constants.size = fs->shader->externals_count * 4 + 3;
699 } else {
700 r300->fs.size = r300_get_fs_atom_size(r300);
701 r300->fs_rc_constant_state.size = fs->shader->rc_state_count * 5;
702 r300->fs_constants.size = fs->shader->externals_count * 4 + 1;
703 }
704 }
705
706 /* Bind fragment shader state. */
707 static void r300_bind_fs_state(struct pipe_context* pipe, void* shader)
708 {
709 struct r300_context* r300 = r300_context(pipe);
710 struct r300_fragment_shader* fs = (struct r300_fragment_shader*)shader;
711
712 if (fs == NULL) {
713 r300->fs.state = NULL;
714 return;
715 }
716
717 r300->fs.state = fs;
718 r300_pick_fragment_shader(r300);
719 r300_mark_fs_code_dirty(r300);
720
721 r300->rs_block_state.dirty = TRUE; /* Will be updated before the emission. */
722
723 if (r300->vs_state.state && r300_vertex_shader_setup_wpos(r300)) {
724 r300->vap_output_state.dirty = TRUE;
725 }
726 }
727
728 /* Delete fragment shader state. */
729 static void r300_delete_fs_state(struct pipe_context* pipe, void* shader)
730 {
731 struct r300_fragment_shader* fs = (struct r300_fragment_shader*)shader;
732 struct r300_fragment_shader_code *tmp, *ptr = fs->first;
733
734 while (ptr) {
735 tmp = ptr;
736 ptr = ptr->next;
737 rc_constants_destroy(&tmp->code.constants);
738 FREE(tmp);
739 }
740 FREE((void*)fs->state.tokens);
741 FREE(shader);
742 }
743
744 static void r300_set_polygon_stipple(struct pipe_context* pipe,
745 const struct pipe_poly_stipple* state)
746 {
747 /* XXX no idea how to set this up, but not terribly important */
748 }
749
750 /* Create a new rasterizer state based on the CSO rasterizer state.
751 *
752 * This is a very large chunk of state, and covers most of the graphics
753 * backend (GB), geometry assembly (GA), and setup unit (SU) blocks.
754 *
755 * In a not entirely unironic sidenote, this state has nearly nothing to do
756 * with the actual block on the Radeon called the rasterizer (RS). */
757 static void* r300_create_rs_state(struct pipe_context* pipe,
758 const struct pipe_rasterizer_state* state)
759 {
760 struct r300_rs_state* rs = CALLOC_STRUCT(r300_rs_state);
761 int i;
762
763 /* Copy rasterizer state for Draw. */
764 rs->rs = *state;
765
766 #ifdef PIPE_ARCH_LITTLE_ENDIAN
767 rs->vap_control_status = R300_VC_NO_SWAP;
768 #else
769 rs->vap_control_status = R300_VC_32BIT_SWAP;
770 #endif
771
772 /* If no TCL engine is present, turn off the HW TCL. */
773 if (!r300_screen(pipe->screen)->caps.has_tcl) {
774 rs->vap_control_status |= R300_VAP_TCL_BYPASS;
775 }
776
777 rs->point_size = pack_float_16_6x(state->point_size) |
778 (pack_float_16_6x(state->point_size) << R300_POINTSIZE_X_SHIFT);
779
780 rs->line_control = pack_float_16_6x(state->line_width) |
781 R300_GA_LINE_CNTL_END_TYPE_COMP;
782
783 /* Enable polygon mode */
784 if (state->fill_cw != PIPE_POLYGON_MODE_FILL ||
785 state->fill_ccw != PIPE_POLYGON_MODE_FILL) {
786 rs->polygon_mode = R300_GA_POLY_MODE_DUAL;
787 }
788
789 /* Radeons don't think in "CW/CCW", they think in "front/back". */
790 if (state->front_winding == PIPE_WINDING_CW) {
791 rs->cull_mode = R300_FRONT_FACE_CW;
792
793 /* Polygon offset */
794 if (state->offset_cw) {
795 rs->polygon_offset_enable |= R300_FRONT_ENABLE;
796 }
797 if (state->offset_ccw) {
798 rs->polygon_offset_enable |= R300_BACK_ENABLE;
799 }
800
801 /* Polygon mode */
802 if (rs->polygon_mode) {
803 rs->polygon_mode |=
804 r300_translate_polygon_mode_front(state->fill_cw);
805 rs->polygon_mode |=
806 r300_translate_polygon_mode_back(state->fill_ccw);
807 }
808 } else {
809 rs->cull_mode = R300_FRONT_FACE_CCW;
810
811 /* Polygon offset */
812 if (state->offset_ccw) {
813 rs->polygon_offset_enable |= R300_FRONT_ENABLE;
814 }
815 if (state->offset_cw) {
816 rs->polygon_offset_enable |= R300_BACK_ENABLE;
817 }
818
819 /* Polygon mode */
820 if (rs->polygon_mode) {
821 rs->polygon_mode |=
822 r300_translate_polygon_mode_front(state->fill_ccw);
823 rs->polygon_mode |=
824 r300_translate_polygon_mode_back(state->fill_cw);
825 }
826 }
827 if (state->front_winding & state->cull_mode) {
828 rs->cull_mode |= R300_CULL_FRONT;
829 }
830 if (~(state->front_winding) & state->cull_mode) {
831 rs->cull_mode |= R300_CULL_BACK;
832 }
833
834 if (rs->polygon_offset_enable) {
835 rs->depth_offset = state->offset_units;
836 rs->depth_scale = state->offset_scale;
837 }
838
839 if (state->line_stipple_enable) {
840 rs->line_stipple_config =
841 R300_GA_LINE_STIPPLE_CONFIG_LINE_RESET_LINE |
842 (fui((float)state->line_stipple_factor) &
843 R300_GA_LINE_STIPPLE_CONFIG_STIPPLE_SCALE_MASK);
844 /* XXX this might need to be scaled up */
845 rs->line_stipple_value = state->line_stipple_pattern;
846 }
847
848 if (state->flatshade) {
849 rs->color_control = R300_SHADE_MODEL_FLAT;
850 } else {
851 rs->color_control = R300_SHADE_MODEL_SMOOTH;
852 }
853
854 rs->clip_rule = state->scissor ? 0xAAAA : 0xFFFF;
855
856 /* Point sprites */
857 if (state->sprite_coord_enable) {
858 rs->stuffing_enable = R300_GB_POINT_STUFF_ENABLE;
859 for (i = 0; i < 8; i++) {
860 if (state->sprite_coord_enable & (1 << i))
861 rs->stuffing_enable |=
862 R300_GB_TEX_STR << (R300_GB_TEX0_SOURCE_SHIFT + (i*2));
863 }
864
865 rs->point_texcoord_left = 0.0f;
866 rs->point_texcoord_right = 1.0f;
867
868 switch (state->sprite_coord_mode) {
869 case PIPE_SPRITE_COORD_UPPER_LEFT:
870 rs->point_texcoord_top = 0.0f;
871 rs->point_texcoord_bottom = 1.0f;
872 break;
873 case PIPE_SPRITE_COORD_LOWER_LEFT:
874 rs->point_texcoord_top = 1.0f;
875 rs->point_texcoord_bottom = 0.0f;
876 break;
877 }
878 }
879
880 return (void*)rs;
881 }
882
883 /* Bind rasterizer state. */
884 static void r300_bind_rs_state(struct pipe_context* pipe, void* state)
885 {
886 struct r300_context* r300 = r300_context(pipe);
887 struct r300_rs_state* rs = (struct r300_rs_state*)state;
888 int last_sprite_coord_enable = r300->sprite_coord_enable;
889
890 if (r300->draw) {
891 draw_flush(r300->draw);
892 draw_set_rasterizer_state(r300->draw, &rs->rs, state);
893 }
894
895 if (rs) {
896 r300->polygon_offset_enabled = rs->rs.offset_cw || rs->rs.offset_ccw;
897 r300->sprite_coord_enable = rs->rs.sprite_coord_enable;
898 } else {
899 r300->polygon_offset_enabled = FALSE;
900 r300->sprite_coord_enable = 0;
901 }
902
903 UPDATE_STATE(state, r300->rs_state);
904 r300->rs_state.size = 26 + (r300->polygon_offset_enabled ? 5 : 0);
905
906 if (last_sprite_coord_enable != r300->sprite_coord_enable) {
907 r300->rs_block_state.dirty = TRUE;
908 }
909 }
910
911 /* Free rasterizer state. */
912 static void r300_delete_rs_state(struct pipe_context* pipe, void* state)
913 {
914 FREE(state);
915 }
916
917 static void*
918 r300_create_sampler_state(struct pipe_context* pipe,
919 const struct pipe_sampler_state* state)
920 {
921 struct r300_context* r300 = r300_context(pipe);
922 struct r300_sampler_state* sampler = CALLOC_STRUCT(r300_sampler_state);
923 boolean is_r500 = r300->screen->caps.is_r500;
924 int lod_bias;
925 union util_color uc;
926
927 sampler->state = *state;
928
929 sampler->filter0 |=
930 (r300_translate_wrap(state->wrap_s) << R300_TX_WRAP_S_SHIFT) |
931 (r300_translate_wrap(state->wrap_t) << R300_TX_WRAP_T_SHIFT) |
932 (r300_translate_wrap(state->wrap_r) << R300_TX_WRAP_R_SHIFT);
933
934 sampler->filter0 |= r300_translate_tex_filters(state->min_img_filter,
935 state->mag_img_filter,
936 state->min_mip_filter,
937 state->max_anisotropy > 0);
938
939 sampler->filter0 |= r300_anisotropy(state->max_anisotropy);
940
941 /* Unfortunately, r300-r500 don't support floating-point mipmap lods. */
942 /* We must pass these to the merge function to clamp them properly. */
943 sampler->min_lod = MAX2((unsigned)state->min_lod, 0);
944 sampler->max_lod = MAX2((unsigned)ceilf(state->max_lod), 0);
945
946 lod_bias = CLAMP((int)(state->lod_bias * 32), -(1 << 9), (1 << 9) - 1);
947
948 sampler->filter1 |= lod_bias << R300_LOD_BIAS_SHIFT;
949
950 /* This is very high quality anisotropic filtering for R5xx.
951 * It's good for benchmarking the performance of texturing but
952 * in practice we don't want to slow down the driver because it's
953 * a pretty good performance killer. Feel free to play with it. */
954 if (DBG_ON(r300, DBG_ANISOHQ) && is_r500) {
955 sampler->filter1 |= r500_anisotropy(state->max_anisotropy);
956 }
957
958 util_pack_color(state->border_color, PIPE_FORMAT_B8G8R8A8_UNORM, &uc);
959 sampler->border_color = uc.ui;
960
961 /* R500-specific fixups and optimizations */
962 if (r300->screen->caps.is_r500) {
963 sampler->filter1 |= R500_BORDER_FIX;
964 }
965
966 return (void*)sampler;
967 }
968
969 static void r300_bind_sampler_states(struct pipe_context* pipe,
970 unsigned count,
971 void** states)
972 {
973 struct r300_context* r300 = r300_context(pipe);
974 struct r300_textures_state* state =
975 (struct r300_textures_state*)r300->textures_state.state;
976 unsigned tex_units = r300->screen->caps.num_tex_units;
977
978 if (count > tex_units) {
979 return;
980 }
981
982 memcpy(state->sampler_states, states, sizeof(void*) * count);
983 state->sampler_state_count = count;
984
985 r300->textures_state.dirty = TRUE;
986 }
987
988 static void r300_lacks_vertex_textures(struct pipe_context* pipe,
989 unsigned count,
990 void** states)
991 {
992 }
993
994 static void r300_delete_sampler_state(struct pipe_context* pipe, void* state)
995 {
996 FREE(state);
997 }
998
999 static void r300_set_fragment_sampler_views(struct pipe_context* pipe,
1000 unsigned count,
1001 struct pipe_sampler_view** views)
1002 {
1003 struct r300_context* r300 = r300_context(pipe);
1004 struct r300_textures_state* state =
1005 (struct r300_textures_state*)r300->textures_state.state;
1006 struct r300_texture *texture;
1007 unsigned i;
1008 unsigned tex_units = r300->screen->caps.num_tex_units;
1009 boolean dirty_tex = FALSE;
1010
1011 if (count > tex_units) {
1012 return;
1013 }
1014
1015 for (i = 0; i < count; i++) {
1016 if (&state->sampler_views[i]->base != views[i]) {
1017 pipe_sampler_view_reference(
1018 (struct pipe_sampler_view**)&state->sampler_views[i],
1019 views[i]);
1020
1021 if (!views[i]) {
1022 continue;
1023 }
1024
1025 /* A new sampler view (= texture)... */
1026 dirty_tex = TRUE;
1027
1028 /* Set the texrect factor in the fragment shader.
1029 * Needed for RECT and NPOT fallback. */
1030 texture = r300_texture(views[i]->texture);
1031 if (texture->uses_pitch) {
1032 r300->fs_rc_constant_state.dirty = TRUE;
1033 }
1034 }
1035 }
1036
1037 for (i = count; i < tex_units; i++) {
1038 if (state->sampler_views[i]) {
1039 pipe_sampler_view_reference(
1040 (struct pipe_sampler_view**)&state->sampler_views[i],
1041 NULL);
1042 }
1043 }
1044
1045 state->sampler_view_count = count;
1046
1047 r300->textures_state.dirty = TRUE;
1048
1049 if (dirty_tex) {
1050 r300->texture_cache_inval.dirty = TRUE;
1051 }
1052 }
1053
1054 static struct pipe_sampler_view *
1055 r300_create_sampler_view(struct pipe_context *pipe,
1056 struct pipe_resource *texture,
1057 const struct pipe_sampler_view *templ)
1058 {
1059 struct r300_sampler_view *view = CALLOC_STRUCT(r300_sampler_view);
1060 struct r300_texture *tex = r300_texture(texture);
1061 unsigned char swizzle[4];
1062
1063 if (view) {
1064 view->base = *templ;
1065 view->base.reference.count = 1;
1066 view->base.context = pipe;
1067 view->base.texture = NULL;
1068 pipe_resource_reference(&view->base.texture, texture);
1069
1070 swizzle[0] = templ->swizzle_r;
1071 swizzle[1] = templ->swizzle_g;
1072 swizzle[2] = templ->swizzle_b;
1073 swizzle[3] = templ->swizzle_a;
1074
1075 /* XXX Enable swizzles when they become supported. Now we get RGBA
1076 * everywhere. And do testing! */
1077 view->format = tex->tx_format;
1078 view->format.format1 |= r300_translate_texformat(templ->format,
1079 0); /*swizzle);*/
1080 if (r300_screen(pipe->screen)->caps.is_r500) {
1081 view->format.format2 |= r500_tx_format_msb_bit(templ->format);
1082 }
1083 }
1084
1085 return (struct pipe_sampler_view*)view;
1086 }
1087
1088 static void
1089 r300_sampler_view_destroy(struct pipe_context *pipe,
1090 struct pipe_sampler_view *view)
1091 {
1092 pipe_resource_reference(&view->texture, NULL);
1093 FREE(view);
1094 }
1095
1096 static void r300_set_scissor_state(struct pipe_context* pipe,
1097 const struct pipe_scissor_state* state)
1098 {
1099 struct r300_context* r300 = r300_context(pipe);
1100
1101 memcpy(r300->scissor_state.state, state,
1102 sizeof(struct pipe_scissor_state));
1103
1104 r300->scissor_state.dirty = TRUE;
1105 }
1106
1107 static void r300_set_viewport_state(struct pipe_context* pipe,
1108 const struct pipe_viewport_state* state)
1109 {
1110 struct r300_context* r300 = r300_context(pipe);
1111 struct r300_viewport_state* viewport =
1112 (struct r300_viewport_state*)r300->viewport_state.state;
1113
1114 r300->viewport = *state;
1115
1116 /* Do the transform in HW. */
1117 viewport->vte_control = R300_VTX_W0_FMT;
1118
1119 if (state->scale[0] != 1.0f) {
1120 viewport->xscale = state->scale[0];
1121 viewport->vte_control |= R300_VPORT_X_SCALE_ENA;
1122 }
1123 if (state->scale[1] != 1.0f) {
1124 viewport->yscale = state->scale[1];
1125 viewport->vte_control |= R300_VPORT_Y_SCALE_ENA;
1126 }
1127 if (state->scale[2] != 1.0f) {
1128 viewport->zscale = state->scale[2];
1129 viewport->vte_control |= R300_VPORT_Z_SCALE_ENA;
1130 }
1131 if (state->translate[0] != 0.0f) {
1132 viewport->xoffset = state->translate[0];
1133 viewport->vte_control |= R300_VPORT_X_OFFSET_ENA;
1134 }
1135 if (state->translate[1] != 0.0f) {
1136 viewport->yoffset = state->translate[1];
1137 viewport->vte_control |= R300_VPORT_Y_OFFSET_ENA;
1138 }
1139 if (state->translate[2] != 0.0f) {
1140 viewport->zoffset = state->translate[2];
1141 viewport->vte_control |= R300_VPORT_Z_OFFSET_ENA;
1142 }
1143
1144 r300->viewport_state.dirty = TRUE;
1145 if (r300->fs.state && r300_fs(r300)->shader->inputs.wpos != ATTR_UNUSED) {
1146 r300->fs_rc_constant_state.dirty = TRUE;
1147 }
1148 }
1149
1150 static void r300_set_vertex_buffers(struct pipe_context* pipe,
1151 unsigned count,
1152 const struct pipe_vertex_buffer* buffers)
1153 {
1154 struct r300_context* r300 = r300_context(pipe);
1155 struct pipe_vertex_buffer *vbo;
1156 unsigned i, max_index = (1 << 24) - 1;
1157 boolean any_user_buffer = FALSE;
1158
1159 if (count == r300->vertex_buffer_count &&
1160 memcmp(r300->vertex_buffer, buffers,
1161 sizeof(struct pipe_vertex_buffer) * count) == 0) {
1162 return;
1163 }
1164
1165 /* Check if the stride is aligned to the size of DWORD. */
1166 for (i = 0; i < count; i++) {
1167 if (buffers[i].buffer) {
1168 if (buffers[i].stride % 4 != 0) {
1169 // XXX Shouldn't we align the buffer?
1170 fprintf(stderr, "r300: set_vertex_buffers: "
1171 "Unaligned buffer stride %i isn't supported.\n",
1172 buffers[i].stride);
1173 abort();
1174 }
1175 }
1176 }
1177
1178 for (i = 0; i < count; i++) {
1179 /* Why, yes, I AM casting away constness. How did you know? */
1180 vbo = (struct pipe_vertex_buffer*)&buffers[i];
1181
1182 /* Reference our buffer. */
1183 pipe_resource_reference(&r300->vertex_buffer[i].buffer, vbo->buffer);
1184
1185 /* Skip NULL buffers */
1186 if (!buffers[i].buffer) {
1187 continue;
1188 }
1189
1190 if (r300_buffer_is_user_buffer(vbo->buffer)) {
1191 any_user_buffer = TRUE;
1192 }
1193
1194 if (vbo->max_index == ~0) {
1195 /* if no VBO stride then only one vertex value so max index is 1 */
1196 /* should think about converting to VS constants like svga does */
1197 if (!vbo->stride)
1198 vbo->max_index = 1;
1199 else
1200 vbo->max_index =
1201 (vbo->buffer->width0 - vbo->buffer_offset) / vbo->stride;
1202 }
1203
1204 max_index = MIN2(vbo->max_index, max_index);
1205 }
1206
1207 for (; i < r300->vertex_buffer_count; i++) {
1208 /* Dereference any old buffers. */
1209 pipe_resource_reference(&r300->vertex_buffer[i].buffer, NULL);
1210 }
1211
1212 memcpy(r300->vertex_buffer, buffers,
1213 sizeof(struct pipe_vertex_buffer) * count);
1214
1215 r300->vertex_buffer_count = count;
1216 r300->vertex_buffer_max_index = max_index;
1217 r300->any_user_vbs = any_user_buffer;
1218
1219 if (r300->draw) {
1220 draw_flush(r300->draw);
1221 draw_set_vertex_buffers(r300->draw, count, buffers);
1222 }
1223 }
1224
1225 /* Update the PSC tables. */
1226 static void r300_vertex_psc(struct r300_vertex_element_state *velems)
1227 {
1228 struct r300_vertex_stream_state *vstream = &velems->vertex_stream;
1229 uint16_t type, swizzle;
1230 enum pipe_format format;
1231 unsigned i;
1232
1233 if (velems->count > 16) {
1234 fprintf(stderr, "r300: More than 16 vertex elements are not supported,"
1235 " requested %i, using 16.\n", velems->count);
1236 velems->count = 16;
1237 }
1238
1239 /* Vertex shaders have no semantics on their inputs,
1240 * so PSC should just route stuff based on the vertex elements,
1241 * and not on attrib information. */
1242 for (i = 0; i < velems->count; i++) {
1243 format = velems->velem[i].src_format;
1244
1245 type = r300_translate_vertex_data_type(format) |
1246 (i << R300_DST_VEC_LOC_SHIFT);
1247 swizzle = r300_translate_vertex_data_swizzle(format);
1248
1249 if (i & 1) {
1250 vstream->vap_prog_stream_cntl[i >> 1] |= type << 16;
1251 vstream->vap_prog_stream_cntl_ext[i >> 1] |= swizzle << 16;
1252 } else {
1253 vstream->vap_prog_stream_cntl[i >> 1] |= type;
1254 vstream->vap_prog_stream_cntl_ext[i >> 1] |= swizzle;
1255 }
1256 }
1257
1258 /* Set the last vector in the PSC. */
1259 if (i) {
1260 i -= 1;
1261 }
1262 vstream->vap_prog_stream_cntl[i >> 1] |=
1263 (R300_LAST_VEC << (i & 1 ? 16 : 0));
1264
1265 vstream->count = (i >> 1) + 1;
1266 }
1267
1268 static void* r300_create_vertex_elements_state(struct pipe_context* pipe,
1269 unsigned count,
1270 const struct pipe_vertex_element* attribs)
1271 {
1272 struct r300_vertex_element_state *velems;
1273 unsigned i, size;
1274
1275 assert(count <= PIPE_MAX_ATTRIBS);
1276 velems = CALLOC_STRUCT(r300_vertex_element_state);
1277 if (velems != NULL) {
1278 velems->count = count;
1279 memcpy(velems->velem, attribs, sizeof(struct pipe_vertex_element) * count);
1280
1281 if (r300_screen(pipe->screen)->caps.has_tcl) {
1282 /* Check if the format is aligned to the size of DWORD. */
1283 for (i = 0; i < count; i++) {
1284 size = util_format_get_blocksize(attribs[i].src_format);
1285
1286 if (size % 4 != 0) {
1287 /* XXX Shouldn't we align the format? */
1288 fprintf(stderr, "r300_create_vertex_elements_state: "
1289 "Unaligned format %s:%i isn't supported\n",
1290 util_format_name(attribs[i].src_format), size);
1291 assert(0);
1292 abort();
1293 }
1294 }
1295
1296 r300_vertex_psc(velems);
1297 }
1298 }
1299 return velems;
1300 }
1301
1302 static void r300_bind_vertex_elements_state(struct pipe_context *pipe,
1303 void *state)
1304 {
1305 struct r300_context *r300 = r300_context(pipe);
1306 struct r300_vertex_element_state *velems = state;
1307
1308 if (velems == NULL) {
1309 return;
1310 }
1311
1312 r300->velems = velems;
1313
1314 if (r300->draw) {
1315 draw_flush(r300->draw);
1316 draw_set_vertex_elements(r300->draw, velems->count, velems->velem);
1317 }
1318
1319 UPDATE_STATE(&velems->vertex_stream, r300->vertex_stream_state);
1320 r300->vertex_stream_state.size = (1 + velems->vertex_stream.count) * 2;
1321 }
1322
1323 static void r300_delete_vertex_elements_state(struct pipe_context *pipe, void *state)
1324 {
1325 FREE(state);
1326 }
1327
1328 static void* r300_create_vs_state(struct pipe_context* pipe,
1329 const struct pipe_shader_state* shader)
1330 {
1331 struct r300_context* r300 = r300_context(pipe);
1332
1333 struct r300_vertex_shader* vs = CALLOC_STRUCT(r300_vertex_shader);
1334
1335 /* Copy state directly into shader. */
1336 vs->state = *shader;
1337 vs->state.tokens = tgsi_dup_tokens(shader->tokens);
1338
1339 if (r300->screen->caps.has_tcl) {
1340 r300_translate_vertex_shader(r300, vs, vs->state.tokens);
1341 } else {
1342 vs->draw_vs = draw_create_vertex_shader(r300->draw, shader);
1343 }
1344
1345 return vs;
1346 }
1347
1348 static void r300_bind_vs_state(struct pipe_context* pipe, void* shader)
1349 {
1350 struct r300_context* r300 = r300_context(pipe);
1351 struct r300_vertex_shader* vs = (struct r300_vertex_shader*)shader;
1352
1353 if (vs == NULL) {
1354 r300->vs_state.state = NULL;
1355 return;
1356 }
1357 if (vs == r300->vs_state.state) {
1358 return;
1359 }
1360 r300->vs_state.state = vs;
1361
1362 // VS output mapping for HWTCL or stream mapping for SWTCL to the RS block
1363 if (r300->fs.state) {
1364 r300_vertex_shader_setup_wpos(r300);
1365 }
1366 memcpy(r300->vap_output_state.state, &vs->vap_out,
1367 sizeof(struct r300_vap_output_state));
1368 r300->vap_output_state.dirty = TRUE;
1369
1370 /* The majority of the RS block bits is dependent on the vertex shader. */
1371 r300->rs_block_state.dirty = TRUE; /* Will be updated before the emission. */
1372
1373 if (r300->screen->caps.has_tcl) {
1374 r300->vs_state.dirty = TRUE;
1375 r300->vs_state.size =
1376 vs->code.length + 9 +
1377 (vs->immediates_count ? vs->immediates_count * 4 + 3 : 0);
1378
1379 if (vs->externals_count) {
1380 r300->vs_constants.dirty = TRUE;
1381 r300->vs_constants.size = vs->externals_count * 4 + 3;
1382 } else {
1383 r300->vs_constants.size = 0;
1384 }
1385
1386 r300->pvs_flush.dirty = TRUE;
1387 } else {
1388 draw_flush(r300->draw);
1389 draw_bind_vertex_shader(r300->draw,
1390 (struct draw_vertex_shader*)vs->draw_vs);
1391 }
1392 }
1393
1394 static void r300_delete_vs_state(struct pipe_context* pipe, void* shader)
1395 {
1396 struct r300_context* r300 = r300_context(pipe);
1397 struct r300_vertex_shader* vs = (struct r300_vertex_shader*)shader;
1398
1399 if (r300->screen->caps.has_tcl) {
1400 rc_constants_destroy(&vs->code.constants);
1401 } else {
1402 draw_delete_vertex_shader(r300->draw,
1403 (struct draw_vertex_shader*)vs->draw_vs);
1404 }
1405
1406 FREE((void*)vs->state.tokens);
1407 FREE(shader);
1408 }
1409
1410 static void r300_set_constant_buffer(struct pipe_context *pipe,
1411 uint shader, uint index,
1412 struct pipe_resource *buf)
1413 {
1414 struct r300_context* r300 = r300_context(pipe);
1415 struct r300_constant_buffer *cbuf;
1416 struct pipe_transfer *tr;
1417 void *mapped;
1418 int max_size = 0;
1419
1420 switch (shader) {
1421 case PIPE_SHADER_VERTEX:
1422 cbuf = (struct r300_constant_buffer*)r300->vs_constants.state;
1423 max_size = 256;
1424 break;
1425 case PIPE_SHADER_FRAGMENT:
1426 cbuf = (struct r300_constant_buffer*)r300->fs_constants.state;
1427 if (r300->screen->caps.is_r500) {
1428 max_size = 256;
1429 } else {
1430 max_size = 32;
1431 }
1432 break;
1433 default:
1434 assert(0);
1435 return;
1436 }
1437
1438 if (buf == NULL || buf->width0 == 0 ||
1439 (mapped = pipe_buffer_map(pipe, buf, PIPE_TRANSFER_READ, &tr)) == NULL)
1440 {
1441 cbuf->count = 0;
1442 return;
1443 }
1444
1445 assert((buf->width0 % 4 * sizeof(float)) == 0);
1446
1447 /* Check the size of the constant buffer. */
1448 /* XXX Subtract immediates and RC_STATE_* variables. */
1449 if (buf->width0 > (sizeof(float) * 4 * max_size)) {
1450 fprintf(stderr, "r300: Max size of the constant buffer is "
1451 "%i*4 floats.\n", max_size);
1452 abort();
1453 }
1454
1455 memcpy(cbuf->constants, mapped, buf->width0);
1456 cbuf->count = buf->width0 / (4 * sizeof(float));
1457 pipe_buffer_unmap(pipe, buf, tr);
1458
1459 if (shader == PIPE_SHADER_VERTEX) {
1460 if (r300->screen->caps.has_tcl) {
1461 if (r300->vs_constants.size) {
1462 r300->vs_constants.dirty = TRUE;
1463 }
1464 r300->pvs_flush.dirty = TRUE;
1465 } else if (r300->draw) {
1466 draw_set_mapped_constant_buffer(r300->draw, PIPE_SHADER_VERTEX,
1467 0, cbuf->constants,
1468 buf->width0);
1469 }
1470 } else if (shader == PIPE_SHADER_FRAGMENT) {
1471 r300->fs_constants.dirty = TRUE;
1472 }
1473 }
1474
1475 void r300_init_state_functions(struct r300_context* r300)
1476 {
1477 r300->context.create_blend_state = r300_create_blend_state;
1478 r300->context.bind_blend_state = r300_bind_blend_state;
1479 r300->context.delete_blend_state = r300_delete_blend_state;
1480
1481 r300->context.set_blend_color = r300_set_blend_color;
1482
1483 r300->context.set_clip_state = r300_set_clip_state;
1484
1485 r300->context.set_constant_buffer = r300_set_constant_buffer;
1486
1487 r300->context.create_depth_stencil_alpha_state = r300_create_dsa_state;
1488 r300->context.bind_depth_stencil_alpha_state = r300_bind_dsa_state;
1489 r300->context.delete_depth_stencil_alpha_state = r300_delete_dsa_state;
1490
1491 r300->context.set_stencil_ref = r300_set_stencil_ref;
1492
1493 r300->context.set_framebuffer_state = r300_set_framebuffer_state;
1494
1495 r300->context.create_fs_state = r300_create_fs_state;
1496 r300->context.bind_fs_state = r300_bind_fs_state;
1497 r300->context.delete_fs_state = r300_delete_fs_state;
1498
1499 r300->context.set_polygon_stipple = r300_set_polygon_stipple;
1500
1501 r300->context.create_rasterizer_state = r300_create_rs_state;
1502 r300->context.bind_rasterizer_state = r300_bind_rs_state;
1503 r300->context.delete_rasterizer_state = r300_delete_rs_state;
1504
1505 r300->context.create_sampler_state = r300_create_sampler_state;
1506 r300->context.bind_fragment_sampler_states = r300_bind_sampler_states;
1507 r300->context.bind_vertex_sampler_states = r300_lacks_vertex_textures;
1508 r300->context.delete_sampler_state = r300_delete_sampler_state;
1509
1510 r300->context.set_fragment_sampler_views = r300_set_fragment_sampler_views;
1511 r300->context.create_sampler_view = r300_create_sampler_view;
1512 r300->context.sampler_view_destroy = r300_sampler_view_destroy;
1513
1514 r300->context.set_scissor_state = r300_set_scissor_state;
1515
1516 r300->context.set_viewport_state = r300_set_viewport_state;
1517
1518 r300->context.set_vertex_buffers = r300_set_vertex_buffers;
1519
1520 r300->context.create_vertex_elements_state = r300_create_vertex_elements_state;
1521 r300->context.bind_vertex_elements_state = r300_bind_vertex_elements_state;
1522 r300->context.delete_vertex_elements_state = r300_delete_vertex_elements_state;
1523
1524 r300->context.create_vs_state = r300_create_vs_state;
1525 r300->context.bind_vs_state = r300_bind_vs_state;
1526 r300->context.delete_vs_state = r300_delete_vs_state;
1527 }