a02fb34b2a7e2e8089be415709b72f3094abc0be
[mesa.git] / src / gallium / drivers / r300 / r300_state.c
1 /*
2 * Copyright 2008 Corbin Simpson <MostAwesomeDude@gmail.com>
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * on the rights to use, copy, modify, merge, publish, distribute, sub
8 * license, and/or sell copies of the Software, and to permit persons to whom
9 * the Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
19 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
20 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
21 * USE OR OTHER DEALINGS IN THE SOFTWARE. */
22
23 #include "util/u_math.h"
24 #include "util/u_pack_color.h"
25
26 #include "util/u_debug.h"
27
28 #include "pipe/p_config.h"
29 #include "pipe/internal/p_winsys_screen.h"
30
31 #include "r300_context.h"
32 #include "r300_reg.h"
33 #include "r300_state_inlines.h"
34 #include "r300_fs.h"
35 #include "r300_vs.h"
36
37 /* r300_state: Functions used to intialize state context by translating
38 * Gallium state objects into semi-native r300 state objects. */
39
40 /* Create a new blend state based on the CSO blend state.
41 *
42 * This encompasses alpha blending, logic/raster ops, and blend dithering. */
43 static void* r300_create_blend_state(struct pipe_context* pipe,
44 const struct pipe_blend_state* state)
45 {
46 struct r300_blend_state* blend = CALLOC_STRUCT(r300_blend_state);
47
48 if (state->blend_enable) {
49 /* XXX for now, always do separate alpha...
50 * is it faster to do it with one reg? */
51 blend->blend_control = R300_ALPHA_BLEND_ENABLE |
52 R300_SEPARATE_ALPHA_ENABLE |
53 R300_READ_ENABLE |
54 r300_translate_blend_function(state->rgb_func) |
55 (r300_translate_blend_factor(state->rgb_src_factor) <<
56 R300_SRC_BLEND_SHIFT) |
57 (r300_translate_blend_factor(state->rgb_dst_factor) <<
58 R300_DST_BLEND_SHIFT);
59 blend->alpha_blend_control =
60 r300_translate_blend_function(state->alpha_func) |
61 (r300_translate_blend_factor(state->alpha_src_factor) <<
62 R300_SRC_BLEND_SHIFT) |
63 (r300_translate_blend_factor(state->alpha_dst_factor) <<
64 R300_DST_BLEND_SHIFT);
65 }
66
67 /* PIPE_LOGICOP_* don't need to be translated, fortunately. */
68 if (state->logicop_enable) {
69 blend->rop = R300_RB3D_ROPCNTL_ROP_ENABLE |
70 (state->logicop_func) << R300_RB3D_ROPCNTL_ROP_SHIFT;
71 }
72
73 if (state->dither) {
74 blend->dither = R300_RB3D_DITHER_CTL_DITHER_MODE_LUT |
75 R300_RB3D_DITHER_CTL_ALPHA_DITHER_MODE_LUT;
76 }
77
78 return (void*)blend;
79 }
80
81 /* Bind blend state. */
82 static void r300_bind_blend_state(struct pipe_context* pipe,
83 void* state)
84 {
85 struct r300_context* r300 = r300_context(pipe);
86
87 r300->blend_state = (struct r300_blend_state*)state;
88 r300->dirty_state |= R300_NEW_BLEND;
89 }
90
91 /* Free blend state. */
92 static void r300_delete_blend_state(struct pipe_context* pipe,
93 void* state)
94 {
95 FREE(state);
96 }
97
98 /* Set blend color.
99 * Setup both R300 and R500 registers, figure out later which one to write. */
100 static void r300_set_blend_color(struct pipe_context* pipe,
101 const struct pipe_blend_color* color)
102 {
103 struct r300_context* r300 = r300_context(pipe);
104 ubyte ur, ug, ub, ua;
105
106 ur = float_to_ubyte(color->color[0]);
107 ug = float_to_ubyte(color->color[1]);
108 ub = float_to_ubyte(color->color[2]);
109 ua = float_to_ubyte(color->color[3]);
110
111 util_pack_color(color->color, PIPE_FORMAT_A8R8G8B8_UNORM,
112 &r300->blend_color_state->blend_color);
113
114 /* XXX this is wrong */
115 r300->blend_color_state->blend_color_red_alpha = ur | (ua << 16);
116 r300->blend_color_state->blend_color_green_blue = ub | (ug << 16);
117
118 r300->dirty_state |= R300_NEW_BLEND_COLOR;
119 }
120
121 static void r300_set_clip_state(struct pipe_context* pipe,
122 const struct pipe_clip_state* state)
123 {
124 struct r300_context* r300 = r300_context(pipe);
125
126 if (r300_screen(pipe->screen)->caps->has_tcl) {
127 r300->clip_state = *state;
128 r300->dirty_state |= R300_NEW_CLIP;
129 } else {
130 draw_flush(r300->draw);
131 draw_set_clip_state(r300->draw, state);
132 }
133 }
134
135 static void
136 r300_set_constant_buffer(struct pipe_context* pipe,
137 uint shader, uint index,
138 const struct pipe_constant_buffer* buffer)
139 {
140 struct r300_context* r300 = r300_context(pipe);
141
142 /* This entire chunk of code seems ever-so-slightly baked.
143 * It's as if I've got pipe_buffer* matryoshkas... */
144 if (buffer && buffer->buffer && buffer->buffer->size) {
145 void* map = pipe->winsys->buffer_map(pipe->winsys, buffer->buffer,
146 PIPE_BUFFER_USAGE_CPU_READ);
147 memcpy(r300->shader_constants[shader].constants,
148 map, buffer->buffer->size);
149 pipe->winsys->buffer_unmap(pipe->winsys, buffer->buffer);
150
151 r300->shader_constants[shader].count =
152 buffer->buffer->size / (sizeof(float) * 4);
153 } else {
154 r300->shader_constants[shader].count = 0;
155 }
156
157 r300->dirty_state |= R300_NEW_CONSTANTS;
158 }
159
160 /* Create a new depth, stencil, and alpha state based on the CSO dsa state.
161 *
162 * This contains the depth buffer, stencil buffer, alpha test, and such.
163 * On the Radeon, depth and stencil buffer setup are intertwined, which is
164 * the reason for some of the strange-looking assignments across registers. */
165 static void*
166 r300_create_dsa_state(struct pipe_context* pipe,
167 const struct pipe_depth_stencil_alpha_state* state)
168 {
169 struct r300_dsa_state* dsa = CALLOC_STRUCT(r300_dsa_state);
170
171 /* Depth test setup. */
172 if (state->depth.enabled) {
173 dsa->z_buffer_control |= R300_Z_ENABLE;
174
175 if (state->depth.writemask) {
176 dsa->z_buffer_control |= R300_Z_WRITE_ENABLE;
177 }
178
179 dsa->z_stencil_control |=
180 (r300_translate_depth_stencil_function(state->depth.func) <<
181 R300_Z_FUNC_SHIFT);
182 }
183
184 /* Stencil buffer setup. */
185 if (state->stencil[0].enabled) {
186 dsa->z_buffer_control |= R300_STENCIL_ENABLE;
187 dsa->z_stencil_control |=
188 (r300_translate_depth_stencil_function(state->stencil[0].func) <<
189 R300_S_FRONT_FUNC_SHIFT) |
190 (r300_translate_stencil_op(state->stencil[0].fail_op) <<
191 R300_S_FRONT_SFAIL_OP_SHIFT) |
192 (r300_translate_stencil_op(state->stencil[0].zpass_op) <<
193 R300_S_FRONT_ZPASS_OP_SHIFT) |
194 (r300_translate_stencil_op(state->stencil[0].zfail_op) <<
195 R300_S_FRONT_ZFAIL_OP_SHIFT);
196
197 dsa->stencil_ref_mask = (state->stencil[0].ref_value) |
198 (state->stencil[0].valuemask << R300_STENCILMASK_SHIFT) |
199 (state->stencil[0].writemask << R300_STENCILWRITEMASK_SHIFT);
200
201 if (state->stencil[1].enabled) {
202 dsa->z_buffer_control |= R300_STENCIL_FRONT_BACK;
203 dsa->z_stencil_control |=
204 (r300_translate_depth_stencil_function(state->stencil[1].func) <<
205 R300_S_BACK_FUNC_SHIFT) |
206 (r300_translate_stencil_op(state->stencil[1].fail_op) <<
207 R300_S_BACK_SFAIL_OP_SHIFT) |
208 (r300_translate_stencil_op(state->stencil[1].zpass_op) <<
209 R300_S_BACK_ZPASS_OP_SHIFT) |
210 (r300_translate_stencil_op(state->stencil[1].zfail_op) <<
211 R300_S_BACK_ZFAIL_OP_SHIFT);
212
213 dsa->stencil_ref_bf = (state->stencil[1].ref_value) |
214 (state->stencil[1].valuemask << R300_STENCILMASK_SHIFT) |
215 (state->stencil[1].writemask << R300_STENCILWRITEMASK_SHIFT);
216 }
217 }
218
219 /* Alpha test setup. */
220 if (state->alpha.enabled) {
221 dsa->alpha_function =
222 r300_translate_alpha_function(state->alpha.func) |
223 R300_FG_ALPHA_FUNC_ENABLE;
224 dsa->alpha_reference = CLAMP(state->alpha.ref_value * 1023.0f,
225 0, 1023);
226 } else {
227 dsa->z_buffer_top = R300_ZTOP_ENABLE;
228 }
229
230 return (void*)dsa;
231 }
232
233 /* Bind DSA state. */
234 static void r300_bind_dsa_state(struct pipe_context* pipe,
235 void* state)
236 {
237 struct r300_context* r300 = r300_context(pipe);
238
239 r300->dsa_state = (struct r300_dsa_state*)state;
240 r300->dirty_state |= R300_NEW_DSA;
241 }
242
243 /* Free DSA state. */
244 static void r300_delete_dsa_state(struct pipe_context* pipe,
245 void* state)
246 {
247 FREE(state);
248 }
249
250 static void r300_set_edgeflags(struct pipe_context* pipe,
251 const unsigned* bitfield)
252 {
253 /* XXX you know it's bad when i915 has this blank too */
254 /* XXX and even worse, I have no idea WTF the bitfield is */
255 }
256
257 static void
258 r300_set_framebuffer_state(struct pipe_context* pipe,
259 const struct pipe_framebuffer_state* state)
260 {
261 struct r300_context* r300 = r300_context(pipe);
262
263 draw_flush(r300->draw);
264
265 r300->framebuffer_state = *state;
266
267 r300->dirty_state |= R300_NEW_FRAMEBUFFERS;
268 }
269
270 /* Create fragment shader state. */
271 static void* r300_create_fs_state(struct pipe_context* pipe,
272 const struct pipe_shader_state* shader)
273 {
274 struct r300_fragment_shader* fs = NULL;
275
276 fs = (struct r300_fragment_shader*)CALLOC_STRUCT(r300_fragment_shader);
277
278 /* Copy state directly into shader. */
279 fs->state = *shader;
280 fs->state.tokens = tgsi_dup_tokens(shader->tokens);
281
282 tgsi_scan_shader(shader->tokens, &fs->info);
283
284 return (void*)fs;
285 }
286
287 /* Bind fragment shader state. */
288 static void r300_bind_fs_state(struct pipe_context* pipe, void* shader)
289 {
290 struct r300_context* r300 = r300_context(pipe);
291 struct r300_fragment_shader* fs = (struct r300_fragment_shader*)shader;
292
293 if (fs == NULL) {
294 r300->fs = NULL;
295 return;
296 } else if (!fs->translated) {
297 r300_translate_fragment_shader(r300, fs);
298 }
299
300 r300->fs = fs;
301
302 r300->dirty_state |= R300_NEW_FRAGMENT_SHADER;
303 }
304
305 /* Delete fragment shader state. */
306 static void r300_delete_fs_state(struct pipe_context* pipe, void* shader)
307 {
308 struct r300_fragment_shader* fs = (struct r300_fragment_shader*)shader;
309 rc_constants_destroy(&fs->code.constants);
310 FREE(fs->state.tokens);
311 FREE(shader);
312 }
313
314 static void r300_set_polygon_stipple(struct pipe_context* pipe,
315 const struct pipe_poly_stipple* state)
316 {
317 /* XXX no idea how to set this up, but not terribly important */
318 }
319
320 /* Create a new rasterizer state based on the CSO rasterizer state.
321 *
322 * This is a very large chunk of state, and covers most of the graphics
323 * backend (GB), geometry assembly (GA), and setup unit (SU) blocks.
324 *
325 * In a not entirely unironic sidenote, this state has nearly nothing to do
326 * with the actual block on the Radeon called the rasterizer (RS). */
327 static void* r300_create_rs_state(struct pipe_context* pipe,
328 const struct pipe_rasterizer_state* state)
329 {
330 struct r300_rs_state* rs = CALLOC_STRUCT(r300_rs_state);
331
332 /* Copy rasterizer state for Draw. */
333 rs->rs = *state;
334
335 rs->enable_vte = !state->bypass_vs_clip_and_viewport;
336
337 #ifdef PIPE_ARCH_LITTLE_ENDIAN
338 rs->vap_control_status = R300_VC_NO_SWAP;
339 #else
340 rs->vap_control_status = R300_VC_32BIT_SWAP;
341 #endif
342
343 /* If bypassing TCL, or if no TCL engine is present, turn off the HW TCL.
344 * Else, enable HW TCL and force Draw's TCL off. */
345 if (state->bypass_vs_clip_and_viewport ||
346 !r300_screen(pipe->screen)->caps->has_tcl) {
347 rs->vap_control_status |= R300_VAP_TCL_BYPASS;
348 } else {
349 rs->rs.bypass_vs_clip_and_viewport = TRUE;
350 }
351
352 rs->point_size = pack_float_16_6x(state->point_size) |
353 (pack_float_16_6x(state->point_size) << R300_POINTSIZE_X_SHIFT);
354
355 rs->point_minmax =
356 ((int)(state->point_size_min * 6.0) <<
357 R300_GA_POINT_MINMAX_MIN_SHIFT) |
358 ((int)(state->point_size_max * 6.0) <<
359 R300_GA_POINT_MINMAX_MAX_SHIFT);
360
361 rs->line_control = pack_float_16_6x(state->line_width) |
362 R300_GA_LINE_CNTL_END_TYPE_COMP;
363
364 /* Radeons don't think in "CW/CCW", they think in "front/back". */
365 if (state->front_winding == PIPE_WINDING_CW) {
366 rs->cull_mode = R300_FRONT_FACE_CW;
367
368 if (state->offset_cw) {
369 rs->polygon_offset_enable |= R300_FRONT_ENABLE;
370 }
371 if (state->offset_ccw) {
372 rs->polygon_offset_enable |= R300_BACK_ENABLE;
373 }
374 } else {
375 rs->cull_mode = R300_FRONT_FACE_CCW;
376
377 if (state->offset_ccw) {
378 rs->polygon_offset_enable |= R300_FRONT_ENABLE;
379 }
380 if (state->offset_cw) {
381 rs->polygon_offset_enable |= R300_BACK_ENABLE;
382 }
383 }
384 if (state->front_winding & state->cull_mode) {
385 rs->cull_mode |= R300_CULL_FRONT;
386 }
387 if (~(state->front_winding) & state->cull_mode) {
388 rs->cull_mode |= R300_CULL_BACK;
389 }
390
391 if (rs->polygon_offset_enable) {
392 rs->depth_offset_front = rs->depth_offset_back =
393 fui(state->offset_units);
394 rs->depth_scale_front = rs->depth_scale_back =
395 fui(state->offset_scale);
396 }
397
398 if (state->line_stipple_enable) {
399 rs->line_stipple_config =
400 R300_GA_LINE_STIPPLE_CONFIG_LINE_RESET_LINE |
401 (fui((float)state->line_stipple_factor) &
402 R300_GA_LINE_STIPPLE_CONFIG_STIPPLE_SCALE_MASK);
403 /* XXX this might need to be scaled up */
404 rs->line_stipple_value = state->line_stipple_pattern;
405 }
406
407 if (state->flatshade) {
408 rs->color_control = R300_SHADE_MODEL_FLAT;
409 } else {
410 rs->color_control = R300_SHADE_MODEL_SMOOTH;
411 }
412
413 if (!state->flatshade_first) {
414 rs->color_control |= R300_GA_COLOR_CONTROL_PROVOKING_VERTEX_LAST;
415 }
416
417 return (void*)rs;
418 }
419
420 /* Bind rasterizer state. */
421 static void r300_bind_rs_state(struct pipe_context* pipe, void* state)
422 {
423 struct r300_context* r300 = r300_context(pipe);
424 struct r300_rs_state* rs = (struct r300_rs_state*)state;
425
426 draw_flush(r300->draw);
427 draw_set_rasterizer_state(r300->draw, &rs->rs);
428
429 r300->rs_state = rs;
430 r300->dirty_state |= R300_NEW_RASTERIZER;
431 }
432
433 /* Free rasterizer state. */
434 static void r300_delete_rs_state(struct pipe_context* pipe, void* state)
435 {
436 FREE(state);
437 }
438
439 static void*
440 r300_create_sampler_state(struct pipe_context* pipe,
441 const struct pipe_sampler_state* state)
442 {
443 struct r300_context* r300 = r300_context(pipe);
444 struct r300_sampler_state* sampler = CALLOC_STRUCT(r300_sampler_state);
445 int lod_bias;
446
447 sampler->filter0 |=
448 (r300_translate_wrap(state->wrap_s) << R300_TX_WRAP_S_SHIFT) |
449 (r300_translate_wrap(state->wrap_t) << R300_TX_WRAP_T_SHIFT) |
450 (r300_translate_wrap(state->wrap_r) << R300_TX_WRAP_R_SHIFT);
451
452 sampler->filter0 |= r300_translate_tex_filters(state->min_img_filter,
453 state->mag_img_filter,
454 state->min_mip_filter);
455
456 lod_bias = CLAMP((int)(state->lod_bias * 32), -(1 << 9), (1 << 9) - 1);
457
458 sampler->filter1 |= lod_bias << R300_LOD_BIAS_SHIFT;
459
460 sampler->filter1 |= r300_anisotropy(state->max_anisotropy);
461
462 util_pack_color(state->border_color, PIPE_FORMAT_A8R8G8B8_UNORM,
463 &sampler->border_color);
464
465 /* R500-specific fixups and optimizations */
466 if (r300_screen(r300->context.screen)->caps->is_r500) {
467 sampler->filter1 |= R500_BORDER_FIX;
468 }
469
470 return (void*)sampler;
471 }
472
473 static void r300_bind_sampler_states(struct pipe_context* pipe,
474 unsigned count,
475 void** states)
476 {
477 struct r300_context* r300 = r300_context(pipe);
478 int i;
479
480 if (count > 8) {
481 return;
482 }
483
484 for (i = 0; i < count; i++) {
485 if (r300->sampler_states[i] != states[i]) {
486 r300->sampler_states[i] = (struct r300_sampler_state*)states[i];
487 r300->dirty_state |= (R300_NEW_SAMPLER << i);
488 }
489 }
490
491 r300->sampler_count = count;
492 }
493
494 static void r300_delete_sampler_state(struct pipe_context* pipe, void* state)
495 {
496 FREE(state);
497 }
498
499 static void r300_set_sampler_textures(struct pipe_context* pipe,
500 unsigned count,
501 struct pipe_texture** texture)
502 {
503 struct r300_context* r300 = r300_context(pipe);
504 int i;
505
506 /* XXX magic num */
507 if (count > 8) {
508 return;
509 }
510
511 for (i = 0; i < count; i++) {
512 if (r300->textures[i] != (struct r300_texture*)texture[i]) {
513 pipe_texture_reference((struct pipe_texture**)&r300->textures[i],
514 texture[i]);
515 r300->dirty_state |= (R300_NEW_TEXTURE << i);
516 }
517 }
518
519 for (i = count; i < 8; i++) {
520 if (r300->textures[i]) {
521 pipe_texture_reference((struct pipe_texture**)&r300->textures[i],
522 NULL);
523 r300->dirty_state |= (R300_NEW_TEXTURE << i);
524 }
525 }
526
527 r300->texture_count = count;
528 }
529
530 static void r300_set_scissor_state(struct pipe_context* pipe,
531 const struct pipe_scissor_state* state)
532 {
533 struct r300_context* r300 = r300_context(pipe);
534
535 if (r300_screen(r300->context.screen)->caps->is_r500) {
536 r300->scissor_state->scissor_top_left =
537 (state->minx << R300_SCISSORS_X_SHIFT) |
538 (state->miny << R300_SCISSORS_Y_SHIFT);
539 r300->scissor_state->scissor_bottom_right =
540 (state->maxx << R300_SCISSORS_X_SHIFT) |
541 (state->maxy << R300_SCISSORS_Y_SHIFT);
542 } else {
543 /* Offset of 1440 in non-R500 chipsets. */
544 r300->scissor_state->scissor_top_left =
545 ((state->minx + 1440) << R300_SCISSORS_X_SHIFT) |
546 ((state->miny + 1440) << R300_SCISSORS_Y_SHIFT);
547 r300->scissor_state->scissor_bottom_right =
548 ((state->maxx + 1440) << R300_SCISSORS_X_SHIFT) |
549 ((state->maxy + 1440) << R300_SCISSORS_Y_SHIFT);
550 }
551
552 r300->dirty_state |= R300_NEW_SCISSOR;
553 }
554
555 static void r300_set_viewport_state(struct pipe_context* pipe,
556 const struct pipe_viewport_state* state)
557 {
558 struct r300_context* r300 = r300_context(pipe);
559
560 /* Do the transform in HW. */
561 r300->viewport_state->vte_control = R300_VTX_W0_FMT;
562
563 if (state->scale[0] != 1.0f) {
564 assert(state->scale[0] != 0.0f);
565 r300->viewport_state->xscale = state->scale[0];
566 r300->viewport_state->vte_control |= R300_VPORT_X_SCALE_ENA;
567 }
568 if (state->scale[1] != 1.0f) {
569 assert(state->scale[1] != 0.0f);
570 r300->viewport_state->yscale = state->scale[1];
571 r300->viewport_state->vte_control |= R300_VPORT_Y_SCALE_ENA;
572 }
573 if (state->scale[2] != 1.0f) {
574 assert(state->scale[2] != 0.0f);
575 r300->viewport_state->zscale = state->scale[2];
576 r300->viewport_state->vte_control |= R300_VPORT_Z_SCALE_ENA;
577 }
578 if (state->translate[0] != 0.0f) {
579 r300->viewport_state->xoffset = state->translate[0];
580 r300->viewport_state->vte_control |= R300_VPORT_X_OFFSET_ENA;
581 }
582 if (state->translate[1] != 0.0f) {
583 r300->viewport_state->yoffset = state->translate[1];
584 r300->viewport_state->vte_control |= R300_VPORT_Y_OFFSET_ENA;
585 }
586 if (state->translate[2] != 0.0f) {
587 r300->viewport_state->zoffset = state->translate[2];
588 r300->viewport_state->vte_control |= R300_VPORT_Z_OFFSET_ENA;
589 }
590
591 r300->dirty_state |= R300_NEW_VIEWPORT;
592 }
593
594 static void r300_set_vertex_buffers(struct pipe_context* pipe,
595 unsigned count,
596 const struct pipe_vertex_buffer* buffers)
597 {
598 struct r300_context* r300 = r300_context(pipe);
599
600 memcpy(r300->vertex_buffers, buffers,
601 sizeof(struct pipe_vertex_buffer) * count);
602
603 r300->vertex_buffer_count = count;
604
605 draw_flush(r300->draw);
606 draw_set_vertex_buffers(r300->draw, count, buffers);
607 }
608
609 static void r300_set_vertex_elements(struct pipe_context* pipe,
610 unsigned count,
611 const struct pipe_vertex_element* elements)
612 {
613 struct r300_context* r300 = r300_context(pipe);
614
615 draw_flush(r300->draw);
616 draw_set_vertex_elements(r300->draw, count, elements);
617 }
618
619 static void* r300_create_vs_state(struct pipe_context* pipe,
620 const struct pipe_shader_state* shader)
621 {
622 struct r300_context* r300 = r300_context(pipe);
623
624 if (r300_screen(pipe->screen)->caps->has_tcl) {
625 struct r300_vertex_shader* vs = CALLOC_STRUCT(r300_vertex_shader);
626 /* Copy state directly into shader. */
627 vs->state = *shader;
628 vs->state.tokens = tgsi_dup_tokens(shader->tokens);
629
630 tgsi_scan_shader(shader->tokens, &vs->info);
631
632 /* Appease Draw. */
633 vs->draw = draw_create_vertex_shader(r300->draw, shader);
634
635 return (void*)vs;
636 } else {
637 return draw_create_vertex_shader(r300->draw, shader);
638 }
639 }
640
641 static void r300_bind_vs_state(struct pipe_context* pipe, void* shader)
642 {
643 struct r300_context* r300 = r300_context(pipe);
644
645 draw_flush(r300->draw);
646
647 if (r300_screen(pipe->screen)->caps->has_tcl) {
648 struct r300_vertex_shader* vs = (struct r300_vertex_shader*)shader;
649
650 if (vs == NULL) {
651 r300->vs = NULL;
652 return;
653 } else if (!vs->translated) {
654 r300_translate_vertex_shader(r300, vs);
655 }
656
657 draw_bind_vertex_shader(r300->draw, vs->draw);
658 r300->vs = vs;
659 r300->dirty_state |= R300_NEW_VERTEX_SHADER;
660 } else {
661 draw_bind_vertex_shader(r300->draw,
662 (struct draw_vertex_shader*)shader);
663 }
664 }
665
666 static void r300_delete_vs_state(struct pipe_context* pipe, void* shader)
667 {
668 struct r300_context* r300 = r300_context(pipe);
669
670 if (r300_screen(pipe->screen)->caps->has_tcl) {
671 struct r300_vertex_shader* vs = (struct r300_vertex_shader*)shader;
672
673 rc_constants_destroy(&vs->code.constants);
674 draw_delete_vertex_shader(r300->draw, vs->draw);
675 FREE(vs->state.tokens);
676 FREE(shader);
677 } else {
678 draw_delete_vertex_shader(r300->draw,
679 (struct draw_vertex_shader*)shader);
680 }
681 }
682
683 void r300_init_state_functions(struct r300_context* r300)
684 {
685 r300->context.create_blend_state = r300_create_blend_state;
686 r300->context.bind_blend_state = r300_bind_blend_state;
687 r300->context.delete_blend_state = r300_delete_blend_state;
688
689 r300->context.set_blend_color = r300_set_blend_color;
690
691 r300->context.set_clip_state = r300_set_clip_state;
692
693 r300->context.set_constant_buffer = r300_set_constant_buffer;
694
695 r300->context.create_depth_stencil_alpha_state = r300_create_dsa_state;
696 r300->context.bind_depth_stencil_alpha_state = r300_bind_dsa_state;
697 r300->context.delete_depth_stencil_alpha_state = r300_delete_dsa_state;
698
699 r300->context.set_edgeflags = r300_set_edgeflags;
700
701 r300->context.set_framebuffer_state = r300_set_framebuffer_state;
702
703 r300->context.create_fs_state = r300_create_fs_state;
704 r300->context.bind_fs_state = r300_bind_fs_state;
705 r300->context.delete_fs_state = r300_delete_fs_state;
706
707 r300->context.set_polygon_stipple = r300_set_polygon_stipple;
708
709 r300->context.create_rasterizer_state = r300_create_rs_state;
710 r300->context.bind_rasterizer_state = r300_bind_rs_state;
711 r300->context.delete_rasterizer_state = r300_delete_rs_state;
712
713 r300->context.create_sampler_state = r300_create_sampler_state;
714 r300->context.bind_sampler_states = r300_bind_sampler_states;
715 r300->context.delete_sampler_state = r300_delete_sampler_state;
716
717 r300->context.set_sampler_textures = r300_set_sampler_textures;
718
719 r300->context.set_scissor_state = r300_set_scissor_state;
720
721 r300->context.set_viewport_state = r300_set_viewport_state;
722
723 r300->context.set_vertex_buffers = r300_set_vertex_buffers;
724 r300->context.set_vertex_elements = r300_set_vertex_elements;
725
726 r300->context.create_vs_state = r300_create_vs_state;
727 r300->context.bind_vs_state = r300_bind_vs_state;
728 r300->context.delete_vs_state = r300_delete_vs_state;
729 }