gallium/u_blitter: add gallium blit implementation
[mesa.git] / src / gallium / drivers / r300 / r300_state.c
1 /*
2 * Copyright 2008 Corbin Simpson <MostAwesomeDude@gmail.com>
3 * Copyright 2009 Marek Olšák <maraeo@gmail.com>
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * on the rights to use, copy, modify, merge, publish, distribute, sub
9 * license, and/or sell copies of the Software, and to permit persons to whom
10 * the Software is furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
14 * Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
20 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
21 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
22 * USE OR OTHER DEALINGS IN THE SOFTWARE. */
23
24 #include "draw/draw_context.h"
25
26 #include "util/u_framebuffer.h"
27 #include "util/u_half.h"
28 #include "util/u_math.h"
29 #include "util/u_mm.h"
30 #include "util/u_memory.h"
31 #include "util/u_pack_color.h"
32 #include "util/u_transfer.h"
33
34 #include "tgsi/tgsi_parse.h"
35
36 #include "pipe/p_config.h"
37
38 #include "r300_cb.h"
39 #include "r300_context.h"
40 #include "r300_emit.h"
41 #include "r300_reg.h"
42 #include "r300_screen.h"
43 #include "r300_screen_buffer.h"
44 #include "r300_state_inlines.h"
45 #include "r300_fs.h"
46 #include "r300_texture.h"
47 #include "r300_vs.h"
48
49 /* r300_state: Functions used to intialize state context by translating
50 * Gallium state objects into semi-native r300 state objects. */
51
52 #define UPDATE_STATE(cso, atom) \
53 if (cso != atom.state) { \
54 atom.state = cso; \
55 r300_mark_atom_dirty(r300, &(atom)); \
56 }
57
58 static boolean blend_discard_if_src_alpha_0(unsigned srcRGB, unsigned srcA,
59 unsigned dstRGB, unsigned dstA)
60 {
61 /* If the blend equation is ADD or REVERSE_SUBTRACT,
62 * SRC_ALPHA == 0, and the following state is set, the colorbuffer
63 * will not be changed.
64 * Notice that the dst factors are the src factors inverted. */
65 return (srcRGB == PIPE_BLENDFACTOR_SRC_ALPHA ||
66 srcRGB == PIPE_BLENDFACTOR_SRC_ALPHA_SATURATE ||
67 srcRGB == PIPE_BLENDFACTOR_ZERO) &&
68 (srcA == PIPE_BLENDFACTOR_SRC_COLOR ||
69 srcA == PIPE_BLENDFACTOR_SRC_ALPHA ||
70 srcA == PIPE_BLENDFACTOR_SRC_ALPHA_SATURATE ||
71 srcA == PIPE_BLENDFACTOR_ZERO) &&
72 (dstRGB == PIPE_BLENDFACTOR_INV_SRC_ALPHA ||
73 dstRGB == PIPE_BLENDFACTOR_ONE) &&
74 (dstA == PIPE_BLENDFACTOR_INV_SRC_COLOR ||
75 dstA == PIPE_BLENDFACTOR_INV_SRC_ALPHA ||
76 dstA == PIPE_BLENDFACTOR_ONE);
77 }
78
79 static boolean blend_discard_if_src_alpha_1(unsigned srcRGB, unsigned srcA,
80 unsigned dstRGB, unsigned dstA)
81 {
82 /* If the blend equation is ADD or REVERSE_SUBTRACT,
83 * SRC_ALPHA == 1, and the following state is set, the colorbuffer
84 * will not be changed.
85 * Notice that the dst factors are the src factors inverted. */
86 return (srcRGB == PIPE_BLENDFACTOR_INV_SRC_ALPHA ||
87 srcRGB == PIPE_BLENDFACTOR_ZERO) &&
88 (srcA == PIPE_BLENDFACTOR_INV_SRC_COLOR ||
89 srcA == PIPE_BLENDFACTOR_INV_SRC_ALPHA ||
90 srcA == PIPE_BLENDFACTOR_ZERO) &&
91 (dstRGB == PIPE_BLENDFACTOR_SRC_ALPHA ||
92 dstRGB == PIPE_BLENDFACTOR_ONE) &&
93 (dstA == PIPE_BLENDFACTOR_SRC_COLOR ||
94 dstA == PIPE_BLENDFACTOR_SRC_ALPHA ||
95 dstA == PIPE_BLENDFACTOR_ONE);
96 }
97
98 static boolean blend_discard_if_src_color_0(unsigned srcRGB, unsigned srcA,
99 unsigned dstRGB, unsigned dstA)
100 {
101 /* If the blend equation is ADD or REVERSE_SUBTRACT,
102 * SRC_COLOR == (0,0,0), and the following state is set, the colorbuffer
103 * will not be changed.
104 * Notice that the dst factors are the src factors inverted. */
105 return (srcRGB == PIPE_BLENDFACTOR_SRC_COLOR ||
106 srcRGB == PIPE_BLENDFACTOR_ZERO) &&
107 (srcA == PIPE_BLENDFACTOR_ZERO) &&
108 (dstRGB == PIPE_BLENDFACTOR_INV_SRC_COLOR ||
109 dstRGB == PIPE_BLENDFACTOR_ONE) &&
110 (dstA == PIPE_BLENDFACTOR_ONE);
111 }
112
113 static boolean blend_discard_if_src_color_1(unsigned srcRGB, unsigned srcA,
114 unsigned dstRGB, unsigned dstA)
115 {
116 /* If the blend equation is ADD or REVERSE_SUBTRACT,
117 * SRC_COLOR == (1,1,1), and the following state is set, the colorbuffer
118 * will not be changed.
119 * Notice that the dst factors are the src factors inverted. */
120 return (srcRGB == PIPE_BLENDFACTOR_INV_SRC_COLOR ||
121 srcRGB == PIPE_BLENDFACTOR_ZERO) &&
122 (srcA == PIPE_BLENDFACTOR_ZERO) &&
123 (dstRGB == PIPE_BLENDFACTOR_SRC_COLOR ||
124 dstRGB == PIPE_BLENDFACTOR_ONE) &&
125 (dstA == PIPE_BLENDFACTOR_ONE);
126 }
127
128 static boolean blend_discard_if_src_alpha_color_0(unsigned srcRGB, unsigned srcA,
129 unsigned dstRGB, unsigned dstA)
130 {
131 /* If the blend equation is ADD or REVERSE_SUBTRACT,
132 * SRC_ALPHA_COLOR == (0,0,0,0), and the following state is set,
133 * the colorbuffer will not be changed.
134 * Notice that the dst factors are the src factors inverted. */
135 return (srcRGB == PIPE_BLENDFACTOR_SRC_COLOR ||
136 srcRGB == PIPE_BLENDFACTOR_SRC_ALPHA ||
137 srcRGB == PIPE_BLENDFACTOR_SRC_ALPHA_SATURATE ||
138 srcRGB == PIPE_BLENDFACTOR_ZERO) &&
139 (srcA == PIPE_BLENDFACTOR_SRC_COLOR ||
140 srcA == PIPE_BLENDFACTOR_SRC_ALPHA ||
141 srcA == PIPE_BLENDFACTOR_SRC_ALPHA_SATURATE ||
142 srcA == PIPE_BLENDFACTOR_ZERO) &&
143 (dstRGB == PIPE_BLENDFACTOR_INV_SRC_COLOR ||
144 dstRGB == PIPE_BLENDFACTOR_INV_SRC_ALPHA ||
145 dstRGB == PIPE_BLENDFACTOR_ONE) &&
146 (dstA == PIPE_BLENDFACTOR_INV_SRC_COLOR ||
147 dstA == PIPE_BLENDFACTOR_INV_SRC_ALPHA ||
148 dstA == PIPE_BLENDFACTOR_ONE);
149 }
150
151 static boolean blend_discard_if_src_alpha_color_1(unsigned srcRGB, unsigned srcA,
152 unsigned dstRGB, unsigned dstA)
153 {
154 /* If the blend equation is ADD or REVERSE_SUBTRACT,
155 * SRC_ALPHA_COLOR == (1,1,1,1), and the following state is set,
156 * the colorbuffer will not be changed.
157 * Notice that the dst factors are the src factors inverted. */
158 return (srcRGB == PIPE_BLENDFACTOR_INV_SRC_COLOR ||
159 srcRGB == PIPE_BLENDFACTOR_INV_SRC_ALPHA ||
160 srcRGB == PIPE_BLENDFACTOR_ZERO) &&
161 (srcA == PIPE_BLENDFACTOR_INV_SRC_COLOR ||
162 srcA == PIPE_BLENDFACTOR_INV_SRC_ALPHA ||
163 srcA == PIPE_BLENDFACTOR_ZERO) &&
164 (dstRGB == PIPE_BLENDFACTOR_SRC_COLOR ||
165 dstRGB == PIPE_BLENDFACTOR_SRC_ALPHA ||
166 dstRGB == PIPE_BLENDFACTOR_ONE) &&
167 (dstA == PIPE_BLENDFACTOR_SRC_COLOR ||
168 dstA == PIPE_BLENDFACTOR_SRC_ALPHA ||
169 dstA == PIPE_BLENDFACTOR_ONE);
170 }
171
172 /* The hardware colormask is clunky a must be swizzled depending on the format.
173 * This was figured out by trial-and-error. */
174 static unsigned bgra_cmask(unsigned mask)
175 {
176 return ((mask & PIPE_MASK_R) << 2) |
177 ((mask & PIPE_MASK_B) >> 2) |
178 (mask & (PIPE_MASK_G | PIPE_MASK_A));
179 }
180
181 static unsigned rgba_cmask(unsigned mask)
182 {
183 return mask & PIPE_MASK_RGBA;
184 }
185
186 static unsigned rrrr_cmask(unsigned mask)
187 {
188 return (mask & PIPE_MASK_R) |
189 ((mask & PIPE_MASK_R) << 1) |
190 ((mask & PIPE_MASK_R) << 2) |
191 ((mask & PIPE_MASK_R) << 3);
192 }
193
194 static unsigned aaaa_cmask(unsigned mask)
195 {
196 return ((mask & PIPE_MASK_A) >> 3) |
197 ((mask & PIPE_MASK_A) >> 2) |
198 ((mask & PIPE_MASK_A) >> 1) |
199 (mask & PIPE_MASK_A);
200 }
201
202 static unsigned grrg_cmask(unsigned mask)
203 {
204 return ((mask & PIPE_MASK_R) << 1) |
205 ((mask & PIPE_MASK_R) << 2) |
206 ((mask & PIPE_MASK_G) >> 1) |
207 ((mask & PIPE_MASK_G) << 2);
208 }
209
210 static unsigned arra_cmask(unsigned mask)
211 {
212 return ((mask & PIPE_MASK_R) << 1) |
213 ((mask & PIPE_MASK_R) << 2) |
214 ((mask & PIPE_MASK_A) >> 3) |
215 (mask & PIPE_MASK_A);
216 }
217
218 /* Create a new blend state based on the CSO blend state.
219 *
220 * This encompasses alpha blending, logic/raster ops, and blend dithering. */
221 static void* r300_create_blend_state(struct pipe_context* pipe,
222 const struct pipe_blend_state* state)
223 {
224 struct r300_screen* r300screen = r300_screen(pipe->screen);
225 struct r300_blend_state* blend = CALLOC_STRUCT(r300_blend_state);
226 uint32_t blend_control = 0; /* R300_RB3D_CBLEND: 0x4e04 */
227 uint32_t blend_control_noclamp = 0; /* R300_RB3D_CBLEND: 0x4e04 */
228 uint32_t alpha_blend_control = 0; /* R300_RB3D_ABLEND: 0x4e08 */
229 uint32_t alpha_blend_control_noclamp = 0; /* R300_RB3D_ABLEND: 0x4e08 */
230 uint32_t rop = 0; /* R300_RB3D_ROPCNTL: 0x4e18 */
231 uint32_t dither = 0; /* R300_RB3D_DITHER_CTL: 0x4e50 */
232 int i;
233 CB_LOCALS;
234
235 blend->state = *state;
236
237 if (state->rt[0].blend_enable)
238 {
239 unsigned eqRGB = state->rt[0].rgb_func;
240 unsigned srcRGB = state->rt[0].rgb_src_factor;
241 unsigned dstRGB = state->rt[0].rgb_dst_factor;
242
243 unsigned eqA = state->rt[0].alpha_func;
244 unsigned srcA = state->rt[0].alpha_src_factor;
245 unsigned dstA = state->rt[0].alpha_dst_factor;
246
247 /* despite the name, ALPHA_BLEND_ENABLE has nothing to do with alpha,
248 * this is just the crappy D3D naming */
249 blend_control = blend_control_noclamp =
250 R300_ALPHA_BLEND_ENABLE |
251 ( r300_translate_blend_factor(srcRGB) << R300_SRC_BLEND_SHIFT) |
252 ( r300_translate_blend_factor(dstRGB) << R300_DST_BLEND_SHIFT);
253 blend_control |=
254 r300_translate_blend_function(eqRGB, TRUE);
255 blend_control_noclamp |=
256 r300_translate_blend_function(eqRGB, FALSE);
257
258 /* Optimization: some operations do not require the destination color.
259 *
260 * When SRC_ALPHA_SATURATE is used, colorbuffer reads must be enabled,
261 * otherwise blending gives incorrect results. It seems to be
262 * a hardware bug. */
263 if (eqRGB == PIPE_BLEND_MIN || eqA == PIPE_BLEND_MIN ||
264 eqRGB == PIPE_BLEND_MAX || eqA == PIPE_BLEND_MAX ||
265 dstRGB != PIPE_BLENDFACTOR_ZERO ||
266 dstA != PIPE_BLENDFACTOR_ZERO ||
267 srcRGB == PIPE_BLENDFACTOR_DST_COLOR ||
268 srcRGB == PIPE_BLENDFACTOR_DST_ALPHA ||
269 srcRGB == PIPE_BLENDFACTOR_INV_DST_COLOR ||
270 srcRGB == PIPE_BLENDFACTOR_INV_DST_ALPHA ||
271 srcA == PIPE_BLENDFACTOR_DST_COLOR ||
272 srcA == PIPE_BLENDFACTOR_DST_ALPHA ||
273 srcA == PIPE_BLENDFACTOR_INV_DST_COLOR ||
274 srcA == PIPE_BLENDFACTOR_INV_DST_ALPHA ||
275 srcRGB == PIPE_BLENDFACTOR_SRC_ALPHA_SATURATE) {
276 /* Enable reading from the colorbuffer. */
277 blend_control |= R300_READ_ENABLE;
278 blend_control_noclamp |= R300_READ_ENABLE;
279
280 if (r300screen->caps.is_r500) {
281 /* Optimization: Depending on incoming pixels, we can
282 * conditionally disable the reading in hardware... */
283 if (eqRGB != PIPE_BLEND_MIN && eqA != PIPE_BLEND_MIN &&
284 eqRGB != PIPE_BLEND_MAX && eqA != PIPE_BLEND_MAX) {
285 /* Disable reading if SRC_ALPHA == 0. */
286 if ((dstRGB == PIPE_BLENDFACTOR_SRC_ALPHA ||
287 dstRGB == PIPE_BLENDFACTOR_ZERO) &&
288 (dstA == PIPE_BLENDFACTOR_SRC_COLOR ||
289 dstA == PIPE_BLENDFACTOR_SRC_ALPHA ||
290 dstA == PIPE_BLENDFACTOR_ZERO)) {
291 blend_control |= R500_SRC_ALPHA_0_NO_READ;
292 }
293
294 /* Disable reading if SRC_ALPHA == 1. */
295 if ((dstRGB == PIPE_BLENDFACTOR_INV_SRC_ALPHA ||
296 dstRGB == PIPE_BLENDFACTOR_ZERO) &&
297 (dstA == PIPE_BLENDFACTOR_INV_SRC_COLOR ||
298 dstA == PIPE_BLENDFACTOR_INV_SRC_ALPHA ||
299 dstA == PIPE_BLENDFACTOR_ZERO)) {
300 blend_control |= R500_SRC_ALPHA_1_NO_READ;
301 }
302 }
303 }
304 }
305
306 /* Optimization: discard pixels which don't change the colorbuffer.
307 *
308 * The code below is non-trivial and some math is involved.
309 *
310 * Discarding pixels must be disabled when FP16 AA is enabled.
311 * This is a hardware bug. Also, this implementation wouldn't work
312 * with FP blending enabled and equation clamping disabled.
313 *
314 * Equations other than ADD are rarely used and therefore won't be
315 * optimized. */
316 if ((eqRGB == PIPE_BLEND_ADD || eqRGB == PIPE_BLEND_REVERSE_SUBTRACT) &&
317 (eqA == PIPE_BLEND_ADD || eqA == PIPE_BLEND_REVERSE_SUBTRACT)) {
318 /* ADD: X+Y
319 * REVERSE_SUBTRACT: Y-X
320 *
321 * The idea is:
322 * If X = src*srcFactor = 0 and Y = dst*dstFactor = 1,
323 * then CB will not be changed.
324 *
325 * Given the srcFactor and dstFactor variables, we can derive
326 * what src and dst should be equal to and discard appropriate
327 * pixels.
328 */
329 if (blend_discard_if_src_alpha_0(srcRGB, srcA, dstRGB, dstA)) {
330 blend_control |= R300_DISCARD_SRC_PIXELS_SRC_ALPHA_0;
331 } else if (blend_discard_if_src_alpha_1(srcRGB, srcA,
332 dstRGB, dstA)) {
333 blend_control |= R300_DISCARD_SRC_PIXELS_SRC_ALPHA_1;
334 } else if (blend_discard_if_src_color_0(srcRGB, srcA,
335 dstRGB, dstA)) {
336 blend_control |= R300_DISCARD_SRC_PIXELS_SRC_COLOR_0;
337 } else if (blend_discard_if_src_color_1(srcRGB, srcA,
338 dstRGB, dstA)) {
339 blend_control |= R300_DISCARD_SRC_PIXELS_SRC_COLOR_1;
340 } else if (blend_discard_if_src_alpha_color_0(srcRGB, srcA,
341 dstRGB, dstA)) {
342 blend_control |=
343 R300_DISCARD_SRC_PIXELS_SRC_ALPHA_COLOR_0;
344 } else if (blend_discard_if_src_alpha_color_1(srcRGB, srcA,
345 dstRGB, dstA)) {
346 blend_control |=
347 R300_DISCARD_SRC_PIXELS_SRC_ALPHA_COLOR_1;
348 }
349 }
350
351 /* separate alpha */
352 if (srcA != srcRGB || dstA != dstRGB || eqA != eqRGB) {
353 blend_control |= R300_SEPARATE_ALPHA_ENABLE;
354 blend_control_noclamp |= R300_SEPARATE_ALPHA_ENABLE;
355 alpha_blend_control = alpha_blend_control_noclamp =
356 (r300_translate_blend_factor(srcA) << R300_SRC_BLEND_SHIFT) |
357 (r300_translate_blend_factor(dstA) << R300_DST_BLEND_SHIFT);
358 alpha_blend_control |=
359 r300_translate_blend_function(eqA, TRUE);
360 alpha_blend_control_noclamp |=
361 r300_translate_blend_function(eqA, FALSE);
362 }
363 }
364
365 /* PIPE_LOGICOP_* don't need to be translated, fortunately. */
366 if (state->logicop_enable) {
367 rop = R300_RB3D_ROPCNTL_ROP_ENABLE |
368 (state->logicop_func) << R300_RB3D_ROPCNTL_ROP_SHIFT;
369 }
370
371 /* Neither fglrx nor classic r300 ever set this, regardless of dithering
372 * state. Since it's an optional implementation detail, we can leave it
373 * out and never dither.
374 *
375 * This could be revisited if we ever get quality or conformance hints.
376 *
377 if (state->dither) {
378 dither = R300_RB3D_DITHER_CTL_DITHER_MODE_LUT |
379 R300_RB3D_DITHER_CTL_ALPHA_DITHER_MODE_LUT;
380 }
381 */
382
383 /* Build a command buffer. */
384 {
385 unsigned (*func[COLORMASK_NUM_SWIZZLES])(unsigned) = {
386 bgra_cmask,
387 rgba_cmask,
388 rrrr_cmask,
389 aaaa_cmask,
390 grrg_cmask,
391 arra_cmask
392 };
393
394 for (i = 0; i < COLORMASK_NUM_SWIZZLES; i++) {
395 BEGIN_CB(blend->cb_clamp[i], 8);
396 OUT_CB_REG(R300_RB3D_ROPCNTL, rop);
397 OUT_CB_REG_SEQ(R300_RB3D_CBLEND, 3);
398 OUT_CB(blend_control);
399 OUT_CB(alpha_blend_control);
400 OUT_CB(func[i](state->rt[0].colormask));
401 OUT_CB_REG(R300_RB3D_DITHER_CTL, dither);
402 END_CB;
403 }
404 }
405
406 /* Build a command buffer. */
407 BEGIN_CB(blend->cb_noclamp, 8);
408 OUT_CB_REG(R300_RB3D_ROPCNTL, rop);
409 OUT_CB_REG_SEQ(R300_RB3D_CBLEND, 3);
410 OUT_CB(blend_control_noclamp);
411 OUT_CB(alpha_blend_control_noclamp);
412 OUT_CB(rgba_cmask(state->rt[0].colormask));
413 OUT_CB_REG(R300_RB3D_DITHER_CTL, dither);
414 END_CB;
415
416 /* The same as above, but with no colorbuffer reads and writes. */
417 BEGIN_CB(blend->cb_no_readwrite, 8);
418 OUT_CB_REG(R300_RB3D_ROPCNTL, rop);
419 OUT_CB_REG_SEQ(R300_RB3D_CBLEND, 3);
420 OUT_CB(0);
421 OUT_CB(0);
422 OUT_CB(0);
423 OUT_CB_REG(R300_RB3D_DITHER_CTL, dither);
424 END_CB;
425
426 return (void*)blend;
427 }
428
429 /* Bind blend state. */
430 static void r300_bind_blend_state(struct pipe_context* pipe,
431 void* state)
432 {
433 struct r300_context* r300 = r300_context(pipe);
434
435 UPDATE_STATE(state, r300->blend_state);
436 }
437
438 /* Free blend state. */
439 static void r300_delete_blend_state(struct pipe_context* pipe,
440 void* state)
441 {
442 FREE(state);
443 }
444
445 /* Convert float to 10bit integer */
446 static unsigned float_to_fixed10(float f)
447 {
448 return CLAMP((unsigned)(f * 1023.9f), 0, 1023);
449 }
450
451 /* Set blend color.
452 * Setup both R300 and R500 registers, figure out later which one to write. */
453 static void r300_set_blend_color(struct pipe_context* pipe,
454 const struct pipe_blend_color* color)
455 {
456 struct r300_context* r300 = r300_context(pipe);
457 struct pipe_framebuffer_state *fb = r300->fb_state.state;
458 struct r300_blend_color_state *state =
459 (struct r300_blend_color_state*)r300->blend_color_state.state;
460 struct pipe_blend_color c;
461 enum pipe_format format = fb->nr_cbufs ? fb->cbufs[0]->format : 0;
462 CB_LOCALS;
463
464 state->state = *color; /* Save it, so that we can reuse it in set_fb_state */
465 c = *color;
466
467 /* The blend color is dependent on the colorbuffer format. */
468 if (fb->nr_cbufs) {
469 switch (format) {
470 case PIPE_FORMAT_R8_UNORM:
471 case PIPE_FORMAT_L8_UNORM:
472 case PIPE_FORMAT_I8_UNORM:
473 c.color[1] = c.color[0];
474 break;
475
476 case PIPE_FORMAT_A8_UNORM:
477 c.color[1] = c.color[3];
478 break;
479
480 case PIPE_FORMAT_R8G8_UNORM:
481 c.color[2] = c.color[1];
482 break;
483
484 case PIPE_FORMAT_L8A8_UNORM:
485 c.color[2] = c.color[3];
486 break;
487
488 default:;
489 }
490 }
491
492 if (r300->screen->caps.is_r500) {
493 BEGIN_CB(state->cb, 3);
494 OUT_CB_REG_SEQ(R500_RB3D_CONSTANT_COLOR_AR, 2);
495
496 switch (format) {
497 case PIPE_FORMAT_R16G16B16A16_FLOAT:
498 OUT_CB(util_float_to_half(c.color[2]) |
499 (util_float_to_half(c.color[3]) << 16));
500 OUT_CB(util_float_to_half(c.color[0]) |
501 (util_float_to_half(c.color[1]) << 16));
502 break;
503
504 default:
505 OUT_CB(float_to_fixed10(c.color[0]) |
506 (float_to_fixed10(c.color[3]) << 16));
507 OUT_CB(float_to_fixed10(c.color[2]) |
508 (float_to_fixed10(c.color[1]) << 16));
509 }
510
511 END_CB;
512 } else {
513 union util_color uc;
514 util_pack_color(c.color, PIPE_FORMAT_B8G8R8A8_UNORM, &uc);
515
516 BEGIN_CB(state->cb, 2);
517 OUT_CB_REG(R300_RB3D_BLEND_COLOR, uc.ui);
518 END_CB;
519 }
520
521 r300_mark_atom_dirty(r300, &r300->blend_color_state);
522 }
523
524 static void r300_set_clip_state(struct pipe_context* pipe,
525 const struct pipe_clip_state* state)
526 {
527 struct r300_context* r300 = r300_context(pipe);
528 struct r300_clip_state *clip =
529 (struct r300_clip_state*)r300->clip_state.state;
530 CB_LOCALS;
531
532 if (r300->screen->caps.has_tcl) {
533 BEGIN_CB(clip->cb, r300->clip_state.size);
534 OUT_CB_REG(R300_VAP_PVS_VECTOR_INDX_REG,
535 (r300->screen->caps.is_r500 ?
536 R500_PVS_UCP_START : R300_PVS_UCP_START));
537 OUT_CB_ONE_REG(R300_VAP_PVS_UPLOAD_DATA, 6 * 4);
538 OUT_CB_TABLE(state->ucp, 6 * 4);
539 END_CB;
540
541 r300_mark_atom_dirty(r300, &r300->clip_state);
542 } else {
543 draw_set_clip_state(r300->draw, state);
544 }
545 }
546
547 static void
548 r300_set_sample_mask(struct pipe_context *pipe,
549 unsigned sample_mask)
550 {
551 }
552
553
554 /* Create a new depth, stencil, and alpha state based on the CSO dsa state.
555 *
556 * This contains the depth buffer, stencil buffer, alpha test, and such.
557 * On the Radeon, depth and stencil buffer setup are intertwined, which is
558 * the reason for some of the strange-looking assignments across registers. */
559 static void*
560 r300_create_dsa_state(struct pipe_context* pipe,
561 const struct pipe_depth_stencil_alpha_state* state)
562 {
563 struct r300_capabilities *caps = &r300_screen(pipe->screen)->caps;
564 struct r300_dsa_state* dsa = CALLOC_STRUCT(r300_dsa_state);
565 CB_LOCALS;
566
567 dsa->dsa = *state;
568
569 /* Depth test setup. - separate write mask depth for decomp flush */
570 if (state->depth.writemask) {
571 dsa->z_buffer_control |= R300_Z_WRITE_ENABLE;
572 }
573
574 if (state->depth.enabled) {
575 dsa->z_buffer_control |= R300_Z_ENABLE;
576
577 dsa->z_stencil_control |=
578 (r300_translate_depth_stencil_function(state->depth.func) <<
579 R300_Z_FUNC_SHIFT);
580 } else {
581 /* We must enable depth test, otherwise occlusion queries won't work. */
582 dsa->z_buffer_control |= R300_Z_ENABLE;
583 dsa->z_stencil_control |= R300_ZS_ALWAYS;
584 }
585
586 /* Stencil buffer setup. */
587 if (state->stencil[0].enabled) {
588 dsa->z_buffer_control |= R300_STENCIL_ENABLE;
589 dsa->z_stencil_control |=
590 (r300_translate_depth_stencil_function(state->stencil[0].func) <<
591 R300_S_FRONT_FUNC_SHIFT) |
592 (r300_translate_stencil_op(state->stencil[0].fail_op) <<
593 R300_S_FRONT_SFAIL_OP_SHIFT) |
594 (r300_translate_stencil_op(state->stencil[0].zpass_op) <<
595 R300_S_FRONT_ZPASS_OP_SHIFT) |
596 (r300_translate_stencil_op(state->stencil[0].zfail_op) <<
597 R300_S_FRONT_ZFAIL_OP_SHIFT);
598
599 dsa->stencil_ref_mask =
600 (state->stencil[0].valuemask << R300_STENCILMASK_SHIFT) |
601 (state->stencil[0].writemask << R300_STENCILWRITEMASK_SHIFT);
602
603 if (state->stencil[1].enabled) {
604 dsa->two_sided = TRUE;
605
606 dsa->z_buffer_control |= R300_STENCIL_FRONT_BACK;
607 dsa->z_stencil_control |=
608 (r300_translate_depth_stencil_function(state->stencil[1].func) <<
609 R300_S_BACK_FUNC_SHIFT) |
610 (r300_translate_stencil_op(state->stencil[1].fail_op) <<
611 R300_S_BACK_SFAIL_OP_SHIFT) |
612 (r300_translate_stencil_op(state->stencil[1].zpass_op) <<
613 R300_S_BACK_ZPASS_OP_SHIFT) |
614 (r300_translate_stencil_op(state->stencil[1].zfail_op) <<
615 R300_S_BACK_ZFAIL_OP_SHIFT);
616
617 dsa->stencil_ref_bf =
618 (state->stencil[1].valuemask << R300_STENCILMASK_SHIFT) |
619 (state->stencil[1].writemask << R300_STENCILWRITEMASK_SHIFT);
620
621 if (caps->is_r500) {
622 dsa->z_buffer_control |= R500_STENCIL_REFMASK_FRONT_BACK;
623 } else {
624 dsa->two_sided_stencil_ref =
625 (state->stencil[0].valuemask != state->stencil[1].valuemask ||
626 state->stencil[0].writemask != state->stencil[1].writemask);
627 }
628 }
629 }
630
631 /* Alpha test setup. */
632 if (state->alpha.enabled) {
633 dsa->alpha_function =
634 r300_translate_alpha_function(state->alpha.func) |
635 R300_FG_ALPHA_FUNC_ENABLE;
636
637 dsa->alpha_function |= float_to_ubyte(state->alpha.ref_value);
638 dsa->alpha_value = util_float_to_half(state->alpha.ref_value);
639
640 if (caps->is_r500) {
641 dsa->alpha_function_fp16 = dsa->alpha_function |
642 R500_FG_ALPHA_FUNC_FP16_ENABLE;
643 dsa->alpha_function |= R500_FG_ALPHA_FUNC_8BIT;
644 }
645 }
646
647 BEGIN_CB(&dsa->cb_begin, 10);
648 OUT_CB_REG(R300_FG_ALPHA_FUNC, dsa->alpha_function);
649 OUT_CB_REG_SEQ(R300_ZB_CNTL, 3);
650 OUT_CB(dsa->z_buffer_control);
651 OUT_CB(dsa->z_stencil_control);
652 OUT_CB(dsa->stencil_ref_mask);
653 OUT_CB_REG(R500_ZB_STENCILREFMASK_BF, dsa->stencil_ref_bf);
654 OUT_CB_REG(R500_FG_ALPHA_VALUE, dsa->alpha_value);
655 END_CB;
656
657 BEGIN_CB(&dsa->cb_begin_fp16, 10);
658 OUT_CB_REG(R300_FG_ALPHA_FUNC, dsa->alpha_function_fp16);
659 OUT_CB_REG_SEQ(R300_ZB_CNTL, 3);
660 OUT_CB(dsa->z_buffer_control);
661 OUT_CB(dsa->z_stencil_control);
662 OUT_CB(dsa->stencil_ref_mask);
663 OUT_CB_REG(R500_ZB_STENCILREFMASK_BF, dsa->stencil_ref_bf);
664 OUT_CB_REG(R500_FG_ALPHA_VALUE, dsa->alpha_value);
665 END_CB;
666
667 /* We must enable depth test, otherwise occlusion queries won't work.
668 * We setup a dummy zbuffer to silent the CS checker, see emit_fb_state. */
669 BEGIN_CB(dsa->cb_zb_no_readwrite, 10);
670 OUT_CB_REG(R300_FG_ALPHA_FUNC, dsa->alpha_function);
671 OUT_CB_REG_SEQ(R300_ZB_CNTL, 3);
672 OUT_CB(R300_Z_ENABLE);
673 OUT_CB(R300_ZS_ALWAYS);
674 OUT_CB(0);
675 OUT_CB_REG(R500_ZB_STENCILREFMASK_BF, 0);
676 OUT_CB_REG(R500_FG_ALPHA_VALUE, dsa->alpha_value);
677 END_CB;
678
679 BEGIN_CB(dsa->cb_fp16_zb_no_readwrite, 10);
680 OUT_CB_REG(R300_FG_ALPHA_FUNC, dsa->alpha_function_fp16);
681 OUT_CB_REG_SEQ(R300_ZB_CNTL, 3);
682 OUT_CB(R300_Z_ENABLE);
683 OUT_CB(R300_ZS_ALWAYS);
684 OUT_CB(0);
685 OUT_CB_REG(R500_ZB_STENCILREFMASK_BF, 0);
686 OUT_CB_REG(R500_FG_ALPHA_VALUE, dsa->alpha_value);
687 END_CB;
688
689 return (void*)dsa;
690 }
691
692 static void r300_dsa_inject_stencilref(struct r300_context *r300)
693 {
694 struct r300_dsa_state *dsa =
695 (struct r300_dsa_state*)r300->dsa_state.state;
696
697 if (!dsa)
698 return;
699
700 dsa->stencil_ref_mask =
701 (dsa->stencil_ref_mask & ~R300_STENCILREF_MASK) |
702 r300->stencil_ref.ref_value[0];
703 dsa->stencil_ref_bf =
704 (dsa->stencil_ref_bf & ~R300_STENCILREF_MASK) |
705 r300->stencil_ref.ref_value[1];
706 }
707
708 /* Bind DSA state. */
709 static void r300_bind_dsa_state(struct pipe_context* pipe,
710 void* state)
711 {
712 struct r300_context* r300 = r300_context(pipe);
713
714 if (!state) {
715 return;
716 }
717
718 UPDATE_STATE(state, r300->dsa_state);
719
720 r300_mark_atom_dirty(r300, &r300->hyperz_state); /* Will be updated before the emission. */
721 r300_dsa_inject_stencilref(r300);
722 }
723
724 /* Free DSA state. */
725 static void r300_delete_dsa_state(struct pipe_context* pipe,
726 void* state)
727 {
728 FREE(state);
729 }
730
731 static void r300_set_stencil_ref(struct pipe_context* pipe,
732 const struct pipe_stencil_ref* sr)
733 {
734 struct r300_context* r300 = r300_context(pipe);
735
736 r300->stencil_ref = *sr;
737
738 r300_dsa_inject_stencilref(r300);
739 r300_mark_atom_dirty(r300, &r300->dsa_state);
740 }
741
742 static void r300_tex_set_tiling_flags(struct r300_context *r300,
743 struct r300_resource *tex,
744 unsigned level)
745 {
746 /* Check if the macrotile flag needs to be changed.
747 * Skip changing the flags otherwise. */
748 if (tex->tex.macrotile[tex->surface_level] !=
749 tex->tex.macrotile[level]) {
750 r300->rws->buffer_set_tiling(tex->buf, r300->cs,
751 tex->tex.microtile, tex->tex.macrotile[level],
752 0, 0, 0, 0, 0,
753 tex->tex.stride_in_bytes[0]);
754
755 tex->surface_level = level;
756 }
757 }
758
759 /* This switcheroo is needed just because of goddamned MACRO_SWITCH. */
760 static void r300_fb_set_tiling_flags(struct r300_context *r300,
761 const struct pipe_framebuffer_state *state)
762 {
763 unsigned i;
764
765 /* Set tiling flags for new surfaces. */
766 for (i = 0; i < state->nr_cbufs; i++) {
767 r300_tex_set_tiling_flags(r300,
768 r300_resource(state->cbufs[i]->texture),
769 state->cbufs[i]->u.tex.level);
770 }
771 if (state->zsbuf) {
772 r300_tex_set_tiling_flags(r300,
773 r300_resource(state->zsbuf->texture),
774 state->zsbuf->u.tex.level);
775 }
776 }
777
778 static void r300_print_fb_surf_info(struct pipe_surface *surf, unsigned index,
779 const char *binding)
780 {
781 struct pipe_resource *tex = surf->texture;
782 struct r300_resource *rtex = r300_resource(tex);
783
784 fprintf(stderr,
785 "r300: %s[%i] Dim: %ix%i, Firstlayer: %i, "
786 "Lastlayer: %i, Level: %i, Format: %s\n"
787
788 "r300: TEX: Macro: %s, Micro: %s, "
789 "Dim: %ix%ix%i, LastLevel: %i, Format: %s\n",
790
791 binding, index, surf->width, surf->height,
792 surf->u.tex.first_layer, surf->u.tex.last_layer, surf->u.tex.level,
793 util_format_short_name(surf->format),
794
795 rtex->tex.macrotile[0] ? "YES" : " NO",
796 rtex->tex.microtile ? "YES" : " NO",
797 tex->width0, tex->height0, tex->depth0,
798 tex->last_level, util_format_short_name(surf->format));
799 }
800
801 void r300_mark_fb_state_dirty(struct r300_context *r300,
802 enum r300_fb_state_change change)
803 {
804 struct pipe_framebuffer_state *state = r300->fb_state.state;
805
806 r300_mark_atom_dirty(r300, &r300->gpu_flush);
807 r300_mark_atom_dirty(r300, &r300->fb_state);
808
809 /* What is marked as dirty depends on the enum r300_fb_state_change. */
810 if (change == R300_CHANGED_FB_STATE) {
811 r300_mark_atom_dirty(r300, &r300->aa_state);
812 r300_mark_atom_dirty(r300, &r300->dsa_state); /* for AlphaRef */
813 r300_set_blend_color(&r300->context, r300->blend_color_state.state);
814 }
815
816 if (change == R300_CHANGED_FB_STATE ||
817 change == R300_CHANGED_HYPERZ_FLAG) {
818 r300_mark_atom_dirty(r300, &r300->hyperz_state);
819 }
820
821 if (change == R300_CHANGED_FB_STATE ||
822 change == R300_CHANGED_MULTIWRITE) {
823 r300_mark_atom_dirty(r300, &r300->fb_state_pipelined);
824 }
825
826 /* Now compute the fb_state atom size. */
827 r300->fb_state.size = 2 + (8 * state->nr_cbufs);
828
829 if (r300->cbzb_clear) {
830 r300->fb_state.size += 10;
831 } else if (state->zsbuf) {
832 r300->fb_state.size += 10;
833 if (r300->hyperz_enabled)
834 r300->fb_state.size += 8;
835 } else if (state->nr_cbufs) {
836 r300->fb_state.size += 10;
837 }
838
839 /* The size of the rest of atoms stays the same. */
840 }
841
842 static void
843 r300_set_framebuffer_state(struct pipe_context* pipe,
844 const struct pipe_framebuffer_state* state)
845 {
846 struct r300_context* r300 = r300_context(pipe);
847 struct r300_aa_state *aa = (struct r300_aa_state*)r300->aa_state.state;
848 struct pipe_framebuffer_state *old_state = r300->fb_state.state;
849 unsigned max_width, max_height, i;
850 uint32_t zbuffer_bpp = 0;
851 boolean unlock_zbuffer = FALSE;
852
853 if (r300->screen->caps.is_r500) {
854 max_width = max_height = 4096;
855 } else if (r300->screen->caps.is_r400) {
856 max_width = max_height = 4021;
857 } else {
858 max_width = max_height = 2560;
859 }
860
861 if (state->width > max_width || state->height > max_height) {
862 fprintf(stderr, "r300: Implementation error: Render targets are too "
863 "big in %s, refusing to bind framebuffer state!\n", __FUNCTION__);
864 return;
865 }
866
867 if (old_state->zsbuf && r300->zmask_in_use && !r300->locked_zbuffer) {
868 /* There is a zmask in use, what are we gonna do? */
869 if (state->zsbuf) {
870 if (!pipe_surface_equal(old_state->zsbuf, state->zsbuf)) {
871 /* Decompress the currently bound zbuffer before we bind another one. */
872 r300_decompress_zmask(r300);
873 r300->hiz_in_use = FALSE;
874 }
875 } else {
876 /* We don't bind another zbuffer, so lock the current one. */
877 pipe_surface_reference(&r300->locked_zbuffer, old_state->zsbuf);
878 }
879 } else if (r300->locked_zbuffer) {
880 /* We have a locked zbuffer now, what are we gonna do? */
881 if (state->zsbuf) {
882 if (!pipe_surface_equal(r300->locked_zbuffer, state->zsbuf)) {
883 /* We are binding some other zbuffer, so decompress the locked one,
884 * it gets unlocked automatically. */
885 r300_decompress_zmask_locked_unsafe(r300);
886 r300->hiz_in_use = FALSE;
887 } else {
888 /* We are binding the locked zbuffer again, so unlock it. */
889 unlock_zbuffer = TRUE;
890 }
891 }
892 }
893 assert(state->zsbuf || (r300->locked_zbuffer && !unlock_zbuffer) || !r300->zmask_in_use);
894
895 /* Need to reset clamping or colormask. */
896 r300_mark_atom_dirty(r300, &r300->blend_state);
897
898 /* If zsbuf is set from NULL to non-NULL or vice versa.. */
899 if (!!old_state->zsbuf != !!state->zsbuf) {
900 r300_mark_atom_dirty(r300, &r300->dsa_state);
901 }
902
903 if (r300->screen->info.drm_minor < 12) {
904 /* The tiling flags are dependent on the surface miplevel, unfortunately.
905 * This workarounds a bad design decision in old kernels which were
906 * rewriting tile fields in registers. */
907 r300_fb_set_tiling_flags(r300, state);
908 }
909
910 util_copy_framebuffer_state(r300->fb_state.state, state);
911
912 if (unlock_zbuffer) {
913 pipe_surface_reference(&r300->locked_zbuffer, NULL);
914 }
915
916 r300_mark_fb_state_dirty(r300, R300_CHANGED_FB_STATE);
917
918 if (state->zsbuf) {
919 switch (util_format_get_blocksize(state->zsbuf->format)) {
920 case 2:
921 zbuffer_bpp = 16;
922 break;
923 case 4:
924 zbuffer_bpp = 24;
925 break;
926 }
927
928 /* Polygon offset depends on the zbuffer bit depth. */
929 if (r300->zbuffer_bpp != zbuffer_bpp) {
930 r300->zbuffer_bpp = zbuffer_bpp;
931
932 if (r300->polygon_offset_enabled)
933 r300_mark_atom_dirty(r300, &r300->rs_state);
934 }
935 }
936
937 /* Set up AA config. */
938 if (state->nr_cbufs && state->cbufs[0]->texture->nr_samples > 1) {
939 aa->aa_config = R300_GB_AA_CONFIG_AA_ENABLE;
940
941 switch (state->cbufs[0]->texture->nr_samples) {
942 case 2:
943 aa->aa_config |= R300_GB_AA_CONFIG_NUM_AA_SUBSAMPLES_2;
944 break;
945 case 3:
946 aa->aa_config |= R300_GB_AA_CONFIG_NUM_AA_SUBSAMPLES_3;
947 break;
948 case 4:
949 aa->aa_config |= R300_GB_AA_CONFIG_NUM_AA_SUBSAMPLES_4;
950 break;
951 case 6:
952 aa->aa_config |= R300_GB_AA_CONFIG_NUM_AA_SUBSAMPLES_6;
953 break;
954 }
955 } else {
956 aa->aa_config = 0;
957 }
958
959 if (DBG_ON(r300, DBG_FB)) {
960 fprintf(stderr, "r300: set_framebuffer_state:\n");
961 for (i = 0; i < state->nr_cbufs; i++) {
962 r300_print_fb_surf_info(state->cbufs[i], i, "CB");
963 }
964 if (state->zsbuf) {
965 r300_print_fb_surf_info(state->zsbuf, 0, "ZB");
966 }
967 }
968 }
969
970 /* Create fragment shader state. */
971 static void* r300_create_fs_state(struct pipe_context* pipe,
972 const struct pipe_shader_state* shader)
973 {
974 struct r300_fragment_shader* fs = NULL;
975
976 fs = (struct r300_fragment_shader*)CALLOC_STRUCT(r300_fragment_shader);
977
978 /* Copy state directly into shader. */
979 fs->state = *shader;
980 fs->state.tokens = tgsi_dup_tokens(shader->tokens);
981
982 return (void*)fs;
983 }
984
985 void r300_mark_fs_code_dirty(struct r300_context *r300)
986 {
987 struct r300_fragment_shader* fs = r300_fs(r300);
988
989 r300_mark_atom_dirty(r300, &r300->fs);
990 r300_mark_atom_dirty(r300, &r300->fs_rc_constant_state);
991 r300_mark_atom_dirty(r300, &r300->fs_constants);
992 r300->fs.size = fs->shader->cb_code_size;
993
994 if (r300->screen->caps.is_r500) {
995 r300->fs_rc_constant_state.size = fs->shader->rc_state_count * 7;
996 r300->fs_constants.size = fs->shader->externals_count * 4 + 3;
997 } else {
998 r300->fs_rc_constant_state.size = fs->shader->rc_state_count * 5;
999 r300->fs_constants.size = fs->shader->externals_count * 4 + 1;
1000 }
1001
1002 ((struct r300_constant_buffer*)r300->fs_constants.state)->remap_table =
1003 fs->shader->code.constants_remap_table;
1004 }
1005
1006 /* Bind fragment shader state. */
1007 static void r300_bind_fs_state(struct pipe_context* pipe, void* shader)
1008 {
1009 struct r300_context* r300 = r300_context(pipe);
1010 struct r300_fragment_shader* fs = (struct r300_fragment_shader*)shader;
1011
1012 if (fs == NULL) {
1013 r300->fs.state = NULL;
1014 return;
1015 }
1016
1017 r300->fs.state = fs;
1018 r300->fs_status = FRAGMENT_SHADER_DIRTY;
1019
1020 r300_mark_atom_dirty(r300, &r300->rs_block_state); /* Will be updated before the emission. */
1021 }
1022
1023 /* Delete fragment shader state. */
1024 static void r300_delete_fs_state(struct pipe_context* pipe, void* shader)
1025 {
1026 struct r300_fragment_shader* fs = (struct r300_fragment_shader*)shader;
1027 struct r300_fragment_shader_code *tmp, *ptr = fs->first;
1028
1029 while (ptr) {
1030 tmp = ptr;
1031 ptr = ptr->next;
1032 rc_constants_destroy(&tmp->code.constants);
1033 FREE(tmp->cb_code);
1034 FREE(tmp);
1035 }
1036 FREE((void*)fs->state.tokens);
1037 FREE(shader);
1038 }
1039
1040 static void r300_set_polygon_stipple(struct pipe_context* pipe,
1041 const struct pipe_poly_stipple* state)
1042 {
1043 /* XXX no idea how to set this up, but not terribly important */
1044 }
1045
1046 /* Create a new rasterizer state based on the CSO rasterizer state.
1047 *
1048 * This is a very large chunk of state, and covers most of the graphics
1049 * backend (GB), geometry assembly (GA), and setup unit (SU) blocks.
1050 *
1051 * In a not entirely unironic sidenote, this state has nearly nothing to do
1052 * with the actual block on the Radeon called the rasterizer (RS). */
1053 static void* r300_create_rs_state(struct pipe_context* pipe,
1054 const struct pipe_rasterizer_state* state)
1055 {
1056 struct r300_rs_state* rs = CALLOC_STRUCT(r300_rs_state);
1057 uint32_t vap_control_status; /* R300_VAP_CNTL_STATUS: 0x2140 */
1058 uint32_t vap_clip_cntl; /* R300_VAP_CLIP_CNTL: 0x221C */
1059 uint32_t point_size; /* R300_GA_POINT_SIZE: 0x421c */
1060 uint32_t point_minmax; /* R300_GA_POINT_MINMAX: 0x4230 */
1061 uint32_t line_control; /* R300_GA_LINE_CNTL: 0x4234 */
1062 uint32_t polygon_offset_enable; /* R300_SU_POLY_OFFSET_ENABLE: 0x42b4 */
1063 uint32_t cull_mode; /* R300_SU_CULL_MODE: 0x42b8 */
1064 uint32_t line_stipple_config; /* R300_GA_LINE_STIPPLE_CONFIG: 0x4328 */
1065 uint32_t line_stipple_value; /* R300_GA_LINE_STIPPLE_VALUE: 0x4260 */
1066 uint32_t polygon_mode; /* R300_GA_POLY_MODE: 0x4288 */
1067 uint32_t clip_rule; /* R300_SC_CLIP_RULE: 0x43D0 */
1068 uint32_t round_mode; /* R300_GA_ROUND_MODE: 0x428c */
1069
1070 /* Point sprites texture coordinates, 0: lower left, 1: upper right */
1071 float point_texcoord_left = 0; /* R300_GA_POINT_S0: 0x4200 */
1072 float point_texcoord_bottom = 0;/* R300_GA_POINT_T0: 0x4204 */
1073 float point_texcoord_right = 1; /* R300_GA_POINT_S1: 0x4208 */
1074 float point_texcoord_top = 0; /* R300_GA_POINT_T1: 0x420c */
1075 boolean vclamp = state->clamp_vertex_color ||
1076 !r300_context(pipe)->screen->caps.is_r500;
1077 CB_LOCALS;
1078
1079 /* Copy rasterizer state. */
1080 rs->rs = *state;
1081 rs->rs_draw = *state;
1082
1083 rs->rs.sprite_coord_enable = state->point_quad_rasterization *
1084 state->sprite_coord_enable;
1085
1086 /* Override some states for Draw. */
1087 rs->rs_draw.sprite_coord_enable = 0; /* We can do this in HW. */
1088 rs->rs_draw.offset_point = 0;
1089 rs->rs_draw.offset_line = 0;
1090 rs->rs_draw.offset_tri = 0;
1091 rs->rs_draw.offset_clamp = 0;
1092
1093 #ifdef PIPE_ARCH_LITTLE_ENDIAN
1094 vap_control_status = R300_VC_NO_SWAP;
1095 #else
1096 vap_control_status = R300_VC_32BIT_SWAP;
1097 #endif
1098
1099 /* If no TCL engine is present, turn off the HW TCL. */
1100 if (!r300_screen(pipe->screen)->caps.has_tcl) {
1101 vap_control_status |= R300_VAP_TCL_BYPASS;
1102 }
1103
1104 /* Point size width and height. */
1105 point_size =
1106 pack_float_16_6x(state->point_size) |
1107 (pack_float_16_6x(state->point_size) << R300_POINTSIZE_X_SHIFT);
1108
1109 /* Point size clamping. */
1110 if (state->point_size_per_vertex) {
1111 /* Per-vertex point size.
1112 * Clamp to [0, max FB size] */
1113 float min_psiz = util_get_min_point_size(state);
1114 float max_psiz = pipe->screen->get_paramf(pipe->screen,
1115 PIPE_CAPF_MAX_POINT_WIDTH);
1116 point_minmax =
1117 (pack_float_16_6x(min_psiz) << R300_GA_POINT_MINMAX_MIN_SHIFT) |
1118 (pack_float_16_6x(max_psiz) << R300_GA_POINT_MINMAX_MAX_SHIFT);
1119 } else {
1120 /* We cannot disable the point-size vertex output,
1121 * so clamp it. */
1122 float psiz = state->point_size;
1123 point_minmax =
1124 (pack_float_16_6x(psiz) << R300_GA_POINT_MINMAX_MIN_SHIFT) |
1125 (pack_float_16_6x(psiz) << R300_GA_POINT_MINMAX_MAX_SHIFT);
1126 }
1127
1128 /* Line control. */
1129 line_control = pack_float_16_6x(state->line_width) |
1130 R300_GA_LINE_CNTL_END_TYPE_COMP;
1131
1132 /* Enable polygon mode */
1133 polygon_mode = 0;
1134 if (state->fill_front != PIPE_POLYGON_MODE_FILL ||
1135 state->fill_back != PIPE_POLYGON_MODE_FILL) {
1136 polygon_mode = R300_GA_POLY_MODE_DUAL;
1137 }
1138
1139 /* Front face */
1140 if (state->front_ccw)
1141 cull_mode = R300_FRONT_FACE_CCW;
1142 else
1143 cull_mode = R300_FRONT_FACE_CW;
1144
1145 /* Polygon offset */
1146 polygon_offset_enable = 0;
1147 if (util_get_offset(state, state->fill_front)) {
1148 polygon_offset_enable |= R300_FRONT_ENABLE;
1149 }
1150 if (util_get_offset(state, state->fill_back)) {
1151 polygon_offset_enable |= R300_BACK_ENABLE;
1152 }
1153
1154 rs->polygon_offset_enable = polygon_offset_enable != 0;
1155
1156 /* Polygon mode */
1157 if (polygon_mode) {
1158 polygon_mode |=
1159 r300_translate_polygon_mode_front(state->fill_front);
1160 polygon_mode |=
1161 r300_translate_polygon_mode_back(state->fill_back);
1162 }
1163
1164 if (state->cull_face & PIPE_FACE_FRONT) {
1165 cull_mode |= R300_CULL_FRONT;
1166 }
1167 if (state->cull_face & PIPE_FACE_BACK) {
1168 cull_mode |= R300_CULL_BACK;
1169 }
1170
1171 if (state->line_stipple_enable) {
1172 line_stipple_config =
1173 R300_GA_LINE_STIPPLE_CONFIG_LINE_RESET_LINE |
1174 (fui((float)state->line_stipple_factor) &
1175 R300_GA_LINE_STIPPLE_CONFIG_STIPPLE_SCALE_MASK);
1176 /* XXX this might need to be scaled up */
1177 line_stipple_value = state->line_stipple_pattern;
1178 } else {
1179 line_stipple_config = 0;
1180 line_stipple_value = 0;
1181 }
1182
1183 if (state->flatshade) {
1184 rs->color_control = R300_SHADE_MODEL_FLAT;
1185 } else {
1186 rs->color_control = R300_SHADE_MODEL_SMOOTH;
1187 }
1188
1189 clip_rule = state->scissor ? 0xAAAA : 0xFFFF;
1190
1191 /* Point sprites coord mode */
1192 if (rs->rs.sprite_coord_enable) {
1193 switch (state->sprite_coord_mode) {
1194 case PIPE_SPRITE_COORD_UPPER_LEFT:
1195 point_texcoord_top = 0.0f;
1196 point_texcoord_bottom = 1.0f;
1197 break;
1198 case PIPE_SPRITE_COORD_LOWER_LEFT:
1199 point_texcoord_top = 1.0f;
1200 point_texcoord_bottom = 0.0f;
1201 break;
1202 }
1203 }
1204
1205 if (r300_screen(pipe->screen)->caps.has_tcl) {
1206 vap_clip_cntl = (state->clip_plane_enable & 63) |
1207 R300_PS_UCP_MODE_CLIP_AS_TRIFAN;
1208 } else {
1209 vap_clip_cntl = R300_CLIP_DISABLE;
1210 }
1211
1212 /* Vertex color clamping. FP20 means no clamping. */
1213 round_mode =
1214 R300_GA_ROUND_MODE_GEOMETRY_ROUND_NEAREST |
1215 (!vclamp ? (R300_GA_ROUND_MODE_RGB_CLAMP_FP20 |
1216 R300_GA_ROUND_MODE_ALPHA_CLAMP_FP20) : 0);
1217
1218 /* Build the main command buffer. */
1219 BEGIN_CB(rs->cb_main, RS_STATE_MAIN_SIZE);
1220 OUT_CB_REG(R300_VAP_CNTL_STATUS, vap_control_status);
1221 OUT_CB_REG(R300_VAP_CLIP_CNTL, vap_clip_cntl);
1222 OUT_CB_REG(R300_GA_POINT_SIZE, point_size);
1223 OUT_CB_REG_SEQ(R300_GA_POINT_MINMAX, 2);
1224 OUT_CB(point_minmax);
1225 OUT_CB(line_control);
1226 OUT_CB_REG_SEQ(R300_SU_POLY_OFFSET_ENABLE, 2);
1227 OUT_CB(polygon_offset_enable);
1228 rs->cull_mode_index = 11;
1229 OUT_CB(cull_mode);
1230 OUT_CB_REG(R300_GA_LINE_STIPPLE_CONFIG, line_stipple_config);
1231 OUT_CB_REG(R300_GA_LINE_STIPPLE_VALUE, line_stipple_value);
1232 OUT_CB_REG(R300_GA_POLY_MODE, polygon_mode);
1233 OUT_CB_REG(R300_GA_ROUND_MODE, round_mode);
1234 OUT_CB_REG(R300_SC_CLIP_RULE, clip_rule);
1235 OUT_CB_REG_SEQ(R300_GA_POINT_S0, 4);
1236 OUT_CB_32F(point_texcoord_left);
1237 OUT_CB_32F(point_texcoord_bottom);
1238 OUT_CB_32F(point_texcoord_right);
1239 OUT_CB_32F(point_texcoord_top);
1240 END_CB;
1241
1242 /* Build the two command buffers for polygon offset setup. */
1243 if (polygon_offset_enable) {
1244 float scale = state->offset_scale * 12;
1245 float offset = state->offset_units * 4;
1246
1247 BEGIN_CB(rs->cb_poly_offset_zb16, 5);
1248 OUT_CB_REG_SEQ(R300_SU_POLY_OFFSET_FRONT_SCALE, 4);
1249 OUT_CB_32F(scale);
1250 OUT_CB_32F(offset);
1251 OUT_CB_32F(scale);
1252 OUT_CB_32F(offset);
1253 END_CB;
1254
1255 offset = state->offset_units * 2;
1256
1257 BEGIN_CB(rs->cb_poly_offset_zb24, 5);
1258 OUT_CB_REG_SEQ(R300_SU_POLY_OFFSET_FRONT_SCALE, 4);
1259 OUT_CB_32F(scale);
1260 OUT_CB_32F(offset);
1261 OUT_CB_32F(scale);
1262 OUT_CB_32F(offset);
1263 END_CB;
1264 }
1265
1266 return (void*)rs;
1267 }
1268
1269 /* Bind rasterizer state. */
1270 static void r300_bind_rs_state(struct pipe_context* pipe, void* state)
1271 {
1272 struct r300_context* r300 = r300_context(pipe);
1273 struct r300_rs_state* rs = (struct r300_rs_state*)state;
1274 int last_sprite_coord_enable = r300->sprite_coord_enable;
1275 boolean last_two_sided_color = r300->two_sided_color;
1276
1277 if (r300->draw && rs) {
1278 draw_set_rasterizer_state(r300->draw, &rs->rs_draw, state);
1279 }
1280
1281 if (rs) {
1282 r300->polygon_offset_enabled = rs->polygon_offset_enable;
1283 r300->sprite_coord_enable = rs->rs.sprite_coord_enable;
1284 r300->two_sided_color = rs->rs.light_twoside;
1285 } else {
1286 r300->polygon_offset_enabled = FALSE;
1287 r300->sprite_coord_enable = 0;
1288 r300->two_sided_color = FALSE;
1289 }
1290
1291 UPDATE_STATE(state, r300->rs_state);
1292 r300->rs_state.size = RS_STATE_MAIN_SIZE + (r300->polygon_offset_enabled ? 5 : 0);
1293
1294 if (last_sprite_coord_enable != r300->sprite_coord_enable ||
1295 last_two_sided_color != r300->two_sided_color) {
1296 r300_mark_atom_dirty(r300, &r300->rs_block_state);
1297 }
1298 }
1299
1300 /* Free rasterizer state. */
1301 static void r300_delete_rs_state(struct pipe_context* pipe, void* state)
1302 {
1303 FREE(state);
1304 }
1305
1306 static void*
1307 r300_create_sampler_state(struct pipe_context* pipe,
1308 const struct pipe_sampler_state* state)
1309 {
1310 struct r300_context* r300 = r300_context(pipe);
1311 struct r300_sampler_state* sampler = CALLOC_STRUCT(r300_sampler_state);
1312 boolean is_r500 = r300->screen->caps.is_r500;
1313 int lod_bias;
1314
1315 sampler->state = *state;
1316
1317 /* r300 doesn't handle CLAMP and MIRROR_CLAMP correctly when either MAG
1318 * or MIN filter is NEAREST. Since texwrap produces same results
1319 * for CLAMP and CLAMP_TO_EDGE, we use them instead. */
1320 if (sampler->state.min_img_filter == PIPE_TEX_FILTER_NEAREST ||
1321 sampler->state.mag_img_filter == PIPE_TEX_FILTER_NEAREST) {
1322 /* Wrap S. */
1323 if (sampler->state.wrap_s == PIPE_TEX_WRAP_CLAMP)
1324 sampler->state.wrap_s = PIPE_TEX_WRAP_CLAMP_TO_EDGE;
1325 else if (sampler->state.wrap_s == PIPE_TEX_WRAP_MIRROR_CLAMP)
1326 sampler->state.wrap_s = PIPE_TEX_WRAP_MIRROR_CLAMP_TO_EDGE;
1327
1328 /* Wrap T. */
1329 if (sampler->state.wrap_t == PIPE_TEX_WRAP_CLAMP)
1330 sampler->state.wrap_t = PIPE_TEX_WRAP_CLAMP_TO_EDGE;
1331 else if (sampler->state.wrap_t == PIPE_TEX_WRAP_MIRROR_CLAMP)
1332 sampler->state.wrap_t = PIPE_TEX_WRAP_MIRROR_CLAMP_TO_EDGE;
1333
1334 /* Wrap R. */
1335 if (sampler->state.wrap_r == PIPE_TEX_WRAP_CLAMP)
1336 sampler->state.wrap_r = PIPE_TEX_WRAP_CLAMP_TO_EDGE;
1337 else if (sampler->state.wrap_r == PIPE_TEX_WRAP_MIRROR_CLAMP)
1338 sampler->state.wrap_r = PIPE_TEX_WRAP_MIRROR_CLAMP_TO_EDGE;
1339 }
1340
1341 sampler->filter0 |=
1342 (r300_translate_wrap(sampler->state.wrap_s) << R300_TX_WRAP_S_SHIFT) |
1343 (r300_translate_wrap(sampler->state.wrap_t) << R300_TX_WRAP_T_SHIFT) |
1344 (r300_translate_wrap(sampler->state.wrap_r) << R300_TX_WRAP_R_SHIFT);
1345
1346 sampler->filter0 |= r300_translate_tex_filters(state->min_img_filter,
1347 state->mag_img_filter,
1348 state->min_mip_filter,
1349 state->max_anisotropy > 1);
1350
1351 sampler->filter0 |= r300_anisotropy(state->max_anisotropy);
1352
1353 /* Unfortunately, r300-r500 don't support floating-point mipmap lods. */
1354 /* We must pass these to the merge function to clamp them properly. */
1355 sampler->min_lod = (unsigned)MAX2(state->min_lod, 0);
1356 sampler->max_lod = (unsigned)MAX2(ceilf(state->max_lod), 0);
1357
1358 lod_bias = CLAMP((int)(state->lod_bias * 32 + 1), -(1 << 9), (1 << 9) - 1);
1359
1360 sampler->filter1 |= (lod_bias << R300_LOD_BIAS_SHIFT) & R300_LOD_BIAS_MASK;
1361
1362 /* This is very high quality anisotropic filtering for R5xx.
1363 * It's good for benchmarking the performance of texturing but
1364 * in practice we don't want to slow down the driver because it's
1365 * a pretty good performance killer. Feel free to play with it. */
1366 if (DBG_ON(r300, DBG_ANISOHQ) && is_r500) {
1367 sampler->filter1 |= r500_anisotropy(state->max_anisotropy);
1368 }
1369
1370 /* R500-specific fixups and optimizations */
1371 if (r300->screen->caps.is_r500) {
1372 sampler->filter1 |= R500_BORDER_FIX;
1373 }
1374
1375 return (void*)sampler;
1376 }
1377
1378 static void r300_bind_sampler_states(struct pipe_context* pipe,
1379 unsigned count,
1380 void** states)
1381 {
1382 struct r300_context* r300 = r300_context(pipe);
1383 struct r300_textures_state* state =
1384 (struct r300_textures_state*)r300->textures_state.state;
1385 unsigned tex_units = r300->screen->caps.num_tex_units;
1386
1387 if (count > tex_units) {
1388 return;
1389 }
1390
1391 memcpy(state->sampler_states, states, sizeof(void*) * count);
1392 state->sampler_state_count = count;
1393
1394 r300_mark_atom_dirty(r300, &r300->textures_state);
1395 }
1396
1397 static void r300_lacks_vertex_textures(struct pipe_context* pipe,
1398 unsigned count,
1399 void** states)
1400 {
1401 }
1402
1403 static void r300_delete_sampler_state(struct pipe_context* pipe, void* state)
1404 {
1405 FREE(state);
1406 }
1407
1408 static uint32_t r300_assign_texture_cache_region(unsigned index, unsigned num)
1409 {
1410 /* This looks like a hack, but I believe it's suppose to work like
1411 * that. To illustrate how this works, let's assume you have 5 textures.
1412 * From docs, 5 and the successive numbers are:
1413 *
1414 * FOURTH_1 = 5
1415 * FOURTH_2 = 6
1416 * FOURTH_3 = 7
1417 * EIGHTH_0 = 8
1418 * EIGHTH_1 = 9
1419 *
1420 * First 3 textures will get 3/4 of size of the cache, divived evenly
1421 * between them. The last 1/4 of the cache must be divided between
1422 * the last 2 textures, each will therefore get 1/8 of the cache.
1423 * Why not just to use "5 + texture_index" ?
1424 *
1425 * This simple trick works for all "num" <= 16.
1426 */
1427 if (num <= 1)
1428 return R300_TX_CACHE(R300_TX_CACHE_WHOLE);
1429 else
1430 return R300_TX_CACHE(num + index);
1431 }
1432
1433 static void r300_set_fragment_sampler_views(struct pipe_context* pipe,
1434 unsigned count,
1435 struct pipe_sampler_view** views)
1436 {
1437 struct r300_context* r300 = r300_context(pipe);
1438 struct r300_textures_state* state =
1439 (struct r300_textures_state*)r300->textures_state.state;
1440 struct r300_resource *texture;
1441 unsigned i, real_num_views = 0, view_index = 0;
1442 unsigned tex_units = r300->screen->caps.num_tex_units;
1443 boolean dirty_tex = FALSE;
1444
1445 if (count > tex_units) {
1446 return;
1447 }
1448
1449 /* Calculate the real number of views. */
1450 for (i = 0; i < count; i++) {
1451 if (views[i])
1452 real_num_views++;
1453 }
1454
1455 for (i = 0; i < count; i++) {
1456 pipe_sampler_view_reference(
1457 (struct pipe_sampler_view**)&state->sampler_views[i],
1458 views[i]);
1459
1460 if (!views[i]) {
1461 continue;
1462 }
1463
1464 /* A new sampler view (= texture)... */
1465 dirty_tex = TRUE;
1466
1467 /* Set the texrect factor in the fragment shader.
1468 * Needed for RECT and NPOT fallback. */
1469 texture = r300_resource(views[i]->texture);
1470 if (texture->tex.is_npot) {
1471 r300_mark_atom_dirty(r300, &r300->fs_rc_constant_state);
1472 }
1473
1474 state->sampler_views[i]->texcache_region =
1475 r300_assign_texture_cache_region(view_index, real_num_views);
1476 view_index++;
1477 }
1478
1479 for (i = count; i < tex_units; i++) {
1480 if (state->sampler_views[i]) {
1481 pipe_sampler_view_reference(
1482 (struct pipe_sampler_view**)&state->sampler_views[i],
1483 NULL);
1484 }
1485 }
1486
1487 state->sampler_view_count = count;
1488
1489 r300_mark_atom_dirty(r300, &r300->textures_state);
1490
1491 if (dirty_tex) {
1492 r300_mark_atom_dirty(r300, &r300->texture_cache_inval);
1493 }
1494 }
1495
1496 struct pipe_sampler_view *
1497 r300_create_sampler_view_custom(struct pipe_context *pipe,
1498 struct pipe_resource *texture,
1499 const struct pipe_sampler_view *templ,
1500 unsigned width0_override,
1501 unsigned height0_override)
1502 {
1503 struct r300_sampler_view *view = CALLOC_STRUCT(r300_sampler_view);
1504 struct r300_resource *tex = r300_resource(texture);
1505 boolean is_r500 = r300_screen(pipe->screen)->caps.is_r500;
1506 boolean dxtc_swizzle = r300_screen(pipe->screen)->caps.dxtc_swizzle;
1507
1508 if (view) {
1509 unsigned hwformat;
1510
1511 view->base = *templ;
1512 view->base.reference.count = 1;
1513 view->base.context = pipe;
1514 view->base.texture = NULL;
1515 pipe_resource_reference(&view->base.texture, texture);
1516
1517 view->width0_override = width0_override;
1518 view->height0_override = height0_override;
1519 view->swizzle[0] = templ->swizzle_r;
1520 view->swizzle[1] = templ->swizzle_g;
1521 view->swizzle[2] = templ->swizzle_b;
1522 view->swizzle[3] = templ->swizzle_a;
1523
1524 hwformat = r300_translate_texformat(templ->format,
1525 view->swizzle,
1526 is_r500,
1527 dxtc_swizzle);
1528
1529 if (hwformat == ~0) {
1530 fprintf(stderr, "r300: Ooops. Got unsupported format %s in %s.\n",
1531 util_format_short_name(templ->format), __func__);
1532 }
1533 assert(hwformat != ~0);
1534
1535 r300_texture_setup_format_state(r300_screen(pipe->screen), tex,
1536 templ->format, 0,
1537 width0_override, height0_override,
1538 &view->format);
1539 view->format.format1 |= hwformat;
1540 if (is_r500) {
1541 view->format.format2 |= r500_tx_format_msb_bit(templ->format);
1542 }
1543 }
1544
1545 return (struct pipe_sampler_view*)view;
1546 }
1547
1548 static struct pipe_sampler_view *
1549 r300_create_sampler_view(struct pipe_context *pipe,
1550 struct pipe_resource *texture,
1551 const struct pipe_sampler_view *templ)
1552 {
1553 return r300_create_sampler_view_custom(pipe, texture, templ,
1554 r300_resource(texture)->tex.width0,
1555 r300_resource(texture)->tex.height0);
1556 }
1557
1558
1559 static void
1560 r300_sampler_view_destroy(struct pipe_context *pipe,
1561 struct pipe_sampler_view *view)
1562 {
1563 pipe_resource_reference(&view->texture, NULL);
1564 FREE(view);
1565 }
1566
1567 static void r300_set_scissor_state(struct pipe_context* pipe,
1568 const struct pipe_scissor_state* state)
1569 {
1570 struct r300_context* r300 = r300_context(pipe);
1571
1572 memcpy(r300->scissor_state.state, state,
1573 sizeof(struct pipe_scissor_state));
1574
1575 r300_mark_atom_dirty(r300, &r300->scissor_state);
1576 }
1577
1578 static void r300_set_viewport_state(struct pipe_context* pipe,
1579 const struct pipe_viewport_state* state)
1580 {
1581 struct r300_context* r300 = r300_context(pipe);
1582 struct r300_viewport_state* viewport =
1583 (struct r300_viewport_state*)r300->viewport_state.state;
1584
1585 r300->viewport = *state;
1586
1587 if (r300->draw) {
1588 draw_set_viewport_state(r300->draw, state);
1589 viewport->vte_control = R300_VTX_XY_FMT | R300_VTX_Z_FMT;
1590 return;
1591 }
1592
1593 /* Do the transform in HW. */
1594 viewport->vte_control = R300_VTX_W0_FMT;
1595
1596 if (state->scale[0] != 1.0f) {
1597 viewport->xscale = state->scale[0];
1598 viewport->vte_control |= R300_VPORT_X_SCALE_ENA;
1599 }
1600 if (state->scale[1] != 1.0f) {
1601 viewport->yscale = state->scale[1];
1602 viewport->vte_control |= R300_VPORT_Y_SCALE_ENA;
1603 }
1604 if (state->scale[2] != 1.0f) {
1605 viewport->zscale = state->scale[2];
1606 viewport->vte_control |= R300_VPORT_Z_SCALE_ENA;
1607 }
1608 if (state->translate[0] != 0.0f) {
1609 viewport->xoffset = state->translate[0];
1610 viewport->vte_control |= R300_VPORT_X_OFFSET_ENA;
1611 }
1612 if (state->translate[1] != 0.0f) {
1613 viewport->yoffset = state->translate[1];
1614 viewport->vte_control |= R300_VPORT_Y_OFFSET_ENA;
1615 }
1616 if (state->translate[2] != 0.0f) {
1617 viewport->zoffset = state->translate[2];
1618 viewport->vte_control |= R300_VPORT_Z_OFFSET_ENA;
1619 }
1620
1621 r300_mark_atom_dirty(r300, &r300->viewport_state);
1622 if (r300->fs.state && r300_fs(r300)->shader &&
1623 r300_fs(r300)->shader->inputs.wpos != ATTR_UNUSED) {
1624 r300_mark_atom_dirty(r300, &r300->fs_rc_constant_state);
1625 }
1626 }
1627
1628 static void r300_set_vertex_buffers_hwtcl(struct pipe_context* pipe,
1629 unsigned count,
1630 const struct pipe_vertex_buffer* buffers)
1631 {
1632 struct r300_context* r300 = r300_context(pipe);
1633
1634 /* There must be at least one vertex buffer set, otherwise it locks up. */
1635 if (!count) {
1636 buffers = &r300->dummy_vb;
1637 count = 1;
1638 }
1639
1640 util_copy_vertex_buffers(r300->vertex_buffer,
1641 &r300->nr_vertex_buffers,
1642 buffers, count);
1643
1644 r300->vertex_arrays_dirty = TRUE;
1645 }
1646
1647 static void r300_set_vertex_buffers_swtcl(struct pipe_context* pipe,
1648 unsigned count,
1649 const struct pipe_vertex_buffer* buffers)
1650 {
1651 struct r300_context* r300 = r300_context(pipe);
1652 unsigned i;
1653
1654 util_copy_vertex_buffers(r300->vertex_buffer,
1655 &r300->nr_vertex_buffers,
1656 buffers, count);
1657 draw_set_vertex_buffers(r300->draw, count, buffers);
1658
1659 for (i = 0; i < count; i++) {
1660 if (buffers[i].user_buffer) {
1661 draw_set_mapped_vertex_buffer(r300->draw, i,
1662 buffers[i].user_buffer);
1663 } else if (buffers[i].buffer) {
1664 draw_set_mapped_vertex_buffer(r300->draw, i,
1665 r300_resource(buffers[i].buffer)->malloced_buffer);
1666 }
1667 }
1668 }
1669
1670 static void r300_set_index_buffer_hwtcl(struct pipe_context* pipe,
1671 const struct pipe_index_buffer *ib)
1672 {
1673 struct r300_context* r300 = r300_context(pipe);
1674
1675 if (ib) {
1676 pipe_resource_reference(&r300->index_buffer.buffer, ib->buffer);
1677 memcpy(&r300->index_buffer, ib, sizeof(*ib));
1678 } else {
1679 pipe_resource_reference(&r300->index_buffer.buffer, NULL);
1680 }
1681 }
1682
1683 static void r300_set_index_buffer_swtcl(struct pipe_context* pipe,
1684 const struct pipe_index_buffer *ib)
1685 {
1686 struct r300_context* r300 = r300_context(pipe);
1687
1688 if (ib) {
1689 const void *buf = NULL;
1690 if (ib->user_buffer) {
1691 buf = ib->user_buffer;
1692 } else if (ib->buffer) {
1693 buf = r300_resource(ib->buffer)->malloced_buffer;
1694 }
1695 draw_set_indexes(r300->draw,
1696 (const ubyte *) buf + ib->offset,
1697 ib->index_size);
1698 }
1699 }
1700
1701 /* Initialize the PSC tables. */
1702 static void r300_vertex_psc(struct r300_vertex_element_state *velems)
1703 {
1704 struct r300_vertex_stream_state *vstream = &velems->vertex_stream;
1705 uint16_t type, swizzle;
1706 enum pipe_format format;
1707 unsigned i;
1708
1709 /* Vertex shaders have no semantics on their inputs,
1710 * so PSC should just route stuff based on the vertex elements,
1711 * and not on attrib information. */
1712 for (i = 0; i < velems->count; i++) {
1713 format = velems->velem[i].src_format;
1714
1715 type = r300_translate_vertex_data_type(format);
1716 if (type == R300_INVALID_FORMAT) {
1717 fprintf(stderr, "r300: Bad vertex format %s.\n",
1718 util_format_short_name(format));
1719 assert(0);
1720 abort();
1721 }
1722
1723 type |= i << R300_DST_VEC_LOC_SHIFT;
1724 swizzle = r300_translate_vertex_data_swizzle(format);
1725
1726 if (i & 1) {
1727 vstream->vap_prog_stream_cntl[i >> 1] |= type << 16;
1728 vstream->vap_prog_stream_cntl_ext[i >> 1] |= swizzle << 16;
1729 } else {
1730 vstream->vap_prog_stream_cntl[i >> 1] |= type;
1731 vstream->vap_prog_stream_cntl_ext[i >> 1] |= swizzle;
1732 }
1733 }
1734
1735 /* Set the last vector in the PSC. */
1736 if (i) {
1737 i -= 1;
1738 }
1739 vstream->vap_prog_stream_cntl[i >> 1] |=
1740 (R300_LAST_VEC << (i & 1 ? 16 : 0));
1741
1742 vstream->count = (i >> 1) + 1;
1743 }
1744
1745 static void* r300_create_vertex_elements_state(struct pipe_context* pipe,
1746 unsigned count,
1747 const struct pipe_vertex_element* attribs)
1748 {
1749 struct r300_vertex_element_state *velems;
1750 unsigned i;
1751 struct pipe_vertex_element dummy_attrib = {0};
1752
1753 /* R300 Programmable Stream Control (PSC) doesn't support 0 vertex elements. */
1754 if (!count) {
1755 dummy_attrib.src_format = PIPE_FORMAT_R8G8B8A8_UNORM;
1756 attribs = &dummy_attrib;
1757 count = 1;
1758 } else if (count > 16) {
1759 fprintf(stderr, "r300: More than 16 vertex elements are not supported,"
1760 " requested %i, using 16.\n", count);
1761 count = 16;
1762 }
1763
1764 velems = CALLOC_STRUCT(r300_vertex_element_state);
1765 if (!velems)
1766 return NULL;
1767
1768 velems->count = count;
1769 memcpy(velems->velem, attribs, sizeof(struct pipe_vertex_element) * count);
1770
1771 if (r300_screen(pipe->screen)->caps.has_tcl) {
1772 /* Setup PSC.
1773 * The unused components will be replaced by (..., 0, 1). */
1774 r300_vertex_psc(velems);
1775
1776 for (i = 0; i < count; i++) {
1777 velems->format_size[i] =
1778 align(util_format_get_blocksize(velems->velem[i].src_format), 4);
1779 velems->vertex_size_dwords += velems->format_size[i] / 4;
1780 }
1781 }
1782
1783 return velems;
1784 }
1785
1786 static void r300_bind_vertex_elements_state(struct pipe_context *pipe,
1787 void *state)
1788 {
1789 struct r300_context *r300 = r300_context(pipe);
1790 struct r300_vertex_element_state *velems = state;
1791
1792 if (velems == NULL) {
1793 return;
1794 }
1795
1796 r300->velems = velems;
1797
1798 if (r300->draw) {
1799 draw_set_vertex_elements(r300->draw, velems->count, velems->velem);
1800 return;
1801 }
1802
1803 UPDATE_STATE(&velems->vertex_stream, r300->vertex_stream_state);
1804 r300->vertex_stream_state.size = (1 + velems->vertex_stream.count) * 2;
1805 r300->vertex_arrays_dirty = TRUE;
1806 }
1807
1808 static void r300_delete_vertex_elements_state(struct pipe_context *pipe, void *state)
1809 {
1810 FREE(state);
1811 }
1812
1813 static void* r300_create_vs_state(struct pipe_context* pipe,
1814 const struct pipe_shader_state* shader)
1815 {
1816 struct r300_context* r300 = r300_context(pipe);
1817 struct r300_vertex_shader* vs = CALLOC_STRUCT(r300_vertex_shader);
1818
1819 /* Copy state directly into shader. */
1820 vs->state = *shader;
1821 vs->state.tokens = tgsi_dup_tokens(shader->tokens);
1822
1823 if (r300->screen->caps.has_tcl) {
1824 r300_init_vs_outputs(r300, vs);
1825 r300_translate_vertex_shader(r300, vs);
1826 } else {
1827 r300_draw_init_vertex_shader(r300, vs);
1828 }
1829
1830 return vs;
1831 }
1832
1833 static void r300_bind_vs_state(struct pipe_context* pipe, void* shader)
1834 {
1835 struct r300_context* r300 = r300_context(pipe);
1836 struct r300_vertex_shader* vs = (struct r300_vertex_shader*)shader;
1837
1838 if (vs == NULL) {
1839 r300->vs_state.state = NULL;
1840 return;
1841 }
1842 if (vs == r300->vs_state.state) {
1843 return;
1844 }
1845 r300->vs_state.state = vs;
1846
1847 /* The majority of the RS block bits is dependent on the vertex shader. */
1848 r300_mark_atom_dirty(r300, &r300->rs_block_state); /* Will be updated before the emission. */
1849
1850 if (r300->screen->caps.has_tcl) {
1851 unsigned fc_op_dwords = r300->screen->caps.is_r500 ? 3 : 2;
1852 r300_mark_atom_dirty(r300, &r300->vs_state);
1853 r300->vs_state.size = vs->code.length + 9 +
1854 (R300_VS_MAX_FC_OPS * fc_op_dwords + 4);
1855
1856 r300_mark_atom_dirty(r300, &r300->vs_constants);
1857 r300->vs_constants.size =
1858 2 +
1859 (vs->externals_count ? vs->externals_count * 4 + 3 : 0) +
1860 (vs->immediates_count ? vs->immediates_count * 4 + 3 : 0);
1861
1862 ((struct r300_constant_buffer*)r300->vs_constants.state)->remap_table =
1863 vs->code.constants_remap_table;
1864
1865 r300_mark_atom_dirty(r300, &r300->pvs_flush);
1866 } else {
1867 draw_bind_vertex_shader(r300->draw,
1868 (struct draw_vertex_shader*)vs->draw_vs);
1869 }
1870 }
1871
1872 static void r300_delete_vs_state(struct pipe_context* pipe, void* shader)
1873 {
1874 struct r300_context* r300 = r300_context(pipe);
1875 struct r300_vertex_shader* vs = (struct r300_vertex_shader*)shader;
1876
1877 if (r300->screen->caps.has_tcl) {
1878 rc_constants_destroy(&vs->code.constants);
1879 FREE(vs->code.constants_remap_table);
1880 } else {
1881 draw_delete_vertex_shader(r300->draw,
1882 (struct draw_vertex_shader*)vs->draw_vs);
1883 }
1884
1885 FREE((void*)vs->state.tokens);
1886 FREE(shader);
1887 }
1888
1889 static void r300_set_constant_buffer(struct pipe_context *pipe,
1890 uint shader, uint index,
1891 struct pipe_constant_buffer *cb)
1892 {
1893 struct r300_context* r300 = r300_context(pipe);
1894 struct r300_constant_buffer *cbuf;
1895 uint32_t *mapped;
1896
1897 if (!cb)
1898 return;
1899
1900 switch (shader) {
1901 case PIPE_SHADER_VERTEX:
1902 cbuf = (struct r300_constant_buffer*)r300->vs_constants.state;
1903 break;
1904 case PIPE_SHADER_FRAGMENT:
1905 cbuf = (struct r300_constant_buffer*)r300->fs_constants.state;
1906 break;
1907 default:
1908 return;
1909 }
1910
1911
1912 if (cb->user_buffer)
1913 mapped = (uint32_t*)cb->user_buffer;
1914 else {
1915 struct r300_resource *rbuf = r300_resource(cb->buffer);
1916
1917 if (rbuf && rbuf->malloced_buffer)
1918 mapped = (uint32_t*)rbuf->malloced_buffer;
1919 else
1920 return;
1921 }
1922
1923 if (shader == PIPE_SHADER_FRAGMENT ||
1924 (shader == PIPE_SHADER_VERTEX && r300->screen->caps.has_tcl)) {
1925 cbuf->ptr = mapped;
1926 }
1927
1928 if (shader == PIPE_SHADER_VERTEX) {
1929 if (r300->screen->caps.has_tcl) {
1930 struct r300_vertex_shader *vs =
1931 (struct r300_vertex_shader*)r300->vs_state.state;
1932
1933 if (!vs) {
1934 cbuf->buffer_base = 0;
1935 return;
1936 }
1937
1938 cbuf->buffer_base = r300->vs_const_base;
1939 r300->vs_const_base += vs->code.constants.Count;
1940 if (r300->vs_const_base > R500_MAX_PVS_CONST_VECS) {
1941 r300->vs_const_base = vs->code.constants.Count;
1942 cbuf->buffer_base = 0;
1943 r300_mark_atom_dirty(r300, &r300->pvs_flush);
1944 }
1945 r300_mark_atom_dirty(r300, &r300->vs_constants);
1946 } else if (r300->draw) {
1947 draw_set_mapped_constant_buffer(r300->draw, PIPE_SHADER_VERTEX,
1948 0, mapped, cb->buffer_size);
1949 }
1950 } else if (shader == PIPE_SHADER_FRAGMENT) {
1951 r300_mark_atom_dirty(r300, &r300->fs_constants);
1952 }
1953 }
1954
1955 static void r300_texture_barrier(struct pipe_context *pipe)
1956 {
1957 struct r300_context *r300 = r300_context(pipe);
1958
1959 r300_mark_atom_dirty(r300, &r300->gpu_flush);
1960 r300_mark_atom_dirty(r300, &r300->texture_cache_inval);
1961 }
1962
1963 void r300_init_state_functions(struct r300_context* r300)
1964 {
1965 r300->context.create_blend_state = r300_create_blend_state;
1966 r300->context.bind_blend_state = r300_bind_blend_state;
1967 r300->context.delete_blend_state = r300_delete_blend_state;
1968
1969 r300->context.set_blend_color = r300_set_blend_color;
1970
1971 r300->context.set_clip_state = r300_set_clip_state;
1972 r300->context.set_sample_mask = r300_set_sample_mask;
1973
1974 r300->context.set_constant_buffer = r300_set_constant_buffer;
1975
1976 r300->context.create_depth_stencil_alpha_state = r300_create_dsa_state;
1977 r300->context.bind_depth_stencil_alpha_state = r300_bind_dsa_state;
1978 r300->context.delete_depth_stencil_alpha_state = r300_delete_dsa_state;
1979
1980 r300->context.set_stencil_ref = r300_set_stencil_ref;
1981
1982 r300->context.set_framebuffer_state = r300_set_framebuffer_state;
1983
1984 r300->context.create_fs_state = r300_create_fs_state;
1985 r300->context.bind_fs_state = r300_bind_fs_state;
1986 r300->context.delete_fs_state = r300_delete_fs_state;
1987
1988 r300->context.set_polygon_stipple = r300_set_polygon_stipple;
1989
1990 r300->context.create_rasterizer_state = r300_create_rs_state;
1991 r300->context.bind_rasterizer_state = r300_bind_rs_state;
1992 r300->context.delete_rasterizer_state = r300_delete_rs_state;
1993
1994 r300->context.create_sampler_state = r300_create_sampler_state;
1995 r300->context.bind_fragment_sampler_states = r300_bind_sampler_states;
1996 r300->context.bind_vertex_sampler_states = r300_lacks_vertex_textures;
1997 r300->context.delete_sampler_state = r300_delete_sampler_state;
1998
1999 r300->context.set_fragment_sampler_views = r300_set_fragment_sampler_views;
2000 r300->context.create_sampler_view = r300_create_sampler_view;
2001 r300->context.sampler_view_destroy = r300_sampler_view_destroy;
2002
2003 r300->context.set_scissor_state = r300_set_scissor_state;
2004
2005 r300->context.set_viewport_state = r300_set_viewport_state;
2006
2007 if (r300->screen->caps.has_tcl) {
2008 r300->context.set_vertex_buffers = r300_set_vertex_buffers_hwtcl;
2009 r300->context.set_index_buffer = r300_set_index_buffer_hwtcl;
2010 } else {
2011 r300->context.set_vertex_buffers = r300_set_vertex_buffers_swtcl;
2012 r300->context.set_index_buffer = r300_set_index_buffer_swtcl;
2013 }
2014
2015 r300->context.create_vertex_elements_state = r300_create_vertex_elements_state;
2016 r300->context.bind_vertex_elements_state = r300_bind_vertex_elements_state;
2017 r300->context.delete_vertex_elements_state = r300_delete_vertex_elements_state;
2018
2019 r300->context.create_vs_state = r300_create_vs_state;
2020 r300->context.bind_vs_state = r300_bind_vs_state;
2021 r300->context.delete_vs_state = r300_delete_vs_state;
2022
2023 r300->context.texture_barrier = r300_texture_barrier;
2024 }