i915g: Change state code in vbuf code
[mesa.git] / src / gallium / drivers / r300 / r300_state.c
1 /*
2 * Copyright 2008 Corbin Simpson <MostAwesomeDude@gmail.com>
3 * Copyright 2009 Marek Olšák <maraeo@gmail.com>
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * on the rights to use, copy, modify, merge, publish, distribute, sub
9 * license, and/or sell copies of the Software, and to permit persons to whom
10 * the Software is furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
14 * Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
20 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
21 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
22 * USE OR OTHER DEALINGS IN THE SOFTWARE. */
23
24 #include "draw/draw_context.h"
25
26 #include "util/u_math.h"
27 #include "util/u_memory.h"
28 #include "util/u_pack_color.h"
29
30 #include "tgsi/tgsi_parse.h"
31
32 #include "pipe/p_config.h"
33
34 #include "r300_cb.h"
35 #include "r300_context.h"
36 #include "r300_emit.h"
37 #include "r300_reg.h"
38 #include "r300_screen.h"
39 #include "r300_screen_buffer.h"
40 #include "r300_state_inlines.h"
41 #include "r300_fs.h"
42 #include "r300_texture.h"
43 #include "r300_vs.h"
44 #include "r300_winsys.h"
45
46 /* r300_state: Functions used to intialize state context by translating
47 * Gallium state objects into semi-native r300 state objects. */
48
49 #define UPDATE_STATE(cso, atom) \
50 if (cso != atom.state) { \
51 atom.state = cso; \
52 atom.dirty = TRUE; \
53 }
54
55 static boolean blend_discard_if_src_alpha_0(unsigned srcRGB, unsigned srcA,
56 unsigned dstRGB, unsigned dstA)
57 {
58 /* If the blend equation is ADD or REVERSE_SUBTRACT,
59 * SRC_ALPHA == 0, and the following state is set, the colorbuffer
60 * will not be changed.
61 * Notice that the dst factors are the src factors inverted. */
62 return (srcRGB == PIPE_BLENDFACTOR_SRC_ALPHA ||
63 srcRGB == PIPE_BLENDFACTOR_SRC_ALPHA_SATURATE ||
64 srcRGB == PIPE_BLENDFACTOR_ZERO) &&
65 (srcA == PIPE_BLENDFACTOR_SRC_COLOR ||
66 srcA == PIPE_BLENDFACTOR_SRC_ALPHA ||
67 srcA == PIPE_BLENDFACTOR_SRC_ALPHA_SATURATE ||
68 srcA == PIPE_BLENDFACTOR_ZERO) &&
69 (dstRGB == PIPE_BLENDFACTOR_INV_SRC_ALPHA ||
70 dstRGB == PIPE_BLENDFACTOR_ONE) &&
71 (dstA == PIPE_BLENDFACTOR_INV_SRC_COLOR ||
72 dstA == PIPE_BLENDFACTOR_INV_SRC_ALPHA ||
73 dstA == PIPE_BLENDFACTOR_ONE);
74 }
75
76 static boolean blend_discard_if_src_alpha_1(unsigned srcRGB, unsigned srcA,
77 unsigned dstRGB, unsigned dstA)
78 {
79 /* If the blend equation is ADD or REVERSE_SUBTRACT,
80 * SRC_ALPHA == 1, and the following state is set, the colorbuffer
81 * will not be changed.
82 * Notice that the dst factors are the src factors inverted. */
83 return (srcRGB == PIPE_BLENDFACTOR_INV_SRC_ALPHA ||
84 srcRGB == PIPE_BLENDFACTOR_ZERO) &&
85 (srcA == PIPE_BLENDFACTOR_INV_SRC_COLOR ||
86 srcA == PIPE_BLENDFACTOR_INV_SRC_ALPHA ||
87 srcA == PIPE_BLENDFACTOR_ZERO) &&
88 (dstRGB == PIPE_BLENDFACTOR_SRC_ALPHA ||
89 dstRGB == PIPE_BLENDFACTOR_ONE) &&
90 (dstA == PIPE_BLENDFACTOR_SRC_COLOR ||
91 dstA == PIPE_BLENDFACTOR_SRC_ALPHA ||
92 dstA == PIPE_BLENDFACTOR_ONE);
93 }
94
95 static boolean blend_discard_if_src_color_0(unsigned srcRGB, unsigned srcA,
96 unsigned dstRGB, unsigned dstA)
97 {
98 /* If the blend equation is ADD or REVERSE_SUBTRACT,
99 * SRC_COLOR == (0,0,0), and the following state is set, the colorbuffer
100 * will not be changed.
101 * Notice that the dst factors are the src factors inverted. */
102 return (srcRGB == PIPE_BLENDFACTOR_SRC_COLOR ||
103 srcRGB == PIPE_BLENDFACTOR_ZERO) &&
104 (srcA == PIPE_BLENDFACTOR_ZERO) &&
105 (dstRGB == PIPE_BLENDFACTOR_INV_SRC_COLOR ||
106 dstRGB == PIPE_BLENDFACTOR_ONE) &&
107 (dstA == PIPE_BLENDFACTOR_ONE);
108 }
109
110 static boolean blend_discard_if_src_color_1(unsigned srcRGB, unsigned srcA,
111 unsigned dstRGB, unsigned dstA)
112 {
113 /* If the blend equation is ADD or REVERSE_SUBTRACT,
114 * SRC_COLOR == (1,1,1), and the following state is set, the colorbuffer
115 * will not be changed.
116 * Notice that the dst factors are the src factors inverted. */
117 return (srcRGB == PIPE_BLENDFACTOR_INV_SRC_COLOR ||
118 srcRGB == PIPE_BLENDFACTOR_ZERO) &&
119 (srcA == PIPE_BLENDFACTOR_ZERO) &&
120 (dstRGB == PIPE_BLENDFACTOR_SRC_COLOR ||
121 dstRGB == PIPE_BLENDFACTOR_ONE) &&
122 (dstA == PIPE_BLENDFACTOR_ONE);
123 }
124
125 static boolean blend_discard_if_src_alpha_color_0(unsigned srcRGB, unsigned srcA,
126 unsigned dstRGB, unsigned dstA)
127 {
128 /* If the blend equation is ADD or REVERSE_SUBTRACT,
129 * SRC_ALPHA_COLOR == (0,0,0,0), and the following state is set,
130 * the colorbuffer will not be changed.
131 * Notice that the dst factors are the src factors inverted. */
132 return (srcRGB == PIPE_BLENDFACTOR_SRC_COLOR ||
133 srcRGB == PIPE_BLENDFACTOR_SRC_ALPHA ||
134 srcRGB == PIPE_BLENDFACTOR_SRC_ALPHA_SATURATE ||
135 srcRGB == PIPE_BLENDFACTOR_ZERO) &&
136 (srcA == PIPE_BLENDFACTOR_SRC_COLOR ||
137 srcA == PIPE_BLENDFACTOR_SRC_ALPHA ||
138 srcA == PIPE_BLENDFACTOR_SRC_ALPHA_SATURATE ||
139 srcA == PIPE_BLENDFACTOR_ZERO) &&
140 (dstRGB == PIPE_BLENDFACTOR_INV_SRC_COLOR ||
141 dstRGB == PIPE_BLENDFACTOR_INV_SRC_ALPHA ||
142 dstRGB == PIPE_BLENDFACTOR_ONE) &&
143 (dstA == PIPE_BLENDFACTOR_INV_SRC_COLOR ||
144 dstA == PIPE_BLENDFACTOR_INV_SRC_ALPHA ||
145 dstA == PIPE_BLENDFACTOR_ONE);
146 }
147
148 static boolean blend_discard_if_src_alpha_color_1(unsigned srcRGB, unsigned srcA,
149 unsigned dstRGB, unsigned dstA)
150 {
151 /* If the blend equation is ADD or REVERSE_SUBTRACT,
152 * SRC_ALPHA_COLOR == (1,1,1,1), and the following state is set,
153 * the colorbuffer will not be changed.
154 * Notice that the dst factors are the src factors inverted. */
155 return (srcRGB == PIPE_BLENDFACTOR_INV_SRC_COLOR ||
156 srcRGB == PIPE_BLENDFACTOR_INV_SRC_ALPHA ||
157 srcRGB == PIPE_BLENDFACTOR_ZERO) &&
158 (srcA == PIPE_BLENDFACTOR_INV_SRC_COLOR ||
159 srcA == PIPE_BLENDFACTOR_INV_SRC_ALPHA ||
160 srcA == PIPE_BLENDFACTOR_ZERO) &&
161 (dstRGB == PIPE_BLENDFACTOR_SRC_COLOR ||
162 dstRGB == PIPE_BLENDFACTOR_SRC_ALPHA ||
163 dstRGB == PIPE_BLENDFACTOR_ONE) &&
164 (dstA == PIPE_BLENDFACTOR_SRC_COLOR ||
165 dstA == PIPE_BLENDFACTOR_SRC_ALPHA ||
166 dstA == PIPE_BLENDFACTOR_ONE);
167 }
168
169 static unsigned bgra_cmask(unsigned mask)
170 {
171 /* Gallium uses RGBA color ordering while R300 expects BGRA. */
172
173 return ((mask & PIPE_MASK_R) << 2) |
174 ((mask & PIPE_MASK_B) >> 2) |
175 (mask & (PIPE_MASK_G | PIPE_MASK_A));
176 }
177
178 /* Create a new blend state based on the CSO blend state.
179 *
180 * This encompasses alpha blending, logic/raster ops, and blend dithering. */
181 static void* r300_create_blend_state(struct pipe_context* pipe,
182 const struct pipe_blend_state* state)
183 {
184 struct r300_screen* r300screen = r300_screen(pipe->screen);
185 struct r300_blend_state* blend = CALLOC_STRUCT(r300_blend_state);
186 uint32_t blend_control = 0; /* R300_RB3D_CBLEND: 0x4e04 */
187 uint32_t alpha_blend_control = 0; /* R300_RB3D_ABLEND: 0x4e08 */
188 uint32_t color_channel_mask = 0; /* R300_RB3D_COLOR_CHANNEL_MASK: 0x4e0c */
189 uint32_t rop = 0; /* R300_RB3D_ROPCNTL: 0x4e18 */
190 uint32_t dither = 0; /* R300_RB3D_DITHER_CTL: 0x4e50 */
191 CB_LOCALS;
192
193 if (state->rt[0].blend_enable)
194 {
195 unsigned eqRGB = state->rt[0].rgb_func;
196 unsigned srcRGB = state->rt[0].rgb_src_factor;
197 unsigned dstRGB = state->rt[0].rgb_dst_factor;
198
199 unsigned eqA = state->rt[0].alpha_func;
200 unsigned srcA = state->rt[0].alpha_src_factor;
201 unsigned dstA = state->rt[0].alpha_dst_factor;
202
203 /* despite the name, ALPHA_BLEND_ENABLE has nothing to do with alpha,
204 * this is just the crappy D3D naming */
205 blend_control = R300_ALPHA_BLEND_ENABLE |
206 r300_translate_blend_function(eqRGB) |
207 ( r300_translate_blend_factor(srcRGB) << R300_SRC_BLEND_SHIFT) |
208 ( r300_translate_blend_factor(dstRGB) << R300_DST_BLEND_SHIFT);
209
210 /* Optimization: some operations do not require the destination color.
211 *
212 * When SRC_ALPHA_SATURATE is used, colorbuffer reads must be enabled,
213 * otherwise blending gives incorrect results. It seems to be
214 * a hardware bug. */
215 if (eqRGB == PIPE_BLEND_MIN || eqA == PIPE_BLEND_MIN ||
216 eqRGB == PIPE_BLEND_MAX || eqA == PIPE_BLEND_MAX ||
217 dstRGB != PIPE_BLENDFACTOR_ZERO ||
218 dstA != PIPE_BLENDFACTOR_ZERO ||
219 srcRGB == PIPE_BLENDFACTOR_DST_COLOR ||
220 srcRGB == PIPE_BLENDFACTOR_DST_ALPHA ||
221 srcRGB == PIPE_BLENDFACTOR_INV_DST_COLOR ||
222 srcRGB == PIPE_BLENDFACTOR_INV_DST_ALPHA ||
223 srcA == PIPE_BLENDFACTOR_DST_COLOR ||
224 srcA == PIPE_BLENDFACTOR_DST_ALPHA ||
225 srcA == PIPE_BLENDFACTOR_INV_DST_COLOR ||
226 srcA == PIPE_BLENDFACTOR_INV_DST_ALPHA ||
227 srcRGB == PIPE_BLENDFACTOR_SRC_ALPHA_SATURATE) {
228 /* Enable reading from the colorbuffer. */
229 blend_control |= R300_READ_ENABLE;
230
231 if (r300screen->caps.is_r500) {
232 /* Optimization: Depending on incoming pixels, we can
233 * conditionally disable the reading in hardware... */
234 if (eqRGB != PIPE_BLEND_MIN && eqA != PIPE_BLEND_MIN &&
235 eqRGB != PIPE_BLEND_MAX && eqA != PIPE_BLEND_MAX) {
236 /* Disable reading if SRC_ALPHA == 0. */
237 if ((dstRGB == PIPE_BLENDFACTOR_SRC_ALPHA ||
238 dstRGB == PIPE_BLENDFACTOR_ZERO) &&
239 (dstA == PIPE_BLENDFACTOR_SRC_COLOR ||
240 dstA == PIPE_BLENDFACTOR_SRC_ALPHA ||
241 dstA == PIPE_BLENDFACTOR_ZERO)) {
242 blend_control |= R500_SRC_ALPHA_0_NO_READ;
243 }
244
245 /* Disable reading if SRC_ALPHA == 1. */
246 if ((dstRGB == PIPE_BLENDFACTOR_INV_SRC_ALPHA ||
247 dstRGB == PIPE_BLENDFACTOR_ZERO) &&
248 (dstA == PIPE_BLENDFACTOR_INV_SRC_COLOR ||
249 dstA == PIPE_BLENDFACTOR_INV_SRC_ALPHA ||
250 dstA == PIPE_BLENDFACTOR_ZERO)) {
251 blend_control |= R500_SRC_ALPHA_1_NO_READ;
252 }
253 }
254 }
255 }
256
257 /* Optimization: discard pixels which don't change the colorbuffer.
258 *
259 * The code below is non-trivial and some math is involved.
260 *
261 * Discarding pixels must be disabled when FP16 AA is enabled.
262 * This is a hardware bug. Also, this implementation wouldn't work
263 * with FP blending enabled and equation clamping disabled.
264 *
265 * Equations other than ADD are rarely used and therefore won't be
266 * optimized. */
267 if ((eqRGB == PIPE_BLEND_ADD || eqRGB == PIPE_BLEND_REVERSE_SUBTRACT) &&
268 (eqA == PIPE_BLEND_ADD || eqA == PIPE_BLEND_REVERSE_SUBTRACT)) {
269 /* ADD: X+Y
270 * REVERSE_SUBTRACT: Y-X
271 *
272 * The idea is:
273 * If X = src*srcFactor = 0 and Y = dst*dstFactor = 1,
274 * then CB will not be changed.
275 *
276 * Given the srcFactor and dstFactor variables, we can derive
277 * what src and dst should be equal to and discard appropriate
278 * pixels.
279 */
280 if (blend_discard_if_src_alpha_0(srcRGB, srcA, dstRGB, dstA)) {
281 blend_control |= R300_DISCARD_SRC_PIXELS_SRC_ALPHA_0;
282 } else if (blend_discard_if_src_alpha_1(srcRGB, srcA,
283 dstRGB, dstA)) {
284 blend_control |= R300_DISCARD_SRC_PIXELS_SRC_ALPHA_1;
285 } else if (blend_discard_if_src_color_0(srcRGB, srcA,
286 dstRGB, dstA)) {
287 blend_control |= R300_DISCARD_SRC_PIXELS_SRC_COLOR_0;
288 } else if (blend_discard_if_src_color_1(srcRGB, srcA,
289 dstRGB, dstA)) {
290 blend_control |= R300_DISCARD_SRC_PIXELS_SRC_COLOR_1;
291 } else if (blend_discard_if_src_alpha_color_0(srcRGB, srcA,
292 dstRGB, dstA)) {
293 blend_control |=
294 R300_DISCARD_SRC_PIXELS_SRC_ALPHA_COLOR_0;
295 } else if (blend_discard_if_src_alpha_color_1(srcRGB, srcA,
296 dstRGB, dstA)) {
297 blend_control |=
298 R300_DISCARD_SRC_PIXELS_SRC_ALPHA_COLOR_1;
299 }
300 }
301
302 /* separate alpha */
303 if (srcA != srcRGB || dstA != dstRGB || eqA != eqRGB) {
304 blend_control |= R300_SEPARATE_ALPHA_ENABLE;
305 alpha_blend_control =
306 r300_translate_blend_function(eqA) |
307 (r300_translate_blend_factor(srcA) << R300_SRC_BLEND_SHIFT) |
308 (r300_translate_blend_factor(dstA) << R300_DST_BLEND_SHIFT);
309 }
310 }
311
312 /* PIPE_LOGICOP_* don't need to be translated, fortunately. */
313 if (state->logicop_enable) {
314 rop = R300_RB3D_ROPCNTL_ROP_ENABLE |
315 (state->logicop_func) << R300_RB3D_ROPCNTL_ROP_SHIFT;
316 }
317
318 /* Color channel masks for all MRTs. */
319 color_channel_mask = bgra_cmask(state->rt[0].colormask);
320 if (r300screen->caps.is_r500 && state->independent_blend_enable) {
321 if (state->rt[1].blend_enable) {
322 color_channel_mask |= bgra_cmask(state->rt[1].colormask) << 4;
323 }
324 if (state->rt[2].blend_enable) {
325 color_channel_mask |= bgra_cmask(state->rt[2].colormask) << 8;
326 }
327 if (state->rt[3].blend_enable) {
328 color_channel_mask |= bgra_cmask(state->rt[3].colormask) << 12;
329 }
330 }
331
332 /* Neither fglrx nor classic r300 ever set this, regardless of dithering
333 * state. Since it's an optional implementation detail, we can leave it
334 * out and never dither.
335 *
336 * This could be revisited if we ever get quality or conformance hints.
337 *
338 if (state->dither) {
339 dither = R300_RB3D_DITHER_CTL_DITHER_MODE_LUT |
340 R300_RB3D_DITHER_CTL_ALPHA_DITHER_MODE_LUT;
341 }
342 */
343
344 /* Build a command buffer. */
345 BEGIN_CB(blend->cb, 8);
346 OUT_CB_REG(R300_RB3D_ROPCNTL, rop);
347 OUT_CB_REG_SEQ(R300_RB3D_CBLEND, 3);
348 OUT_CB(blend_control);
349 OUT_CB(alpha_blend_control);
350 OUT_CB(color_channel_mask);
351 OUT_CB_REG(R300_RB3D_DITHER_CTL, dither);
352 END_CB;
353
354 /* The same as above, but with no colorbuffer reads and writes. */
355 BEGIN_CB(blend->cb_no_readwrite, 8);
356 OUT_CB_REG(R300_RB3D_ROPCNTL, rop);
357 OUT_CB_REG_SEQ(R300_RB3D_CBLEND, 3);
358 OUT_CB(0);
359 OUT_CB(0);
360 OUT_CB(0);
361 OUT_CB_REG(R300_RB3D_DITHER_CTL, dither);
362 END_CB;
363
364 return (void*)blend;
365 }
366
367 /* Bind blend state. */
368 static void r300_bind_blend_state(struct pipe_context* pipe,
369 void* state)
370 {
371 struct r300_context* r300 = r300_context(pipe);
372
373 UPDATE_STATE(state, r300->blend_state);
374 }
375
376 /* Free blend state. */
377 static void r300_delete_blend_state(struct pipe_context* pipe,
378 void* state)
379 {
380 FREE(state);
381 }
382
383 /* Convert float to 10bit integer */
384 static unsigned float_to_fixed10(float f)
385 {
386 return CLAMP((unsigned)(f * 1023.9f), 0, 1023);
387 }
388
389 /* Set blend color.
390 * Setup both R300 and R500 registers, figure out later which one to write. */
391 static void r300_set_blend_color(struct pipe_context* pipe,
392 const struct pipe_blend_color* color)
393 {
394 struct r300_context* r300 = r300_context(pipe);
395 struct r300_blend_color_state* state =
396 (struct r300_blend_color_state*)r300->blend_color_state.state;
397 CB_LOCALS;
398
399 if (r300->screen->caps.is_r500) {
400 /* XXX if FP16 blending is enabled, we should use the FP16 format */
401 BEGIN_CB(state->cb, 3);
402 OUT_CB_REG_SEQ(R500_RB3D_CONSTANT_COLOR_AR, 2);
403 OUT_CB(float_to_fixed10(color->color[0]) |
404 (float_to_fixed10(color->color[3]) << 16));
405 OUT_CB(float_to_fixed10(color->color[2]) |
406 (float_to_fixed10(color->color[1]) << 16));
407 END_CB;
408 } else {
409 union util_color uc;
410 util_pack_color(color->color, PIPE_FORMAT_B8G8R8A8_UNORM, &uc);
411
412 BEGIN_CB(state->cb, 2);
413 OUT_CB_REG(R300_RB3D_BLEND_COLOR, uc.ui);
414 END_CB;
415 }
416
417 r300->blend_color_state.dirty = TRUE;
418 }
419
420 static void r300_set_clip_state(struct pipe_context* pipe,
421 const struct pipe_clip_state* state)
422 {
423 struct r300_context* r300 = r300_context(pipe);
424 struct r300_clip_state *clip =
425 (struct r300_clip_state*)r300->clip_state.state;
426 CB_LOCALS;
427
428 clip->clip = *state;
429
430 if (r300->screen->caps.has_tcl) {
431 BEGIN_CB(clip->cb, 29);
432 OUT_CB_REG(R300_VAP_PVS_VECTOR_INDX_REG,
433 (r300->screen->caps.is_r500 ?
434 R500_PVS_UCP_START : R300_PVS_UCP_START));
435 OUT_CB_ONE_REG(R300_VAP_PVS_UPLOAD_DATA, 6 * 4);
436 OUT_CB_TABLE(state->ucp, 6 * 4);
437 OUT_CB_REG(R300_VAP_CLIP_CNTL, ((1 << state->nr) - 1) |
438 R300_PS_UCP_MODE_CLIP_AS_TRIFAN);
439 END_CB;
440
441 r300->clip_state.dirty = TRUE;
442 } else {
443 draw_flush(r300->draw);
444 draw_set_clip_state(r300->draw, state);
445 }
446 }
447
448 static void
449 r300_set_sample_mask(struct pipe_context *pipe,
450 unsigned sample_mask)
451 {
452 }
453
454
455 /* Create a new depth, stencil, and alpha state based on the CSO dsa state.
456 *
457 * This contains the depth buffer, stencil buffer, alpha test, and such.
458 * On the Radeon, depth and stencil buffer setup are intertwined, which is
459 * the reason for some of the strange-looking assignments across registers. */
460 static void*
461 r300_create_dsa_state(struct pipe_context* pipe,
462 const struct pipe_depth_stencil_alpha_state* state)
463 {
464 struct r300_capabilities *caps = &r300_screen(pipe->screen)->caps;
465 struct r300_dsa_state* dsa = CALLOC_STRUCT(r300_dsa_state);
466 CB_LOCALS;
467
468 dsa->dsa = *state;
469
470 /* Depth test setup. */
471 if (state->depth.enabled) {
472 dsa->z_buffer_control |= R300_Z_ENABLE;
473
474 if (state->depth.writemask) {
475 dsa->z_buffer_control |= R300_Z_WRITE_ENABLE;
476 }
477
478 dsa->z_stencil_control |=
479 (r300_translate_depth_stencil_function(state->depth.func) <<
480 R300_Z_FUNC_SHIFT);
481 }
482
483 /* Stencil buffer setup. */
484 if (state->stencil[0].enabled) {
485 dsa->z_buffer_control |= R300_STENCIL_ENABLE;
486 dsa->z_stencil_control |=
487 (r300_translate_depth_stencil_function(state->stencil[0].func) <<
488 R300_S_FRONT_FUNC_SHIFT) |
489 (r300_translate_stencil_op(state->stencil[0].fail_op) <<
490 R300_S_FRONT_SFAIL_OP_SHIFT) |
491 (r300_translate_stencil_op(state->stencil[0].zpass_op) <<
492 R300_S_FRONT_ZPASS_OP_SHIFT) |
493 (r300_translate_stencil_op(state->stencil[0].zfail_op) <<
494 R300_S_FRONT_ZFAIL_OP_SHIFT);
495
496 dsa->stencil_ref_mask =
497 (state->stencil[0].valuemask << R300_STENCILMASK_SHIFT) |
498 (state->stencil[0].writemask << R300_STENCILWRITEMASK_SHIFT);
499
500 if (state->stencil[1].enabled) {
501 dsa->two_sided = TRUE;
502
503 dsa->z_buffer_control |= R300_STENCIL_FRONT_BACK;
504 dsa->z_stencil_control |=
505 (r300_translate_depth_stencil_function(state->stencil[1].func) <<
506 R300_S_BACK_FUNC_SHIFT) |
507 (r300_translate_stencil_op(state->stencil[1].fail_op) <<
508 R300_S_BACK_SFAIL_OP_SHIFT) |
509 (r300_translate_stencil_op(state->stencil[1].zpass_op) <<
510 R300_S_BACK_ZPASS_OP_SHIFT) |
511 (r300_translate_stencil_op(state->stencil[1].zfail_op) <<
512 R300_S_BACK_ZFAIL_OP_SHIFT);
513
514 dsa->stencil_ref_bf =
515 (state->stencil[1].valuemask << R300_STENCILMASK_SHIFT) |
516 (state->stencil[1].writemask << R300_STENCILWRITEMASK_SHIFT);
517
518 if (caps->is_r500) {
519 dsa->z_buffer_control |= R500_STENCIL_REFMASK_FRONT_BACK;
520 } else {
521 dsa->two_sided_stencil_ref =
522 (state->stencil[0].valuemask != state->stencil[1].valuemask ||
523 state->stencil[0].writemask != state->stencil[1].writemask);
524 }
525 }
526 }
527
528 /* Alpha test setup. */
529 if (state->alpha.enabled) {
530 dsa->alpha_function =
531 r300_translate_alpha_function(state->alpha.func) |
532 R300_FG_ALPHA_FUNC_ENABLE;
533
534 /* We could use 10bit alpha ref but who needs that? */
535 dsa->alpha_function |= float_to_ubyte(state->alpha.ref_value);
536
537 if (caps->is_r500)
538 dsa->alpha_function |= R500_FG_ALPHA_FUNC_8BIT;
539 }
540
541 BEGIN_CB(&dsa->cb_begin, 8);
542 OUT_CB_REG(R300_FG_ALPHA_FUNC, dsa->alpha_function);
543 OUT_CB_REG_SEQ(R300_ZB_CNTL, 3);
544 OUT_CB(dsa->z_buffer_control);
545 OUT_CB(dsa->z_stencil_control);
546 OUT_CB(dsa->stencil_ref_mask);
547 OUT_CB_REG(R500_ZB_STENCILREFMASK_BF, dsa->stencil_ref_bf);
548 END_CB;
549
550 BEGIN_CB(dsa->cb_no_readwrite, 8);
551 OUT_CB_REG(R300_FG_ALPHA_FUNC, dsa->alpha_function);
552 OUT_CB_REG_SEQ(R300_ZB_CNTL, 3);
553 OUT_CB(0);
554 OUT_CB(0);
555 OUT_CB(0);
556 OUT_CB_REG(R500_ZB_STENCILREFMASK_BF, 0);
557 END_CB;
558
559 return (void*)dsa;
560 }
561
562 static void r300_dsa_inject_stencilref(struct r300_context *r300)
563 {
564 struct r300_dsa_state *dsa =
565 (struct r300_dsa_state*)r300->dsa_state.state;
566
567 if (!dsa)
568 return;
569
570 dsa->stencil_ref_mask =
571 (dsa->stencil_ref_mask & ~R300_STENCILREF_MASK) |
572 r300->stencil_ref.ref_value[0];
573 dsa->stencil_ref_bf =
574 (dsa->stencil_ref_bf & ~R300_STENCILREF_MASK) |
575 r300->stencil_ref.ref_value[1];
576 }
577
578 /* Bind DSA state. */
579 static void r300_bind_dsa_state(struct pipe_context* pipe,
580 void* state)
581 {
582 struct r300_context* r300 = r300_context(pipe);
583
584 if (!state) {
585 return;
586 }
587
588 UPDATE_STATE(state, r300->dsa_state);
589
590 r300_dsa_inject_stencilref(r300);
591 }
592
593 /* Free DSA state. */
594 static void r300_delete_dsa_state(struct pipe_context* pipe,
595 void* state)
596 {
597 FREE(state);
598 }
599
600 static void r300_set_stencil_ref(struct pipe_context* pipe,
601 const struct pipe_stencil_ref* sr)
602 {
603 struct r300_context* r300 = r300_context(pipe);
604
605 r300->stencil_ref = *sr;
606
607 r300_dsa_inject_stencilref(r300);
608 r300->dsa_state.dirty = TRUE;
609 }
610
611 /* This switcheroo is needed just because of goddamned MACRO_SWITCH. */
612 static void r300_fb_set_tiling_flags(struct r300_context *r300,
613 const struct pipe_framebuffer_state *old_state,
614 const struct pipe_framebuffer_state *new_state)
615 {
616 struct r300_texture *tex;
617 unsigned i, level;
618
619 /* Set tiling flags for new surfaces. */
620 for (i = 0; i < new_state->nr_cbufs; i++) {
621 tex = r300_texture(new_state->cbufs[i]->texture);
622 level = new_state->cbufs[i]->level;
623
624 r300->rws->buffer_set_tiling(r300->rws, tex->buffer,
625 tex->pitch[0] * util_format_get_blocksize(tex->b.b.format),
626 tex->microtile,
627 tex->mip_macrotile[level]);
628 }
629 if (new_state->zsbuf) {
630 tex = r300_texture(new_state->zsbuf->texture);
631 level = new_state->zsbuf->level;
632
633 r300->rws->buffer_set_tiling(r300->rws, tex->buffer,
634 tex->pitch[0] * util_format_get_blocksize(tex->b.b.format),
635 tex->microtile,
636 tex->mip_macrotile[level]);
637 }
638 }
639
640 static void r300_print_fb_surf_info(struct pipe_surface *surf, unsigned index,
641 const char *binding)
642 {
643 struct pipe_resource *tex = surf->texture;
644 struct r300_texture *rtex = r300_texture(tex);
645
646 fprintf(stderr,
647 "r300: %s[%i] Dim: %ix%i, Offset: %i, ZSlice: %i, "
648 "Face: %i, Level: %i, Format: %s\n"
649
650 "r300: TEX: Macro: %s, Micro: %s, Pitch: %i, "
651 "Dim: %ix%ix%i, LastLevel: %i, Format: %s\n",
652
653 binding, index, surf->width, surf->height, surf->offset,
654 surf->zslice, surf->face, surf->level,
655 util_format_short_name(surf->format),
656
657 rtex->macrotile ? "YES" : " NO", rtex->microtile ? "YES" : " NO",
658 rtex->hwpitch[0], tex->width0, tex->height0, tex->depth0,
659 tex->last_level, util_format_short_name(tex->format));
660 }
661
662 static void
663 r300_set_framebuffer_state(struct pipe_context* pipe,
664 const struct pipe_framebuffer_state* state)
665 {
666 struct r300_context* r300 = r300_context(pipe);
667 struct pipe_framebuffer_state *old_state = r300->fb_state.state;
668 unsigned max_width, max_height, i;
669 uint32_t zbuffer_bpp = 0;
670
671 if (state->nr_cbufs > 4) {
672 fprintf(stderr, "r300: Implementation error: Too many MRTs in %s, "
673 "refusing to bind framebuffer state!\n", __FUNCTION__);
674 return;
675 }
676
677 if (r300->screen->caps.is_r500) {
678 max_width = max_height = 4096;
679 } else if (r300->screen->caps.is_r400) {
680 max_width = max_height = 4021;
681 } else {
682 max_width = max_height = 2560;
683 }
684
685 if (state->width > max_width || state->height > max_height) {
686 fprintf(stderr, "r300: Implementation error: Render targets are too "
687 "big in %s, refusing to bind framebuffer state!\n", __FUNCTION__);
688 return;
689 }
690
691 if (r300->draw) {
692 draw_flush(r300->draw);
693 }
694
695 r300->fb_state.dirty = TRUE;
696
697 /* If nr_cbufs is changed from zero to non-zero or vice versa... */
698 if (!!old_state->nr_cbufs != !!state->nr_cbufs) {
699 r300->blend_state.dirty = TRUE;
700 }
701 /* If zsbuf is set from NULL to non-NULL or vice versa.. */
702 if (!!old_state->zsbuf != !!state->zsbuf) {
703 r300->dsa_state.dirty = TRUE;
704 }
705
706 /* The tiling flags are dependent on the surface miplevel, unfortunately. */
707 r300_fb_set_tiling_flags(r300, r300->fb_state.state, state);
708
709 memcpy(r300->fb_state.state, state, sizeof(struct pipe_framebuffer_state));
710
711 r300->fb_state.size = (10 * state->nr_cbufs) + (2 * (4 - state->nr_cbufs)) +
712 (state->zsbuf ? 10 : 0) + 11;
713
714 /* Polygon offset depends on the zbuffer bit depth. */
715 if (state->zsbuf && r300->polygon_offset_enabled) {
716 switch (util_format_get_blocksize(state->zsbuf->texture->format)) {
717 case 2:
718 zbuffer_bpp = 16;
719 break;
720 case 4:
721 zbuffer_bpp = 24;
722 break;
723 }
724
725 if (r300->zbuffer_bpp != zbuffer_bpp) {
726 r300->zbuffer_bpp = zbuffer_bpp;
727 r300->rs_state.dirty = TRUE;
728 }
729 }
730
731 if (DBG_ON(r300, DBG_FB)) {
732 fprintf(stderr, "r300: set_framebuffer_state:\n");
733 for (i = 0; i < state->nr_cbufs; i++) {
734 r300_print_fb_surf_info(state->cbufs[i], i, "CB");
735 }
736 if (state->zsbuf) {
737 r300_print_fb_surf_info(state->zsbuf, 0, "ZB");
738 }
739 }
740 }
741
742 /* Create fragment shader state. */
743 static void* r300_create_fs_state(struct pipe_context* pipe,
744 const struct pipe_shader_state* shader)
745 {
746 struct r300_fragment_shader* fs = NULL;
747
748 fs = (struct r300_fragment_shader*)CALLOC_STRUCT(r300_fragment_shader);
749
750 /* Copy state directly into shader. */
751 fs->state = *shader;
752 fs->state.tokens = tgsi_dup_tokens(shader->tokens);
753
754 return (void*)fs;
755 }
756
757 void r300_mark_fs_code_dirty(struct r300_context *r300)
758 {
759 struct r300_fragment_shader* fs = r300_fs(r300);
760
761 r300->fs.dirty = TRUE;
762 r300->fs_rc_constant_state.dirty = TRUE;
763 r300->fs_constants.dirty = TRUE;
764 r300->fs.size = fs->shader->cb_code_size;
765
766 if (r300->screen->caps.is_r500) {
767 r300->fs_rc_constant_state.size = fs->shader->rc_state_count * 7;
768 r300->fs_constants.size = fs->shader->externals_count * 4 + 3;
769 } else {
770 r300->fs_rc_constant_state.size = fs->shader->rc_state_count * 5;
771 r300->fs_constants.size = fs->shader->externals_count * 4 + 1;
772 }
773 }
774
775 /* Bind fragment shader state. */
776 static void r300_bind_fs_state(struct pipe_context* pipe, void* shader)
777 {
778 struct r300_context* r300 = r300_context(pipe);
779 struct r300_fragment_shader* fs = (struct r300_fragment_shader*)shader;
780
781 if (fs == NULL) {
782 r300->fs.state = NULL;
783 return;
784 }
785
786 r300->fs.state = fs;
787 r300_pick_fragment_shader(r300);
788 r300_mark_fs_code_dirty(r300);
789
790 r300->rs_block_state.dirty = TRUE; /* Will be updated before the emission. */
791 }
792
793 /* Delete fragment shader state. */
794 static void r300_delete_fs_state(struct pipe_context* pipe, void* shader)
795 {
796 struct r300_fragment_shader* fs = (struct r300_fragment_shader*)shader;
797 struct r300_fragment_shader_code *tmp, *ptr = fs->first;
798
799 while (ptr) {
800 tmp = ptr;
801 ptr = ptr->next;
802 rc_constants_destroy(&tmp->code.constants);
803 FREE(tmp->cb_code);
804 FREE(tmp);
805 }
806 FREE((void*)fs->state.tokens);
807 FREE(shader);
808 }
809
810 static void r300_set_polygon_stipple(struct pipe_context* pipe,
811 const struct pipe_poly_stipple* state)
812 {
813 /* XXX no idea how to set this up, but not terribly important */
814 }
815
816 /* Create a new rasterizer state based on the CSO rasterizer state.
817 *
818 * This is a very large chunk of state, and covers most of the graphics
819 * backend (GB), geometry assembly (GA), and setup unit (SU) blocks.
820 *
821 * In a not entirely unironic sidenote, this state has nearly nothing to do
822 * with the actual block on the Radeon called the rasterizer (RS). */
823 static void* r300_create_rs_state(struct pipe_context* pipe,
824 const struct pipe_rasterizer_state* state)
825 {
826 struct r300_rs_state* rs = CALLOC_STRUCT(r300_rs_state);
827 int i;
828 float psiz;
829
830 /* Copy rasterizer state. */
831 rs->rs = *state;
832 rs->rs_draw = *state;
833
834 /* Override some states for Draw. */
835 rs->rs_draw.sprite_coord_enable = 0; /* We can do this in HW. */
836
837 #ifdef PIPE_ARCH_LITTLE_ENDIAN
838 rs->vap_control_status = R300_VC_NO_SWAP;
839 #else
840 rs->vap_control_status = R300_VC_32BIT_SWAP;
841 #endif
842
843 /* If no TCL engine is present, turn off the HW TCL. */
844 if (!r300_screen(pipe->screen)->caps.has_tcl) {
845 rs->vap_control_status |= R300_VAP_TCL_BYPASS;
846 }
847
848 /* Point size width and height. */
849 rs->point_size =
850 pack_float_16_6x(state->point_size) |
851 (pack_float_16_6x(state->point_size) << R300_POINTSIZE_X_SHIFT);
852
853 /* Point size clamping. */
854 if (state->point_size_per_vertex) {
855 /* Per-vertex point size.
856 * Clamp to [0, max FB size] */
857 psiz = pipe->screen->get_paramf(pipe->screen,
858 PIPE_CAP_MAX_POINT_WIDTH);
859 rs->point_minmax =
860 pack_float_16_6x(psiz) << R300_GA_POINT_MINMAX_MAX_SHIFT;
861 } else {
862 /* We cannot disable the point-size vertex output,
863 * so clamp it. */
864 psiz = state->point_size;
865 rs->point_minmax =
866 (pack_float_16_6x(psiz) << R300_GA_POINT_MINMAX_MIN_SHIFT) |
867 (pack_float_16_6x(psiz) << R300_GA_POINT_MINMAX_MAX_SHIFT);
868 }
869
870 /* Line control. */
871 rs->line_control = pack_float_16_6x(state->line_width) |
872 R300_GA_LINE_CNTL_END_TYPE_COMP;
873
874 /* Enable polygon mode */
875 if (state->fill_front != PIPE_POLYGON_MODE_FILL ||
876 state->fill_back != PIPE_POLYGON_MODE_FILL) {
877 rs->polygon_mode = R300_GA_POLY_MODE_DUAL;
878 }
879
880 /* Front face */
881 if (state->front_ccw)
882 rs->cull_mode = R300_FRONT_FACE_CCW;
883 else
884 rs->cull_mode = R300_FRONT_FACE_CW;
885
886 /* Polygon offset */
887 if (util_get_offset(state, state->fill_front)) {
888 rs->polygon_offset_enable |= R300_FRONT_ENABLE;
889 }
890 if (util_get_offset(state, state->fill_back)) {
891 rs->polygon_offset_enable |= R300_BACK_ENABLE;
892 }
893
894 /* Polygon mode */
895 if (rs->polygon_mode) {
896 rs->polygon_mode |=
897 r300_translate_polygon_mode_front(state->fill_front);
898 rs->polygon_mode |=
899 r300_translate_polygon_mode_back(state->fill_back);
900 }
901
902 if (state->cull_face & PIPE_FACE_FRONT) {
903 rs->cull_mode |= R300_CULL_FRONT;
904 }
905 if (state->cull_face & PIPE_FACE_BACK) {
906 rs->cull_mode |= R300_CULL_BACK;
907 }
908
909 if (rs->polygon_offset_enable) {
910 rs->depth_offset = state->offset_units;
911 rs->depth_scale = state->offset_scale;
912 }
913
914 if (state->line_stipple_enable) {
915 rs->line_stipple_config =
916 R300_GA_LINE_STIPPLE_CONFIG_LINE_RESET_LINE |
917 (fui((float)state->line_stipple_factor) &
918 R300_GA_LINE_STIPPLE_CONFIG_STIPPLE_SCALE_MASK);
919 /* XXX this might need to be scaled up */
920 rs->line_stipple_value = state->line_stipple_pattern;
921 }
922
923 if (state->flatshade) {
924 rs->color_control = R300_SHADE_MODEL_FLAT;
925 } else {
926 rs->color_control = R300_SHADE_MODEL_SMOOTH;
927 }
928
929 rs->clip_rule = state->scissor ? 0xAAAA : 0xFFFF;
930
931 /* Point sprites */
932 if (state->sprite_coord_enable) {
933 rs->stuffing_enable = R300_GB_POINT_STUFF_ENABLE;
934 for (i = 0; i < 8; i++) {
935 if (state->sprite_coord_enable & (1 << i))
936 rs->stuffing_enable |=
937 R300_GB_TEX_STR << (R300_GB_TEX0_SOURCE_SHIFT + (i*2));
938 }
939
940 rs->point_texcoord_left = 0.0f;
941 rs->point_texcoord_right = 1.0f;
942
943 switch (state->sprite_coord_mode) {
944 case PIPE_SPRITE_COORD_UPPER_LEFT:
945 rs->point_texcoord_top = 0.0f;
946 rs->point_texcoord_bottom = 1.0f;
947 break;
948 case PIPE_SPRITE_COORD_LOWER_LEFT:
949 rs->point_texcoord_top = 1.0f;
950 rs->point_texcoord_bottom = 0.0f;
951 break;
952 }
953 }
954
955 if (state->gl_rasterization_rules) {
956 rs->multisample_position_0 = 0x66666666;
957 rs->multisample_position_1 = 0x6666666;
958 }
959
960 return (void*)rs;
961 }
962
963 /* Bind rasterizer state. */
964 static void r300_bind_rs_state(struct pipe_context* pipe, void* state)
965 {
966 struct r300_context* r300 = r300_context(pipe);
967 struct r300_rs_state* rs = (struct r300_rs_state*)state;
968 int last_sprite_coord_enable = r300->sprite_coord_enable;
969 boolean last_two_sided_color = r300->two_sided_color;
970
971 if (r300->draw && rs) {
972 draw_flush(r300->draw);
973 draw_set_rasterizer_state(r300->draw, &rs->rs_draw, state);
974 }
975
976 if (rs) {
977 r300->polygon_offset_enabled = (rs->rs.offset_point ||
978 rs->rs.offset_line ||
979 rs->rs.offset_tri);
980 r300->sprite_coord_enable = rs->rs.sprite_coord_enable;
981 r300->two_sided_color = rs->rs.light_twoside;
982 } else {
983 r300->polygon_offset_enabled = FALSE;
984 r300->sprite_coord_enable = 0;
985 r300->two_sided_color = FALSE;
986 }
987
988 UPDATE_STATE(state, r300->rs_state);
989 r300->rs_state.size = 25 + (r300->polygon_offset_enabled ? 5 : 0) +
990 (r300->rws->get_value(r300->rws, R300_VID_DRM_2_3_0) ? 5 : 0);
991
992 if (last_sprite_coord_enable != r300->sprite_coord_enable ||
993 last_two_sided_color != r300->two_sided_color) {
994 r300->rs_block_state.dirty = TRUE;
995 }
996 }
997
998 /* Free rasterizer state. */
999 static void r300_delete_rs_state(struct pipe_context* pipe, void* state)
1000 {
1001 FREE(state);
1002 }
1003
1004 static void*
1005 r300_create_sampler_state(struct pipe_context* pipe,
1006 const struct pipe_sampler_state* state)
1007 {
1008 struct r300_context* r300 = r300_context(pipe);
1009 struct r300_sampler_state* sampler = CALLOC_STRUCT(r300_sampler_state);
1010 boolean is_r500 = r300->screen->caps.is_r500;
1011 int lod_bias;
1012 union util_color uc;
1013
1014 sampler->state = *state;
1015
1016 /* r300 doesn't handle CLAMP and MIRROR_CLAMP correctly when either MAG
1017 * or MIN filter is NEAREST. Since texwrap produces same results
1018 * for CLAMP and CLAMP_TO_EDGE, we use them instead. */
1019 if (sampler->state.min_img_filter == PIPE_TEX_FILTER_NEAREST ||
1020 sampler->state.mag_img_filter == PIPE_TEX_FILTER_NEAREST) {
1021 /* Wrap S. */
1022 if (sampler->state.wrap_s == PIPE_TEX_WRAP_CLAMP)
1023 sampler->state.wrap_s = PIPE_TEX_WRAP_CLAMP_TO_EDGE;
1024 else if (sampler->state.wrap_s == PIPE_TEX_WRAP_MIRROR_CLAMP)
1025 sampler->state.wrap_s = PIPE_TEX_WRAP_MIRROR_CLAMP_TO_EDGE;
1026
1027 /* Wrap T. */
1028 if (sampler->state.wrap_t == PIPE_TEX_WRAP_CLAMP)
1029 sampler->state.wrap_t = PIPE_TEX_WRAP_CLAMP_TO_EDGE;
1030 else if (sampler->state.wrap_t == PIPE_TEX_WRAP_MIRROR_CLAMP)
1031 sampler->state.wrap_t = PIPE_TEX_WRAP_MIRROR_CLAMP_TO_EDGE;
1032
1033 /* Wrap R. */
1034 if (sampler->state.wrap_r == PIPE_TEX_WRAP_CLAMP)
1035 sampler->state.wrap_r = PIPE_TEX_WRAP_CLAMP_TO_EDGE;
1036 else if (sampler->state.wrap_r == PIPE_TEX_WRAP_MIRROR_CLAMP)
1037 sampler->state.wrap_r = PIPE_TEX_WRAP_MIRROR_CLAMP_TO_EDGE;
1038 }
1039
1040 sampler->filter0 |=
1041 (r300_translate_wrap(sampler->state.wrap_s) << R300_TX_WRAP_S_SHIFT) |
1042 (r300_translate_wrap(sampler->state.wrap_t) << R300_TX_WRAP_T_SHIFT) |
1043 (r300_translate_wrap(sampler->state.wrap_r) << R300_TX_WRAP_R_SHIFT);
1044
1045 sampler->filter0 |= r300_translate_tex_filters(state->min_img_filter,
1046 state->mag_img_filter,
1047 state->min_mip_filter,
1048 state->max_anisotropy > 0);
1049
1050 sampler->filter0 |= r300_anisotropy(state->max_anisotropy);
1051
1052 /* Unfortunately, r300-r500 don't support floating-point mipmap lods. */
1053 /* We must pass these to the merge function to clamp them properly. */
1054 sampler->min_lod = MAX2((unsigned)state->min_lod, 0);
1055 sampler->max_lod = MAX2((unsigned)ceilf(state->max_lod), 0);
1056
1057 lod_bias = CLAMP((int)(state->lod_bias * 32 + 1), -(1 << 9), (1 << 9) - 1);
1058
1059 sampler->filter1 |= lod_bias << R300_LOD_BIAS_SHIFT;
1060
1061 /* This is very high quality anisotropic filtering for R5xx.
1062 * It's good for benchmarking the performance of texturing but
1063 * in practice we don't want to slow down the driver because it's
1064 * a pretty good performance killer. Feel free to play with it. */
1065 if (DBG_ON(r300, DBG_ANISOHQ) && is_r500) {
1066 sampler->filter1 |= r500_anisotropy(state->max_anisotropy);
1067 }
1068
1069 util_pack_color(state->border_color, PIPE_FORMAT_B8G8R8A8_UNORM, &uc);
1070 sampler->border_color = uc.ui;
1071
1072 /* R500-specific fixups and optimizations */
1073 if (r300->screen->caps.is_r500) {
1074 sampler->filter1 |= R500_BORDER_FIX;
1075 }
1076
1077 return (void*)sampler;
1078 }
1079
1080 static void r300_bind_sampler_states(struct pipe_context* pipe,
1081 unsigned count,
1082 void** states)
1083 {
1084 struct r300_context* r300 = r300_context(pipe);
1085 struct r300_textures_state* state =
1086 (struct r300_textures_state*)r300->textures_state.state;
1087 unsigned tex_units = r300->screen->caps.num_tex_units;
1088
1089 if (count > tex_units) {
1090 return;
1091 }
1092
1093 memcpy(state->sampler_states, states, sizeof(void*) * count);
1094 state->sampler_state_count = count;
1095
1096 r300->textures_state.dirty = TRUE;
1097 }
1098
1099 static void r300_lacks_vertex_textures(struct pipe_context* pipe,
1100 unsigned count,
1101 void** states)
1102 {
1103 }
1104
1105 static void r300_delete_sampler_state(struct pipe_context* pipe, void* state)
1106 {
1107 FREE(state);
1108 }
1109
1110 static uint32_t r300_assign_texture_cache_region(unsigned index, unsigned num)
1111 {
1112 /* This looks like a hack, but I believe it's suppose to work like
1113 * that. To illustrate how this works, let's assume you have 5 textures.
1114 * From docs, 5 and the successive numbers are:
1115 *
1116 * FOURTH_1 = 5
1117 * FOURTH_2 = 6
1118 * FOURTH_3 = 7
1119 * EIGHTH_0 = 8
1120 * EIGHTH_1 = 9
1121 *
1122 * First 3 textures will get 3/4 of size of the cache, divived evenly
1123 * between them. The last 1/4 of the cache must be divided between
1124 * the last 2 textures, each will therefore get 1/8 of the cache.
1125 * Why not just to use "5 + texture_index" ?
1126 *
1127 * This simple trick works for all "num" <= 16.
1128 */
1129 if (num <= 1)
1130 return R300_TX_CACHE(R300_TX_CACHE_WHOLE);
1131 else
1132 return R300_TX_CACHE(num + index);
1133 }
1134
1135 static void r300_set_fragment_sampler_views(struct pipe_context* pipe,
1136 unsigned count,
1137 struct pipe_sampler_view** views)
1138 {
1139 struct r300_context* r300 = r300_context(pipe);
1140 struct r300_textures_state* state =
1141 (struct r300_textures_state*)r300->textures_state.state;
1142 struct r300_texture *texture;
1143 unsigned i, real_num_views = 0, view_index = 0;
1144 unsigned tex_units = r300->screen->caps.num_tex_units;
1145 boolean dirty_tex = FALSE;
1146
1147 if (count > tex_units) {
1148 return;
1149 }
1150
1151 /* Calculate the real number of views. */
1152 for (i = 0; i < count; i++) {
1153 if (views[i])
1154 real_num_views++;
1155 }
1156
1157 for (i = 0; i < count; i++) {
1158 if (&state->sampler_views[i]->base != views[i]) {
1159 pipe_sampler_view_reference(
1160 (struct pipe_sampler_view**)&state->sampler_views[i],
1161 views[i]);
1162
1163 if (!views[i]) {
1164 continue;
1165 }
1166
1167 /* A new sampler view (= texture)... */
1168 dirty_tex = TRUE;
1169
1170 /* Set the texrect factor in the fragment shader.
1171 * Needed for RECT and NPOT fallback. */
1172 texture = r300_texture(views[i]->texture);
1173 if (texture->uses_pitch) {
1174 r300->fs_rc_constant_state.dirty = TRUE;
1175 }
1176
1177 state->sampler_views[i]->texcache_region =
1178 r300_assign_texture_cache_region(view_index, real_num_views);
1179 view_index++;
1180 }
1181 }
1182
1183 for (i = count; i < tex_units; i++) {
1184 if (state->sampler_views[i]) {
1185 pipe_sampler_view_reference(
1186 (struct pipe_sampler_view**)&state->sampler_views[i],
1187 NULL);
1188 }
1189 }
1190
1191 state->sampler_view_count = count;
1192
1193 r300->textures_state.dirty = TRUE;
1194
1195 if (dirty_tex) {
1196 r300->texture_cache_inval.dirty = TRUE;
1197 }
1198 }
1199
1200 static struct pipe_sampler_view *
1201 r300_create_sampler_view(struct pipe_context *pipe,
1202 struct pipe_resource *texture,
1203 const struct pipe_sampler_view *templ)
1204 {
1205 struct r300_sampler_view *view = CALLOC_STRUCT(r300_sampler_view);
1206 struct r300_texture *tex = r300_texture(texture);
1207
1208 if (view) {
1209 view->base = *templ;
1210 view->base.reference.count = 1;
1211 view->base.context = pipe;
1212 view->base.texture = NULL;
1213 pipe_resource_reference(&view->base.texture, texture);
1214
1215 view->swizzle[0] = templ->swizzle_r;
1216 view->swizzle[1] = templ->swizzle_g;
1217 view->swizzle[2] = templ->swizzle_b;
1218 view->swizzle[3] = templ->swizzle_a;
1219
1220 view->format = tex->tx_format;
1221 view->format.format1 |= r300_translate_texformat(templ->format,
1222 view->swizzle);
1223 if (r300_screen(pipe->screen)->caps.is_r500) {
1224 view->format.format2 |= r500_tx_format_msb_bit(templ->format);
1225 }
1226 }
1227
1228 return (struct pipe_sampler_view*)view;
1229 }
1230
1231 static void
1232 r300_sampler_view_destroy(struct pipe_context *pipe,
1233 struct pipe_sampler_view *view)
1234 {
1235 pipe_resource_reference(&view->texture, NULL);
1236 FREE(view);
1237 }
1238
1239 static void r300_set_scissor_state(struct pipe_context* pipe,
1240 const struct pipe_scissor_state* state)
1241 {
1242 struct r300_context* r300 = r300_context(pipe);
1243
1244 memcpy(r300->scissor_state.state, state,
1245 sizeof(struct pipe_scissor_state));
1246
1247 r300->scissor_state.dirty = TRUE;
1248 }
1249
1250 static void r300_set_viewport_state(struct pipe_context* pipe,
1251 const struct pipe_viewport_state* state)
1252 {
1253 struct r300_context* r300 = r300_context(pipe);
1254 struct r300_viewport_state* viewport =
1255 (struct r300_viewport_state*)r300->viewport_state.state;
1256
1257 r300->viewport = *state;
1258
1259 if (r300->draw) {
1260 draw_flush(r300->draw);
1261 draw_set_viewport_state(r300->draw, state);
1262 viewport->vte_control = R300_VTX_XY_FMT | R300_VTX_Z_FMT;
1263 return;
1264 }
1265
1266 /* Do the transform in HW. */
1267 viewport->vte_control = R300_VTX_W0_FMT;
1268
1269 if (state->scale[0] != 1.0f) {
1270 viewport->xscale = state->scale[0];
1271 viewport->vte_control |= R300_VPORT_X_SCALE_ENA;
1272 }
1273 if (state->scale[1] != 1.0f) {
1274 viewport->yscale = state->scale[1];
1275 viewport->vte_control |= R300_VPORT_Y_SCALE_ENA;
1276 }
1277 if (state->scale[2] != 1.0f) {
1278 viewport->zscale = state->scale[2];
1279 viewport->vte_control |= R300_VPORT_Z_SCALE_ENA;
1280 }
1281 if (state->translate[0] != 0.0f) {
1282 viewport->xoffset = state->translate[0];
1283 viewport->vte_control |= R300_VPORT_X_OFFSET_ENA;
1284 }
1285 if (state->translate[1] != 0.0f) {
1286 viewport->yoffset = state->translate[1];
1287 viewport->vte_control |= R300_VPORT_Y_OFFSET_ENA;
1288 }
1289 if (state->translate[2] != 0.0f) {
1290 viewport->zoffset = state->translate[2];
1291 viewport->vte_control |= R300_VPORT_Z_OFFSET_ENA;
1292 }
1293
1294 r300->viewport_state.dirty = TRUE;
1295 if (r300->fs.state && r300_fs(r300)->shader->inputs.wpos != ATTR_UNUSED) {
1296 r300->fs_rc_constant_state.dirty = TRUE;
1297 }
1298 }
1299
1300 static void r300_set_vertex_buffers(struct pipe_context* pipe,
1301 unsigned count,
1302 const struct pipe_vertex_buffer* buffers)
1303 {
1304 struct r300_context* r300 = r300_context(pipe);
1305 struct pipe_vertex_buffer *vbo;
1306 unsigned i, max_index = (1 << 24) - 1;
1307 boolean any_user_buffer = FALSE;
1308
1309 if (count == r300->vertex_buffer_count &&
1310 memcmp(r300->vertex_buffer, buffers,
1311 sizeof(struct pipe_vertex_buffer) * count) == 0) {
1312 return;
1313 }
1314
1315 if (r300->screen->caps.has_tcl) {
1316 /* HW TCL. */
1317 r300->incompatible_vb_layout = FALSE;
1318
1319 /* Check if the strides and offsets are aligned to the size of DWORD. */
1320 for (i = 0; i < count; i++) {
1321 if (buffers[i].buffer) {
1322 if (buffers[i].stride % 4 != 0 ||
1323 buffers[i].buffer_offset % 4 != 0) {
1324 r300->incompatible_vb_layout = TRUE;
1325 break;
1326 }
1327 }
1328 }
1329
1330 for (i = 0; i < count; i++) {
1331 /* Why, yes, I AM casting away constness. How did you know? */
1332 vbo = (struct pipe_vertex_buffer*)&buffers[i];
1333
1334 /* Skip NULL buffers */
1335 if (!buffers[i].buffer) {
1336 continue;
1337 }
1338
1339 if (r300_buffer_is_user_buffer(vbo->buffer)) {
1340 any_user_buffer = TRUE;
1341 }
1342
1343 if (vbo->max_index == ~0) {
1344 /* if no VBO stride then only one vertex value so max index is 1 */
1345 /* should think about converting to VS constants like svga does */
1346 if (!vbo->stride)
1347 vbo->max_index = 1;
1348 else
1349 vbo->max_index =
1350 (vbo->buffer->width0 - vbo->buffer_offset) / vbo->stride;
1351 }
1352
1353 max_index = MIN2(vbo->max_index, max_index);
1354 }
1355
1356 r300->any_user_vbs = any_user_buffer;
1357 r300->vertex_buffer_max_index = max_index;
1358
1359 } else {
1360 /* SW TCL. */
1361 draw_flush(r300->draw);
1362 draw_set_vertex_buffers(r300->draw, count, buffers);
1363 }
1364
1365 /* Common code. */
1366 for (i = 0; i < count; i++) {
1367 /* Reference our buffer. */
1368 pipe_resource_reference(&r300->vertex_buffer[i].buffer, buffers[i].buffer);
1369 }
1370 for (; i < r300->vertex_buffer_count; i++) {
1371 /* Dereference any old buffers. */
1372 pipe_resource_reference(&r300->vertex_buffer[i].buffer, NULL);
1373 }
1374
1375 memcpy(r300->vertex_buffer, buffers,
1376 sizeof(struct pipe_vertex_buffer) * count);
1377 r300->vertex_buffer_count = count;
1378 }
1379
1380 /* Initialize the PSC tables. */
1381 static void r300_vertex_psc(struct r300_vertex_element_state *velems)
1382 {
1383 struct r300_vertex_stream_state *vstream = &velems->vertex_stream;
1384 uint16_t type, swizzle;
1385 enum pipe_format format;
1386 unsigned i;
1387
1388 if (velems->count > 16) {
1389 fprintf(stderr, "r300: More than 16 vertex elements are not supported,"
1390 " requested %i, using 16.\n", velems->count);
1391 velems->count = 16;
1392 }
1393
1394 /* Vertex shaders have no semantics on their inputs,
1395 * so PSC should just route stuff based on the vertex elements,
1396 * and not on attrib information. */
1397 for (i = 0; i < velems->count; i++) {
1398 format = velems->hw_format[i];
1399
1400 type = r300_translate_vertex_data_type(format);
1401 if (type == R300_INVALID_FORMAT) {
1402 fprintf(stderr, "r300: Bad vertex format %s.\n",
1403 util_format_short_name(format));
1404 assert(0);
1405 abort();
1406 }
1407
1408 type |= i << R300_DST_VEC_LOC_SHIFT;
1409 swizzle = r300_translate_vertex_data_swizzle(format);
1410
1411 if (i & 1) {
1412 vstream->vap_prog_stream_cntl[i >> 1] |= type << 16;
1413 vstream->vap_prog_stream_cntl_ext[i >> 1] |= swizzle << 16;
1414 } else {
1415 vstream->vap_prog_stream_cntl[i >> 1] |= type;
1416 vstream->vap_prog_stream_cntl_ext[i >> 1] |= swizzle;
1417 }
1418 }
1419
1420 /* Set the last vector in the PSC. */
1421 if (i) {
1422 i -= 1;
1423 }
1424 vstream->vap_prog_stream_cntl[i >> 1] |=
1425 (R300_LAST_VEC << (i & 1 ? 16 : 0));
1426
1427 vstream->count = (i >> 1) + 1;
1428 }
1429
1430 #define FORMAT_REPLACE(what, withwhat) \
1431 case PIPE_FORMAT_##what: *format = PIPE_FORMAT_##withwhat; break
1432
1433 static void* r300_create_vertex_elements_state(struct pipe_context* pipe,
1434 unsigned count,
1435 const struct pipe_vertex_element* attribs)
1436 {
1437 struct r300_vertex_element_state *velems;
1438 unsigned i;
1439 enum pipe_format *format;
1440
1441 assert(count <= PIPE_MAX_ATTRIBS);
1442 velems = CALLOC_STRUCT(r300_vertex_element_state);
1443 if (velems != NULL) {
1444 velems->count = count;
1445 memcpy(velems->velem, attribs, sizeof(struct pipe_vertex_element) * count);
1446
1447 if (r300_screen(pipe->screen)->caps.has_tcl) {
1448 /* Set the best hw format in case the original format is not
1449 * supported by hw. */
1450 for (i = 0; i < count; i++) {
1451 velems->hw_format[i] = velems->velem[i].src_format;
1452 format = &velems->hw_format[i];
1453
1454 /* This is basically the list of unsupported formats.
1455 * For now we don't care about the alignment, that's going to
1456 * be sorted out after the PSC setup. */
1457 switch (*format) {
1458 FORMAT_REPLACE(R64_FLOAT, R32_FLOAT);
1459 FORMAT_REPLACE(R64G64_FLOAT, R32G32_FLOAT);
1460 FORMAT_REPLACE(R64G64B64_FLOAT, R32G32B32_FLOAT);
1461 FORMAT_REPLACE(R64G64B64A64_FLOAT, R32G32B32A32_FLOAT);
1462
1463 FORMAT_REPLACE(R32_UNORM, R32_FLOAT);
1464 FORMAT_REPLACE(R32G32_UNORM, R32G32_FLOAT);
1465 FORMAT_REPLACE(R32G32B32_UNORM, R32G32B32_FLOAT);
1466 FORMAT_REPLACE(R32G32B32A32_UNORM, R32G32B32A32_FLOAT);
1467
1468 FORMAT_REPLACE(R32_USCALED, R32_FLOAT);
1469 FORMAT_REPLACE(R32G32_USCALED, R32G32_FLOAT);
1470 FORMAT_REPLACE(R32G32B32_USCALED, R32G32B32_FLOAT);
1471 FORMAT_REPLACE(R32G32B32A32_USCALED,R32G32B32A32_FLOAT);
1472
1473 FORMAT_REPLACE(R32_SNORM, R32_FLOAT);
1474 FORMAT_REPLACE(R32G32_SNORM, R32G32_FLOAT);
1475 FORMAT_REPLACE(R32G32B32_SNORM, R32G32B32_FLOAT);
1476 FORMAT_REPLACE(R32G32B32A32_SNORM, R32G32B32A32_FLOAT);
1477
1478 FORMAT_REPLACE(R32_SSCALED, R32_FLOAT);
1479 FORMAT_REPLACE(R32G32_SSCALED, R32G32_FLOAT);
1480 FORMAT_REPLACE(R32G32B32_SSCALED, R32G32B32_FLOAT);
1481 FORMAT_REPLACE(R32G32B32A32_SSCALED,R32G32B32A32_FLOAT);
1482
1483 FORMAT_REPLACE(R32_FIXED, R32_FLOAT);
1484 FORMAT_REPLACE(R32G32_FIXED, R32G32_FLOAT);
1485 FORMAT_REPLACE(R32G32B32_FIXED, R32G32B32_FLOAT);
1486 FORMAT_REPLACE(R32G32B32A32_FIXED, R32G32B32A32_FLOAT);
1487
1488 default:;
1489 }
1490
1491 velems->incompatible_layout =
1492 velems->incompatible_layout ||
1493 velems->velem[i].src_format != velems->hw_format[i] ||
1494 velems->velem[i].src_offset % 4 != 0;
1495 }
1496
1497 /* Now setup PSC.
1498 * The unused components will be replaced by (..., 0, 1). */
1499 r300_vertex_psc(velems);
1500
1501 /* Align the formats to the size of DWORD.
1502 * We only care about the blocksizes of the formats since
1503 * swizzles are already set up.
1504 * Also compute the vertex size. */
1505 for (i = 0; i < count; i++) {
1506 /* This is OK because we check for aligned strides too. */
1507 velems->hw_format_size[i] =
1508 align(util_format_get_blocksize(velems->hw_format[i]), 4);
1509 velems->vertex_size_dwords += velems->hw_format_size[i] / 4;
1510 }
1511 }
1512 }
1513 return velems;
1514 }
1515
1516 static void r300_bind_vertex_elements_state(struct pipe_context *pipe,
1517 void *state)
1518 {
1519 struct r300_context *r300 = r300_context(pipe);
1520 struct r300_vertex_element_state *velems = state;
1521
1522 if (velems == NULL) {
1523 return;
1524 }
1525
1526 r300->velems = velems;
1527
1528 if (r300->draw) {
1529 draw_flush(r300->draw);
1530 draw_set_vertex_elements(r300->draw, velems->count, velems->velem);
1531 return;
1532 }
1533
1534 UPDATE_STATE(&velems->vertex_stream, r300->vertex_stream_state);
1535 r300->vertex_stream_state.size = (1 + velems->vertex_stream.count) * 2;
1536 }
1537
1538 static void r300_delete_vertex_elements_state(struct pipe_context *pipe, void *state)
1539 {
1540 FREE(state);
1541 }
1542
1543 static void* r300_create_vs_state(struct pipe_context* pipe,
1544 const struct pipe_shader_state* shader)
1545 {
1546 struct r300_context* r300 = r300_context(pipe);
1547
1548 struct r300_vertex_shader* vs = CALLOC_STRUCT(r300_vertex_shader);
1549
1550 /* Copy state directly into shader. */
1551 vs->state = *shader;
1552 vs->state.tokens = tgsi_dup_tokens(shader->tokens);
1553
1554 if (r300->screen->caps.has_tcl) {
1555 r300_init_vs_outputs(vs);
1556 r300_translate_vertex_shader(r300, vs);
1557 } else {
1558 r300_draw_init_vertex_shader(r300->draw, vs);
1559 }
1560
1561 return vs;
1562 }
1563
1564 static void r300_bind_vs_state(struct pipe_context* pipe, void* shader)
1565 {
1566 struct r300_context* r300 = r300_context(pipe);
1567 struct r300_vertex_shader* vs = (struct r300_vertex_shader*)shader;
1568
1569 if (vs == NULL) {
1570 r300->vs_state.state = NULL;
1571 return;
1572 }
1573 if (vs == r300->vs_state.state) {
1574 return;
1575 }
1576 r300->vs_state.state = vs;
1577
1578 /* The majority of the RS block bits is dependent on the vertex shader. */
1579 r300->rs_block_state.dirty = TRUE; /* Will be updated before the emission. */
1580
1581 if (r300->screen->caps.has_tcl) {
1582 r300->vs_state.dirty = TRUE;
1583 r300->vs_state.size =
1584 vs->code.length + 9 +
1585 (vs->immediates_count ? vs->immediates_count * 4 + 3 : 0);
1586
1587 if (vs->externals_count) {
1588 r300->vs_constants.dirty = TRUE;
1589 r300->vs_constants.size = vs->externals_count * 4 + 3;
1590 } else {
1591 r300->vs_constants.size = 0;
1592 }
1593
1594 r300->pvs_flush.dirty = TRUE;
1595 } else {
1596 draw_flush(r300->draw);
1597 draw_bind_vertex_shader(r300->draw,
1598 (struct draw_vertex_shader*)vs->draw_vs);
1599 }
1600 }
1601
1602 static void r300_delete_vs_state(struct pipe_context* pipe, void* shader)
1603 {
1604 struct r300_context* r300 = r300_context(pipe);
1605 struct r300_vertex_shader* vs = (struct r300_vertex_shader*)shader;
1606
1607 if (r300->screen->caps.has_tcl) {
1608 rc_constants_destroy(&vs->code.constants);
1609 } else {
1610 draw_delete_vertex_shader(r300->draw,
1611 (struct draw_vertex_shader*)vs->draw_vs);
1612 }
1613
1614 FREE((void*)vs->state.tokens);
1615 FREE(shader);
1616 }
1617
1618 static void r300_set_constant_buffer(struct pipe_context *pipe,
1619 uint shader, uint index,
1620 struct pipe_resource *buf)
1621 {
1622 struct r300_context* r300 = r300_context(pipe);
1623 struct r300_constant_buffer *cbuf;
1624 struct pipe_transfer *tr;
1625 float *mapped;
1626 int max_size = 0, max_size_bytes = 0, clamped_size = 0;
1627
1628 switch (shader) {
1629 case PIPE_SHADER_VERTEX:
1630 cbuf = (struct r300_constant_buffer*)r300->vs_constants.state;
1631 max_size = 256;
1632 break;
1633 case PIPE_SHADER_FRAGMENT:
1634 cbuf = (struct r300_constant_buffer*)r300->fs_constants.state;
1635 if (r300->screen->caps.is_r500) {
1636 max_size = 256;
1637 } else {
1638 max_size = 32;
1639 }
1640 break;
1641 default:
1642 assert(0);
1643 return;
1644 }
1645 max_size_bytes = max_size * 4 * sizeof(float);
1646
1647 if (buf == NULL || buf->width0 == 0 ||
1648 (mapped = pipe_buffer_map(pipe, buf, PIPE_TRANSFER_READ, &tr)) == NULL)
1649 {
1650 cbuf->count = 0;
1651 return;
1652 }
1653
1654 if (shader == PIPE_SHADER_FRAGMENT ||
1655 (shader == PIPE_SHADER_VERTEX && r300->screen->caps.has_tcl)) {
1656 assert((buf->width0 % (4 * sizeof(float))) == 0);
1657
1658 /* Check the size of the constant buffer. */
1659 /* XXX Subtract immediates and RC_STATE_* variables. */
1660 if (buf->width0 > max_size_bytes) {
1661 fprintf(stderr, "r300: Max size of the constant buffer is "
1662 "%i*4 floats.\n", max_size);
1663 }
1664
1665 clamped_size = MIN2(buf->width0, max_size_bytes);
1666 cbuf->count = clamped_size / (4 * sizeof(float));
1667
1668 if (shader == PIPE_SHADER_FRAGMENT && !r300->screen->caps.is_r500) {
1669 unsigned i,j;
1670
1671 /* Convert constants to float24. */
1672 for (i = 0; i < cbuf->count; i++)
1673 for (j = 0; j < 4; j++)
1674 cbuf->constants[i][j] = pack_float24(mapped[i*4+j]);
1675 } else {
1676 memcpy(cbuf->constants, mapped, clamped_size);
1677 }
1678 }
1679
1680 if (shader == PIPE_SHADER_VERTEX) {
1681 if (r300->screen->caps.has_tcl) {
1682 if (r300->vs_constants.size) {
1683 r300->vs_constants.dirty = TRUE;
1684 }
1685 r300->pvs_flush.dirty = TRUE;
1686 } else if (r300->draw) {
1687 draw_set_mapped_constant_buffer(r300->draw, PIPE_SHADER_VERTEX,
1688 0, mapped, buf->width0);
1689 }
1690 } else if (shader == PIPE_SHADER_FRAGMENT) {
1691 r300->fs_constants.dirty = TRUE;
1692 }
1693
1694 pipe_buffer_unmap(pipe, buf, tr);
1695 }
1696
1697 void r300_init_state_functions(struct r300_context* r300)
1698 {
1699 r300->context.create_blend_state = r300_create_blend_state;
1700 r300->context.bind_blend_state = r300_bind_blend_state;
1701 r300->context.delete_blend_state = r300_delete_blend_state;
1702
1703 r300->context.set_blend_color = r300_set_blend_color;
1704
1705 r300->context.set_clip_state = r300_set_clip_state;
1706 r300->context.set_sample_mask = r300_set_sample_mask;
1707
1708 r300->context.set_constant_buffer = r300_set_constant_buffer;
1709
1710 r300->context.create_depth_stencil_alpha_state = r300_create_dsa_state;
1711 r300->context.bind_depth_stencil_alpha_state = r300_bind_dsa_state;
1712 r300->context.delete_depth_stencil_alpha_state = r300_delete_dsa_state;
1713
1714 r300->context.set_stencil_ref = r300_set_stencil_ref;
1715
1716 r300->context.set_framebuffer_state = r300_set_framebuffer_state;
1717
1718 r300->context.create_fs_state = r300_create_fs_state;
1719 r300->context.bind_fs_state = r300_bind_fs_state;
1720 r300->context.delete_fs_state = r300_delete_fs_state;
1721
1722 r300->context.set_polygon_stipple = r300_set_polygon_stipple;
1723
1724 r300->context.create_rasterizer_state = r300_create_rs_state;
1725 r300->context.bind_rasterizer_state = r300_bind_rs_state;
1726 r300->context.delete_rasterizer_state = r300_delete_rs_state;
1727
1728 r300->context.create_sampler_state = r300_create_sampler_state;
1729 r300->context.bind_fragment_sampler_states = r300_bind_sampler_states;
1730 r300->context.bind_vertex_sampler_states = r300_lacks_vertex_textures;
1731 r300->context.delete_sampler_state = r300_delete_sampler_state;
1732
1733 r300->context.set_fragment_sampler_views = r300_set_fragment_sampler_views;
1734 r300->context.create_sampler_view = r300_create_sampler_view;
1735 r300->context.sampler_view_destroy = r300_sampler_view_destroy;
1736
1737 r300->context.set_scissor_state = r300_set_scissor_state;
1738
1739 r300->context.set_viewport_state = r300_set_viewport_state;
1740
1741 r300->context.set_vertex_buffers = r300_set_vertex_buffers;
1742
1743 r300->context.create_vertex_elements_state = r300_create_vertex_elements_state;
1744 r300->context.bind_vertex_elements_state = r300_bind_vertex_elements_state;
1745 r300->context.delete_vertex_elements_state = r300_delete_vertex_elements_state;
1746
1747 r300->context.create_vs_state = r300_create_vs_state;
1748 r300->context.bind_vs_state = r300_bind_vs_state;
1749 r300->context.delete_vs_state = r300_delete_vs_state;
1750 }