d3233557ceaab6a0fec2a668fdd34d70a1878794
[mesa.git] / src / gallium / drivers / r300 / r300_state.c
1 /*
2 * Copyright 2008 Corbin Simpson <MostAwesomeDude@gmail.com>
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * on the rights to use, copy, modify, merge, publish, distribute, sub
8 * license, and/or sell copies of the Software, and to permit persons to whom
9 * the Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
19 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
20 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
21 * USE OR OTHER DEALINGS IN THE SOFTWARE. */
22
23 #include "draw/draw_context.h"
24
25 #include "util/u_math.h"
26 #include "util/u_memory.h"
27 #include "util/u_pack_color.h"
28
29 #include "tgsi/tgsi_parse.h"
30
31 #include "pipe/p_config.h"
32 #include "pipe/internal/p_winsys_screen.h"
33
34 #include "r300_context.h"
35 #include "r300_reg.h"
36 #include "r300_screen.h"
37 #include "r300_state_inlines.h"
38 #include "r300_fs.h"
39 #include "r300_vs.h"
40
41 /* r300_state: Functions used to intialize state context by translating
42 * Gallium state objects into semi-native r300 state objects. */
43
44 /* Create a new blend state based on the CSO blend state.
45 *
46 * This encompasses alpha blending, logic/raster ops, and blend dithering. */
47 static void* r300_create_blend_state(struct pipe_context* pipe,
48 const struct pipe_blend_state* state)
49 {
50 struct r300_blend_state* blend = CALLOC_STRUCT(r300_blend_state);
51
52 if (state->blend_enable)
53 {
54 unsigned eqRGB = state->rgb_func;
55 unsigned srcRGB = state->rgb_src_factor;
56 unsigned dstRGB = state->rgb_dst_factor;
57
58 unsigned eqA = state->alpha_func;
59 unsigned srcA = state->alpha_src_factor;
60 unsigned dstA = state->alpha_dst_factor;
61
62 /* despite the name, ALPHA_BLEND_ENABLE has nothing to do with alpha,
63 * this is just the crappy D3D naming */
64 blend->blend_control = R300_ALPHA_BLEND_ENABLE |
65 r300_translate_blend_function(eqRGB) |
66 ( r300_translate_blend_factor(srcRGB) << R300_SRC_BLEND_SHIFT) |
67 ( r300_translate_blend_factor(dstRGB) << R300_DST_BLEND_SHIFT);
68
69 /* optimization: some operations do not require the destination color */
70 if (eqRGB == PIPE_BLEND_MIN || eqA == PIPE_BLEND_MIN ||
71 eqRGB == PIPE_BLEND_MAX || eqA == PIPE_BLEND_MAX ||
72 dstRGB != PIPE_BLENDFACTOR_ZERO ||
73 dstA != PIPE_BLENDFACTOR_ZERO ||
74 srcRGB == PIPE_BLENDFACTOR_DST_COLOR ||
75 srcRGB == PIPE_BLENDFACTOR_DST_ALPHA ||
76 srcRGB == PIPE_BLENDFACTOR_INV_DST_COLOR ||
77 srcRGB == PIPE_BLENDFACTOR_INV_DST_ALPHA ||
78 srcA == PIPE_BLENDFACTOR_DST_COLOR ||
79 srcA == PIPE_BLENDFACTOR_DST_ALPHA ||
80 srcA == PIPE_BLENDFACTOR_INV_DST_COLOR ||
81 srcA == PIPE_BLENDFACTOR_INV_DST_ALPHA)
82 blend->blend_control |= R300_READ_ENABLE;
83
84 /* XXX implement the optimization with DISCARD_SRC_PIXELS*/
85 /* XXX implement the optimization with SRC_ALPHA_?_NO_READ */
86
87 /* separate alpha */
88 if (srcA != srcRGB || dstA != dstRGB || eqA != eqRGB) {
89 blend->blend_control |= R300_SEPARATE_ALPHA_ENABLE;
90 blend->alpha_blend_control =
91 r300_translate_blend_function(eqA) |
92 (r300_translate_blend_factor(srcA) << R300_SRC_BLEND_SHIFT) |
93 (r300_translate_blend_factor(dstA) << R300_DST_BLEND_SHIFT);
94 }
95 }
96
97 /* PIPE_LOGICOP_* don't need to be translated, fortunately. */
98 if (state->logicop_enable) {
99 blend->rop = R300_RB3D_ROPCNTL_ROP_ENABLE |
100 (state->logicop_func) << R300_RB3D_ROPCNTL_ROP_SHIFT;
101 }
102
103 /* Color Channel Mask */
104 if (state->colormask & PIPE_MASK_R) {
105 blend->color_channel_mask |= RB3D_COLOR_CHANNEL_MASK_RED_MASK0;
106 }
107 if (state->colormask & PIPE_MASK_G) {
108 blend->color_channel_mask |= RB3D_COLOR_CHANNEL_MASK_GREEN_MASK0;
109 }
110 if (state->colormask & PIPE_MASK_B) {
111 blend->color_channel_mask |= RB3D_COLOR_CHANNEL_MASK_BLUE_MASK0;
112 }
113 if (state->colormask & PIPE_MASK_A) {
114 blend->color_channel_mask |= RB3D_COLOR_CHANNEL_MASK_ALPHA_MASK0;
115 }
116
117 if (state->dither) {
118 blend->dither = R300_RB3D_DITHER_CTL_DITHER_MODE_LUT |
119 R300_RB3D_DITHER_CTL_ALPHA_DITHER_MODE_LUT;
120 }
121
122 return (void*)blend;
123 }
124
125 /* Bind blend state. */
126 static void r300_bind_blend_state(struct pipe_context* pipe,
127 void* state)
128 {
129 struct r300_context* r300 = r300_context(pipe);
130
131 r300->blend_state = (struct r300_blend_state*)state;
132 r300->dirty_state |= R300_NEW_BLEND;
133 }
134
135 /* Free blend state. */
136 static void r300_delete_blend_state(struct pipe_context* pipe,
137 void* state)
138 {
139 FREE(state);
140 }
141
142 /* Convert float to 10bit integer */
143 static unsigned float_to_fixed10(float f)
144 {
145 return CLAMP((unsigned)(f * 1023.9f), 0, 1023);
146 }
147
148 /* Set blend color.
149 * Setup both R300 and R500 registers, figure out later which one to write. */
150 static void r300_set_blend_color(struct pipe_context* pipe,
151 const struct pipe_blend_color* color)
152 {
153 struct r300_context* r300 = r300_context(pipe);
154
155 util_pack_color(color->color, PIPE_FORMAT_A8R8G8B8_UNORM,
156 &r300->blend_color_state->blend_color);
157
158 /* XXX if FP16 blending is enabled, we should use the FP16 format */
159 r300->blend_color_state->blend_color_red_alpha =
160 float_to_fixed10(color->color[0]) |
161 (float_to_fixed10(color->color[3]) << 16);
162 r300->blend_color_state->blend_color_green_blue =
163 float_to_fixed10(color->color[2]) |
164 (float_to_fixed10(color->color[1]) << 16);
165
166 r300->dirty_state |= R300_NEW_BLEND_COLOR;
167 }
168
169 static void r300_set_clip_state(struct pipe_context* pipe,
170 const struct pipe_clip_state* state)
171 {
172 struct r300_context* r300 = r300_context(pipe);
173
174 if (r300_screen(pipe->screen)->caps->has_tcl) {
175 r300->clip_state = *state;
176 r300->dirty_state |= R300_NEW_CLIP;
177 } else {
178 draw_flush(r300->draw);
179 draw_set_clip_state(r300->draw, state);
180 }
181 }
182
183 /* Create a new depth, stencil, and alpha state based on the CSO dsa state.
184 *
185 * This contains the depth buffer, stencil buffer, alpha test, and such.
186 * On the Radeon, depth and stencil buffer setup are intertwined, which is
187 * the reason for some of the strange-looking assignments across registers. */
188 static void*
189 r300_create_dsa_state(struct pipe_context* pipe,
190 const struct pipe_depth_stencil_alpha_state* state)
191 {
192 struct r300_capabilities *caps =
193 r300_screen(r300_context(pipe)->context.screen)->caps;
194 struct r300_dsa_state* dsa = CALLOC_STRUCT(r300_dsa_state);
195
196 /* Depth test setup. */
197 if (state->depth.enabled) {
198 dsa->z_buffer_control |= R300_Z_ENABLE;
199
200 if (state->depth.writemask) {
201 dsa->z_buffer_control |= R300_Z_WRITE_ENABLE;
202 }
203
204 dsa->z_stencil_control |=
205 (r300_translate_depth_stencil_function(state->depth.func) <<
206 R300_Z_FUNC_SHIFT);
207 }
208
209 /* Stencil buffer setup. */
210 if (state->stencil[0].enabled) {
211 dsa->z_buffer_control |= R300_STENCIL_ENABLE;
212 dsa->z_stencil_control |=
213 (r300_translate_depth_stencil_function(state->stencil[0].func) <<
214 R300_S_FRONT_FUNC_SHIFT) |
215 (r300_translate_stencil_op(state->stencil[0].fail_op) <<
216 R300_S_FRONT_SFAIL_OP_SHIFT) |
217 (r300_translate_stencil_op(state->stencil[0].zpass_op) <<
218 R300_S_FRONT_ZPASS_OP_SHIFT) |
219 (r300_translate_stencil_op(state->stencil[0].zfail_op) <<
220 R300_S_FRONT_ZFAIL_OP_SHIFT);
221
222 dsa->stencil_ref_mask = (state->stencil[0].ref_value) |
223 (state->stencil[0].valuemask << R300_STENCILMASK_SHIFT) |
224 (state->stencil[0].writemask << R300_STENCILWRITEMASK_SHIFT);
225
226 if (state->stencil[1].enabled) {
227 dsa->z_buffer_control |= R300_STENCIL_FRONT_BACK;
228 dsa->z_stencil_control |=
229 (r300_translate_depth_stencil_function(state->stencil[1].func) <<
230 R300_S_BACK_FUNC_SHIFT) |
231 (r300_translate_stencil_op(state->stencil[1].fail_op) <<
232 R300_S_BACK_SFAIL_OP_SHIFT) |
233 (r300_translate_stencil_op(state->stencil[1].zpass_op) <<
234 R300_S_BACK_ZPASS_OP_SHIFT) |
235 (r300_translate_stencil_op(state->stencil[1].zfail_op) <<
236 R300_S_BACK_ZFAIL_OP_SHIFT);
237
238 /* XXX it seems r3xx doesn't support STENCILREFMASK_BF */
239 if (caps->is_r500)
240 {
241 dsa->z_buffer_control |= R500_STENCIL_REFMASK_FRONT_BACK;
242 dsa->stencil_ref_bf = (state->stencil[1].ref_value) |
243 (state->stencil[1].valuemask <<
244 R300_STENCILMASK_SHIFT) |
245 (state->stencil[1].writemask <<
246 R300_STENCILWRITEMASK_SHIFT);
247 }
248 }
249 }
250
251 /* Alpha test setup. */
252 if (state->alpha.enabled) {
253 dsa->alpha_function =
254 r300_translate_alpha_function(state->alpha.func) |
255 R300_FG_ALPHA_FUNC_ENABLE;
256
257 /* XXX figure out why emitting 10bit alpha ref causes CS to dump */
258 /* always use 8bit alpha ref */
259 dsa->alpha_function |= float_to_ubyte(state->alpha.ref_value);
260
261 if (caps->is_r500)
262 dsa->alpha_function |= R500_FG_ALPHA_FUNC_8BIT;
263 }
264
265 return (void*)dsa;
266 }
267
268 /* Bind DSA state. */
269 static void r300_bind_dsa_state(struct pipe_context* pipe,
270 void* state)
271 {
272 struct r300_context* r300 = r300_context(pipe);
273
274 r300->dsa_state = (struct r300_dsa_state*)state;
275 r300->dirty_state |= R300_NEW_DSA;
276 }
277
278 /* Free DSA state. */
279 static void r300_delete_dsa_state(struct pipe_context* pipe,
280 void* state)
281 {
282 FREE(state);
283 }
284
285 static void r300_set_edgeflags(struct pipe_context* pipe,
286 const unsigned* bitfield)
287 {
288 /* XXX you know it's bad when i915 has this blank too */
289 /* XXX and even worse, I have no idea WTF the bitfield is */
290 }
291
292 static void r300_set_scissor_regs(const struct pipe_scissor_state* state,
293 struct r300_scissor_regs *scissor,
294 boolean is_r500)
295 {
296 if (is_r500) {
297 scissor->top_left =
298 (state->minx << R300_SCISSORS_X_SHIFT) |
299 (state->miny << R300_SCISSORS_Y_SHIFT);
300 scissor->bottom_right =
301 ((state->maxx - 1) << R300_SCISSORS_X_SHIFT) |
302 ((state->maxy - 1) << R300_SCISSORS_Y_SHIFT);
303 } else {
304 /* Offset of 1440 in non-R500 chipsets. */
305 scissor->top_left =
306 ((state->minx + 1440) << R300_SCISSORS_X_SHIFT) |
307 ((state->miny + 1440) << R300_SCISSORS_Y_SHIFT);
308 scissor->bottom_right =
309 (((state->maxx - 1) + 1440) << R300_SCISSORS_X_SHIFT) |
310 (((state->maxy - 1) + 1440) << R300_SCISSORS_Y_SHIFT);
311 }
312 }
313
314 static void
315 r300_set_framebuffer_state(struct pipe_context* pipe,
316 const struct pipe_framebuffer_state* state)
317 {
318 struct r300_context* r300 = r300_context(pipe);
319 struct pipe_scissor_state scissor;
320
321 if (r300->draw) {
322 draw_flush(r300->draw);
323 }
324
325 r300->framebuffer_state = *state;
326
327 scissor.minx = scissor.miny = 0;
328 scissor.maxx = state->width;
329 scissor.maxy = state->height;
330 r300_set_scissor_regs(&scissor, &r300->scissor_state->framebuffer,
331 r300_screen(r300->context.screen)->caps->is_r500);
332
333 /* Don't rely on the order of states being set for the first time. */
334 if (!r300->rs_state || !r300->rs_state->rs.scissor) {
335 r300->dirty_state |= R300_NEW_SCISSOR;
336 }
337 r300->dirty_state |= R300_NEW_FRAMEBUFFERS;
338 }
339
340 /* Create fragment shader state. */
341 static void* r300_create_fs_state(struct pipe_context* pipe,
342 const struct pipe_shader_state* shader)
343 {
344 struct r300_fragment_shader* fs = NULL;
345
346 fs = (struct r300_fragment_shader*)CALLOC_STRUCT(r300_fragment_shader);
347
348 /* Copy state directly into shader. */
349 fs->state = *shader;
350 fs->state.tokens = tgsi_dup_tokens(shader->tokens);
351
352 tgsi_scan_shader(shader->tokens, &fs->info);
353
354 return (void*)fs;
355 }
356
357 /* Bind fragment shader state. */
358 static void r300_bind_fs_state(struct pipe_context* pipe, void* shader)
359 {
360 struct r300_context* r300 = r300_context(pipe);
361 struct r300_fragment_shader* fs = (struct r300_fragment_shader*)shader;
362
363 if (fs == NULL) {
364 r300->fs = NULL;
365 return;
366 } else if (!fs->translated) {
367 r300_translate_fragment_shader(r300, fs);
368 }
369
370 r300->fs = fs;
371
372 r300->dirty_state |= R300_NEW_FRAGMENT_SHADER | R300_NEW_FRAGMENT_SHADER_CONSTANTS;
373 }
374
375 /* Delete fragment shader state. */
376 static void r300_delete_fs_state(struct pipe_context* pipe, void* shader)
377 {
378 struct r300_fragment_shader* fs = (struct r300_fragment_shader*)shader;
379 rc_constants_destroy(&fs->code.constants);
380 FREE((void*)fs->state.tokens);
381 FREE(shader);
382 }
383
384 static void r300_set_polygon_stipple(struct pipe_context* pipe,
385 const struct pipe_poly_stipple* state)
386 {
387 /* XXX no idea how to set this up, but not terribly important */
388 }
389
390 /* Create a new rasterizer state based on the CSO rasterizer state.
391 *
392 * This is a very large chunk of state, and covers most of the graphics
393 * backend (GB), geometry assembly (GA), and setup unit (SU) blocks.
394 *
395 * In a not entirely unironic sidenote, this state has nearly nothing to do
396 * with the actual block on the Radeon called the rasterizer (RS). */
397 static void* r300_create_rs_state(struct pipe_context* pipe,
398 const struct pipe_rasterizer_state* state)
399 {
400 struct r300_rs_state* rs = CALLOC_STRUCT(r300_rs_state);
401
402 /* Copy rasterizer state for Draw. */
403 rs->rs = *state;
404
405 rs->enable_vte = !state->bypass_vs_clip_and_viewport;
406
407 #ifdef PIPE_ARCH_LITTLE_ENDIAN
408 rs->vap_control_status = R300_VC_NO_SWAP;
409 #else
410 rs->vap_control_status = R300_VC_32BIT_SWAP;
411 #endif
412
413 /* If bypassing TCL, or if no TCL engine is present, turn off the HW TCL.
414 * Else, enable HW TCL and force Draw's TCL off. */
415 if (state->bypass_vs_clip_and_viewport ||
416 !r300_screen(pipe->screen)->caps->has_tcl) {
417 rs->vap_control_status |= R300_VAP_TCL_BYPASS;
418 } else {
419 rs->rs.bypass_vs_clip_and_viewport = TRUE;
420 }
421
422 rs->point_size = pack_float_16_6x(state->point_size) |
423 (pack_float_16_6x(state->point_size) << R300_POINTSIZE_X_SHIFT);
424
425 rs->point_minmax =
426 ((int)(state->point_size_min * 6.0) <<
427 R300_GA_POINT_MINMAX_MIN_SHIFT) |
428 ((int)(state->point_size_max * 6.0) <<
429 R300_GA_POINT_MINMAX_MAX_SHIFT);
430
431 rs->line_control = pack_float_16_6x(state->line_width) |
432 R300_GA_LINE_CNTL_END_TYPE_COMP;
433
434 /* XXX I think there is something wrong with the polygon mode,
435 * XXX re-test when r300g is in a better shape */
436
437 /* Enable polygon mode */
438 if (state->fill_cw != PIPE_POLYGON_MODE_FILL ||
439 state->fill_ccw != PIPE_POLYGON_MODE_FILL) {
440 rs->polygon_mode = R300_GA_POLY_MODE_DUAL;
441 }
442
443 /* Radeons don't think in "CW/CCW", they think in "front/back". */
444 if (state->front_winding == PIPE_WINDING_CW) {
445 rs->cull_mode = R300_FRONT_FACE_CW;
446
447 /* Polygon offset */
448 if (state->offset_cw) {
449 rs->polygon_offset_enable |= R300_FRONT_ENABLE;
450 }
451 if (state->offset_ccw) {
452 rs->polygon_offset_enable |= R300_BACK_ENABLE;
453 }
454
455 /* Polygon mode */
456 if (rs->polygon_mode) {
457 rs->polygon_mode |=
458 r300_translate_polygon_mode_front(state->fill_cw);
459 rs->polygon_mode |=
460 r300_translate_polygon_mode_back(state->fill_ccw);
461 }
462 } else {
463 rs->cull_mode = R300_FRONT_FACE_CCW;
464
465 /* Polygon offset */
466 if (state->offset_ccw) {
467 rs->polygon_offset_enable |= R300_FRONT_ENABLE;
468 }
469 if (state->offset_cw) {
470 rs->polygon_offset_enable |= R300_BACK_ENABLE;
471 }
472
473 /* Polygon mode */
474 if (rs->polygon_mode) {
475 rs->polygon_mode |=
476 r300_translate_polygon_mode_front(state->fill_ccw);
477 rs->polygon_mode |=
478 r300_translate_polygon_mode_back(state->fill_cw);
479 }
480 }
481 if (state->front_winding & state->cull_mode) {
482 rs->cull_mode |= R300_CULL_FRONT;
483 }
484 if (~(state->front_winding) & state->cull_mode) {
485 rs->cull_mode |= R300_CULL_BACK;
486 }
487
488 if (rs->polygon_offset_enable) {
489 rs->depth_offset_front = rs->depth_offset_back =
490 fui(state->offset_units);
491 rs->depth_scale_front = rs->depth_scale_back =
492 fui(state->offset_scale);
493 }
494
495 if (state->line_stipple_enable) {
496 rs->line_stipple_config =
497 R300_GA_LINE_STIPPLE_CONFIG_LINE_RESET_LINE |
498 (fui((float)state->line_stipple_factor) &
499 R300_GA_LINE_STIPPLE_CONFIG_STIPPLE_SCALE_MASK);
500 /* XXX this might need to be scaled up */
501 rs->line_stipple_value = state->line_stipple_pattern;
502 }
503
504 if (state->flatshade) {
505 rs->color_control = R300_SHADE_MODEL_FLAT;
506 } else {
507 rs->color_control = R300_SHADE_MODEL_SMOOTH;
508 }
509
510 if (!state->flatshade_first) {
511 rs->color_control |= R300_GA_COLOR_CONTROL_PROVOKING_VERTEX_LAST;
512 }
513
514 return (void*)rs;
515 }
516
517 /* Bind rasterizer state. */
518 static void r300_bind_rs_state(struct pipe_context* pipe, void* state)
519 {
520 struct r300_context* r300 = r300_context(pipe);
521 struct r300_rs_state* rs = (struct r300_rs_state*)state;
522
523 if (r300->draw) {
524 draw_flush(r300->draw);
525 draw_set_rasterizer_state(r300->draw, &rs->rs);
526 }
527
528 r300->rs_state = rs;
529 /* XXX Clean these up when we move to atom emits */
530 r300->dirty_state |= R300_NEW_RASTERIZER;
531 r300->dirty_state |= R300_NEW_RS_BLOCK;
532 r300->dirty_state |= R300_NEW_SCISSOR;
533 r300->dirty_state |= R300_NEW_VIEWPORT;
534 }
535
536 /* Free rasterizer state. */
537 static void r300_delete_rs_state(struct pipe_context* pipe, void* state)
538 {
539 FREE(state);
540 }
541
542 static void*
543 r300_create_sampler_state(struct pipe_context* pipe,
544 const struct pipe_sampler_state* state)
545 {
546 struct r300_context* r300 = r300_context(pipe);
547 struct r300_sampler_state* sampler = CALLOC_STRUCT(r300_sampler_state);
548 int lod_bias;
549
550 sampler->filter0 |=
551 (r300_translate_wrap(state->wrap_s) << R300_TX_WRAP_S_SHIFT) |
552 (r300_translate_wrap(state->wrap_t) << R300_TX_WRAP_T_SHIFT) |
553 (r300_translate_wrap(state->wrap_r) << R300_TX_WRAP_R_SHIFT);
554
555 sampler->filter0 |= r300_translate_tex_filters(state->min_img_filter,
556 state->mag_img_filter,
557 state->min_mip_filter);
558
559 /* Unfortunately, r300-r500 don't support floating-point mipmap lods. */
560 /* We must pass these to the emit function to clamp them properly. */
561 sampler->min_lod = MAX2((unsigned)state->min_lod, 0);
562 sampler->max_lod = MAX2((unsigned)ceilf(state->max_lod), 0);
563
564 lod_bias = CLAMP((int)(state->lod_bias * 32), -(1 << 9), (1 << 9) - 1);
565
566 sampler->filter1 |= lod_bias << R300_LOD_BIAS_SHIFT;
567
568 sampler->filter1 |= r300_anisotropy(state->max_anisotropy);
569
570 util_pack_color(state->border_color, PIPE_FORMAT_A8R8G8B8_UNORM,
571 &sampler->border_color);
572
573 /* R500-specific fixups and optimizations */
574 if (r300_screen(r300->context.screen)->caps->is_r500) {
575 sampler->filter1 |= R500_BORDER_FIX;
576 }
577
578 return (void*)sampler;
579 }
580
581 static void r300_bind_sampler_states(struct pipe_context* pipe,
582 unsigned count,
583 void** states)
584 {
585 struct r300_context* r300 = r300_context(pipe);
586 int i;
587
588 if (count > 8) {
589 return;
590 }
591
592 for (i = 0; i < count; i++) {
593 if (r300->sampler_states[i] != states[i]) {
594 r300->sampler_states[i] = (struct r300_sampler_state*)states[i];
595 r300->dirty_state |= (R300_NEW_SAMPLER << i);
596 }
597 }
598
599 r300->sampler_count = count;
600 }
601
602 static void r300_lacks_vertex_textures(struct pipe_context* pipe,
603 unsigned count,
604 void** states)
605 {
606 }
607
608 static void r300_delete_sampler_state(struct pipe_context* pipe, void* state)
609 {
610 FREE(state);
611 }
612
613 static void r300_set_sampler_textures(struct pipe_context* pipe,
614 unsigned count,
615 struct pipe_texture** texture)
616 {
617 struct r300_context* r300 = r300_context(pipe);
618 boolean is_r500 = r300_screen(r300->context.screen)->caps->is_r500;
619 int i;
620
621 /* XXX magic num */
622 if (count > 8) {
623 return;
624 }
625
626 r300->context.flush(&r300->context, 0, NULL);
627
628 for (i = 0; i < count; i++) {
629 if (r300->textures[i] != (struct r300_texture*)texture[i]) {
630 pipe_texture_reference((struct pipe_texture**)&r300->textures[i],
631 texture[i]);
632 r300->dirty_state |= (R300_NEW_TEXTURE << i);
633
634 /* R300-specific - set the texrect factor in a fragment shader */
635 if (!is_r500 && r300->textures[i]->is_npot) {
636 /* XXX It would be nice to re-emit just 1 constant,
637 * XXX not all of them */
638 r300->dirty_state |= R300_NEW_FRAGMENT_SHADER_CONSTANTS;
639 }
640 }
641 }
642
643 for (i = count; i < 8; i++) {
644 if (r300->textures[i]) {
645 pipe_texture_reference((struct pipe_texture**)&r300->textures[i],
646 NULL);
647 r300->dirty_state |= (R300_NEW_TEXTURE << i);
648 }
649 }
650
651 r300->texture_count = count;
652 }
653
654 static void r300_set_scissor_state(struct pipe_context* pipe,
655 const struct pipe_scissor_state* state)
656 {
657 struct r300_context* r300 = r300_context(pipe);
658
659 r300_set_scissor_regs(state, &r300->scissor_state->scissor,
660 r300_screen(r300->context.screen)->caps->is_r500);
661
662 /* Don't rely on the order of states being set for the first time. */
663 if (!r300->rs_state || r300->rs_state->rs.scissor) {
664 r300->dirty_state |= R300_NEW_SCISSOR;
665 }
666 }
667
668 static void r300_set_viewport_state(struct pipe_context* pipe,
669 const struct pipe_viewport_state* state)
670 {
671 struct r300_context* r300 = r300_context(pipe);
672
673 /* Do the transform in HW. */
674 r300->viewport_state->vte_control = R300_VTX_W0_FMT;
675
676 if (state->scale[0] != 1.0f) {
677 r300->viewport_state->xscale = state->scale[0];
678 r300->viewport_state->vte_control |= R300_VPORT_X_SCALE_ENA;
679 }
680 if (state->scale[1] != 1.0f) {
681 r300->viewport_state->yscale = state->scale[1];
682 r300->viewport_state->vte_control |= R300_VPORT_Y_SCALE_ENA;
683 }
684 if (state->scale[2] != 1.0f) {
685 r300->viewport_state->zscale = state->scale[2];
686 r300->viewport_state->vte_control |= R300_VPORT_Z_SCALE_ENA;
687 }
688 if (state->translate[0] != 0.0f) {
689 r300->viewport_state->xoffset = state->translate[0];
690 r300->viewport_state->vte_control |= R300_VPORT_X_OFFSET_ENA;
691 }
692 if (state->translate[1] != 0.0f) {
693 r300->viewport_state->yoffset = state->translate[1];
694 r300->viewport_state->vte_control |= R300_VPORT_Y_OFFSET_ENA;
695 }
696 if (state->translate[2] != 0.0f) {
697 r300->viewport_state->zoffset = state->translate[2];
698 r300->viewport_state->vte_control |= R300_VPORT_Z_OFFSET_ENA;
699 }
700
701 r300->dirty_state |= R300_NEW_VIEWPORT;
702 }
703
704 static void r300_set_vertex_buffers(struct pipe_context* pipe,
705 unsigned count,
706 const struct pipe_vertex_buffer* buffers)
707 {
708 struct r300_context* r300 = r300_context(pipe);
709
710 memcpy(r300->vertex_buffer, buffers,
711 sizeof(struct pipe_vertex_buffer) * count);
712 r300->vertex_buffer_count = count;
713
714 if (r300->draw) {
715 draw_flush(r300->draw);
716 draw_set_vertex_buffers(r300->draw, count, buffers);
717 }
718
719 r300->dirty_state |= R300_NEW_VERTEX_FORMAT;
720 }
721
722 static void r300_set_vertex_elements(struct pipe_context* pipe,
723 unsigned count,
724 const struct pipe_vertex_element* elements)
725 {
726 struct r300_context* r300 = r300_context(pipe);
727
728 memcpy(r300->vertex_element,
729 elements,
730 sizeof(struct pipe_vertex_element) * count);
731 r300->vertex_element_count = count;
732
733 if (r300->draw) {
734 draw_flush(r300->draw);
735 draw_set_vertex_elements(r300->draw, count, elements);
736 }
737 }
738
739 static void* r300_create_vs_state(struct pipe_context* pipe,
740 const struct pipe_shader_state* shader)
741 {
742 struct r300_context* r300 = r300_context(pipe);
743
744 if (r300_screen(pipe->screen)->caps->has_tcl) {
745 struct r300_vertex_shader* vs = CALLOC_STRUCT(r300_vertex_shader);
746 /* Copy state directly into shader. */
747 vs->state = *shader;
748 vs->state.tokens = tgsi_dup_tokens(shader->tokens);
749
750 tgsi_scan_shader(shader->tokens, &vs->info);
751
752 return (void*)vs;
753 } else {
754 return draw_create_vertex_shader(r300->draw, shader);
755 }
756 }
757
758 static void r300_bind_vs_state(struct pipe_context* pipe, void* shader)
759 {
760 struct r300_context* r300 = r300_context(pipe);
761
762 if (r300_screen(pipe->screen)->caps->has_tcl) {
763 struct r300_vertex_shader* vs = (struct r300_vertex_shader*)shader;
764
765 if (vs == NULL) {
766 r300->vs = NULL;
767 return;
768 } else if (!vs->translated) {
769 r300_translate_vertex_shader(r300, vs);
770 }
771
772 r300->vs = vs;
773 r300->dirty_state |= R300_NEW_VERTEX_SHADER | R300_NEW_VERTEX_SHADER_CONSTANTS;
774 } else {
775 draw_flush(r300->draw);
776 draw_bind_vertex_shader(r300->draw,
777 (struct draw_vertex_shader*)shader);
778 }
779 }
780
781 static void r300_delete_vs_state(struct pipe_context* pipe, void* shader)
782 {
783 struct r300_context* r300 = r300_context(pipe);
784
785 if (r300_screen(pipe->screen)->caps->has_tcl) {
786 struct r300_vertex_shader* vs = (struct r300_vertex_shader*)shader;
787
788 rc_constants_destroy(&vs->code.constants);
789 FREE((void*)vs->state.tokens);
790 FREE(shader);
791 } else {
792 draw_delete_vertex_shader(r300->draw,
793 (struct draw_vertex_shader*)shader);
794 }
795 }
796
797 static void r300_set_constant_buffer(struct pipe_context *pipe,
798 uint shader, uint index,
799 const struct pipe_constant_buffer *buf)
800 {
801 struct r300_context* r300 = r300_context(pipe);
802 void *mapped;
803
804 if (buf == NULL || buf->buffer->size == 0 ||
805 (mapped = pipe_buffer_map(pipe->screen, buf->buffer, PIPE_BUFFER_USAGE_CPU_READ)) == NULL)
806 {
807 r300->shader_constants[shader].count = 0;
808 return;
809 }
810
811 assert((buf->buffer->size % 4 * sizeof(float)) == 0);
812 memcpy(r300->shader_constants[shader].constants, mapped, buf->buffer->size);
813 r300->shader_constants[shader].count = buf->buffer->size / (4 * sizeof(float));
814 pipe_buffer_unmap(pipe->screen, buf->buffer);
815
816 if (shader == PIPE_SHADER_VERTEX)
817 r300->dirty_state |= R300_NEW_VERTEX_SHADER_CONSTANTS;
818 else if (shader == PIPE_SHADER_FRAGMENT)
819 r300->dirty_state |= R300_NEW_FRAGMENT_SHADER_CONSTANTS;
820 }
821
822 void r300_init_state_functions(struct r300_context* r300)
823 {
824 r300->context.create_blend_state = r300_create_blend_state;
825 r300->context.bind_blend_state = r300_bind_blend_state;
826 r300->context.delete_blend_state = r300_delete_blend_state;
827
828 r300->context.set_blend_color = r300_set_blend_color;
829
830 r300->context.set_clip_state = r300_set_clip_state;
831
832 r300->context.set_constant_buffer = r300_set_constant_buffer;
833
834 r300->context.create_depth_stencil_alpha_state = r300_create_dsa_state;
835 r300->context.bind_depth_stencil_alpha_state = r300_bind_dsa_state;
836 r300->context.delete_depth_stencil_alpha_state = r300_delete_dsa_state;
837
838 r300->context.set_edgeflags = r300_set_edgeflags;
839
840 r300->context.set_framebuffer_state = r300_set_framebuffer_state;
841
842 r300->context.create_fs_state = r300_create_fs_state;
843 r300->context.bind_fs_state = r300_bind_fs_state;
844 r300->context.delete_fs_state = r300_delete_fs_state;
845
846 r300->context.set_polygon_stipple = r300_set_polygon_stipple;
847
848 r300->context.create_rasterizer_state = r300_create_rs_state;
849 r300->context.bind_rasterizer_state = r300_bind_rs_state;
850 r300->context.delete_rasterizer_state = r300_delete_rs_state;
851
852 r300->context.create_sampler_state = r300_create_sampler_state;
853 r300->context.bind_fragment_sampler_states = r300_bind_sampler_states;
854 r300->context.bind_vertex_sampler_states = r300_lacks_vertex_textures;
855 r300->context.delete_sampler_state = r300_delete_sampler_state;
856
857 r300->context.set_fragment_sampler_textures = r300_set_sampler_textures;
858
859 r300->context.set_scissor_state = r300_set_scissor_state;
860
861 r300->context.set_viewport_state = r300_set_viewport_state;
862
863 r300->context.set_vertex_buffers = r300_set_vertex_buffers;
864 r300->context.set_vertex_elements = r300_set_vertex_elements;
865
866 r300->context.create_vs_state = r300_create_vs_state;
867 r300->context.bind_vs_state = r300_bind_vs_state;
868 r300->context.delete_vs_state = r300_delete_vs_state;
869 }