2 * Copyright 2008 Corbin Simpson <MostAwesomeDude@gmail.com>
3 * Copyright 2009 Marek Olšák <maraeo@gmail.com>
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * on the rights to use, copy, modify, merge, publish, distribute, sub
9 * license, and/or sell copies of the Software, and to permit persons to whom
10 * the Software is furnished to do so, subject to the following conditions:
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
20 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
21 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
22 * USE OR OTHER DEALINGS IN THE SOFTWARE. */
24 #include "draw/draw_context.h"
26 #include "util/u_framebuffer.h"
27 #include "util/u_half.h"
28 #include "util/u_helpers.h"
29 #include "util/u_math.h"
30 #include "util/u_mm.h"
31 #include "util/u_memory.h"
32 #include "util/u_pack_color.h"
33 #include "util/u_transfer.h"
35 #include "tgsi/tgsi_parse.h"
37 #include "pipe/p_config.h"
40 #include "r300_context.h"
41 #include "r300_emit.h"
43 #include "r300_screen.h"
44 #include "r300_screen_buffer.h"
45 #include "r300_state_inlines.h"
47 #include "r300_texture.h"
50 /* r300_state: Functions used to intialize state context by translating
51 * Gallium state objects into semi-native r300 state objects. */
53 #define UPDATE_STATE(cso, atom) \
54 if (cso != atom.state) { \
56 r300_mark_atom_dirty(r300, &(atom)); \
59 static boolean
blend_discard_if_src_alpha_0(unsigned srcRGB
, unsigned srcA
,
60 unsigned dstRGB
, unsigned dstA
)
62 /* If the blend equation is ADD or REVERSE_SUBTRACT,
63 * SRC_ALPHA == 0, and the following state is set, the colorbuffer
64 * will not be changed.
65 * Notice that the dst factors are the src factors inverted. */
66 return (srcRGB
== PIPE_BLENDFACTOR_SRC_ALPHA
||
67 srcRGB
== PIPE_BLENDFACTOR_SRC_ALPHA_SATURATE
||
68 srcRGB
== PIPE_BLENDFACTOR_ZERO
) &&
69 (srcA
== PIPE_BLENDFACTOR_SRC_COLOR
||
70 srcA
== PIPE_BLENDFACTOR_SRC_ALPHA
||
71 srcA
== PIPE_BLENDFACTOR_SRC_ALPHA_SATURATE
||
72 srcA
== PIPE_BLENDFACTOR_ZERO
) &&
73 (dstRGB
== PIPE_BLENDFACTOR_INV_SRC_ALPHA
||
74 dstRGB
== PIPE_BLENDFACTOR_ONE
) &&
75 (dstA
== PIPE_BLENDFACTOR_INV_SRC_COLOR
||
76 dstA
== PIPE_BLENDFACTOR_INV_SRC_ALPHA
||
77 dstA
== PIPE_BLENDFACTOR_ONE
);
80 static boolean
blend_discard_if_src_alpha_1(unsigned srcRGB
, unsigned srcA
,
81 unsigned dstRGB
, unsigned dstA
)
83 /* If the blend equation is ADD or REVERSE_SUBTRACT,
84 * SRC_ALPHA == 1, and the following state is set, the colorbuffer
85 * will not be changed.
86 * Notice that the dst factors are the src factors inverted. */
87 return (srcRGB
== PIPE_BLENDFACTOR_INV_SRC_ALPHA
||
88 srcRGB
== PIPE_BLENDFACTOR_ZERO
) &&
89 (srcA
== PIPE_BLENDFACTOR_INV_SRC_COLOR
||
90 srcA
== PIPE_BLENDFACTOR_INV_SRC_ALPHA
||
91 srcA
== PIPE_BLENDFACTOR_ZERO
) &&
92 (dstRGB
== PIPE_BLENDFACTOR_SRC_ALPHA
||
93 dstRGB
== PIPE_BLENDFACTOR_ONE
) &&
94 (dstA
== PIPE_BLENDFACTOR_SRC_COLOR
||
95 dstA
== PIPE_BLENDFACTOR_SRC_ALPHA
||
96 dstA
== PIPE_BLENDFACTOR_ONE
);
99 static boolean
blend_discard_if_src_color_0(unsigned srcRGB
, unsigned srcA
,
100 unsigned dstRGB
, unsigned dstA
)
102 /* If the blend equation is ADD or REVERSE_SUBTRACT,
103 * SRC_COLOR == (0,0,0), and the following state is set, the colorbuffer
104 * will not be changed.
105 * Notice that the dst factors are the src factors inverted. */
106 return (srcRGB
== PIPE_BLENDFACTOR_SRC_COLOR
||
107 srcRGB
== PIPE_BLENDFACTOR_ZERO
) &&
108 (srcA
== PIPE_BLENDFACTOR_ZERO
) &&
109 (dstRGB
== PIPE_BLENDFACTOR_INV_SRC_COLOR
||
110 dstRGB
== PIPE_BLENDFACTOR_ONE
) &&
111 (dstA
== PIPE_BLENDFACTOR_ONE
);
114 static boolean
blend_discard_if_src_color_1(unsigned srcRGB
, unsigned srcA
,
115 unsigned dstRGB
, unsigned dstA
)
117 /* If the blend equation is ADD or REVERSE_SUBTRACT,
118 * SRC_COLOR == (1,1,1), and the following state is set, the colorbuffer
119 * will not be changed.
120 * Notice that the dst factors are the src factors inverted. */
121 return (srcRGB
== PIPE_BLENDFACTOR_INV_SRC_COLOR
||
122 srcRGB
== PIPE_BLENDFACTOR_ZERO
) &&
123 (srcA
== PIPE_BLENDFACTOR_ZERO
) &&
124 (dstRGB
== PIPE_BLENDFACTOR_SRC_COLOR
||
125 dstRGB
== PIPE_BLENDFACTOR_ONE
) &&
126 (dstA
== PIPE_BLENDFACTOR_ONE
);
129 static boolean
blend_discard_if_src_alpha_color_0(unsigned srcRGB
, unsigned srcA
,
130 unsigned dstRGB
, unsigned dstA
)
132 /* If the blend equation is ADD or REVERSE_SUBTRACT,
133 * SRC_ALPHA_COLOR == (0,0,0,0), and the following state is set,
134 * the colorbuffer will not be changed.
135 * Notice that the dst factors are the src factors inverted. */
136 return (srcRGB
== PIPE_BLENDFACTOR_SRC_COLOR
||
137 srcRGB
== PIPE_BLENDFACTOR_SRC_ALPHA
||
138 srcRGB
== PIPE_BLENDFACTOR_SRC_ALPHA_SATURATE
||
139 srcRGB
== PIPE_BLENDFACTOR_ZERO
) &&
140 (srcA
== PIPE_BLENDFACTOR_SRC_COLOR
||
141 srcA
== PIPE_BLENDFACTOR_SRC_ALPHA
||
142 srcA
== PIPE_BLENDFACTOR_SRC_ALPHA_SATURATE
||
143 srcA
== PIPE_BLENDFACTOR_ZERO
) &&
144 (dstRGB
== PIPE_BLENDFACTOR_INV_SRC_COLOR
||
145 dstRGB
== PIPE_BLENDFACTOR_INV_SRC_ALPHA
||
146 dstRGB
== PIPE_BLENDFACTOR_ONE
) &&
147 (dstA
== PIPE_BLENDFACTOR_INV_SRC_COLOR
||
148 dstA
== PIPE_BLENDFACTOR_INV_SRC_ALPHA
||
149 dstA
== PIPE_BLENDFACTOR_ONE
);
152 static boolean
blend_discard_if_src_alpha_color_1(unsigned srcRGB
, unsigned srcA
,
153 unsigned dstRGB
, unsigned dstA
)
155 /* If the blend equation is ADD or REVERSE_SUBTRACT,
156 * SRC_ALPHA_COLOR == (1,1,1,1), and the following state is set,
157 * the colorbuffer will not be changed.
158 * Notice that the dst factors are the src factors inverted. */
159 return (srcRGB
== PIPE_BLENDFACTOR_INV_SRC_COLOR
||
160 srcRGB
== PIPE_BLENDFACTOR_INV_SRC_ALPHA
||
161 srcRGB
== PIPE_BLENDFACTOR_ZERO
) &&
162 (srcA
== PIPE_BLENDFACTOR_INV_SRC_COLOR
||
163 srcA
== PIPE_BLENDFACTOR_INV_SRC_ALPHA
||
164 srcA
== PIPE_BLENDFACTOR_ZERO
) &&
165 (dstRGB
== PIPE_BLENDFACTOR_SRC_COLOR
||
166 dstRGB
== PIPE_BLENDFACTOR_SRC_ALPHA
||
167 dstRGB
== PIPE_BLENDFACTOR_ONE
) &&
168 (dstA
== PIPE_BLENDFACTOR_SRC_COLOR
||
169 dstA
== PIPE_BLENDFACTOR_SRC_ALPHA
||
170 dstA
== PIPE_BLENDFACTOR_ONE
);
173 static unsigned blend_discard_conditionally(unsigned eqRGB
, unsigned eqA
,
174 unsigned dstRGB
, unsigned dstA
,
175 unsigned srcRGB
, unsigned srcA
)
177 unsigned blend_control
= 0;
179 /* Optimization: discard pixels which don't change the colorbuffer.
181 * The code below is non-trivial and some math is involved.
183 * Discarding pixels must be disabled when FP16 AA is enabled.
184 * This is a hardware bug. Also, this implementation wouldn't work
185 * with FP blending enabled and equation clamping disabled.
187 * Equations other than ADD are rarely used and therefore won't be
189 if ((eqRGB
== PIPE_BLEND_ADD
|| eqRGB
== PIPE_BLEND_REVERSE_SUBTRACT
) &&
190 (eqA
== PIPE_BLEND_ADD
|| eqA
== PIPE_BLEND_REVERSE_SUBTRACT
)) {
192 * REVERSE_SUBTRACT: Y-X
195 * If X = src*srcFactor = 0 and Y = dst*dstFactor = 1,
196 * then CB will not be changed.
198 * Given the srcFactor and dstFactor variables, we can derive
199 * what src and dst should be equal to and discard appropriate
202 if (blend_discard_if_src_alpha_0(srcRGB
, srcA
, dstRGB
, dstA
)) {
203 blend_control
|= R300_DISCARD_SRC_PIXELS_SRC_ALPHA_0
;
204 } else if (blend_discard_if_src_alpha_1(srcRGB
, srcA
,
206 blend_control
|= R300_DISCARD_SRC_PIXELS_SRC_ALPHA_1
;
207 } else if (blend_discard_if_src_color_0(srcRGB
, srcA
,
209 blend_control
|= R300_DISCARD_SRC_PIXELS_SRC_COLOR_0
;
210 } else if (blend_discard_if_src_color_1(srcRGB
, srcA
,
212 blend_control
|= R300_DISCARD_SRC_PIXELS_SRC_COLOR_1
;
213 } else if (blend_discard_if_src_alpha_color_0(srcRGB
, srcA
,
216 R300_DISCARD_SRC_PIXELS_SRC_ALPHA_COLOR_0
;
217 } else if (blend_discard_if_src_alpha_color_1(srcRGB
, srcA
,
220 R300_DISCARD_SRC_PIXELS_SRC_ALPHA_COLOR_1
;
223 return blend_control
;
226 /* The hardware colormask is clunky a must be swizzled depending on the format.
227 * This was figured out by trial-and-error. */
228 static unsigned bgra_cmask(unsigned mask
)
230 return ((mask
& PIPE_MASK_R
) << 2) |
231 ((mask
& PIPE_MASK_B
) >> 2) |
232 (mask
& (PIPE_MASK_G
| PIPE_MASK_A
));
235 static unsigned rgba_cmask(unsigned mask
)
237 return mask
& PIPE_MASK_RGBA
;
240 static unsigned rrrr_cmask(unsigned mask
)
242 return (mask
& PIPE_MASK_R
) |
243 ((mask
& PIPE_MASK_R
) << 1) |
244 ((mask
& PIPE_MASK_R
) << 2) |
245 ((mask
& PIPE_MASK_R
) << 3);
248 static unsigned aaaa_cmask(unsigned mask
)
250 return ((mask
& PIPE_MASK_A
) >> 3) |
251 ((mask
& PIPE_MASK_A
) >> 2) |
252 ((mask
& PIPE_MASK_A
) >> 1) |
253 (mask
& PIPE_MASK_A
);
256 static unsigned grrg_cmask(unsigned mask
)
258 return ((mask
& PIPE_MASK_R
) << 1) |
259 ((mask
& PIPE_MASK_R
) << 2) |
260 ((mask
& PIPE_MASK_G
) >> 1) |
261 ((mask
& PIPE_MASK_G
) << 2);
264 static unsigned arra_cmask(unsigned mask
)
266 return ((mask
& PIPE_MASK_R
) << 1) |
267 ((mask
& PIPE_MASK_R
) << 2) |
268 ((mask
& PIPE_MASK_A
) >> 3) |
269 (mask
& PIPE_MASK_A
);
272 static unsigned blend_read_enable(unsigned eqRGB
, unsigned eqA
,
273 unsigned dstRGB
, unsigned dstA
,
274 unsigned srcRGB
, unsigned srcA
,
275 boolean src_alpha_optz
)
277 unsigned blend_control
= 0;
279 /* Optimization: some operations do not require the destination color.
281 * When SRC_ALPHA_SATURATE is used, colorbuffer reads must be enabled,
282 * otherwise blending gives incorrect results. It seems to be
284 if (eqRGB
== PIPE_BLEND_MIN
|| eqA
== PIPE_BLEND_MIN
||
285 eqRGB
== PIPE_BLEND_MAX
|| eqA
== PIPE_BLEND_MAX
||
286 dstRGB
!= PIPE_BLENDFACTOR_ZERO
||
287 dstA
!= PIPE_BLENDFACTOR_ZERO
||
288 srcRGB
== PIPE_BLENDFACTOR_DST_COLOR
||
289 srcRGB
== PIPE_BLENDFACTOR_DST_ALPHA
||
290 srcRGB
== PIPE_BLENDFACTOR_INV_DST_COLOR
||
291 srcRGB
== PIPE_BLENDFACTOR_INV_DST_ALPHA
||
292 srcA
== PIPE_BLENDFACTOR_DST_COLOR
||
293 srcA
== PIPE_BLENDFACTOR_DST_ALPHA
||
294 srcA
== PIPE_BLENDFACTOR_INV_DST_COLOR
||
295 srcA
== PIPE_BLENDFACTOR_INV_DST_ALPHA
||
296 srcRGB
== PIPE_BLENDFACTOR_SRC_ALPHA_SATURATE
) {
297 /* Enable reading from the colorbuffer. */
298 blend_control
|= R300_READ_ENABLE
;
300 if (src_alpha_optz
) {
301 /* Optimization: Depending on incoming pixels, we can
302 * conditionally disable the reading in hardware... */
303 if (eqRGB
!= PIPE_BLEND_MIN
&& eqA
!= PIPE_BLEND_MIN
&&
304 eqRGB
!= PIPE_BLEND_MAX
&& eqA
!= PIPE_BLEND_MAX
) {
305 /* Disable reading if SRC_ALPHA == 0. */
306 if ((dstRGB
== PIPE_BLENDFACTOR_SRC_ALPHA
||
307 dstRGB
== PIPE_BLENDFACTOR_ZERO
) &&
308 (dstA
== PIPE_BLENDFACTOR_SRC_COLOR
||
309 dstA
== PIPE_BLENDFACTOR_SRC_ALPHA
||
310 dstA
== PIPE_BLENDFACTOR_ZERO
) &&
311 (srcRGB
!= PIPE_BLENDFACTOR_DST_COLOR
&&
312 srcRGB
!= PIPE_BLENDFACTOR_DST_ALPHA
&&
313 srcRGB
!= PIPE_BLENDFACTOR_INV_DST_COLOR
&&
314 srcRGB
!= PIPE_BLENDFACTOR_INV_DST_ALPHA
)) {
315 blend_control
|= R500_SRC_ALPHA_0_NO_READ
;
318 /* Disable reading if SRC_ALPHA == 1. */
319 if ((dstRGB
== PIPE_BLENDFACTOR_INV_SRC_ALPHA
||
320 dstRGB
== PIPE_BLENDFACTOR_ZERO
) &&
321 (dstA
== PIPE_BLENDFACTOR_INV_SRC_COLOR
||
322 dstA
== PIPE_BLENDFACTOR_INV_SRC_ALPHA
||
323 dstA
== PIPE_BLENDFACTOR_ZERO
) &&
324 (srcRGB
!= PIPE_BLENDFACTOR_DST_COLOR
&&
325 srcRGB
!= PIPE_BLENDFACTOR_DST_ALPHA
&&
326 srcRGB
!= PIPE_BLENDFACTOR_INV_DST_COLOR
&&
327 srcRGB
!= PIPE_BLENDFACTOR_INV_DST_ALPHA
)) {
328 blend_control
|= R500_SRC_ALPHA_1_NO_READ
;
333 return blend_control
;
336 /* Create a new blend state based on the CSO blend state.
338 * This encompasses alpha blending, logic/raster ops, and blend dithering. */
339 static void* r300_create_blend_state(struct pipe_context
* pipe
,
340 const struct pipe_blend_state
* state
)
342 struct r300_screen
* r300screen
= r300_screen(pipe
->screen
);
343 struct r300_blend_state
* blend
= CALLOC_STRUCT(r300_blend_state
);
344 uint32_t blend_control
= 0; /* R300_RB3D_CBLEND: 0x4e04 */
345 uint32_t blend_control_noclamp
= 0; /* R300_RB3D_CBLEND: 0x4e04 */
346 uint32_t blend_control_noalpha
= 0; /* R300_RB3D_CBLEND: 0x4e04 */
347 uint32_t blend_control_noalpha_noclamp
= 0; /* R300_RB3D_CBLEND: 0x4e04 */
348 uint32_t alpha_blend_control
= 0; /* R300_RB3D_ABLEND: 0x4e08 */
349 uint32_t alpha_blend_control_noclamp
= 0; /* R300_RB3D_ABLEND: 0x4e08 */
350 uint32_t alpha_blend_control_noalpha
= 0; /* R300_RB3D_ABLEND: 0x4e08 */
351 uint32_t alpha_blend_control_noalpha_noclamp
= 0; /* R300_RB3D_ABLEND: 0x4e08 */
352 uint32_t rop
= 0; /* R300_RB3D_ROPCNTL: 0x4e18 */
353 uint32_t dither
= 0; /* R300_RB3D_DITHER_CTL: 0x4e50 */
356 const unsigned eqRGB
= state
->rt
[0].rgb_func
;
357 const unsigned srcRGB
= state
->rt
[0].rgb_src_factor
;
358 const unsigned dstRGB
= state
->rt
[0].rgb_dst_factor
;
360 const unsigned eqA
= state
->rt
[0].alpha_func
;
361 const unsigned srcA
= state
->rt
[0].alpha_src_factor
;
362 const unsigned dstA
= state
->rt
[0].alpha_dst_factor
;
364 unsigned srcRGBX
= srcRGB
;
365 unsigned dstRGBX
= dstRGB
;
368 blend
->state
= *state
;
370 /* force DST_ALPHA to ONE where we can */
372 case PIPE_BLENDFACTOR_DST_ALPHA
:
373 srcRGBX
= PIPE_BLENDFACTOR_ONE
;
375 case PIPE_BLENDFACTOR_INV_DST_ALPHA
:
376 srcRGBX
= PIPE_BLENDFACTOR_ZERO
;
381 case PIPE_BLENDFACTOR_DST_ALPHA
:
382 dstRGBX
= PIPE_BLENDFACTOR_ONE
;
384 case PIPE_BLENDFACTOR_INV_DST_ALPHA
:
385 dstRGBX
= PIPE_BLENDFACTOR_ZERO
;
389 /* Get blending register values. */
390 if (state
->rt
[0].blend_enable
) {
391 unsigned blend_eq
, blend_eq_noclamp
;
393 /* despite the name, ALPHA_BLEND_ENABLE has nothing to do with alpha,
394 * this is just the crappy D3D naming */
395 blend_control
= blend_control_noclamp
=
396 R300_ALPHA_BLEND_ENABLE
|
397 ( r300_translate_blend_factor(srcRGB
) << R300_SRC_BLEND_SHIFT
) |
398 ( r300_translate_blend_factor(dstRGB
) << R300_DST_BLEND_SHIFT
);
400 blend_control_noalpha
= blend_control_noalpha_noclamp
=
401 R300_ALPHA_BLEND_ENABLE
|
402 ( r300_translate_blend_factor(srcRGBX
) << R300_SRC_BLEND_SHIFT
) |
403 ( r300_translate_blend_factor(dstRGBX
) << R300_DST_BLEND_SHIFT
);
405 blend_eq
= r300_translate_blend_function(eqRGB
, TRUE
);
406 blend_eq_noclamp
= r300_translate_blend_function(eqRGB
, FALSE
);
408 blend_control
|= blend_eq
;
409 blend_control_noalpha
|= blend_eq
;
410 blend_control_noclamp
|= blend_eq_noclamp
;
411 blend_control_noalpha_noclamp
|= blend_eq_noclamp
;
413 /* Optimization: some operations do not require the destination color. */
414 blend_control
|= blend_read_enable(eqRGB
, eqA
, dstRGB
, dstA
,
415 srcRGB
, srcA
, r300screen
->caps
.is_r500
);
416 blend_control_noclamp
|= blend_read_enable(eqRGB
, eqA
, dstRGB
, dstA
,
417 srcRGB
, srcA
, FALSE
);
418 blend_control_noalpha
|= blend_read_enable(eqRGB
, eqA
, dstRGBX
, dstA
,
419 srcRGBX
, srcA
, r300screen
->caps
.is_r500
);
420 blend_control_noalpha_noclamp
|= blend_read_enable(eqRGB
, eqA
, dstRGBX
, dstA
,
421 srcRGBX
, srcA
, FALSE
);
423 /* Optimization: discard pixels which don't change the colorbuffer.
424 * It cannot be used with FP16 AA. */
425 blend_control
|= blend_discard_conditionally(eqRGB
, eqA
, dstRGB
, dstA
,
427 blend_control_noalpha
|= blend_discard_conditionally(eqRGB
, eqA
, dstRGBX
, dstA
,
431 if (srcA
!= srcRGB
|| dstA
!= dstRGB
|| eqA
!= eqRGB
) {
432 blend_control
|= R300_SEPARATE_ALPHA_ENABLE
;
433 blend_control_noclamp
|= R300_SEPARATE_ALPHA_ENABLE
;
435 alpha_blend_control
= alpha_blend_control_noclamp
=
436 (r300_translate_blend_factor(srcA
) << R300_SRC_BLEND_SHIFT
) |
437 (r300_translate_blend_factor(dstA
) << R300_DST_BLEND_SHIFT
);
438 alpha_blend_control
|= r300_translate_blend_function(eqA
, TRUE
);
439 alpha_blend_control_noclamp
|= r300_translate_blend_function(eqA
, FALSE
);
441 if (srcA
!= srcRGBX
|| dstA
!= dstRGBX
|| eqA
!= eqRGB
) {
442 blend_control_noalpha
|= R300_SEPARATE_ALPHA_ENABLE
;
443 blend_control_noalpha_noclamp
|= R300_SEPARATE_ALPHA_ENABLE
;
445 alpha_blend_control_noalpha
= alpha_blend_control_noalpha_noclamp
=
446 (r300_translate_blend_factor(srcA
) << R300_SRC_BLEND_SHIFT
) |
447 (r300_translate_blend_factor(dstA
) << R300_DST_BLEND_SHIFT
);
448 alpha_blend_control_noalpha
|= r300_translate_blend_function(eqA
, TRUE
);
449 alpha_blend_control_noalpha_noclamp
|= r300_translate_blend_function(eqA
, FALSE
);
453 /* PIPE_LOGICOP_* don't need to be translated, fortunately. */
454 if (state
->logicop_enable
) {
455 rop
= R300_RB3D_ROPCNTL_ROP_ENABLE
|
456 (state
->logicop_func
) << R300_RB3D_ROPCNTL_ROP_SHIFT
;
459 /* Neither fglrx nor classic r300 ever set this, regardless of dithering
460 * state. Since it's an optional implementation detail, we can leave it
461 * out and never dither.
463 * This could be revisited if we ever get quality or conformance hints.
466 dither = R300_RB3D_DITHER_CTL_DITHER_MODE_LUT |
467 R300_RB3D_DITHER_CTL_ALPHA_DITHER_MODE_LUT;
471 /* Build a command buffer. */
473 unsigned (*func
[COLORMASK_NUM_SWIZZLES
])(unsigned) = {
484 for (i
= 0; i
< COLORMASK_NUM_SWIZZLES
; i
++) {
485 boolean has_alpha
= i
!= COLORMASK_RGBX
&& i
!= COLORMASK_BGRX
;
487 BEGIN_CB(blend
->cb_clamp
[i
], 8);
488 OUT_CB_REG(R300_RB3D_ROPCNTL
, rop
);
489 OUT_CB_REG_SEQ(R300_RB3D_CBLEND
, 3);
490 OUT_CB(has_alpha
? blend_control
: blend_control_noalpha
);
491 OUT_CB(has_alpha
? alpha_blend_control
: alpha_blend_control_noalpha
);
492 OUT_CB(func
[i
](state
->rt
[0].colormask
));
493 OUT_CB_REG(R300_RB3D_DITHER_CTL
, dither
);
498 /* Build a command buffer (for RGBA16F). */
499 BEGIN_CB(blend
->cb_noclamp
, 8);
500 OUT_CB_REG(R300_RB3D_ROPCNTL
, rop
);
501 OUT_CB_REG_SEQ(R300_RB3D_CBLEND
, 3);
502 OUT_CB(blend_control_noclamp
);
503 OUT_CB(alpha_blend_control_noclamp
);
504 OUT_CB(rgba_cmask(state
->rt
[0].colormask
));
505 OUT_CB_REG(R300_RB3D_DITHER_CTL
, dither
);
508 /* Build a command buffer (for RGB16F). */
509 BEGIN_CB(blend
->cb_noclamp_noalpha
, 8);
510 OUT_CB_REG(R300_RB3D_ROPCNTL
, rop
);
511 OUT_CB_REG_SEQ(R300_RB3D_CBLEND
, 3);
512 OUT_CB(blend_control_noalpha_noclamp
);
513 OUT_CB(alpha_blend_control_noalpha_noclamp
);
514 OUT_CB(rgba_cmask(state
->rt
[0].colormask
));
515 OUT_CB_REG(R300_RB3D_DITHER_CTL
, dither
);
518 /* The same as above, but with no colorbuffer reads and writes. */
519 BEGIN_CB(blend
->cb_no_readwrite
, 8);
520 OUT_CB_REG(R300_RB3D_ROPCNTL
, rop
);
521 OUT_CB_REG_SEQ(R300_RB3D_CBLEND
, 3);
525 OUT_CB_REG(R300_RB3D_DITHER_CTL
, dither
);
531 /* Bind blend state. */
532 static void r300_bind_blend_state(struct pipe_context
* pipe
,
535 struct r300_context
* r300
= r300_context(pipe
);
536 struct r300_blend_state
*blend
= (struct r300_blend_state
*)state
;
537 boolean last_alpha_to_one
= r300
->alpha_to_one
;
538 boolean last_alpha_to_coverage
= r300
->alpha_to_coverage
;
540 UPDATE_STATE(state
, r300
->blend_state
);
545 r300
->alpha_to_one
= blend
->state
.alpha_to_one
;
546 r300
->alpha_to_coverage
= blend
->state
.alpha_to_coverage
;
548 if (r300
->alpha_to_one
!= last_alpha_to_one
&& r300
->msaa_enable
&&
549 r300
->fs_status
== FRAGMENT_SHADER_VALID
) {
550 r300
->fs_status
= FRAGMENT_SHADER_MAYBE_DIRTY
;
553 if (r300
->alpha_to_coverage
!= last_alpha_to_coverage
&&
555 r300_mark_atom_dirty(r300
, &r300
->dsa_state
);
559 /* Free blend state. */
560 static void r300_delete_blend_state(struct pipe_context
* pipe
,
566 /* Convert float to 10bit integer */
567 static unsigned float_to_fixed10(float f
)
569 return CLAMP((unsigned)(f
* 1023.9f
), 0, 1023);
573 * Setup both R300 and R500 registers, figure out later which one to write. */
574 static void r300_set_blend_color(struct pipe_context
* pipe
,
575 const struct pipe_blend_color
* color
)
577 struct r300_context
* r300
= r300_context(pipe
);
578 struct pipe_framebuffer_state
*fb
= r300
->fb_state
.state
;
579 struct r300_blend_color_state
*state
=
580 (struct r300_blend_color_state
*)r300
->blend_color_state
.state
;
581 struct pipe_blend_color c
;
582 struct pipe_surface
*cb
;
586 state
->state
= *color
; /* Save it, so that we can reuse it in set_fb_state */
588 cb
= fb
->nr_cbufs
? r300_get_nonnull_cb(fb
, 0) : NULL
;
590 /* The blend color is dependent on the colorbuffer format. */
592 switch (cb
->format
) {
593 case PIPE_FORMAT_R8_UNORM
:
594 case PIPE_FORMAT_L8_UNORM
:
595 case PIPE_FORMAT_I8_UNORM
:
596 c
.color
[1] = c
.color
[0];
599 case PIPE_FORMAT_A8_UNORM
:
600 c
.color
[1] = c
.color
[3];
603 case PIPE_FORMAT_R8G8_UNORM
:
604 c
.color
[2] = c
.color
[1];
607 case PIPE_FORMAT_L8A8_UNORM
:
608 case PIPE_FORMAT_R8A8_UNORM
:
609 c
.color
[2] = c
.color
[3];
612 case PIPE_FORMAT_R8G8B8A8_UNORM
:
613 case PIPE_FORMAT_R8G8B8X8_UNORM
:
615 c
.color
[0] = c
.color
[2];
623 if (r300
->screen
->caps
.is_r500
) {
624 BEGIN_CB(state
->cb
, 3);
625 OUT_CB_REG_SEQ(R500_RB3D_CONSTANT_COLOR_AR
, 2);
627 switch (cb
? cb
->format
: 0) {
628 case PIPE_FORMAT_R16G16B16A16_FLOAT
:
629 case PIPE_FORMAT_R16G16B16X16_FLOAT
:
630 OUT_CB(util_float_to_half(c
.color
[2]) |
631 (util_float_to_half(c
.color
[3]) << 16));
632 OUT_CB(util_float_to_half(c
.color
[0]) |
633 (util_float_to_half(c
.color
[1]) << 16));
637 OUT_CB(float_to_fixed10(c
.color
[0]) |
638 (float_to_fixed10(c
.color
[3]) << 16));
639 OUT_CB(float_to_fixed10(c
.color
[2]) |
640 (float_to_fixed10(c
.color
[1]) << 16));
646 util_pack_color(c
.color
, PIPE_FORMAT_B8G8R8A8_UNORM
, &uc
);
648 BEGIN_CB(state
->cb
, 2);
649 OUT_CB_REG(R300_RB3D_BLEND_COLOR
, uc
.ui
[0]);
653 r300_mark_atom_dirty(r300
, &r300
->blend_color_state
);
656 static void r300_set_clip_state(struct pipe_context
* pipe
,
657 const struct pipe_clip_state
* state
)
659 struct r300_context
* r300
= r300_context(pipe
);
660 struct r300_clip_state
*clip
=
661 (struct r300_clip_state
*)r300
->clip_state
.state
;
664 if (r300
->screen
->caps
.has_tcl
) {
665 BEGIN_CB(clip
->cb
, r300
->clip_state
.size
);
666 OUT_CB_REG(R300_VAP_PVS_VECTOR_INDX_REG
,
667 (r300
->screen
->caps
.is_r500
?
668 R500_PVS_UCP_START
: R300_PVS_UCP_START
));
669 OUT_CB_ONE_REG(R300_VAP_PVS_UPLOAD_DATA
, 6 * 4);
670 OUT_CB_TABLE(state
->ucp
, 6 * 4);
673 r300_mark_atom_dirty(r300
, &r300
->clip_state
);
675 draw_set_clip_state(r300
->draw
, state
);
679 /* Create a new depth, stencil, and alpha state based on the CSO dsa state.
681 * This contains the depth buffer, stencil buffer, alpha test, and such.
682 * On the Radeon, depth and stencil buffer setup are intertwined, which is
683 * the reason for some of the strange-looking assignments across registers. */
684 static void* r300_create_dsa_state(struct pipe_context
* pipe
,
685 const struct pipe_depth_stencil_alpha_state
* state
)
687 boolean is_r500
= r300_screen(pipe
->screen
)->caps
.is_r500
;
688 struct r300_dsa_state
* dsa
= CALLOC_STRUCT(r300_dsa_state
);
690 uint32_t alpha_value_fp16
= 0;
691 uint32_t z_buffer_control
= 0;
692 uint32_t z_stencil_control
= 0;
693 uint32_t stencil_ref_mask
= 0;
694 uint32_t stencil_ref_bf
= 0;
698 /* Depth test setup. - separate write mask depth for decomp flush */
699 if (state
->depth
.writemask
) {
700 z_buffer_control
|= R300_Z_WRITE_ENABLE
;
703 if (state
->depth
.enabled
) {
704 z_buffer_control
|= R300_Z_ENABLE
;
707 (r300_translate_depth_stencil_function(state
->depth
.func
) <<
711 /* Stencil buffer setup. */
712 if (state
->stencil
[0].enabled
) {
713 z_buffer_control
|= R300_STENCIL_ENABLE
;
715 (r300_translate_depth_stencil_function(state
->stencil
[0].func
) <<
716 R300_S_FRONT_FUNC_SHIFT
) |
717 (r300_translate_stencil_op(state
->stencil
[0].fail_op
) <<
718 R300_S_FRONT_SFAIL_OP_SHIFT
) |
719 (r300_translate_stencil_op(state
->stencil
[0].zpass_op
) <<
720 R300_S_FRONT_ZPASS_OP_SHIFT
) |
721 (r300_translate_stencil_op(state
->stencil
[0].zfail_op
) <<
722 R300_S_FRONT_ZFAIL_OP_SHIFT
);
725 (state
->stencil
[0].valuemask
<< R300_STENCILMASK_SHIFT
) |
726 (state
->stencil
[0].writemask
<< R300_STENCILWRITEMASK_SHIFT
);
728 if (state
->stencil
[1].enabled
) {
729 dsa
->two_sided
= TRUE
;
731 z_buffer_control
|= R300_STENCIL_FRONT_BACK
;
733 (r300_translate_depth_stencil_function(state
->stencil
[1].func
) <<
734 R300_S_BACK_FUNC_SHIFT
) |
735 (r300_translate_stencil_op(state
->stencil
[1].fail_op
) <<
736 R300_S_BACK_SFAIL_OP_SHIFT
) |
737 (r300_translate_stencil_op(state
->stencil
[1].zpass_op
) <<
738 R300_S_BACK_ZPASS_OP_SHIFT
) |
739 (r300_translate_stencil_op(state
->stencil
[1].zfail_op
) <<
740 R300_S_BACK_ZFAIL_OP_SHIFT
);
743 (state
->stencil
[1].valuemask
<< R300_STENCILMASK_SHIFT
) |
744 (state
->stencil
[1].writemask
<< R300_STENCILWRITEMASK_SHIFT
);
747 z_buffer_control
|= R500_STENCIL_REFMASK_FRONT_BACK
;
749 dsa
->two_sided_stencil_ref
=
750 (state
->stencil
[0].valuemask
!= state
->stencil
[1].valuemask
||
751 state
->stencil
[0].writemask
!= state
->stencil
[1].writemask
);
756 /* Alpha test setup. */
757 if (state
->alpha
.enabled
) {
758 dsa
->alpha_function
=
759 r300_translate_alpha_function(state
->alpha
.func
) |
760 R300_FG_ALPHA_FUNC_ENABLE
;
762 dsa
->alpha_function
|= float_to_ubyte(state
->alpha
.ref_value
);
763 alpha_value_fp16
= util_float_to_half(state
->alpha
.ref_value
);
766 BEGIN_CB(&dsa
->cb_begin
, 8);
767 OUT_CB_REG_SEQ(R300_ZB_CNTL
, 3);
768 OUT_CB(z_buffer_control
);
769 OUT_CB(z_stencil_control
);
770 OUT_CB(stencil_ref_mask
);
771 OUT_CB_REG(R500_ZB_STENCILREFMASK_BF
, stencil_ref_bf
);
772 OUT_CB_REG(R500_FG_ALPHA_VALUE
, alpha_value_fp16
);
775 BEGIN_CB(dsa
->cb_zb_no_readwrite
, 8);
776 OUT_CB_REG_SEQ(R300_ZB_CNTL
, 3);
780 OUT_CB_REG(R500_ZB_STENCILREFMASK_BF
, 0);
781 OUT_CB_REG(R500_FG_ALPHA_VALUE
, alpha_value_fp16
);
787 static void r300_dsa_inject_stencilref(struct r300_context
*r300
)
789 struct r300_dsa_state
*dsa
=
790 (struct r300_dsa_state
*)r300
->dsa_state
.state
;
795 dsa
->stencil_ref_mask
=
796 (dsa
->stencil_ref_mask
& ~R300_STENCILREF_MASK
) |
797 r300
->stencil_ref
.ref_value
[0];
798 dsa
->stencil_ref_bf
=
799 (dsa
->stencil_ref_bf
& ~R300_STENCILREF_MASK
) |
800 r300
->stencil_ref
.ref_value
[1];
803 /* Bind DSA state. */
804 static void r300_bind_dsa_state(struct pipe_context
* pipe
,
807 struct r300_context
* r300
= r300_context(pipe
);
813 UPDATE_STATE(state
, r300
->dsa_state
);
815 r300_mark_atom_dirty(r300
, &r300
->hyperz_state
); /* Will be updated before the emission. */
816 r300_dsa_inject_stencilref(r300
);
819 /* Free DSA state. */
820 static void r300_delete_dsa_state(struct pipe_context
* pipe
,
826 static void r300_set_stencil_ref(struct pipe_context
* pipe
,
827 const struct pipe_stencil_ref
* sr
)
829 struct r300_context
* r300
= r300_context(pipe
);
831 r300
->stencil_ref
= *sr
;
833 r300_dsa_inject_stencilref(r300
);
834 r300_mark_atom_dirty(r300
, &r300
->dsa_state
);
837 static void r300_tex_set_tiling_flags(struct r300_context
*r300
,
838 struct r300_resource
*tex
,
841 /* Check if the macrotile flag needs to be changed.
842 * Skip changing the flags otherwise. */
843 if (tex
->tex
.macrotile
[tex
->surface_level
] !=
844 tex
->tex
.macrotile
[level
]) {
845 r300
->rws
->buffer_set_tiling(tex
->buf
, r300
->cs
,
846 tex
->tex
.microtile
, tex
->tex
.macrotile
[level
],
848 tex
->tex
.stride_in_bytes
[0], false);
850 tex
->surface_level
= level
;
854 /* This switcheroo is needed just because of goddamned MACRO_SWITCH. */
855 static void r300_fb_set_tiling_flags(struct r300_context
*r300
,
856 const struct pipe_framebuffer_state
*state
)
860 /* Set tiling flags for new surfaces. */
861 for (i
= 0; i
< state
->nr_cbufs
; i
++) {
862 if (!state
->cbufs
[i
])
865 r300_tex_set_tiling_flags(r300
,
866 r300_resource(state
->cbufs
[i
]->texture
),
867 state
->cbufs
[i
]->u
.tex
.level
);
870 r300_tex_set_tiling_flags(r300
,
871 r300_resource(state
->zsbuf
->texture
),
872 state
->zsbuf
->u
.tex
.level
);
876 static void r300_print_fb_surf_info(struct pipe_surface
*surf
, unsigned index
,
879 struct pipe_resource
*tex
= surf
->texture
;
880 struct r300_resource
*rtex
= r300_resource(tex
);
883 "r300: %s[%i] Dim: %ix%i, Firstlayer: %i, "
884 "Lastlayer: %i, Level: %i, Format: %s\n"
886 "r300: TEX: Macro: %s, Micro: %s, "
887 "Dim: %ix%ix%i, LastLevel: %i, Format: %s\n",
889 binding
, index
, surf
->width
, surf
->height
,
890 surf
->u
.tex
.first_layer
, surf
->u
.tex
.last_layer
, surf
->u
.tex
.level
,
891 util_format_short_name(surf
->format
),
893 rtex
->tex
.macrotile
[0] ? "YES" : " NO",
894 rtex
->tex
.microtile
? "YES" : " NO",
895 tex
->width0
, tex
->height0
, tex
->depth0
,
896 tex
->last_level
, util_format_short_name(surf
->format
));
899 void r300_mark_fb_state_dirty(struct r300_context
*r300
,
900 enum r300_fb_state_change change
)
902 struct pipe_framebuffer_state
*state
= r300
->fb_state
.state
;
904 r300_mark_atom_dirty(r300
, &r300
->gpu_flush
);
905 r300_mark_atom_dirty(r300
, &r300
->fb_state
);
907 /* What is marked as dirty depends on the enum r300_fb_state_change. */
908 if (change
== R300_CHANGED_FB_STATE
) {
909 r300_mark_atom_dirty(r300
, &r300
->aa_state
);
910 r300_mark_atom_dirty(r300
, &r300
->dsa_state
); /* for AlphaRef */
911 r300_set_blend_color(&r300
->context
, r300
->blend_color_state
.state
);
914 if (change
== R300_CHANGED_FB_STATE
||
915 change
== R300_CHANGED_HYPERZ_FLAG
) {
916 r300_mark_atom_dirty(r300
, &r300
->hyperz_state
);
919 if (change
== R300_CHANGED_FB_STATE
||
920 change
== R300_CHANGED_MULTIWRITE
) {
921 r300_mark_atom_dirty(r300
, &r300
->fb_state_pipelined
);
924 /* Now compute the fb_state atom size. */
925 r300
->fb_state
.size
= 2 + (8 * state
->nr_cbufs
);
927 if (r300
->cbzb_clear
)
928 r300
->fb_state
.size
+= 10;
929 else if (state
->zsbuf
) {
930 r300
->fb_state
.size
+= 10;
931 if (r300
->hyperz_enabled
)
932 r300
->fb_state
.size
+= 8;
935 if (r300
->cmask_in_use
) {
936 r300
->fb_state
.size
+= 6;
937 if (r300
->screen
->caps
.is_r500
&& r300
->screen
->info
.drm_minor
>= 29) {
938 r300
->fb_state
.size
+= 3;
942 /* The size of the rest of atoms stays the same. */
946 r300_set_framebuffer_state(struct pipe_context
* pipe
,
947 const struct pipe_framebuffer_state
* state
)
949 struct r300_context
* r300
= r300_context(pipe
);
950 struct r300_aa_state
*aa
= (struct r300_aa_state
*)r300
->aa_state
.state
;
951 struct pipe_framebuffer_state
*current_state
= r300
->fb_state
.state
;
952 unsigned max_width
, max_height
, i
;
953 uint32_t zbuffer_bpp
= 0;
954 boolean unlock_zbuffer
= FALSE
;
956 if (r300
->screen
->caps
.is_r500
) {
957 max_width
= max_height
= 4096;
958 } else if (r300
->screen
->caps
.is_r400
) {
959 max_width
= max_height
= 4021;
961 max_width
= max_height
= 2560;
964 if (state
->width
> max_width
|| state
->height
> max_height
) {
965 fprintf(stderr
, "r300: Implementation error: Render targets are too "
966 "big in %s, refusing to bind framebuffer state!\n", __FUNCTION__
);
970 if (current_state
->zsbuf
&& r300
->zmask_in_use
&& !r300
->locked_zbuffer
) {
971 /* There is a zmask in use, what are we gonna do? */
973 if (!pipe_surface_equal(current_state
->zsbuf
, state
->zsbuf
)) {
974 /* Decompress the currently bound zbuffer before we bind another one. */
975 r300_decompress_zmask(r300
);
976 r300
->hiz_in_use
= FALSE
;
979 /* We don't bind another zbuffer, so lock the current one. */
980 pipe_surface_reference(&r300
->locked_zbuffer
, current_state
->zsbuf
);
982 } else if (r300
->locked_zbuffer
) {
983 /* We have a locked zbuffer now, what are we gonna do? */
985 if (!pipe_surface_equal(r300
->locked_zbuffer
, state
->zsbuf
)) {
986 /* We are binding some other zbuffer, so decompress the locked one,
987 * it gets unlocked automatically. */
988 r300_decompress_zmask_locked_unsafe(r300
);
989 r300
->hiz_in_use
= FALSE
;
991 /* We are binding the locked zbuffer again, so unlock it. */
992 unlock_zbuffer
= TRUE
;
996 assert(state
->zsbuf
|| (r300
->locked_zbuffer
&& !unlock_zbuffer
) || !r300
->zmask_in_use
);
998 /* If zsbuf is set from NULL to non-NULL or vice versa.. */
999 if (!!current_state
->zsbuf
!= !!state
->zsbuf
) {
1000 r300_mark_atom_dirty(r300
, &r300
->dsa_state
);
1003 util_copy_framebuffer_state(r300
->fb_state
.state
, state
);
1005 /* Remove trailing NULL colorbuffers. */
1006 while (current_state
->nr_cbufs
&& !current_state
->cbufs
[current_state
->nr_cbufs
-1])
1007 current_state
->nr_cbufs
--;
1009 /* Set whether CMASK can be used. */
1010 r300
->cmask_in_use
=
1011 state
->nr_cbufs
== 1 && state
->cbufs
[0] &&
1012 r300
->screen
->cmask_resource
== state
->cbufs
[0]->texture
;
1014 /* Need to reset clamping or colormask. */
1015 r300_mark_atom_dirty(r300
, &r300
->blend_state
);
1017 /* Re-swizzle the blend color. */
1018 r300_set_blend_color(pipe
, &((struct r300_blend_color_state
*)r300
->blend_color_state
.state
)->state
);
1020 if (r300
->screen
->info
.drm_minor
< 12) {
1021 /* The tiling flags are dependent on the surface miplevel, unfortunately.
1022 * This workarounds a bad design decision in old kernels which were
1023 * rewriting tile fields in registers. */
1024 r300_fb_set_tiling_flags(r300
, state
);
1027 if (unlock_zbuffer
) {
1028 pipe_surface_reference(&r300
->locked_zbuffer
, NULL
);
1031 r300_mark_fb_state_dirty(r300
, R300_CHANGED_FB_STATE
);
1034 switch (util_format_get_blocksize(state
->zsbuf
->format
)) {
1043 /* Polygon offset depends on the zbuffer bit depth. */
1044 if (r300
->zbuffer_bpp
!= zbuffer_bpp
) {
1045 r300
->zbuffer_bpp
= zbuffer_bpp
;
1047 if (r300
->polygon_offset_enabled
)
1048 r300_mark_atom_dirty(r300
, &r300
->rs_state
);
1052 r300
->num_samples
= util_framebuffer_get_num_samples(state
);
1054 /* Set up AA config. */
1055 if (r300
->num_samples
> 1) {
1056 switch (r300
->num_samples
) {
1058 aa
->aa_config
= R300_GB_AA_CONFIG_AA_ENABLE
|
1059 R300_GB_AA_CONFIG_NUM_AA_SUBSAMPLES_2
;
1062 aa
->aa_config
= R300_GB_AA_CONFIG_AA_ENABLE
|
1063 R300_GB_AA_CONFIG_NUM_AA_SUBSAMPLES_4
;
1066 aa
->aa_config
= R300_GB_AA_CONFIG_AA_ENABLE
|
1067 R300_GB_AA_CONFIG_NUM_AA_SUBSAMPLES_6
;
1074 if (DBG_ON(r300
, DBG_FB
)) {
1075 fprintf(stderr
, "r300: set_framebuffer_state:\n");
1076 for (i
= 0; i
< state
->nr_cbufs
; i
++) {
1077 if (state
->cbufs
[i
])
1078 r300_print_fb_surf_info(state
->cbufs
[i
], i
, "CB");
1081 r300_print_fb_surf_info(state
->zsbuf
, 0, "ZB");
1086 /* Create fragment shader state. */
1087 static void* r300_create_fs_state(struct pipe_context
* pipe
,
1088 const struct pipe_shader_state
* shader
)
1090 struct r300_fragment_shader
* fs
= NULL
;
1092 fs
= (struct r300_fragment_shader
*)CALLOC_STRUCT(r300_fragment_shader
);
1094 /* Copy state directly into shader. */
1095 fs
->state
= *shader
;
1096 fs
->state
.tokens
= tgsi_dup_tokens(shader
->tokens
);
1101 void r300_mark_fs_code_dirty(struct r300_context
*r300
)
1103 struct r300_fragment_shader
* fs
= r300_fs(r300
);
1105 r300_mark_atom_dirty(r300
, &r300
->fs
);
1106 r300_mark_atom_dirty(r300
, &r300
->fs_rc_constant_state
);
1107 r300_mark_atom_dirty(r300
, &r300
->fs_constants
);
1108 r300
->fs
.size
= fs
->shader
->cb_code_size
;
1110 if (r300
->screen
->caps
.is_r500
) {
1111 r300
->fs_rc_constant_state
.size
= fs
->shader
->rc_state_count
* 7;
1112 r300
->fs_constants
.size
= fs
->shader
->externals_count
* 4 + 3;
1114 r300
->fs_rc_constant_state
.size
= fs
->shader
->rc_state_count
* 5;
1115 r300
->fs_constants
.size
= fs
->shader
->externals_count
* 4 + 1;
1118 ((struct r300_constant_buffer
*)r300
->fs_constants
.state
)->remap_table
=
1119 fs
->shader
->code
.constants_remap_table
;
1122 /* Bind fragment shader state. */
1123 static void r300_bind_fs_state(struct pipe_context
* pipe
, void* shader
)
1125 struct r300_context
* r300
= r300_context(pipe
);
1126 struct r300_fragment_shader
* fs
= (struct r300_fragment_shader
*)shader
;
1129 r300
->fs
.state
= NULL
;
1133 r300
->fs
.state
= fs
;
1134 r300
->fs_status
= FRAGMENT_SHADER_DIRTY
;
1136 r300_mark_atom_dirty(r300
, &r300
->rs_block_state
); /* Will be updated before the emission. */
1139 /* Delete fragment shader state. */
1140 static void r300_delete_fs_state(struct pipe_context
* pipe
, void* shader
)
1142 struct r300_fragment_shader
* fs
= (struct r300_fragment_shader
*)shader
;
1143 struct r300_fragment_shader_code
*tmp
, *ptr
= fs
->first
;
1148 rc_constants_destroy(&tmp
->code
.constants
);
1152 FREE((void*)fs
->state
.tokens
);
1156 static void r300_set_polygon_stipple(struct pipe_context
* pipe
,
1157 const struct pipe_poly_stipple
* state
)
1161 /* Create a new rasterizer state based on the CSO rasterizer state.
1163 * This is a very large chunk of state, and covers most of the graphics
1164 * backend (GB), geometry assembly (GA), and setup unit (SU) blocks.
1166 * In a not entirely unironic sidenote, this state has nearly nothing to do
1167 * with the actual block on the Radeon called the rasterizer (RS). */
1168 static void* r300_create_rs_state(struct pipe_context
* pipe
,
1169 const struct pipe_rasterizer_state
* state
)
1171 struct r300_rs_state
* rs
= CALLOC_STRUCT(r300_rs_state
);
1172 uint32_t vap_control_status
; /* R300_VAP_CNTL_STATUS: 0x2140 */
1173 uint32_t vap_clip_cntl
; /* R300_VAP_CLIP_CNTL: 0x221C */
1174 uint32_t point_size
; /* R300_GA_POINT_SIZE: 0x421c */
1175 uint32_t point_minmax
; /* R300_GA_POINT_MINMAX: 0x4230 */
1176 uint32_t line_control
; /* R300_GA_LINE_CNTL: 0x4234 */
1177 uint32_t polygon_offset_enable
; /* R300_SU_POLY_OFFSET_ENABLE: 0x42b4 */
1178 uint32_t cull_mode
; /* R300_SU_CULL_MODE: 0x42b8 */
1179 uint32_t line_stipple_config
; /* R300_GA_LINE_STIPPLE_CONFIG: 0x4328 */
1180 uint32_t line_stipple_value
; /* R300_GA_LINE_STIPPLE_VALUE: 0x4260 */
1181 uint32_t polygon_mode
; /* R300_GA_POLY_MODE: 0x4288 */
1182 uint32_t clip_rule
; /* R300_SC_CLIP_RULE: 0x43D0 */
1183 uint32_t round_mode
; /* R300_GA_ROUND_MODE: 0x428c */
1185 /* Point sprites texture coordinates, 0: lower left, 1: upper right */
1186 float point_texcoord_left
= 0; /* R300_GA_POINT_S0: 0x4200 */
1187 float point_texcoord_bottom
= 0;/* R300_GA_POINT_T0: 0x4204 */
1188 float point_texcoord_right
= 1; /* R300_GA_POINT_S1: 0x4208 */
1189 float point_texcoord_top
= 0; /* R300_GA_POINT_T1: 0x420c */
1190 boolean vclamp
= !r300_context(pipe
)->screen
->caps
.is_r500
;
1193 /* Copy rasterizer state. */
1195 rs
->rs_draw
= *state
;
1197 rs
->rs
.sprite_coord_enable
= state
->point_quad_rasterization
*
1198 state
->sprite_coord_enable
;
1200 /* Override some states for Draw. */
1201 rs
->rs_draw
.sprite_coord_enable
= 0; /* We can do this in HW. */
1202 rs
->rs_draw
.offset_point
= 0;
1203 rs
->rs_draw
.offset_line
= 0;
1204 rs
->rs_draw
.offset_tri
= 0;
1205 rs
->rs_draw
.offset_clamp
= 0;
1207 #ifdef PIPE_ARCH_LITTLE_ENDIAN
1208 vap_control_status
= R300_VC_NO_SWAP
;
1210 vap_control_status
= R300_VC_32BIT_SWAP
;
1213 /* If no TCL engine is present, turn off the HW TCL. */
1214 if (!r300_screen(pipe
->screen
)->caps
.has_tcl
) {
1215 vap_control_status
|= R300_VAP_TCL_BYPASS
;
1218 /* Point size width and height. */
1220 pack_float_16_6x(state
->point_size
) |
1221 (pack_float_16_6x(state
->point_size
) << R300_POINTSIZE_X_SHIFT
);
1223 /* Point size clamping. */
1224 if (state
->point_size_per_vertex
) {
1225 /* Per-vertex point size.
1226 * Clamp to [0, max FB size] */
1227 float min_psiz
= util_get_min_point_size(state
);
1228 float max_psiz
= pipe
->screen
->get_paramf(pipe
->screen
,
1229 PIPE_CAPF_MAX_POINT_WIDTH
);
1231 (pack_float_16_6x(min_psiz
) << R300_GA_POINT_MINMAX_MIN_SHIFT
) |
1232 (pack_float_16_6x(max_psiz
) << R300_GA_POINT_MINMAX_MAX_SHIFT
);
1234 /* We cannot disable the point-size vertex output,
1236 float psiz
= state
->point_size
;
1238 (pack_float_16_6x(psiz
) << R300_GA_POINT_MINMAX_MIN_SHIFT
) |
1239 (pack_float_16_6x(psiz
) << R300_GA_POINT_MINMAX_MAX_SHIFT
);
1243 line_control
= pack_float_16_6x(state
->line_width
) |
1244 R300_GA_LINE_CNTL_END_TYPE_COMP
;
1246 /* Enable polygon mode */
1248 if (state
->fill_front
!= PIPE_POLYGON_MODE_FILL
||
1249 state
->fill_back
!= PIPE_POLYGON_MODE_FILL
) {
1250 polygon_mode
= R300_GA_POLY_MODE_DUAL
;
1254 if (state
->front_ccw
)
1255 cull_mode
= R300_FRONT_FACE_CCW
;
1257 cull_mode
= R300_FRONT_FACE_CW
;
1259 /* Polygon offset */
1260 polygon_offset_enable
= 0;
1261 if (util_get_offset(state
, state
->fill_front
)) {
1262 polygon_offset_enable
|= R300_FRONT_ENABLE
;
1264 if (util_get_offset(state
, state
->fill_back
)) {
1265 polygon_offset_enable
|= R300_BACK_ENABLE
;
1268 rs
->polygon_offset_enable
= polygon_offset_enable
!= 0;
1273 r300_translate_polygon_mode_front(state
->fill_front
);
1275 r300_translate_polygon_mode_back(state
->fill_back
);
1278 if (state
->cull_face
& PIPE_FACE_FRONT
) {
1279 cull_mode
|= R300_CULL_FRONT
;
1281 if (state
->cull_face
& PIPE_FACE_BACK
) {
1282 cull_mode
|= R300_CULL_BACK
;
1285 if (state
->line_stipple_enable
) {
1286 line_stipple_config
=
1287 R300_GA_LINE_STIPPLE_CONFIG_LINE_RESET_LINE
|
1288 (fui((float)state
->line_stipple_factor
) &
1289 R300_GA_LINE_STIPPLE_CONFIG_STIPPLE_SCALE_MASK
);
1290 /* XXX this might need to be scaled up */
1291 line_stipple_value
= state
->line_stipple_pattern
;
1293 line_stipple_config
= 0;
1294 line_stipple_value
= 0;
1297 if (state
->flatshade
) {
1298 rs
->color_control
= R300_SHADE_MODEL_FLAT
;
1300 rs
->color_control
= R300_SHADE_MODEL_SMOOTH
;
1303 clip_rule
= state
->scissor
? 0xAAAA : 0xFFFF;
1305 /* Point sprites coord mode */
1306 if (rs
->rs
.sprite_coord_enable
) {
1307 switch (state
->sprite_coord_mode
) {
1308 case PIPE_SPRITE_COORD_UPPER_LEFT
:
1309 point_texcoord_top
= 0.0f
;
1310 point_texcoord_bottom
= 1.0f
;
1312 case PIPE_SPRITE_COORD_LOWER_LEFT
:
1313 point_texcoord_top
= 1.0f
;
1314 point_texcoord_bottom
= 0.0f
;
1319 if (r300_screen(pipe
->screen
)->caps
.has_tcl
) {
1320 vap_clip_cntl
= (state
->clip_plane_enable
& 63) |
1321 R300_PS_UCP_MODE_CLIP_AS_TRIFAN
;
1323 vap_clip_cntl
= R300_CLIP_DISABLE
;
1326 /* Vertex color clamping. FP20 means no clamping. */
1328 R300_GA_ROUND_MODE_GEOMETRY_ROUND_NEAREST
|
1329 (!vclamp
? (R300_GA_ROUND_MODE_RGB_CLAMP_FP20
|
1330 R300_GA_ROUND_MODE_ALPHA_CLAMP_FP20
) : 0);
1332 /* Build the main command buffer. */
1333 BEGIN_CB(rs
->cb_main
, RS_STATE_MAIN_SIZE
);
1334 OUT_CB_REG(R300_VAP_CNTL_STATUS
, vap_control_status
);
1335 OUT_CB_REG(R300_VAP_CLIP_CNTL
, vap_clip_cntl
);
1336 OUT_CB_REG(R300_GA_POINT_SIZE
, point_size
);
1337 OUT_CB_REG_SEQ(R300_GA_POINT_MINMAX
, 2);
1338 OUT_CB(point_minmax
);
1339 OUT_CB(line_control
);
1340 OUT_CB_REG_SEQ(R300_SU_POLY_OFFSET_ENABLE
, 2);
1341 OUT_CB(polygon_offset_enable
);
1342 rs
->cull_mode_index
= 11;
1344 OUT_CB_REG(R300_GA_LINE_STIPPLE_CONFIG
, line_stipple_config
);
1345 OUT_CB_REG(R300_GA_LINE_STIPPLE_VALUE
, line_stipple_value
);
1346 OUT_CB_REG(R300_GA_POLY_MODE
, polygon_mode
);
1347 OUT_CB_REG(R300_GA_ROUND_MODE
, round_mode
);
1348 OUT_CB_REG(R300_SC_CLIP_RULE
, clip_rule
);
1349 OUT_CB_REG_SEQ(R300_GA_POINT_S0
, 4);
1350 OUT_CB_32F(point_texcoord_left
);
1351 OUT_CB_32F(point_texcoord_bottom
);
1352 OUT_CB_32F(point_texcoord_right
);
1353 OUT_CB_32F(point_texcoord_top
);
1356 /* Build the two command buffers for polygon offset setup. */
1357 if (polygon_offset_enable
) {
1358 float scale
= state
->offset_scale
* 12;
1359 float offset
= state
->offset_units
* 4;
1361 BEGIN_CB(rs
->cb_poly_offset_zb16
, 5);
1362 OUT_CB_REG_SEQ(R300_SU_POLY_OFFSET_FRONT_SCALE
, 4);
1369 offset
= state
->offset_units
* 2;
1371 BEGIN_CB(rs
->cb_poly_offset_zb24
, 5);
1372 OUT_CB_REG_SEQ(R300_SU_POLY_OFFSET_FRONT_SCALE
, 4);
1383 /* Bind rasterizer state. */
1384 static void r300_bind_rs_state(struct pipe_context
* pipe
, void* state
)
1386 struct r300_context
* r300
= r300_context(pipe
);
1387 struct r300_rs_state
* rs
= (struct r300_rs_state
*)state
;
1388 int last_sprite_coord_enable
= r300
->sprite_coord_enable
;
1389 boolean last_two_sided_color
= r300
->two_sided_color
;
1390 boolean last_msaa_enable
= r300
->msaa_enable
;
1391 boolean last_flatshade
= r300
->flatshade
;
1392 boolean last_clip_halfz
= r300
->clip_halfz
;
1394 if (r300
->draw
&& rs
) {
1395 draw_set_rasterizer_state(r300
->draw
, &rs
->rs_draw
, state
);
1399 r300
->polygon_offset_enabled
= rs
->polygon_offset_enable
;
1400 r300
->sprite_coord_enable
= rs
->rs
.sprite_coord_enable
;
1401 r300
->two_sided_color
= rs
->rs
.light_twoside
;
1402 r300
->msaa_enable
= rs
->rs
.multisample
;
1403 r300
->flatshade
= rs
->rs
.flatshade
;
1404 r300
->clip_halfz
= rs
->rs
.clip_halfz
;
1406 r300
->polygon_offset_enabled
= FALSE
;
1407 r300
->sprite_coord_enable
= 0;
1408 r300
->two_sided_color
= FALSE
;
1409 r300
->msaa_enable
= FALSE
;
1410 r300
->flatshade
= FALSE
;
1411 r300
->clip_halfz
= FALSE
;
1414 UPDATE_STATE(state
, r300
->rs_state
);
1415 r300
->rs_state
.size
= RS_STATE_MAIN_SIZE
+ (r300
->polygon_offset_enabled
? 5 : 0);
1417 if (last_sprite_coord_enable
!= r300
->sprite_coord_enable
||
1418 last_two_sided_color
!= r300
->two_sided_color
||
1419 last_flatshade
!= r300
->flatshade
) {
1420 r300_mark_atom_dirty(r300
, &r300
->rs_block_state
);
1423 if (last_msaa_enable
!= r300
->msaa_enable
) {
1424 if (r300
->alpha_to_coverage
) {
1425 r300_mark_atom_dirty(r300
, &r300
->dsa_state
);
1428 if (r300
->alpha_to_one
&&
1429 r300
->fs_status
== FRAGMENT_SHADER_VALID
) {
1430 r300
->fs_status
= FRAGMENT_SHADER_MAYBE_DIRTY
;
1434 if (r300
->screen
->caps
.has_tcl
&& last_clip_halfz
!= r300
->clip_halfz
) {
1435 r300_mark_atom_dirty(r300
, &r300
->vs_state
);
1439 /* Free rasterizer state. */
1440 static void r300_delete_rs_state(struct pipe_context
* pipe
, void* state
)
1446 r300_create_sampler_state(struct pipe_context
* pipe
,
1447 const struct pipe_sampler_state
* state
)
1449 struct r300_context
* r300
= r300_context(pipe
);
1450 struct r300_sampler_state
* sampler
= CALLOC_STRUCT(r300_sampler_state
);
1451 boolean is_r500
= r300
->screen
->caps
.is_r500
;
1454 sampler
->state
= *state
;
1456 /* r300 doesn't handle CLAMP and MIRROR_CLAMP correctly when either MAG
1457 * or MIN filter is NEAREST. Since texwrap produces same results
1458 * for CLAMP and CLAMP_TO_EDGE, we use them instead. */
1459 if (sampler
->state
.min_img_filter
== PIPE_TEX_FILTER_NEAREST
||
1460 sampler
->state
.mag_img_filter
== PIPE_TEX_FILTER_NEAREST
) {
1462 if (sampler
->state
.wrap_s
== PIPE_TEX_WRAP_CLAMP
)
1463 sampler
->state
.wrap_s
= PIPE_TEX_WRAP_CLAMP_TO_EDGE
;
1464 else if (sampler
->state
.wrap_s
== PIPE_TEX_WRAP_MIRROR_CLAMP
)
1465 sampler
->state
.wrap_s
= PIPE_TEX_WRAP_MIRROR_CLAMP_TO_EDGE
;
1468 if (sampler
->state
.wrap_t
== PIPE_TEX_WRAP_CLAMP
)
1469 sampler
->state
.wrap_t
= PIPE_TEX_WRAP_CLAMP_TO_EDGE
;
1470 else if (sampler
->state
.wrap_t
== PIPE_TEX_WRAP_MIRROR_CLAMP
)
1471 sampler
->state
.wrap_t
= PIPE_TEX_WRAP_MIRROR_CLAMP_TO_EDGE
;
1474 if (sampler
->state
.wrap_r
== PIPE_TEX_WRAP_CLAMP
)
1475 sampler
->state
.wrap_r
= PIPE_TEX_WRAP_CLAMP_TO_EDGE
;
1476 else if (sampler
->state
.wrap_r
== PIPE_TEX_WRAP_MIRROR_CLAMP
)
1477 sampler
->state
.wrap_r
= PIPE_TEX_WRAP_MIRROR_CLAMP_TO_EDGE
;
1481 (r300_translate_wrap(sampler
->state
.wrap_s
) << R300_TX_WRAP_S_SHIFT
) |
1482 (r300_translate_wrap(sampler
->state
.wrap_t
) << R300_TX_WRAP_T_SHIFT
) |
1483 (r300_translate_wrap(sampler
->state
.wrap_r
) << R300_TX_WRAP_R_SHIFT
);
1485 sampler
->filter0
|= r300_translate_tex_filters(state
->min_img_filter
,
1486 state
->mag_img_filter
,
1487 state
->min_mip_filter
,
1488 state
->max_anisotropy
> 1);
1490 sampler
->filter0
|= r300_anisotropy(state
->max_anisotropy
);
1492 /* Unfortunately, r300-r500 don't support floating-point mipmap lods. */
1493 /* We must pass these to the merge function to clamp them properly. */
1494 sampler
->min_lod
= (unsigned)MAX2(state
->min_lod
, 0);
1495 sampler
->max_lod
= (unsigned)MAX2(ceilf(state
->max_lod
), 0);
1497 lod_bias
= CLAMP((int)(state
->lod_bias
* 32 + 1), -(1 << 9), (1 << 9) - 1);
1499 sampler
->filter1
|= (lod_bias
<< R300_LOD_BIAS_SHIFT
) & R300_LOD_BIAS_MASK
;
1501 /* This is very high quality anisotropic filtering for R5xx.
1502 * It's good for benchmarking the performance of texturing but
1503 * in practice we don't want to slow down the driver because it's
1504 * a pretty good performance killer. Feel free to play with it. */
1505 if (DBG_ON(r300
, DBG_ANISOHQ
) && is_r500
) {
1506 sampler
->filter1
|= r500_anisotropy(state
->max_anisotropy
);
1509 /* R500-specific fixups and optimizations */
1510 if (r300
->screen
->caps
.is_r500
) {
1511 sampler
->filter1
|= R500_BORDER_FIX
;
1514 return (void*)sampler
;
1517 static void r300_bind_sampler_states(struct pipe_context
* pipe
,
1519 unsigned start
, unsigned count
,
1522 struct r300_context
* r300
= r300_context(pipe
);
1523 struct r300_textures_state
* state
=
1524 (struct r300_textures_state
*)r300
->textures_state
.state
;
1525 unsigned tex_units
= r300
->screen
->caps
.num_tex_units
;
1529 if (shader
!= PIPE_SHADER_FRAGMENT
)
1532 if (count
> tex_units
)
1535 memcpy(state
->sampler_states
, states
, sizeof(void*) * count
);
1536 state
->sampler_state_count
= count
;
1538 r300_mark_atom_dirty(r300
, &r300
->textures_state
);
1541 static void r300_delete_sampler_state(struct pipe_context
* pipe
, void* state
)
1546 static uint32_t r300_assign_texture_cache_region(unsigned index
, unsigned num
)
1548 /* This looks like a hack, but I believe it's suppose to work like
1549 * that. To illustrate how this works, let's assume you have 5 textures.
1550 * From docs, 5 and the successive numbers are:
1558 * First 3 textures will get 3/4 of size of the cache, divived evenly
1559 * between them. The last 1/4 of the cache must be divided between
1560 * the last 2 textures, each will therefore get 1/8 of the cache.
1561 * Why not just to use "5 + texture_index" ?
1563 * This simple trick works for all "num" <= 16.
1566 return R300_TX_CACHE(R300_TX_CACHE_WHOLE
);
1568 return R300_TX_CACHE(num
+ index
);
1571 static void r300_set_sampler_views(struct pipe_context
* pipe
, unsigned shader
,
1572 unsigned start
, unsigned count
,
1573 struct pipe_sampler_view
** views
)
1575 struct r300_context
* r300
= r300_context(pipe
);
1576 struct r300_textures_state
* state
=
1577 (struct r300_textures_state
*)r300
->textures_state
.state
;
1578 struct r300_resource
*texture
;
1579 unsigned i
, real_num_views
= 0, view_index
= 0;
1580 unsigned tex_units
= r300
->screen
->caps
.num_tex_units
;
1581 boolean dirty_tex
= FALSE
;
1583 if (shader
!= PIPE_SHADER_FRAGMENT
)
1586 assert(start
== 0); /* non-zero not handled yet */
1588 if (count
> tex_units
) {
1592 /* Calculate the real number of views. */
1593 for (i
= 0; i
< count
; i
++) {
1598 for (i
= 0; i
< count
; i
++) {
1599 pipe_sampler_view_reference(
1600 (struct pipe_sampler_view
**)&state
->sampler_views
[i
],
1607 /* A new sampler view (= texture)... */
1610 /* Set the texrect factor in the fragment shader.
1611 * Needed for RECT and NPOT fallback. */
1612 texture
= r300_resource(views
[i
]->texture
);
1613 if (texture
->tex
.is_npot
) {
1614 r300_mark_atom_dirty(r300
, &r300
->fs_rc_constant_state
);
1617 state
->sampler_views
[i
]->texcache_region
=
1618 r300_assign_texture_cache_region(view_index
, real_num_views
);
1622 for (i
= count
; i
< tex_units
; i
++) {
1623 if (state
->sampler_views
[i
]) {
1624 pipe_sampler_view_reference(
1625 (struct pipe_sampler_view
**)&state
->sampler_views
[i
],
1630 state
->sampler_view_count
= count
;
1632 r300_mark_atom_dirty(r300
, &r300
->textures_state
);
1635 r300_mark_atom_dirty(r300
, &r300
->texture_cache_inval
);
1639 struct pipe_sampler_view
*
1640 r300_create_sampler_view_custom(struct pipe_context
*pipe
,
1641 struct pipe_resource
*texture
,
1642 const struct pipe_sampler_view
*templ
,
1643 unsigned width0_override
,
1644 unsigned height0_override
)
1646 struct r300_sampler_view
*view
= CALLOC_STRUCT(r300_sampler_view
);
1647 struct r300_resource
*tex
= r300_resource(texture
);
1648 boolean is_r500
= r300_screen(pipe
->screen
)->caps
.is_r500
;
1649 boolean dxtc_swizzle
= r300_screen(pipe
->screen
)->caps
.dxtc_swizzle
;
1654 view
->base
= *templ
;
1655 view
->base
.reference
.count
= 1;
1656 view
->base
.context
= pipe
;
1657 view
->base
.texture
= NULL
;
1658 pipe_resource_reference(&view
->base
.texture
, texture
);
1660 view
->width0_override
= width0_override
;
1661 view
->height0_override
= height0_override
;
1662 view
->swizzle
[0] = templ
->swizzle_r
;
1663 view
->swizzle
[1] = templ
->swizzle_g
;
1664 view
->swizzle
[2] = templ
->swizzle_b
;
1665 view
->swizzle
[3] = templ
->swizzle_a
;
1667 hwformat
= r300_translate_texformat(templ
->format
,
1672 if (hwformat
== ~0) {
1673 fprintf(stderr
, "r300: Ooops. Got unsupported format %s in %s.\n",
1674 util_format_short_name(templ
->format
), __func__
);
1676 assert(hwformat
!= ~0);
1678 r300_texture_setup_format_state(r300_screen(pipe
->screen
), tex
,
1680 width0_override
, height0_override
,
1682 view
->format
.format1
|= hwformat
;
1684 view
->format
.format2
|= r500_tx_format_msb_bit(templ
->format
);
1688 return (struct pipe_sampler_view
*)view
;
1691 static struct pipe_sampler_view
*
1692 r300_create_sampler_view(struct pipe_context
*pipe
,
1693 struct pipe_resource
*texture
,
1694 const struct pipe_sampler_view
*templ
)
1696 return r300_create_sampler_view_custom(pipe
, texture
, templ
,
1697 r300_resource(texture
)->tex
.width0
,
1698 r300_resource(texture
)->tex
.height0
);
1703 r300_sampler_view_destroy(struct pipe_context
*pipe
,
1704 struct pipe_sampler_view
*view
)
1706 pipe_resource_reference(&view
->texture
, NULL
);
1710 static void r300_set_sample_mask(struct pipe_context
*pipe
,
1713 struct r300_context
* r300
= r300_context(pipe
);
1715 *((unsigned*)r300
->sample_mask
.state
) = mask
;
1717 r300_mark_atom_dirty(r300
, &r300
->sample_mask
);
1720 static void r300_set_scissor_states(struct pipe_context
* pipe
,
1721 unsigned start_slot
,
1722 unsigned num_scissors
,
1723 const struct pipe_scissor_state
* state
)
1725 struct r300_context
* r300
= r300_context(pipe
);
1727 memcpy(r300
->scissor_state
.state
, state
,
1728 sizeof(struct pipe_scissor_state
));
1730 r300_mark_atom_dirty(r300
, &r300
->scissor_state
);
1733 static void r300_set_viewport_states(struct pipe_context
* pipe
,
1734 unsigned start_slot
,
1735 unsigned num_viewports
,
1736 const struct pipe_viewport_state
* state
)
1738 struct r300_context
* r300
= r300_context(pipe
);
1739 struct r300_viewport_state
* viewport
=
1740 (struct r300_viewport_state
*)r300
->viewport_state
.state
;
1742 r300
->viewport
= *state
;
1745 draw_set_viewport_states(r300
->draw
, start_slot
, num_viewports
, state
);
1746 viewport
->vte_control
= R300_VTX_XY_FMT
| R300_VTX_Z_FMT
;
1750 /* Do the transform in HW. */
1751 viewport
->vte_control
= R300_VTX_W0_FMT
;
1753 if (state
->scale
[0] != 1.0f
) {
1754 viewport
->xscale
= state
->scale
[0];
1755 viewport
->vte_control
|= R300_VPORT_X_SCALE_ENA
;
1757 if (state
->scale
[1] != 1.0f
) {
1758 viewport
->yscale
= state
->scale
[1];
1759 viewport
->vte_control
|= R300_VPORT_Y_SCALE_ENA
;
1761 if (state
->scale
[2] != 1.0f
) {
1762 viewport
->zscale
= state
->scale
[2];
1763 viewport
->vte_control
|= R300_VPORT_Z_SCALE_ENA
;
1765 if (state
->translate
[0] != 0.0f
) {
1766 viewport
->xoffset
= state
->translate
[0];
1767 viewport
->vte_control
|= R300_VPORT_X_OFFSET_ENA
;
1769 if (state
->translate
[1] != 0.0f
) {
1770 viewport
->yoffset
= state
->translate
[1];
1771 viewport
->vte_control
|= R300_VPORT_Y_OFFSET_ENA
;
1773 if (state
->translate
[2] != 0.0f
) {
1774 viewport
->zoffset
= state
->translate
[2];
1775 viewport
->vte_control
|= R300_VPORT_Z_OFFSET_ENA
;
1778 r300_mark_atom_dirty(r300
, &r300
->viewport_state
);
1779 if (r300
->fs
.state
&& r300_fs(r300
)->shader
&&
1780 r300_fs(r300
)->shader
->inputs
.wpos
!= ATTR_UNUSED
) {
1781 r300_mark_atom_dirty(r300
, &r300
->fs_rc_constant_state
);
1785 static void r300_set_vertex_buffers_hwtcl(struct pipe_context
* pipe
,
1786 unsigned start_slot
, unsigned count
,
1787 const struct pipe_vertex_buffer
* buffers
)
1789 struct r300_context
* r300
= r300_context(pipe
);
1791 util_set_vertex_buffers_count(r300
->vertex_buffer
,
1792 &r300
->nr_vertex_buffers
,
1793 buffers
, start_slot
, count
);
1795 /* There must be at least one vertex buffer set, otherwise it locks up. */
1796 if (!r300
->nr_vertex_buffers
) {
1797 util_set_vertex_buffers_count(r300
->vertex_buffer
,
1798 &r300
->nr_vertex_buffers
,
1799 &r300
->dummy_vb
, 0, 1);
1802 r300
->vertex_arrays_dirty
= TRUE
;
1805 static void r300_set_vertex_buffers_swtcl(struct pipe_context
* pipe
,
1806 unsigned start_slot
, unsigned count
,
1807 const struct pipe_vertex_buffer
* buffers
)
1809 struct r300_context
* r300
= r300_context(pipe
);
1812 util_set_vertex_buffers_count(r300
->vertex_buffer
,
1813 &r300
->nr_vertex_buffers
,
1814 buffers
, start_slot
, count
);
1815 draw_set_vertex_buffers(r300
->draw
, start_slot
, count
, buffers
);
1820 for (i
= 0; i
< count
; i
++) {
1821 if (buffers
[i
].user_buffer
) {
1822 draw_set_mapped_vertex_buffer(r300
->draw
, start_slot
+ i
,
1823 buffers
[i
].user_buffer
, ~0);
1824 } else if (buffers
[i
].buffer
) {
1825 draw_set_mapped_vertex_buffer(r300
->draw
, start_slot
+ i
,
1826 r300_resource(buffers
[i
].buffer
)->malloced_buffer
, ~0);
1831 static void r300_set_index_buffer_hwtcl(struct pipe_context
* pipe
,
1832 const struct pipe_index_buffer
*ib
)
1834 struct r300_context
* r300
= r300_context(pipe
);
1837 pipe_resource_reference(&r300
->index_buffer
.buffer
, ib
->buffer
);
1838 memcpy(&r300
->index_buffer
, ib
, sizeof(*ib
));
1840 pipe_resource_reference(&r300
->index_buffer
.buffer
, NULL
);
1844 static void r300_set_index_buffer_swtcl(struct pipe_context
* pipe
,
1845 const struct pipe_index_buffer
*ib
)
1847 struct r300_context
* r300
= r300_context(pipe
);
1850 const void *buf
= NULL
;
1851 if (ib
->user_buffer
) {
1852 buf
= ib
->user_buffer
;
1853 } else if (ib
->buffer
) {
1854 buf
= r300_resource(ib
->buffer
)->malloced_buffer
;
1856 draw_set_indexes(r300
->draw
,
1857 (const ubyte
*) buf
+ ib
->offset
,
1858 ib
->index_size
, ~0);
1862 /* Initialize the PSC tables. */
1863 static void r300_vertex_psc(struct r300_vertex_element_state
*velems
)
1865 struct r300_vertex_stream_state
*vstream
= &velems
->vertex_stream
;
1866 uint16_t type
, swizzle
;
1867 enum pipe_format format
;
1870 /* Vertex shaders have no semantics on their inputs,
1871 * so PSC should just route stuff based on the vertex elements,
1872 * and not on attrib information. */
1873 for (i
= 0; i
< velems
->count
; i
++) {
1874 format
= velems
->velem
[i
].src_format
;
1876 type
= r300_translate_vertex_data_type(format
);
1877 if (type
== R300_INVALID_FORMAT
) {
1878 fprintf(stderr
, "r300: Bad vertex format %s.\n",
1879 util_format_short_name(format
));
1884 type
|= i
<< R300_DST_VEC_LOC_SHIFT
;
1885 swizzle
= r300_translate_vertex_data_swizzle(format
);
1888 vstream
->vap_prog_stream_cntl
[i
>> 1] |= type
<< 16;
1889 vstream
->vap_prog_stream_cntl_ext
[i
>> 1] |= swizzle
<< 16;
1891 vstream
->vap_prog_stream_cntl
[i
>> 1] |= type
;
1892 vstream
->vap_prog_stream_cntl_ext
[i
>> 1] |= swizzle
;
1896 /* Set the last vector in the PSC. */
1900 vstream
->vap_prog_stream_cntl
[i
>> 1] |=
1901 (R300_LAST_VEC
<< (i
& 1 ? 16 : 0));
1903 vstream
->count
= (i
>> 1) + 1;
1906 static void* r300_create_vertex_elements_state(struct pipe_context
* pipe
,
1908 const struct pipe_vertex_element
* attribs
)
1910 struct r300_vertex_element_state
*velems
;
1912 struct pipe_vertex_element dummy_attrib
= {0};
1914 /* R300 Programmable Stream Control (PSC) doesn't support 0 vertex elements. */
1916 dummy_attrib
.src_format
= PIPE_FORMAT_R8G8B8A8_UNORM
;
1917 attribs
= &dummy_attrib
;
1919 } else if (count
> 16) {
1920 fprintf(stderr
, "r300: More than 16 vertex elements are not supported,"
1921 " requested %i, using 16.\n", count
);
1925 velems
= CALLOC_STRUCT(r300_vertex_element_state
);
1929 velems
->count
= count
;
1930 memcpy(velems
->velem
, attribs
, sizeof(struct pipe_vertex_element
) * count
);
1932 if (r300_screen(pipe
->screen
)->caps
.has_tcl
) {
1934 * The unused components will be replaced by (..., 0, 1). */
1935 r300_vertex_psc(velems
);
1937 for (i
= 0; i
< count
; i
++) {
1938 velems
->format_size
[i
] =
1939 align(util_format_get_blocksize(velems
->velem
[i
].src_format
), 4);
1940 velems
->vertex_size_dwords
+= velems
->format_size
[i
] / 4;
1947 static void r300_bind_vertex_elements_state(struct pipe_context
*pipe
,
1950 struct r300_context
*r300
= r300_context(pipe
);
1951 struct r300_vertex_element_state
*velems
= state
;
1953 if (velems
== NULL
) {
1957 r300
->velems
= velems
;
1960 draw_set_vertex_elements(r300
->draw
, velems
->count
, velems
->velem
);
1964 UPDATE_STATE(&velems
->vertex_stream
, r300
->vertex_stream_state
);
1965 r300
->vertex_stream_state
.size
= (1 + velems
->vertex_stream
.count
) * 2;
1966 r300
->vertex_arrays_dirty
= TRUE
;
1969 static void r300_delete_vertex_elements_state(struct pipe_context
*pipe
, void *state
)
1974 static void* r300_create_vs_state(struct pipe_context
* pipe
,
1975 const struct pipe_shader_state
* shader
)
1977 struct r300_context
* r300
= r300_context(pipe
);
1978 struct r300_vertex_shader
* vs
= CALLOC_STRUCT(r300_vertex_shader
);
1980 /* Copy state directly into shader. */
1981 vs
->state
= *shader
;
1982 vs
->state
.tokens
= tgsi_dup_tokens(shader
->tokens
);
1984 if (r300
->screen
->caps
.has_tcl
) {
1985 r300_init_vs_outputs(r300
, vs
);
1986 r300_translate_vertex_shader(r300
, vs
);
1988 r300_draw_init_vertex_shader(r300
, vs
);
1994 static void r300_bind_vs_state(struct pipe_context
* pipe
, void* shader
)
1996 struct r300_context
* r300
= r300_context(pipe
);
1997 struct r300_vertex_shader
* vs
= (struct r300_vertex_shader
*)shader
;
2000 r300
->vs_state
.state
= NULL
;
2003 if (vs
== r300
->vs_state
.state
) {
2006 r300
->vs_state
.state
= vs
;
2008 /* The majority of the RS block bits is dependent on the vertex shader. */
2009 r300_mark_atom_dirty(r300
, &r300
->rs_block_state
); /* Will be updated before the emission. */
2011 if (r300
->screen
->caps
.has_tcl
) {
2012 unsigned fc_op_dwords
= r300
->screen
->caps
.is_r500
? 3 : 2;
2013 r300_mark_atom_dirty(r300
, &r300
->vs_state
);
2014 r300
->vs_state
.size
= vs
->code
.length
+ 9 +
2015 (R300_VS_MAX_FC_OPS
* fc_op_dwords
+ 4);
2017 r300_mark_atom_dirty(r300
, &r300
->vs_constants
);
2018 r300
->vs_constants
.size
=
2020 (vs
->externals_count
? vs
->externals_count
* 4 + 3 : 0) +
2021 (vs
->immediates_count
? vs
->immediates_count
* 4 + 3 : 0);
2023 ((struct r300_constant_buffer
*)r300
->vs_constants
.state
)->remap_table
=
2024 vs
->code
.constants_remap_table
;
2026 r300_mark_atom_dirty(r300
, &r300
->pvs_flush
);
2028 draw_bind_vertex_shader(r300
->draw
,
2029 (struct draw_vertex_shader
*)vs
->draw_vs
);
2033 static void r300_delete_vs_state(struct pipe_context
* pipe
, void* shader
)
2035 struct r300_context
* r300
= r300_context(pipe
);
2036 struct r300_vertex_shader
* vs
= (struct r300_vertex_shader
*)shader
;
2038 if (r300
->screen
->caps
.has_tcl
) {
2039 rc_constants_destroy(&vs
->code
.constants
);
2040 FREE(vs
->code
.constants_remap_table
);
2042 draw_delete_vertex_shader(r300
->draw
,
2043 (struct draw_vertex_shader
*)vs
->draw_vs
);
2046 FREE((void*)vs
->state
.tokens
);
2050 static void r300_set_constant_buffer(struct pipe_context
*pipe
,
2051 uint shader
, uint index
,
2052 struct pipe_constant_buffer
*cb
)
2054 struct r300_context
* r300
= r300_context(pipe
);
2055 struct r300_constant_buffer
*cbuf
;
2058 if (!cb
|| (!cb
->buffer
&& !cb
->user_buffer
))
2062 case PIPE_SHADER_VERTEX
:
2063 cbuf
= (struct r300_constant_buffer
*)r300
->vs_constants
.state
;
2065 case PIPE_SHADER_FRAGMENT
:
2066 cbuf
= (struct r300_constant_buffer
*)r300
->fs_constants
.state
;
2073 if (cb
->user_buffer
)
2074 mapped
= (uint32_t*)cb
->user_buffer
;
2076 struct r300_resource
*rbuf
= r300_resource(cb
->buffer
);
2078 if (rbuf
&& rbuf
->malloced_buffer
)
2079 mapped
= (uint32_t*)rbuf
->malloced_buffer
;
2084 if (shader
== PIPE_SHADER_FRAGMENT
||
2085 (shader
== PIPE_SHADER_VERTEX
&& r300
->screen
->caps
.has_tcl
)) {
2089 if (shader
== PIPE_SHADER_VERTEX
) {
2090 if (r300
->screen
->caps
.has_tcl
) {
2091 struct r300_vertex_shader
*vs
=
2092 (struct r300_vertex_shader
*)r300
->vs_state
.state
;
2095 cbuf
->buffer_base
= 0;
2099 cbuf
->buffer_base
= r300
->vs_const_base
;
2100 r300
->vs_const_base
+= vs
->code
.constants
.Count
;
2101 if (r300
->vs_const_base
> R500_MAX_PVS_CONST_VECS
) {
2102 r300
->vs_const_base
= vs
->code
.constants
.Count
;
2103 cbuf
->buffer_base
= 0;
2104 r300_mark_atom_dirty(r300
, &r300
->pvs_flush
);
2106 r300_mark_atom_dirty(r300
, &r300
->vs_constants
);
2107 } else if (r300
->draw
) {
2108 draw_set_mapped_constant_buffer(r300
->draw
, PIPE_SHADER_VERTEX
,
2109 0, mapped
, cb
->buffer_size
);
2111 } else if (shader
== PIPE_SHADER_FRAGMENT
) {
2112 r300_mark_atom_dirty(r300
, &r300
->fs_constants
);
2116 static void r300_texture_barrier(struct pipe_context
*pipe
)
2118 struct r300_context
*r300
= r300_context(pipe
);
2120 r300_mark_atom_dirty(r300
, &r300
->gpu_flush
);
2121 r300_mark_atom_dirty(r300
, &r300
->texture_cache_inval
);
2124 static void r300_memory_barrier(struct pipe_context
*pipe
, unsigned flags
)
2128 void r300_init_state_functions(struct r300_context
* r300
)
2130 r300
->context
.create_blend_state
= r300_create_blend_state
;
2131 r300
->context
.bind_blend_state
= r300_bind_blend_state
;
2132 r300
->context
.delete_blend_state
= r300_delete_blend_state
;
2134 r300
->context
.set_blend_color
= r300_set_blend_color
;
2136 r300
->context
.set_clip_state
= r300_set_clip_state
;
2137 r300
->context
.set_sample_mask
= r300_set_sample_mask
;
2139 r300
->context
.set_constant_buffer
= r300_set_constant_buffer
;
2141 r300
->context
.create_depth_stencil_alpha_state
= r300_create_dsa_state
;
2142 r300
->context
.bind_depth_stencil_alpha_state
= r300_bind_dsa_state
;
2143 r300
->context
.delete_depth_stencil_alpha_state
= r300_delete_dsa_state
;
2145 r300
->context
.set_stencil_ref
= r300_set_stencil_ref
;
2147 r300
->context
.set_framebuffer_state
= r300_set_framebuffer_state
;
2149 r300
->context
.create_fs_state
= r300_create_fs_state
;
2150 r300
->context
.bind_fs_state
= r300_bind_fs_state
;
2151 r300
->context
.delete_fs_state
= r300_delete_fs_state
;
2153 r300
->context
.set_polygon_stipple
= r300_set_polygon_stipple
;
2155 r300
->context
.create_rasterizer_state
= r300_create_rs_state
;
2156 r300
->context
.bind_rasterizer_state
= r300_bind_rs_state
;
2157 r300
->context
.delete_rasterizer_state
= r300_delete_rs_state
;
2159 r300
->context
.create_sampler_state
= r300_create_sampler_state
;
2160 r300
->context
.bind_sampler_states
= r300_bind_sampler_states
;
2161 r300
->context
.delete_sampler_state
= r300_delete_sampler_state
;
2163 r300
->context
.set_sampler_views
= r300_set_sampler_views
;
2164 r300
->context
.create_sampler_view
= r300_create_sampler_view
;
2165 r300
->context
.sampler_view_destroy
= r300_sampler_view_destroy
;
2167 r300
->context
.set_scissor_states
= r300_set_scissor_states
;
2169 r300
->context
.set_viewport_states
= r300_set_viewport_states
;
2171 if (r300
->screen
->caps
.has_tcl
) {
2172 r300
->context
.set_vertex_buffers
= r300_set_vertex_buffers_hwtcl
;
2173 r300
->context
.set_index_buffer
= r300_set_index_buffer_hwtcl
;
2175 r300
->context
.set_vertex_buffers
= r300_set_vertex_buffers_swtcl
;
2176 r300
->context
.set_index_buffer
= r300_set_index_buffer_swtcl
;
2179 r300
->context
.create_vertex_elements_state
= r300_create_vertex_elements_state
;
2180 r300
->context
.bind_vertex_elements_state
= r300_bind_vertex_elements_state
;
2181 r300
->context
.delete_vertex_elements_state
= r300_delete_vertex_elements_state
;
2183 r300
->context
.create_vs_state
= r300_create_vs_state
;
2184 r300
->context
.bind_vs_state
= r300_bind_vs_state
;
2185 r300
->context
.delete_vs_state
= r300_delete_vs_state
;
2187 r300
->context
.texture_barrier
= r300_texture_barrier
;
2188 r300
->context
.memory_barrier
= r300_memory_barrier
;