src/gallium/drivers/r300/r300_state.c

   1 /*
   2  * Copyright 2008 Corbin Simpson <MostAwesomeDude@gmail.com>
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * on the rights to use, copy, modify, merge, publish, distribute, sub
   8  * license, and/or sell copies of the Software, and to permit persons to whom
   9  * the Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  18  * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
  19  * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
  20  * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
  21  * USE OR OTHER DEALINGS IN THE SOFTWARE. */
  22
  23 #include "draw/draw_context.h"
  24
  25 #include "util/u_math.h"
  26 #include "util/u_memory.h"
  27 #include "util/u_pack_color.h"
  28
  29 #include "tgsi/tgsi_parse.h"
  30
  31 #include "pipe/p_config.h"
  32 #include "pipe/internal/p_winsys_screen.h"
  33
  34 #include "r300_context.h"
  35 #include "r300_reg.h"
  36 #include "r300_screen.h"
  37 #include "r300_state_inlines.h"
  38 #include "r300_fs.h"
  39 #include "r300_vs.h"
  40
  41 /* r300_state: Functions used to intialize state context by translating
  42  * Gallium state objects into semi-native r300 state objects. */
  43
  44 /* Create a new blend state based on the CSO blend state.
  45  *
  46  * This encompasses alpha blending, logic/raster ops, and blend dithering. */
  47 static void* r300_create_blend_state(struct pipe_context* pipe,
  48                                      const struct pipe_blend_state* state)
  49 {
  50     struct r300_blend_state* blend = CALLOC_STRUCT(r300_blend_state);
  51
  52     if (state->blend_enable)
  53     {
  54         unsigned eqRGB = state->rgb_func;
  55         unsigned srcRGB = state->rgb_src_factor;
  56         unsigned dstRGB = state->rgb_dst_factor;
  57
  58         unsigned eqA = state->alpha_func;
  59         unsigned srcA = state->alpha_src_factor;
  60         unsigned dstA = state->alpha_dst_factor;
  61
  62         /* despite the name, ALPHA_BLEND_ENABLE has nothing to do with alpha,
  63          * this is just the crappy D3D naming */
  64         blend->blend_control = R300_ALPHA_BLEND_ENABLE |
  65             r300_translate_blend_function(eqRGB) |
  66             ( r300_translate_blend_factor(srcRGB) << R300_SRC_BLEND_SHIFT) |
  67             ( r300_translate_blend_factor(dstRGB) << R300_DST_BLEND_SHIFT);
  68
  69         /* optimization: some operations do not require the destination color */
  70         if (eqRGB == PIPE_BLEND_MIN || eqA == PIPE_BLEND_MIN ||
  71             eqRGB == PIPE_BLEND_MAX || eqA == PIPE_BLEND_MAX ||
  72             dstRGB != PIPE_BLENDFACTOR_ZERO ||
  73             dstA != PIPE_BLENDFACTOR_ZERO ||
  74             srcRGB == PIPE_BLENDFACTOR_DST_COLOR ||
  75             srcRGB == PIPE_BLENDFACTOR_DST_ALPHA ||
  76             srcRGB == PIPE_BLENDFACTOR_INV_DST_COLOR ||
  77             srcRGB == PIPE_BLENDFACTOR_INV_DST_ALPHA ||
  78             srcA == PIPE_BLENDFACTOR_DST_COLOR ||
  79             srcA == PIPE_BLENDFACTOR_DST_ALPHA ||
  80             srcA == PIPE_BLENDFACTOR_INV_DST_COLOR ||
  81             srcA == PIPE_BLENDFACTOR_INV_DST_ALPHA)
  82             blend->blend_control |= R300_READ_ENABLE;
  83
  84         /* XXX implement the optimization with DISCARD_SRC_PIXELS*/
  85         /* XXX implement the optimization with SRC_ALPHA_?_NO_READ */
  86
  87         /* separate alpha */
  88         if (srcA != srcRGB || dstA != dstRGB || eqA != eqRGB) {
  89             blend->blend_control |= R300_SEPARATE_ALPHA_ENABLE;
  90             blend->alpha_blend_control =
  91                 r300_translate_blend_function(eqA) |
  92                 (r300_translate_blend_factor(srcA) << R300_SRC_BLEND_SHIFT) |
  93                 (r300_translate_blend_factor(dstA) << R300_DST_BLEND_SHIFT);
  94         }
  95     }
  96
  97     /* PIPE_LOGICOP_* don't need to be translated, fortunately. */
  98     if (state->logicop_enable) {
  99         blend->rop = R300_RB3D_ROPCNTL_ROP_ENABLE |
 100                 (state->logicop_func) << R300_RB3D_ROPCNTL_ROP_SHIFT;
 101     }
 102
 103     /* Color Channel Mask */
 104     if (state->colormask & PIPE_MASK_R) {
 105         blend->color_channel_mask |= RB3D_COLOR_CHANNEL_MASK_RED_MASK0;
 106     }
 107     if (state->colormask & PIPE_MASK_G) {
 108         blend->color_channel_mask |= RB3D_COLOR_CHANNEL_MASK_GREEN_MASK0;
 109     }
 110     if (state->colormask & PIPE_MASK_B) {
 111         blend->color_channel_mask |= RB3D_COLOR_CHANNEL_MASK_BLUE_MASK0;
 112     }
 113     if (state->colormask & PIPE_MASK_A) {
 114         blend->color_channel_mask |= RB3D_COLOR_CHANNEL_MASK_ALPHA_MASK0;
 115     }
 116
 117     if (state->dither) {
 118         blend->dither = R300_RB3D_DITHER_CTL_DITHER_MODE_LUT |
 119                 R300_RB3D_DITHER_CTL_ALPHA_DITHER_MODE_LUT;
 120     }
 121
 122     return (void*)blend;
 123 }
 124
 125 /* Bind blend state. */
 126 static void r300_bind_blend_state(struct pipe_context* pipe,
 127                                   void* state)
 128 {
 129     struct r300_context* r300 = r300_context(pipe);
 130
 131     r300->blend_state = (struct r300_blend_state*)state;
 132     r300->dirty_state |= R300_NEW_BLEND;
 133 }
 134
 135 /* Free blend state. */
 136 static void r300_delete_blend_state(struct pipe_context* pipe,
 137                                     void* state)
 138 {
 139     FREE(state);
 140 }
 141
 142 /* Convert float to 10bit integer */
 143 static unsigned float_to_fixed10(float f)
 144 {
 145     return CLAMP((unsigned)(f * 1023.9f), 0, 1023);
 146 }
 147
 148 /* Set blend color.
 149  * Setup both R300 and R500 registers, figure out later which one to write. */
 150 static void r300_set_blend_color(struct pipe_context* pipe,
 151                                  const struct pipe_blend_color* color)
 152 {
 153     struct r300_context* r300 = r300_context(pipe);
 154
 155     util_pack_color(color->color, PIPE_FORMAT_A8R8G8B8_UNORM,
 156             &r300->blend_color_state->blend_color);
 157
 158     /* XXX if FP16 blending is enabled, we should use the FP16 format */
 159     r300->blend_color_state->blend_color_red_alpha =
 160         float_to_fixed10(color->color[0]) |
 161         (float_to_fixed10(color->color[3]) << 16);
 162     r300->blend_color_state->blend_color_green_blue =
 163         float_to_fixed10(color->color[2]) |
 164         (float_to_fixed10(color->color[1]) << 16);
 165
 166     r300->dirty_state |= R300_NEW_BLEND_COLOR;
 167 }
 168
 169 static void r300_set_clip_state(struct pipe_context* pipe,
 170                                 const struct pipe_clip_state* state)
 171 {
 172     struct r300_context* r300 = r300_context(pipe);
 173
 174     if (r300_screen(pipe->screen)->caps->has_tcl) {
 175         r300->clip_state = *state;
 176         r300->dirty_state |= R300_NEW_CLIP;
 177     } else {
 178         draw_flush(r300->draw);
 179         draw_set_clip_state(r300->draw, state);
 180     }
 181 }
 182
 183 /* Create a new depth, stencil, and alpha state based on the CSO dsa state.
 184  *
 185  * This contains the depth buffer, stencil buffer, alpha test, and such.
 186  * On the Radeon, depth and stencil buffer setup are intertwined, which is
 187  * the reason for some of the strange-looking assignments across registers. */
 188 static void*
 189         r300_create_dsa_state(struct pipe_context* pipe,
 190                               const struct pipe_depth_stencil_alpha_state* state)
 191 {
 192     struct r300_capabilities *caps =
 193         r300_screen(r300_context(pipe)->context.screen)->caps;
 194     struct r300_dsa_state* dsa = CALLOC_STRUCT(r300_dsa_state);
 195
 196     /* Depth test setup. */
 197     if (state->depth.enabled) {
 198         dsa->z_buffer_control |= R300_Z_ENABLE;
 199
 200         if (state->depth.writemask) {
 201             dsa->z_buffer_control |= R300_Z_WRITE_ENABLE;
 202         }
 203
 204         dsa->z_stencil_control |=
 205             (r300_translate_depth_stencil_function(state->depth.func) <<
 206                 R300_Z_FUNC_SHIFT);
 207     }
 208
 209     /* Stencil buffer setup. */
 210     if (state->stencil[0].enabled) {
 211         dsa->z_buffer_control |= R300_STENCIL_ENABLE;
 212         dsa->z_stencil_control |=
 213             (r300_translate_depth_stencil_function(state->stencil[0].func) <<
 214                 R300_S_FRONT_FUNC_SHIFT) |
 215             (r300_translate_stencil_op(state->stencil[0].fail_op) <<
 216                 R300_S_FRONT_SFAIL_OP_SHIFT) |
 217             (r300_translate_stencil_op(state->stencil[0].zpass_op) <<
 218                 R300_S_FRONT_ZPASS_OP_SHIFT) |
 219             (r300_translate_stencil_op(state->stencil[0].zfail_op) <<
 220                 R300_S_FRONT_ZFAIL_OP_SHIFT);
 221
 222         dsa->stencil_ref_mask = (state->stencil[0].ref_value) |
 223                 (state->stencil[0].valuemask << R300_STENCILMASK_SHIFT) |
 224                 (state->stencil[0].writemask << R300_STENCILWRITEMASK_SHIFT);
 225
 226         if (state->stencil[1].enabled) {
 227             dsa->z_buffer_control |= R300_STENCIL_FRONT_BACK;
 228             dsa->z_stencil_control |=
 229             (r300_translate_depth_stencil_function(state->stencil[1].func) <<
 230                 R300_S_BACK_FUNC_SHIFT) |
 231             (r300_translate_stencil_op(state->stencil[1].fail_op) <<
 232                 R300_S_BACK_SFAIL_OP_SHIFT) |
 233             (r300_translate_stencil_op(state->stencil[1].zpass_op) <<
 234                 R300_S_BACK_ZPASS_OP_SHIFT) |
 235             (r300_translate_stencil_op(state->stencil[1].zfail_op) <<
 236                 R300_S_BACK_ZFAIL_OP_SHIFT);
 237
 238             /* XXX it seems r3xx doesn't support STENCILREFMASK_BF */
 239             if (caps->is_r500)
 240             {
 241                 dsa->z_buffer_control |= R500_STENCIL_REFMASK_FRONT_BACK;
 242                 dsa->stencil_ref_bf = (state->stencil[1].ref_value) |
 243                     (state->stencil[1].valuemask <<
 244                     R300_STENCILMASK_SHIFT) |
 245                     (state->stencil[1].writemask <<
 246                     R300_STENCILWRITEMASK_SHIFT);
 247             }
 248         }
 249     }
 250
 251     /* Alpha test setup. */
 252     if (state->alpha.enabled) {
 253         dsa->alpha_function =
 254             r300_translate_alpha_function(state->alpha.func) |
 255             R300_FG_ALPHA_FUNC_ENABLE;
 256
 257         /* XXX figure out why emitting 10bit alpha ref causes CS to dump */
 258         /* always use 8bit alpha ref */
 259         dsa->alpha_function |= float_to_ubyte(state->alpha.ref_value);
 260
 261         if (caps->is_r500)
 262             dsa->alpha_function |= R500_FG_ALPHA_FUNC_8BIT;
 263     }
 264
 265     return (void*)dsa;
 266 }
 267
 268 /* Bind DSA state. */
 269 static void r300_bind_dsa_state(struct pipe_context* pipe,
 270                                 void* state)
 271 {
 272     struct r300_context* r300 = r300_context(pipe);
 273
 274     r300->dsa_state = (struct r300_dsa_state*)state;
 275     r300->dirty_state |= R300_NEW_DSA;
 276 }
 277
 278 /* Free DSA state. */
 279 static void r300_delete_dsa_state(struct pipe_context* pipe,
 280                                   void* state)
 281 {
 282     FREE(state);
 283 }
 284
 285 static void r300_set_edgeflags(struct pipe_context* pipe,
 286                                const unsigned* bitfield)
 287 {
 288     /* XXX you know it's bad when i915 has this blank too */
 289     /* XXX and even worse, I have no idea WTF the bitfield is */
 290 }
 291
 292 static void
 293     r300_set_framebuffer_state(struct pipe_context* pipe,
 294                                const struct pipe_framebuffer_state* state)
 295 {
 296     struct r300_context* r300 = r300_context(pipe);
 297
 298     if (r300->draw) {
 299         draw_flush(r300->draw);
 300     }
 301
 302     r300->framebuffer_state = *state;
 303
 304     r300->dirty_state |= R300_NEW_FRAMEBUFFERS;
 305 }
 306
 307 /* Create fragment shader state. */
 308 static void* r300_create_fs_state(struct pipe_context* pipe,
 309                                   const struct pipe_shader_state* shader)
 310 {
 311     struct r300_fragment_shader* fs = NULL;
 312
 313     fs = (struct r300_fragment_shader*)CALLOC_STRUCT(r300_fragment_shader);
 314
 315     /* Copy state directly into shader. */
 316     fs->state = *shader;
 317     fs->state.tokens = tgsi_dup_tokens(shader->tokens);
 318
 319     tgsi_scan_shader(shader->tokens, &fs->info);
 320
 321     return (void*)fs;
 322 }
 323
 324 /* Bind fragment shader state. */
 325 static void r300_bind_fs_state(struct pipe_context* pipe, void* shader)
 326 {
 327     struct r300_context* r300 = r300_context(pipe);
 328     struct r300_fragment_shader* fs = (struct r300_fragment_shader*)shader;
 329
 330     if (fs == NULL) {
 331         r300->fs = NULL;
 332         return;
 333     } else if (!fs->translated) {
 334         r300_translate_fragment_shader(r300, fs);
 335     }
 336
 337     r300->fs = fs;
 338
 339     r300->dirty_state |= R300_NEW_FRAGMENT_SHADER | R300_NEW_FRAGMENT_SHADER_CONSTANTS;
 340 }
 341
 342 /* Delete fragment shader state. */
 343 static void r300_delete_fs_state(struct pipe_context* pipe, void* shader)
 344 {
 345     struct r300_fragment_shader* fs = (struct r300_fragment_shader*)shader;
 346     rc_constants_destroy(&fs->code.constants);
 347     FREE((void*)fs->state.tokens);
 348     FREE(shader);
 349 }
 350
 351 static void r300_set_polygon_stipple(struct pipe_context* pipe,
 352                                      const struct pipe_poly_stipple* state)
 353 {
 354     /* XXX no idea how to set this up, but not terribly important */
 355 }
 356
 357 /* Create a new rasterizer state based on the CSO rasterizer state.
 358  *
 359  * This is a very large chunk of state, and covers most of the graphics
 360  * backend (GB), geometry assembly (GA), and setup unit (SU) blocks.
 361  *
 362  * In a not entirely unironic sidenote, this state has nearly nothing to do
 363  * with the actual block on the Radeon called the rasterizer (RS). */
 364 static void* r300_create_rs_state(struct pipe_context* pipe,
 365                                   const struct pipe_rasterizer_state* state)
 366 {
 367     struct r300_rs_state* rs = CALLOC_STRUCT(r300_rs_state);
 368
 369     /* Copy rasterizer state for Draw. */
 370     rs->rs = *state;
 371
 372     rs->enable_vte = !state->bypass_vs_clip_and_viewport;
 373
 374 #ifdef PIPE_ARCH_LITTLE_ENDIAN
 375     rs->vap_control_status = R300_VC_NO_SWAP;
 376 #else
 377     rs->vap_control_status = R300_VC_32BIT_SWAP;
 378 #endif
 379
 380     /* If bypassing TCL, or if no TCL engine is present, turn off the HW TCL.
 381      * Else, enable HW TCL and force Draw's TCL off. */
 382     if (state->bypass_vs_clip_and_viewport ||
 383             !r300_screen(pipe->screen)->caps->has_tcl) {
 384         rs->vap_control_status |= R300_VAP_TCL_BYPASS;
 385     } else {
 386         rs->rs.bypass_vs_clip_and_viewport = TRUE;
 387     }
 388
 389     rs->point_size = pack_float_16_6x(state->point_size) |
 390         (pack_float_16_6x(state->point_size) << R300_POINTSIZE_X_SHIFT);
 391
 392     rs->point_minmax =
 393         ((int)(state->point_size_min * 6.0) <<
 394          R300_GA_POINT_MINMAX_MIN_SHIFT) |
 395         ((int)(state->point_size_max * 6.0) <<
 396          R300_GA_POINT_MINMAX_MAX_SHIFT);
 397
 398     rs->line_control = pack_float_16_6x(state->line_width) |
 399         R300_GA_LINE_CNTL_END_TYPE_COMP;
 400
 401     /* XXX I think there is something wrong with the polygon mode,
 402      * XXX re-test when r300g is in a better shape */
 403
 404     /* Enable polygon mode */
 405     if (state->fill_cw != PIPE_POLYGON_MODE_FILL ||
 406         state->fill_ccw != PIPE_POLYGON_MODE_FILL) {
 407         rs->polygon_mode = R300_GA_POLY_MODE_DUAL;
 408     }
 409
 410     /* Radeons don't think in "CW/CCW", they think in "front/back". */
 411     if (state->front_winding == PIPE_WINDING_CW) {
 412         rs->cull_mode = R300_FRONT_FACE_CW;
 413
 414         /* Polygon offset */
 415         if (state->offset_cw) {
 416             rs->polygon_offset_enable |= R300_FRONT_ENABLE;
 417         }
 418         if (state->offset_ccw) {
 419             rs->polygon_offset_enable |= R300_BACK_ENABLE;
 420         }
 421
 422         /* Polygon mode */
 423         if (rs->polygon_mode) {
 424             rs->polygon_mode |=
 425                 r300_translate_polygon_mode_front(state->fill_cw);
 426             rs->polygon_mode |=
 427                 r300_translate_polygon_mode_back(state->fill_ccw);
 428         }
 429     } else {
 430         rs->cull_mode = R300_FRONT_FACE_CCW;
 431
 432         /* Polygon offset */
 433         if (state->offset_ccw) {
 434             rs->polygon_offset_enable |= R300_FRONT_ENABLE;
 435         }
 436         if (state->offset_cw) {
 437             rs->polygon_offset_enable |= R300_BACK_ENABLE;
 438         }
 439
 440         /* Polygon mode */
 441         if (rs->polygon_mode) {
 442             rs->polygon_mode |=
 443                 r300_translate_polygon_mode_front(state->fill_ccw);
 444             rs->polygon_mode |=
 445                 r300_translate_polygon_mode_back(state->fill_cw);
 446         }
 447     }
 448     if (state->front_winding & state->cull_mode) {
 449         rs->cull_mode |= R300_CULL_FRONT;
 450     }
 451     if (~(state->front_winding) & state->cull_mode) {
 452         rs->cull_mode |= R300_CULL_BACK;
 453     }
 454
 455     if (rs->polygon_offset_enable) {
 456         rs->depth_offset_front = rs->depth_offset_back =
 457             fui(state->offset_units);
 458         rs->depth_scale_front = rs->depth_scale_back =
 459             fui(state->offset_scale);
 460     }
 461
 462     if (state->line_stipple_enable) {
 463         rs->line_stipple_config =
 464             R300_GA_LINE_STIPPLE_CONFIG_LINE_RESET_LINE |
 465             (fui((float)state->line_stipple_factor) &
 466                 R300_GA_LINE_STIPPLE_CONFIG_STIPPLE_SCALE_MASK);
 467         /* XXX this might need to be scaled up */
 468         rs->line_stipple_value = state->line_stipple_pattern;
 469     }
 470
 471     if (state->flatshade) {
 472         rs->color_control = R300_SHADE_MODEL_FLAT;
 473     } else {
 474         rs->color_control = R300_SHADE_MODEL_SMOOTH;
 475     }
 476
 477     if (!state->flatshade_first) {
 478         rs->color_control |= R300_GA_COLOR_CONTROL_PROVOKING_VERTEX_LAST;
 479     }
 480
 481     return (void*)rs;
 482 }
 483
 484 /* Bind rasterizer state. */
 485 static void r300_bind_rs_state(struct pipe_context* pipe, void* state)
 486 {
 487     struct r300_context* r300 = r300_context(pipe);
 488     struct r300_rs_state* rs = (struct r300_rs_state*)state;
 489
 490     if (r300->draw) {
 491         draw_flush(r300->draw);
 492         draw_set_rasterizer_state(r300->draw, &rs->rs);
 493     }
 494
 495     r300->rs_state = rs;
 496     /* XXX Clean these up when we move to atom emits */
 497     r300->dirty_state |= R300_NEW_RASTERIZER;
 498     r300->dirty_state |= R300_NEW_RS_BLOCK;
 499     r300->dirty_state |= R300_NEW_SCISSOR;
 500     r300->dirty_state |= R300_NEW_VIEWPORT;
 501 }
 502
 503 /* Free rasterizer state. */
 504 static void r300_delete_rs_state(struct pipe_context* pipe, void* state)
 505 {
 506     FREE(state);
 507 }
 508
 509 static void*
 510         r300_create_sampler_state(struct pipe_context* pipe,
 511                                   const struct pipe_sampler_state* state)
 512 {
 513     struct r300_context* r300 = r300_context(pipe);
 514     struct r300_sampler_state* sampler = CALLOC_STRUCT(r300_sampler_state);
 515     int lod_bias;
 516
 517     sampler->filter0 |=
 518         (r300_translate_wrap(state->wrap_s) << R300_TX_WRAP_S_SHIFT) |
 519         (r300_translate_wrap(state->wrap_t) << R300_TX_WRAP_T_SHIFT) |
 520         (r300_translate_wrap(state->wrap_r) << R300_TX_WRAP_R_SHIFT);
 521
 522     sampler->filter0 |= r300_translate_tex_filters(state->min_img_filter,
 523                                                    state->mag_img_filter,
 524                                                    state->min_mip_filter);
 525
 526     lod_bias = CLAMP((int)(state->lod_bias * 32), -(1 << 9), (1 << 9) - 1);
 527
 528     sampler->filter1 |= lod_bias << R300_LOD_BIAS_SHIFT;
 529
 530     sampler->filter1 |= r300_anisotropy(state->max_anisotropy);
 531
 532     util_pack_color(state->border_color, PIPE_FORMAT_A8R8G8B8_UNORM,
 533                     &sampler->border_color);
 534
 535     /* R500-specific fixups and optimizations */
 536     if (r300_screen(r300->context.screen)->caps->is_r500) {
 537         sampler->filter1 |= R500_BORDER_FIX;
 538     }
 539
 540     return (void*)sampler;
 541 }
 542
 543 static void r300_bind_sampler_states(struct pipe_context* pipe,
 544                                      unsigned count,
 545                                      void** states)
 546 {
 547     struct r300_context* r300 = r300_context(pipe);
 548     int i;
 549
 550     if (count > 8) {
 551         return;
 552     }
 553
 554     for (i = 0; i < count; i++) {
 555         if (r300->sampler_states[i] != states[i]) {
 556             r300->sampler_states[i] = (struct r300_sampler_state*)states[i];
 557             r300->dirty_state |= (R300_NEW_SAMPLER << i);
 558         }
 559     }
 560
 561     r300->sampler_count = count;
 562 }
 563
 564 static void r300_delete_sampler_state(struct pipe_context* pipe, void* state)
 565 {
 566     FREE(state);
 567 }
 568
 569 static void r300_set_sampler_textures(struct pipe_context* pipe,
 570                                       unsigned count,
 571                                       struct pipe_texture** texture)
 572 {
 573     struct r300_context* r300 = r300_context(pipe);
 574     int i;
 575
 576     /* XXX magic num */
 577     if (count > 8) {
 578         return;
 579     }
 580
 581     r300->context.flush(&r300->context, 0, NULL);
 582
 583     for (i = 0; i < count; i++) {
 584         if (r300->textures[i] != (struct r300_texture*)texture[i]) {
 585             pipe_texture_reference((struct pipe_texture**)&r300->textures[i],
 586                 texture[i]);
 587             r300->dirty_state |= (R300_NEW_TEXTURE << i);
 588         }
 589     }
 590
 591     for (i = count; i < 8; i++) {
 592         if (r300->textures[i]) {
 593             pipe_texture_reference((struct pipe_texture**)&r300->textures[i],
 594                 NULL);
 595             r300->dirty_state |= (R300_NEW_TEXTURE << i);
 596         }
 597     }
 598
 599     r300->texture_count = count;
 600 }
 601
 602 static void r300_set_scissor_state(struct pipe_context* pipe,
 603                                    const struct pipe_scissor_state* state)
 604 {
 605     struct r300_context* r300 = r300_context(pipe);
 606
 607     if (r300_screen(r300->context.screen)->caps->is_r500) {
 608         r300->scissor_state->scissor_top_left =
 609             (state->minx << R300_SCISSORS_X_SHIFT) |
 610             (state->miny << R300_SCISSORS_Y_SHIFT);
 611         r300->scissor_state->scissor_bottom_right =
 612             ((state->maxx - 1) << R300_SCISSORS_X_SHIFT) |
 613             ((state->maxy - 1) << R300_SCISSORS_Y_SHIFT);
 614     } else {
 615         /* Offset of 1440 in non-R500 chipsets. */
 616         r300->scissor_state->scissor_top_left =
 617             ((state->minx + 1440) << R300_SCISSORS_X_SHIFT) |
 618             ((state->miny + 1440) << R300_SCISSORS_Y_SHIFT);
 619         r300->scissor_state->scissor_bottom_right =
 620             (((state->maxx - 1) + 1440) << R300_SCISSORS_X_SHIFT) |
 621             (((state->maxy - 1) + 1440) << R300_SCISSORS_Y_SHIFT);
 622     }
 623
 624     r300->dirty_state |= R300_NEW_SCISSOR;
 625 }
 626
 627 static void r300_set_viewport_state(struct pipe_context* pipe,
 628                                     const struct pipe_viewport_state* state)
 629 {
 630     struct r300_context* r300 = r300_context(pipe);
 631
 632     /* Do the transform in HW. */
 633     r300->viewport_state->vte_control = R300_VTX_W0_FMT;
 634
 635     if (state->scale[0] != 1.0f) {
 636         r300->viewport_state->xscale = state->scale[0];
 637         r300->viewport_state->vte_control |= R300_VPORT_X_SCALE_ENA;
 638     }
 639     if (state->scale[1] != 1.0f) {
 640         r300->viewport_state->yscale = state->scale[1];
 641         r300->viewport_state->vte_control |= R300_VPORT_Y_SCALE_ENA;
 642     }
 643     if (state->scale[2] != 1.0f) {
 644         r300->viewport_state->zscale = state->scale[2];
 645         r300->viewport_state->vte_control |= R300_VPORT_Z_SCALE_ENA;
 646     }
 647     if (state->translate[0] != 0.0f) {
 648         r300->viewport_state->xoffset = state->translate[0];
 649         r300->viewport_state->vte_control |= R300_VPORT_X_OFFSET_ENA;
 650     }
 651     if (state->translate[1] != 0.0f) {
 652         r300->viewport_state->yoffset = state->translate[1];
 653         r300->viewport_state->vte_control |= R300_VPORT_Y_OFFSET_ENA;
 654     }
 655     if (state->translate[2] != 0.0f) {
 656         r300->viewport_state->zoffset = state->translate[2];
 657         r300->viewport_state->vte_control |= R300_VPORT_Z_OFFSET_ENA;
 658     }
 659
 660     r300->dirty_state |= R300_NEW_VIEWPORT;
 661 }
 662
 663 static void r300_set_vertex_buffers(struct pipe_context* pipe,
 664                                     unsigned count,
 665                                     const struct pipe_vertex_buffer* buffers)
 666 {
 667     struct r300_context* r300 = r300_context(pipe);
 668
 669     memcpy(r300->vertex_buffer, buffers,
 670         sizeof(struct pipe_vertex_buffer) * count);
 671     r300->vertex_buffer_count = count;
 672
 673     if (r300->draw) {
 674         draw_flush(r300->draw);
 675         draw_set_vertex_buffers(r300->draw, count, buffers);
 676     }
 677 }
 678
 679 static void r300_set_vertex_elements(struct pipe_context* pipe,
 680                                     unsigned count,
 681                                     const struct pipe_vertex_element* elements)
 682 {
 683     struct r300_context* r300 = r300_context(pipe);
 684
 685     memcpy(r300->vertex_element,
 686            elements,
 687            sizeof(struct pipe_vertex_element) * count);
 688     r300->vertex_element_count = count;
 689
 690     if (r300->draw) {
 691         draw_flush(r300->draw);
 692         draw_set_vertex_elements(r300->draw, count, elements);
 693     }
 694 }
 695
 696 static void* r300_create_vs_state(struct pipe_context* pipe,
 697                                   const struct pipe_shader_state* shader)
 698 {
 699     struct r300_context* r300 = r300_context(pipe);
 700
 701     if (r300_screen(pipe->screen)->caps->has_tcl) {
 702         struct r300_vertex_shader* vs = CALLOC_STRUCT(r300_vertex_shader);
 703         /* Copy state directly into shader. */
 704         vs->state = *shader;
 705         vs->state.tokens = tgsi_dup_tokens(shader->tokens);
 706
 707         tgsi_scan_shader(shader->tokens, &vs->info);
 708
 709         /* Appease Draw. */
 710         vs->draw = draw_create_vertex_shader(r300->draw, shader);
 711
 712         return (void*)vs;
 713     } else {
 714         return draw_create_vertex_shader(r300->draw, shader);
 715     }
 716 }
 717
 718 static void r300_bind_vs_state(struct pipe_context* pipe, void* shader)
 719 {
 720     struct r300_context* r300 = r300_context(pipe);
 721
 722     draw_flush(r300->draw);
 723
 724     if (r300_screen(pipe->screen)->caps->has_tcl) {
 725         struct r300_vertex_shader* vs = (struct r300_vertex_shader*)shader;
 726
 727         if (vs == NULL) {
 728             r300->vs = NULL;
 729             return;
 730         } else if (!vs->translated) {
 731             r300_translate_vertex_shader(r300, vs);
 732         }
 733
 734         draw_bind_vertex_shader(r300->draw, vs->draw);
 735         r300->vs = vs;
 736         r300->dirty_state |= R300_NEW_VERTEX_SHADER | R300_NEW_VERTEX_SHADER_CONSTANTS;
 737     } else {
 738         draw_bind_vertex_shader(r300->draw,
 739                 (struct draw_vertex_shader*)shader);
 740     }
 741 }
 742
 743 static void r300_delete_vs_state(struct pipe_context* pipe, void* shader)
 744 {
 745     struct r300_context* r300 = r300_context(pipe);
 746
 747     if (r300_screen(pipe->screen)->caps->has_tcl) {
 748         struct r300_vertex_shader* vs = (struct r300_vertex_shader*)shader;
 749
 750         rc_constants_destroy(&vs->code.constants);
 751         draw_delete_vertex_shader(r300->draw, vs->draw);
 752         FREE((void*)vs->state.tokens);
 753         FREE(shader);
 754     } else {
 755         draw_delete_vertex_shader(r300->draw,
 756                 (struct draw_vertex_shader*)shader);
 757     }
 758 }
 759
 760 static void r300_set_constant_buffer(struct pipe_context *pipe,
 761                                      uint shader, uint index,
 762                                      const struct pipe_constant_buffer *buf)
 763 {
 764     struct r300_context* r300 = r300_context(pipe);
 765     void *mapped;
 766
 767     if (buf == NULL || buf->buffer->size == 0 ||
 768         (mapped = pipe_buffer_map(pipe->screen, buf->buffer, PIPE_BUFFER_USAGE_CPU_READ)) == NULL)
 769     {
 770         r300->shader_constants[shader].count = 0;
 771         return;
 772     }
 773
 774     assert((buf->buffer->size % 4 * sizeof(float)) == 0);
 775     memcpy(r300->shader_constants[shader].constants, mapped, buf->buffer->size);
 776     r300->shader_constants[shader].count = buf->buffer->size / (4 * sizeof(float));
 777     pipe_buffer_unmap(pipe->screen, buf->buffer);
 778
 779     if (shader == PIPE_SHADER_VERTEX)
 780         r300->dirty_state |= R300_NEW_VERTEX_SHADER_CONSTANTS;
 781     else if (shader == PIPE_SHADER_FRAGMENT)
 782         r300->dirty_state |= R300_NEW_FRAGMENT_SHADER_CONSTANTS;
 783 }
 784
 785 void r300_init_state_functions(struct r300_context* r300)
 786 {
 787     r300->context.create_blend_state = r300_create_blend_state;
 788     r300->context.bind_blend_state = r300_bind_blend_state;
 789     r300->context.delete_blend_state = r300_delete_blend_state;
 790
 791     r300->context.set_blend_color = r300_set_blend_color;
 792
 793     r300->context.set_clip_state = r300_set_clip_state;
 794
 795     r300->context.set_constant_buffer = r300_set_constant_buffer;
 796
 797     r300->context.create_depth_stencil_alpha_state = r300_create_dsa_state;
 798     r300->context.bind_depth_stencil_alpha_state = r300_bind_dsa_state;
 799     r300->context.delete_depth_stencil_alpha_state = r300_delete_dsa_state;
 800
 801     r300->context.set_edgeflags = r300_set_edgeflags;
 802
 803     r300->context.set_framebuffer_state = r300_set_framebuffer_state;
 804
 805     r300->context.create_fs_state = r300_create_fs_state;
 806     r300->context.bind_fs_state = r300_bind_fs_state;
 807     r300->context.delete_fs_state = r300_delete_fs_state;
 808
 809     r300->context.set_polygon_stipple = r300_set_polygon_stipple;
 810
 811     r300->context.create_rasterizer_state = r300_create_rs_state;
 812     r300->context.bind_rasterizer_state = r300_bind_rs_state;
 813     r300->context.delete_rasterizer_state = r300_delete_rs_state;
 814
 815     r300->context.create_sampler_state = r300_create_sampler_state;
 816     r300->context.bind_sampler_states = r300_bind_sampler_states;
 817     r300->context.delete_sampler_state = r300_delete_sampler_state;
 818
 819     r300->context.set_sampler_textures = r300_set_sampler_textures;
 820
 821     r300->context.set_scissor_state = r300_set_scissor_state;
 822
 823     r300->context.set_viewport_state = r300_set_viewport_state;
 824
 825     r300->context.set_vertex_buffers = r300_set_vertex_buffers;
 826     r300->context.set_vertex_elements = r300_set_vertex_elements;
 827
 828     r300->context.create_vs_state = r300_create_vs_state;
 829     r300->context.bind_vs_state = r300_bind_vs_state;
 830     r300->context.delete_vs_state = r300_delete_vs_state;
 831 }