2 * Copyright 2008 Corbin Simpson <MostAwesomeDude@gmail.com>
3 * Copyright 2009 Marek Olšák <maraeo@gmail.com>
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * on the rights to use, copy, modify, merge, publish, distribute, sub
9 * license, and/or sell copies of the Software, and to permit persons to whom
10 * the Software is furnished to do so, subject to the following conditions:
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
20 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
21 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
22 * USE OR OTHER DEALINGS IN THE SOFTWARE. */
24 #include "draw/draw_context.h"
26 #include "util/u_framebuffer.h"
27 #include "util/u_half.h"
28 #include "util/u_math.h"
29 #include "util/u_mm.h"
30 #include "util/u_memory.h"
31 #include "util/u_pack_color.h"
32 #include "util/u_transfer.h"
34 #include "tgsi/tgsi_parse.h"
36 #include "pipe/p_config.h"
39 #include "r300_context.h"
40 #include "r300_emit.h"
42 #include "r300_screen.h"
43 #include "r300_screen_buffer.h"
44 #include "r300_state_inlines.h"
46 #include "r300_texture.h"
48 #include "r300_winsys.h"
50 /* r300_state: Functions used to intialize state context by translating
51 * Gallium state objects into semi-native r300 state objects. */
53 #define UPDATE_STATE(cso, atom) \
54 if (cso != atom.state) { \
56 r300_mark_atom_dirty(r300, &(atom)); \
59 static boolean
blend_discard_if_src_alpha_0(unsigned srcRGB
, unsigned srcA
,
60 unsigned dstRGB
, unsigned dstA
)
62 /* If the blend equation is ADD or REVERSE_SUBTRACT,
63 * SRC_ALPHA == 0, and the following state is set, the colorbuffer
64 * will not be changed.
65 * Notice that the dst factors are the src factors inverted. */
66 return (srcRGB
== PIPE_BLENDFACTOR_SRC_ALPHA
||
67 srcRGB
== PIPE_BLENDFACTOR_SRC_ALPHA_SATURATE
||
68 srcRGB
== PIPE_BLENDFACTOR_ZERO
) &&
69 (srcA
== PIPE_BLENDFACTOR_SRC_COLOR
||
70 srcA
== PIPE_BLENDFACTOR_SRC_ALPHA
||
71 srcA
== PIPE_BLENDFACTOR_SRC_ALPHA_SATURATE
||
72 srcA
== PIPE_BLENDFACTOR_ZERO
) &&
73 (dstRGB
== PIPE_BLENDFACTOR_INV_SRC_ALPHA
||
74 dstRGB
== PIPE_BLENDFACTOR_ONE
) &&
75 (dstA
== PIPE_BLENDFACTOR_INV_SRC_COLOR
||
76 dstA
== PIPE_BLENDFACTOR_INV_SRC_ALPHA
||
77 dstA
== PIPE_BLENDFACTOR_ONE
);
80 static boolean
blend_discard_if_src_alpha_1(unsigned srcRGB
, unsigned srcA
,
81 unsigned dstRGB
, unsigned dstA
)
83 /* If the blend equation is ADD or REVERSE_SUBTRACT,
84 * SRC_ALPHA == 1, and the following state is set, the colorbuffer
85 * will not be changed.
86 * Notice that the dst factors are the src factors inverted. */
87 return (srcRGB
== PIPE_BLENDFACTOR_INV_SRC_ALPHA
||
88 srcRGB
== PIPE_BLENDFACTOR_ZERO
) &&
89 (srcA
== PIPE_BLENDFACTOR_INV_SRC_COLOR
||
90 srcA
== PIPE_BLENDFACTOR_INV_SRC_ALPHA
||
91 srcA
== PIPE_BLENDFACTOR_ZERO
) &&
92 (dstRGB
== PIPE_BLENDFACTOR_SRC_ALPHA
||
93 dstRGB
== PIPE_BLENDFACTOR_ONE
) &&
94 (dstA
== PIPE_BLENDFACTOR_SRC_COLOR
||
95 dstA
== PIPE_BLENDFACTOR_SRC_ALPHA
||
96 dstA
== PIPE_BLENDFACTOR_ONE
);
99 static boolean
blend_discard_if_src_color_0(unsigned srcRGB
, unsigned srcA
,
100 unsigned dstRGB
, unsigned dstA
)
102 /* If the blend equation is ADD or REVERSE_SUBTRACT,
103 * SRC_COLOR == (0,0,0), and the following state is set, the colorbuffer
104 * will not be changed.
105 * Notice that the dst factors are the src factors inverted. */
106 return (srcRGB
== PIPE_BLENDFACTOR_SRC_COLOR
||
107 srcRGB
== PIPE_BLENDFACTOR_ZERO
) &&
108 (srcA
== PIPE_BLENDFACTOR_ZERO
) &&
109 (dstRGB
== PIPE_BLENDFACTOR_INV_SRC_COLOR
||
110 dstRGB
== PIPE_BLENDFACTOR_ONE
) &&
111 (dstA
== PIPE_BLENDFACTOR_ONE
);
114 static boolean
blend_discard_if_src_color_1(unsigned srcRGB
, unsigned srcA
,
115 unsigned dstRGB
, unsigned dstA
)
117 /* If the blend equation is ADD or REVERSE_SUBTRACT,
118 * SRC_COLOR == (1,1,1), and the following state is set, the colorbuffer
119 * will not be changed.
120 * Notice that the dst factors are the src factors inverted. */
121 return (srcRGB
== PIPE_BLENDFACTOR_INV_SRC_COLOR
||
122 srcRGB
== PIPE_BLENDFACTOR_ZERO
) &&
123 (srcA
== PIPE_BLENDFACTOR_ZERO
) &&
124 (dstRGB
== PIPE_BLENDFACTOR_SRC_COLOR
||
125 dstRGB
== PIPE_BLENDFACTOR_ONE
) &&
126 (dstA
== PIPE_BLENDFACTOR_ONE
);
129 static boolean
blend_discard_if_src_alpha_color_0(unsigned srcRGB
, unsigned srcA
,
130 unsigned dstRGB
, unsigned dstA
)
132 /* If the blend equation is ADD or REVERSE_SUBTRACT,
133 * SRC_ALPHA_COLOR == (0,0,0,0), and the following state is set,
134 * the colorbuffer will not be changed.
135 * Notice that the dst factors are the src factors inverted. */
136 return (srcRGB
== PIPE_BLENDFACTOR_SRC_COLOR
||
137 srcRGB
== PIPE_BLENDFACTOR_SRC_ALPHA
||
138 srcRGB
== PIPE_BLENDFACTOR_SRC_ALPHA_SATURATE
||
139 srcRGB
== PIPE_BLENDFACTOR_ZERO
) &&
140 (srcA
== PIPE_BLENDFACTOR_SRC_COLOR
||
141 srcA
== PIPE_BLENDFACTOR_SRC_ALPHA
||
142 srcA
== PIPE_BLENDFACTOR_SRC_ALPHA_SATURATE
||
143 srcA
== PIPE_BLENDFACTOR_ZERO
) &&
144 (dstRGB
== PIPE_BLENDFACTOR_INV_SRC_COLOR
||
145 dstRGB
== PIPE_BLENDFACTOR_INV_SRC_ALPHA
||
146 dstRGB
== PIPE_BLENDFACTOR_ONE
) &&
147 (dstA
== PIPE_BLENDFACTOR_INV_SRC_COLOR
||
148 dstA
== PIPE_BLENDFACTOR_INV_SRC_ALPHA
||
149 dstA
== PIPE_BLENDFACTOR_ONE
);
152 static boolean
blend_discard_if_src_alpha_color_1(unsigned srcRGB
, unsigned srcA
,
153 unsigned dstRGB
, unsigned dstA
)
155 /* If the blend equation is ADD or REVERSE_SUBTRACT,
156 * SRC_ALPHA_COLOR == (1,1,1,1), and the following state is set,
157 * the colorbuffer will not be changed.
158 * Notice that the dst factors are the src factors inverted. */
159 return (srcRGB
== PIPE_BLENDFACTOR_INV_SRC_COLOR
||
160 srcRGB
== PIPE_BLENDFACTOR_INV_SRC_ALPHA
||
161 srcRGB
== PIPE_BLENDFACTOR_ZERO
) &&
162 (srcA
== PIPE_BLENDFACTOR_INV_SRC_COLOR
||
163 srcA
== PIPE_BLENDFACTOR_INV_SRC_ALPHA
||
164 srcA
== PIPE_BLENDFACTOR_ZERO
) &&
165 (dstRGB
== PIPE_BLENDFACTOR_SRC_COLOR
||
166 dstRGB
== PIPE_BLENDFACTOR_SRC_ALPHA
||
167 dstRGB
== PIPE_BLENDFACTOR_ONE
) &&
168 (dstA
== PIPE_BLENDFACTOR_SRC_COLOR
||
169 dstA
== PIPE_BLENDFACTOR_SRC_ALPHA
||
170 dstA
== PIPE_BLENDFACTOR_ONE
);
173 static unsigned bgra_cmask(unsigned mask
)
175 /* Gallium uses RGBA color ordering while R300 expects BGRA. */
177 return ((mask
& PIPE_MASK_R
) << 2) |
178 ((mask
& PIPE_MASK_B
) >> 2) |
179 (mask
& (PIPE_MASK_G
| PIPE_MASK_A
));
182 /* Create a new blend state based on the CSO blend state.
184 * This encompasses alpha blending, logic/raster ops, and blend dithering. */
185 static void* r300_create_blend_state(struct pipe_context
* pipe
,
186 const struct pipe_blend_state
* state
)
188 struct r300_screen
* r300screen
= r300_screen(pipe
->screen
);
189 struct r300_blend_state
* blend
= CALLOC_STRUCT(r300_blend_state
);
190 uint32_t blend_control
= 0; /* R300_RB3D_CBLEND: 0x4e04 */
191 uint32_t alpha_blend_control
= 0; /* R300_RB3D_ABLEND: 0x4e08 */
192 uint32_t color_channel_mask
= 0; /* R300_RB3D_COLOR_CHANNEL_MASK: 0x4e0c */
193 uint32_t rop
= 0; /* R300_RB3D_ROPCNTL: 0x4e18 */
194 uint32_t dither
= 0; /* R300_RB3D_DITHER_CTL: 0x4e50 */
195 boolean clamp
= TRUE
;
198 if (state
->rt
[0].blend_enable
)
200 unsigned eqRGB
= state
->rt
[0].rgb_func
;
201 unsigned srcRGB
= state
->rt
[0].rgb_src_factor
;
202 unsigned dstRGB
= state
->rt
[0].rgb_dst_factor
;
204 unsigned eqA
= state
->rt
[0].alpha_func
;
205 unsigned srcA
= state
->rt
[0].alpha_src_factor
;
206 unsigned dstA
= state
->rt
[0].alpha_dst_factor
;
208 /* despite the name, ALPHA_BLEND_ENABLE has nothing to do with alpha,
209 * this is just the crappy D3D naming */
210 blend_control
= R300_ALPHA_BLEND_ENABLE
|
211 r300_translate_blend_function(eqRGB
, clamp
) |
212 ( r300_translate_blend_factor(srcRGB
) << R300_SRC_BLEND_SHIFT
) |
213 ( r300_translate_blend_factor(dstRGB
) << R300_DST_BLEND_SHIFT
);
215 /* Optimization: some operations do not require the destination color.
217 * When SRC_ALPHA_SATURATE is used, colorbuffer reads must be enabled,
218 * otherwise blending gives incorrect results. It seems to be
220 if (eqRGB
== PIPE_BLEND_MIN
|| eqA
== PIPE_BLEND_MIN
||
221 eqRGB
== PIPE_BLEND_MAX
|| eqA
== PIPE_BLEND_MAX
||
222 dstRGB
!= PIPE_BLENDFACTOR_ZERO
||
223 dstA
!= PIPE_BLENDFACTOR_ZERO
||
224 srcRGB
== PIPE_BLENDFACTOR_DST_COLOR
||
225 srcRGB
== PIPE_BLENDFACTOR_DST_ALPHA
||
226 srcRGB
== PIPE_BLENDFACTOR_INV_DST_COLOR
||
227 srcRGB
== PIPE_BLENDFACTOR_INV_DST_ALPHA
||
228 srcA
== PIPE_BLENDFACTOR_DST_COLOR
||
229 srcA
== PIPE_BLENDFACTOR_DST_ALPHA
||
230 srcA
== PIPE_BLENDFACTOR_INV_DST_COLOR
||
231 srcA
== PIPE_BLENDFACTOR_INV_DST_ALPHA
||
232 srcRGB
== PIPE_BLENDFACTOR_SRC_ALPHA_SATURATE
) {
233 /* Enable reading from the colorbuffer. */
234 blend_control
|= R300_READ_ENABLE
;
236 if (r300screen
->caps
.is_r500
) {
237 /* Optimization: Depending on incoming pixels, we can
238 * conditionally disable the reading in hardware... */
239 if (eqRGB
!= PIPE_BLEND_MIN
&& eqA
!= PIPE_BLEND_MIN
&&
240 eqRGB
!= PIPE_BLEND_MAX
&& eqA
!= PIPE_BLEND_MAX
) {
241 /* Disable reading if SRC_ALPHA == 0. */
242 if ((dstRGB
== PIPE_BLENDFACTOR_SRC_ALPHA
||
243 dstRGB
== PIPE_BLENDFACTOR_ZERO
) &&
244 (dstA
== PIPE_BLENDFACTOR_SRC_COLOR
||
245 dstA
== PIPE_BLENDFACTOR_SRC_ALPHA
||
246 dstA
== PIPE_BLENDFACTOR_ZERO
)) {
247 blend_control
|= R500_SRC_ALPHA_0_NO_READ
;
250 /* Disable reading if SRC_ALPHA == 1. */
251 if ((dstRGB
== PIPE_BLENDFACTOR_INV_SRC_ALPHA
||
252 dstRGB
== PIPE_BLENDFACTOR_ZERO
) &&
253 (dstA
== PIPE_BLENDFACTOR_INV_SRC_COLOR
||
254 dstA
== PIPE_BLENDFACTOR_INV_SRC_ALPHA
||
255 dstA
== PIPE_BLENDFACTOR_ZERO
)) {
256 blend_control
|= R500_SRC_ALPHA_1_NO_READ
;
262 /* Optimization: discard pixels which don't change the colorbuffer.
264 * The code below is non-trivial and some math is involved.
266 * Discarding pixels must be disabled when FP16 AA is enabled.
267 * This is a hardware bug. Also, this implementation wouldn't work
268 * with FP blending enabled and equation clamping disabled.
270 * Equations other than ADD are rarely used and therefore won't be
273 (eqRGB
== PIPE_BLEND_ADD
|| eqRGB
== PIPE_BLEND_REVERSE_SUBTRACT
) &&
274 (eqA
== PIPE_BLEND_ADD
|| eqA
== PIPE_BLEND_REVERSE_SUBTRACT
)) {
276 * REVERSE_SUBTRACT: Y-X
279 * If X = src*srcFactor = 0 and Y = dst*dstFactor = 1,
280 * then CB will not be changed.
282 * Given the srcFactor and dstFactor variables, we can derive
283 * what src and dst should be equal to and discard appropriate
286 if (blend_discard_if_src_alpha_0(srcRGB
, srcA
, dstRGB
, dstA
)) {
287 blend_control
|= R300_DISCARD_SRC_PIXELS_SRC_ALPHA_0
;
288 } else if (blend_discard_if_src_alpha_1(srcRGB
, srcA
,
290 blend_control
|= R300_DISCARD_SRC_PIXELS_SRC_ALPHA_1
;
291 } else if (blend_discard_if_src_color_0(srcRGB
, srcA
,
293 blend_control
|= R300_DISCARD_SRC_PIXELS_SRC_COLOR_0
;
294 } else if (blend_discard_if_src_color_1(srcRGB
, srcA
,
296 blend_control
|= R300_DISCARD_SRC_PIXELS_SRC_COLOR_1
;
297 } else if (blend_discard_if_src_alpha_color_0(srcRGB
, srcA
,
300 R300_DISCARD_SRC_PIXELS_SRC_ALPHA_COLOR_0
;
301 } else if (blend_discard_if_src_alpha_color_1(srcRGB
, srcA
,
304 R300_DISCARD_SRC_PIXELS_SRC_ALPHA_COLOR_1
;
309 if (srcA
!= srcRGB
|| dstA
!= dstRGB
|| eqA
!= eqRGB
) {
310 blend_control
|= R300_SEPARATE_ALPHA_ENABLE
;
311 alpha_blend_control
=
312 r300_translate_blend_function(eqA
, clamp
) |
313 (r300_translate_blend_factor(srcA
) << R300_SRC_BLEND_SHIFT
) |
314 (r300_translate_blend_factor(dstA
) << R300_DST_BLEND_SHIFT
);
318 /* PIPE_LOGICOP_* don't need to be translated, fortunately. */
319 if (state
->logicop_enable
) {
320 rop
= R300_RB3D_ROPCNTL_ROP_ENABLE
|
321 (state
->logicop_func
) << R300_RB3D_ROPCNTL_ROP_SHIFT
;
324 /* Color channel masks for all MRTs. */
325 color_channel_mask
= bgra_cmask(state
->rt
[0].colormask
);
326 if (r300screen
->caps
.is_r500
&& state
->independent_blend_enable
) {
327 if (state
->rt
[1].blend_enable
) {
328 color_channel_mask
|= bgra_cmask(state
->rt
[1].colormask
) << 4;
330 if (state
->rt
[2].blend_enable
) {
331 color_channel_mask
|= bgra_cmask(state
->rt
[2].colormask
) << 8;
333 if (state
->rt
[3].blend_enable
) {
334 color_channel_mask
|= bgra_cmask(state
->rt
[3].colormask
) << 12;
338 /* Neither fglrx nor classic r300 ever set this, regardless of dithering
339 * state. Since it's an optional implementation detail, we can leave it
340 * out and never dither.
342 * This could be revisited if we ever get quality or conformance hints.
345 dither = R300_RB3D_DITHER_CTL_DITHER_MODE_LUT |
346 R300_RB3D_DITHER_CTL_ALPHA_DITHER_MODE_LUT;
350 /* Build a command buffer. */
351 BEGIN_CB(blend
->cb
, 8);
352 OUT_CB_REG(R300_RB3D_ROPCNTL
, rop
);
353 OUT_CB_REG_SEQ(R300_RB3D_CBLEND
, 3);
354 OUT_CB(blend_control
);
355 OUT_CB(alpha_blend_control
);
356 OUT_CB(color_channel_mask
);
357 OUT_CB_REG(R300_RB3D_DITHER_CTL
, dither
);
360 /* The same as above, but with no colorbuffer reads and writes. */
361 BEGIN_CB(blend
->cb_no_readwrite
, 8);
362 OUT_CB_REG(R300_RB3D_ROPCNTL
, rop
);
363 OUT_CB_REG_SEQ(R300_RB3D_CBLEND
, 3);
367 OUT_CB_REG(R300_RB3D_DITHER_CTL
, dither
);
373 /* Bind blend state. */
374 static void r300_bind_blend_state(struct pipe_context
* pipe
,
377 struct r300_context
* r300
= r300_context(pipe
);
379 UPDATE_STATE(state
, r300
->blend_state
);
382 /* Free blend state. */
383 static void r300_delete_blend_state(struct pipe_context
* pipe
,
389 /* Convert float to 10bit integer */
390 static unsigned float_to_fixed10(float f
)
392 return CLAMP((unsigned)(f
* 1023.9f
), 0, 1023);
396 * Setup both R300 and R500 registers, figure out later which one to write. */
397 static void r300_set_blend_color(struct pipe_context
* pipe
,
398 const struct pipe_blend_color
* color
)
400 struct r300_context
* r300
= r300_context(pipe
);
401 struct pipe_framebuffer_state
*fb
= r300
->fb_state
.state
;
402 struct r300_blend_color_state
*state
=
403 (struct r300_blend_color_state
*)r300
->blend_color_state
.state
;
404 struct pipe_blend_color c
;
405 enum pipe_format format
= fb
->nr_cbufs
? fb
->cbufs
[0]->format
: 0;
408 state
->state
= *color
; /* Save it, so that we can reuse it in set_fb_state */
411 /* The blend color is dependent on the colorbuffer format. */
414 case PIPE_FORMAT_R8_UNORM
:
415 case PIPE_FORMAT_L8_UNORM
:
416 case PIPE_FORMAT_I8_UNORM
:
417 c
.color
[1] = c
.color
[0];
420 case PIPE_FORMAT_A8_UNORM
:
421 c
.color
[1] = c
.color
[3];
424 case PIPE_FORMAT_R8G8_UNORM
:
425 c
.color
[2] = c
.color
[1];
428 case PIPE_FORMAT_L8A8_UNORM
:
429 c
.color
[2] = c
.color
[3];
436 if (r300
->screen
->caps
.is_r500
) {
437 BEGIN_CB(state
->cb
, 3);
438 OUT_CB_REG_SEQ(R500_RB3D_CONSTANT_COLOR_AR
, 2);
441 case PIPE_FORMAT_R16G16B16A16_FLOAT
:
442 OUT_CB(util_float_to_half(c
.color
[2]) |
443 (util_float_to_half(c
.color
[3]) << 16));
444 OUT_CB(util_float_to_half(c
.color
[0]) |
445 (util_float_to_half(c
.color
[1]) << 16));
449 OUT_CB(float_to_fixed10(c
.color
[0]) |
450 (float_to_fixed10(c
.color
[3]) << 16));
451 OUT_CB(float_to_fixed10(c
.color
[2]) |
452 (float_to_fixed10(c
.color
[1]) << 16));
458 util_pack_color(c
.color
, PIPE_FORMAT_B8G8R8A8_UNORM
, &uc
);
460 BEGIN_CB(state
->cb
, 2);
461 OUT_CB_REG(R300_RB3D_BLEND_COLOR
, uc
.ui
);
465 r300_mark_atom_dirty(r300
, &r300
->blend_color_state
);
468 static void r300_set_clip_state(struct pipe_context
* pipe
,
469 const struct pipe_clip_state
* state
)
471 struct r300_context
* r300
= r300_context(pipe
);
472 struct r300_clip_state
*clip
=
473 (struct r300_clip_state
*)r300
->clip_state
.state
;
478 if (r300
->screen
->caps
.has_tcl
) {
479 r300
->clip_state
.size
= 2 + !!state
->nr
* 3 + state
->nr
* 4;
481 BEGIN_CB(clip
->cb
, r300
->clip_state
.size
);
483 OUT_CB_REG(R300_VAP_PVS_VECTOR_INDX_REG
,
484 (r300
->screen
->caps
.is_r500
?
485 R500_PVS_UCP_START
: R300_PVS_UCP_START
));
486 OUT_CB_ONE_REG(R300_VAP_PVS_UPLOAD_DATA
, state
->nr
* 4);
487 OUT_CB_TABLE(state
->ucp
, state
->nr
* 4);
489 OUT_CB_REG(R300_VAP_CLIP_CNTL
, ((1 << state
->nr
) - 1) |
490 R300_PS_UCP_MODE_CLIP_AS_TRIFAN
);
493 r300_mark_atom_dirty(r300
, &r300
->clip_state
);
495 draw_set_clip_state(r300
->draw
, state
);
500 r300_set_sample_mask(struct pipe_context
*pipe
,
501 unsigned sample_mask
)
506 /* Create a new depth, stencil, and alpha state based on the CSO dsa state.
508 * This contains the depth buffer, stencil buffer, alpha test, and such.
509 * On the Radeon, depth and stencil buffer setup are intertwined, which is
510 * the reason for some of the strange-looking assignments across registers. */
512 r300_create_dsa_state(struct pipe_context
* pipe
,
513 const struct pipe_depth_stencil_alpha_state
* state
)
515 struct r300_capabilities
*caps
= &r300_screen(pipe
->screen
)->caps
;
516 struct r300_dsa_state
* dsa
= CALLOC_STRUCT(r300_dsa_state
);
521 /* Depth test setup. - separate write mask depth for decomp flush */
522 if (state
->depth
.writemask
) {
523 dsa
->z_buffer_control
|= R300_Z_WRITE_ENABLE
;
526 if (state
->depth
.enabled
) {
527 dsa
->z_buffer_control
|= R300_Z_ENABLE
;
529 dsa
->z_stencil_control
|=
530 (r300_translate_depth_stencil_function(state
->depth
.func
) <<
534 /* Stencil buffer setup. */
535 if (state
->stencil
[0].enabled
) {
536 dsa
->z_buffer_control
|= R300_STENCIL_ENABLE
;
537 dsa
->z_stencil_control
|=
538 (r300_translate_depth_stencil_function(state
->stencil
[0].func
) <<
539 R300_S_FRONT_FUNC_SHIFT
) |
540 (r300_translate_stencil_op(state
->stencil
[0].fail_op
) <<
541 R300_S_FRONT_SFAIL_OP_SHIFT
) |
542 (r300_translate_stencil_op(state
->stencil
[0].zpass_op
) <<
543 R300_S_FRONT_ZPASS_OP_SHIFT
) |
544 (r300_translate_stencil_op(state
->stencil
[0].zfail_op
) <<
545 R300_S_FRONT_ZFAIL_OP_SHIFT
);
547 dsa
->stencil_ref_mask
=
548 (state
->stencil
[0].valuemask
<< R300_STENCILMASK_SHIFT
) |
549 (state
->stencil
[0].writemask
<< R300_STENCILWRITEMASK_SHIFT
);
551 if (state
->stencil
[1].enabled
) {
552 dsa
->two_sided
= TRUE
;
554 dsa
->z_buffer_control
|= R300_STENCIL_FRONT_BACK
;
555 dsa
->z_stencil_control
|=
556 (r300_translate_depth_stencil_function(state
->stencil
[1].func
) <<
557 R300_S_BACK_FUNC_SHIFT
) |
558 (r300_translate_stencil_op(state
->stencil
[1].fail_op
) <<
559 R300_S_BACK_SFAIL_OP_SHIFT
) |
560 (r300_translate_stencil_op(state
->stencil
[1].zpass_op
) <<
561 R300_S_BACK_ZPASS_OP_SHIFT
) |
562 (r300_translate_stencil_op(state
->stencil
[1].zfail_op
) <<
563 R300_S_BACK_ZFAIL_OP_SHIFT
);
565 dsa
->stencil_ref_bf
=
566 (state
->stencil
[1].valuemask
<< R300_STENCILMASK_SHIFT
) |
567 (state
->stencil
[1].writemask
<< R300_STENCILWRITEMASK_SHIFT
);
570 dsa
->z_buffer_control
|= R500_STENCIL_REFMASK_FRONT_BACK
;
572 dsa
->two_sided_stencil_ref
=
573 (state
->stencil
[0].valuemask
!= state
->stencil
[1].valuemask
||
574 state
->stencil
[0].writemask
!= state
->stencil
[1].writemask
);
579 /* Alpha test setup. */
580 if (state
->alpha
.enabled
) {
581 dsa
->alpha_function
=
582 r300_translate_alpha_function(state
->alpha
.func
) |
583 R300_FG_ALPHA_FUNC_ENABLE
;
585 dsa
->alpha_function
|= float_to_ubyte(state
->alpha
.ref_value
);
586 dsa
->alpha_value
= util_float_to_half(state
->alpha
.ref_value
);
589 dsa
->alpha_function_fp16
= dsa
->alpha_function
|
590 R500_FG_ALPHA_FUNC_FP16_ENABLE
;
591 dsa
->alpha_function
|= R500_FG_ALPHA_FUNC_8BIT
;
595 BEGIN_CB(&dsa
->cb_begin
, 10);
596 OUT_CB_REG(R300_FG_ALPHA_FUNC
, dsa
->alpha_function
);
597 OUT_CB_REG_SEQ(R300_ZB_CNTL
, 3);
598 OUT_CB(dsa
->z_buffer_control
);
599 OUT_CB(dsa
->z_stencil_control
);
600 OUT_CB(dsa
->stencil_ref_mask
);
601 OUT_CB_REG(R500_ZB_STENCILREFMASK_BF
, dsa
->stencil_ref_bf
);
602 OUT_CB_REG(R500_FG_ALPHA_VALUE
, dsa
->alpha_value
);
605 BEGIN_CB(&dsa
->cb_begin_fp16
, 10);
606 OUT_CB_REG(R300_FG_ALPHA_FUNC
, dsa
->alpha_function_fp16
);
607 OUT_CB_REG_SEQ(R300_ZB_CNTL
, 3);
608 OUT_CB(dsa
->z_buffer_control
);
609 OUT_CB(dsa
->z_stencil_control
);
610 OUT_CB(dsa
->stencil_ref_mask
);
611 OUT_CB_REG(R500_ZB_STENCILREFMASK_BF
, dsa
->stencil_ref_bf
);
612 OUT_CB_REG(R500_FG_ALPHA_VALUE
, dsa
->alpha_value
);
615 BEGIN_CB(dsa
->cb_zb_no_readwrite
, 10);
616 OUT_CB_REG(R300_FG_ALPHA_FUNC
, dsa
->alpha_function
);
617 OUT_CB_REG_SEQ(R300_ZB_CNTL
, 3);
621 OUT_CB_REG(R500_ZB_STENCILREFMASK_BF
, 0);
622 OUT_CB_REG(R500_FG_ALPHA_VALUE
, dsa
->alpha_value
);
625 BEGIN_CB(dsa
->cb_fp16_zb_no_readwrite
, 10);
626 OUT_CB_REG(R300_FG_ALPHA_FUNC
, dsa
->alpha_function_fp16
);
627 OUT_CB_REG_SEQ(R300_ZB_CNTL
, 3);
631 OUT_CB_REG(R500_ZB_STENCILREFMASK_BF
, 0);
632 OUT_CB_REG(R500_FG_ALPHA_VALUE
, dsa
->alpha_value
);
638 static void r300_dsa_inject_stencilref(struct r300_context
*r300
)
640 struct r300_dsa_state
*dsa
=
641 (struct r300_dsa_state
*)r300
->dsa_state
.state
;
646 dsa
->stencil_ref_mask
=
647 (dsa
->stencil_ref_mask
& ~R300_STENCILREF_MASK
) |
648 r300
->stencil_ref
.ref_value
[0];
649 dsa
->stencil_ref_bf
=
650 (dsa
->stencil_ref_bf
& ~R300_STENCILREF_MASK
) |
651 r300
->stencil_ref
.ref_value
[1];
654 /* Bind DSA state. */
655 static void r300_bind_dsa_state(struct pipe_context
* pipe
,
658 struct r300_context
* r300
= r300_context(pipe
);
664 UPDATE_STATE(state
, r300
->dsa_state
);
666 r300_mark_atom_dirty(r300
, &r300
->hyperz_state
); /* Will be updated before the emission. */
667 r300_dsa_inject_stencilref(r300
);
670 /* Free DSA state. */
671 static void r300_delete_dsa_state(struct pipe_context
* pipe
,
677 static void r300_set_stencil_ref(struct pipe_context
* pipe
,
678 const struct pipe_stencil_ref
* sr
)
680 struct r300_context
* r300
= r300_context(pipe
);
682 r300
->stencil_ref
= *sr
;
684 r300_dsa_inject_stencilref(r300
);
685 r300_mark_atom_dirty(r300
, &r300
->dsa_state
);
688 static void r300_tex_set_tiling_flags(struct r300_context
*r300
,
689 struct r300_resource
*tex
,
692 /* Check if the macrotile flag needs to be changed.
693 * Skip changing the flags otherwise. */
694 if (tex
->tex
.macrotile
[tex
->surface_level
] !=
695 tex
->tex
.macrotile
[level
]) {
696 r300
->rws
->buffer_set_tiling(tex
->buf
, r300
->cs
,
697 tex
->tex
.microtile
, tex
->tex
.macrotile
[level
],
698 tex
->tex
.stride_in_bytes
[0]);
700 tex
->surface_level
= level
;
704 /* This switcheroo is needed just because of goddamned MACRO_SWITCH. */
705 static void r300_fb_set_tiling_flags(struct r300_context
*r300
,
706 const struct pipe_framebuffer_state
*state
)
710 /* Set tiling flags for new surfaces. */
711 for (i
= 0; i
< state
->nr_cbufs
; i
++) {
712 r300_tex_set_tiling_flags(r300
,
713 r300_resource(state
->cbufs
[i
]->texture
),
714 state
->cbufs
[i
]->u
.tex
.level
);
717 r300_tex_set_tiling_flags(r300
,
718 r300_resource(state
->zsbuf
->texture
),
719 state
->zsbuf
->u
.tex
.level
);
723 static void r300_print_fb_surf_info(struct pipe_surface
*surf
, unsigned index
,
726 struct pipe_resource
*tex
= surf
->texture
;
727 struct r300_resource
*rtex
= r300_resource(tex
);
730 "r300: %s[%i] Dim: %ix%i, Firstlayer: %i, "
731 "Lastlayer: %i, Level: %i, Format: %s\n"
733 "r300: TEX: Macro: %s, Micro: %s, Pitch: %i, "
734 "Dim: %ix%ix%i, LastLevel: %i, Format: %s\n",
736 binding
, index
, surf
->width
, surf
->height
,
737 surf
->u
.tex
.first_layer
, surf
->u
.tex
.last_layer
, surf
->u
.tex
.level
,
738 util_format_short_name(surf
->format
),
740 rtex
->tex
.macrotile
[0] ? "YES" : " NO",
741 rtex
->tex
.microtile
? "YES" : " NO",
742 rtex
->tex
.stride_in_pixels
[0],
743 tex
->width0
, tex
->height0
, tex
->depth0
,
744 tex
->last_level
, util_format_short_name(tex
->format
));
747 void r300_mark_fb_state_dirty(struct r300_context
*r300
,
748 enum r300_fb_state_change change
)
750 struct pipe_framebuffer_state
*state
= r300
->fb_state
.state
;
751 boolean can_hyperz
= r300
->rws
->get_value(r300
->rws
, R300_CAN_HYPERZ
);
753 r300_mark_atom_dirty(r300
, &r300
->gpu_flush
);
754 r300_mark_atom_dirty(r300
, &r300
->fb_state
);
756 /* What is marked as dirty depends on the enum r300_fb_state_change. */
757 if (change
== R300_CHANGED_FB_STATE
) {
758 r300_mark_atom_dirty(r300
, &r300
->aa_state
);
759 r300_mark_atom_dirty(r300
, &r300
->dsa_state
); /* for AlphaRef */
760 r300_set_blend_color(&r300
->context
, r300
->blend_color_state
.state
);
763 if (change
== R300_CHANGED_FB_STATE
||
764 change
== R300_CHANGED_HYPERZ_FLAG
) {
765 r300_mark_atom_dirty(r300
, &r300
->hyperz_state
);
768 if (change
== R300_CHANGED_FB_STATE
||
769 change
== R300_CHANGED_MULTIWRITE
) {
770 r300_mark_atom_dirty(r300
, &r300
->fb_state_pipelined
);
773 /* Now compute the fb_state atom size. */
774 r300
->fb_state
.size
= 2 + (8 * state
->nr_cbufs
);
776 if (r300
->cbzb_clear
)
777 r300
->fb_state
.size
+= 10;
778 else if (state
->zsbuf
) {
779 r300
->fb_state
.size
+= 10;
781 r300
->fb_state
.size
+= 8;
784 /* The size of the rest of atoms stays the same. */
788 r300_set_framebuffer_state(struct pipe_context
* pipe
,
789 const struct pipe_framebuffer_state
* state
)
791 struct r300_context
* r300
= r300_context(pipe
);
792 struct r300_aa_state
*aa
= (struct r300_aa_state
*)r300
->aa_state
.state
;
793 struct pipe_framebuffer_state
*old_state
= r300
->fb_state
.state
;
794 unsigned max_width
, max_height
, i
;
795 uint32_t zbuffer_bpp
= 0;
797 if (r300
->screen
->caps
.is_r500
) {
798 max_width
= max_height
= 4096;
799 } else if (r300
->screen
->caps
.is_r400
) {
800 max_width
= max_height
= 4021;
802 max_width
= max_height
= 2560;
805 if (state
->width
> max_width
|| state
->height
> max_height
) {
806 fprintf(stderr
, "r300: Implementation error: Render targets are too "
807 "big in %s, refusing to bind framebuffer state!\n", __FUNCTION__
);
811 if (old_state
->zsbuf
&& r300
->zmask_in_use
&& !r300
->hyperz_locked
) {
812 /* There is a zmask in use, what are we gonna do? */
814 if (!pipe_surface_equal(old_state
->zsbuf
, state
->zsbuf
)) {
815 /* Decompress the currently bound zbuffer before we bind another one. */
816 r300_decompress_zmask(r300
);
817 r300
->hiz_in_use
= FALSE
;
820 /* We don't bind another zbuffer, so lock the current one. */
821 r300
->hyperz_locked
= TRUE
;
822 pipe_surface_reference(&r300
->locked_zbuffer
, old_state
->zsbuf
);
824 } else if (r300
->hyperz_locked
&& r300
->locked_zbuffer
) {
825 /* We have a locked zbuffer now, what are we gonna do? */
827 if (!pipe_surface_equal(r300
->locked_zbuffer
, state
->zsbuf
)) {
828 /* We are binding some other zbuffer, so decompress the locked one,
829 * it gets unlocked automatically. */
830 r300_decompress_zmask_locked_unsafe(r300
);
831 r300
->hiz_in_use
= FALSE
;
833 /* We are binding the locked zbuffer again, so unlock it. */
834 r300
->hyperz_locked
= FALSE
;
839 /* If nr_cbufs is changed from zero to non-zero or vice versa... */
840 if (!!old_state
->nr_cbufs
!= !!state
->nr_cbufs
) {
841 r300_mark_atom_dirty(r300
, &r300
->blend_state
);
843 /* If zsbuf is set from NULL to non-NULL or vice versa.. */
844 if (!!old_state
->zsbuf
!= !!state
->zsbuf
) {
845 r300_mark_atom_dirty(r300
, &r300
->dsa_state
);
848 /* The tiling flags are dependent on the surface miplevel, unfortunately. */
849 r300_fb_set_tiling_flags(r300
, state
);
851 util_copy_framebuffer_state(r300
->fb_state
.state
, state
);
853 if (!r300
->hyperz_locked
) {
854 pipe_surface_reference(&r300
->locked_zbuffer
, NULL
);
857 r300_mark_fb_state_dirty(r300
, R300_CHANGED_FB_STATE
);
860 switch (util_format_get_blocksize(state
->zsbuf
->texture
->format
)) {
869 /* Polygon offset depends on the zbuffer bit depth. */
870 if (r300
->zbuffer_bpp
!= zbuffer_bpp
) {
871 r300
->zbuffer_bpp
= zbuffer_bpp
;
873 if (r300
->polygon_offset_enabled
)
874 r300_mark_atom_dirty(r300
, &r300
->rs_state
);
878 /* Set up AA config. */
879 if (state
->nr_cbufs
&& state
->cbufs
[0]->texture
->nr_samples
> 1) {
880 aa
->aa_config
= R300_GB_AA_CONFIG_AA_ENABLE
;
882 switch (state
->cbufs
[0]->texture
->nr_samples
) {
884 aa
->aa_config
|= R300_GB_AA_CONFIG_NUM_AA_SUBSAMPLES_2
;
887 aa
->aa_config
|= R300_GB_AA_CONFIG_NUM_AA_SUBSAMPLES_3
;
890 aa
->aa_config
|= R300_GB_AA_CONFIG_NUM_AA_SUBSAMPLES_4
;
893 aa
->aa_config
|= R300_GB_AA_CONFIG_NUM_AA_SUBSAMPLES_6
;
900 if (DBG_ON(r300
, DBG_FB
)) {
901 fprintf(stderr
, "r300: set_framebuffer_state:\n");
902 for (i
= 0; i
< state
->nr_cbufs
; i
++) {
903 r300_print_fb_surf_info(state
->cbufs
[i
], i
, "CB");
906 r300_print_fb_surf_info(state
->zsbuf
, 0, "ZB");
911 /* Create fragment shader state. */
912 static void* r300_create_fs_state(struct pipe_context
* pipe
,
913 const struct pipe_shader_state
* shader
)
915 struct r300_fragment_shader
* fs
= NULL
;
917 fs
= (struct r300_fragment_shader
*)CALLOC_STRUCT(r300_fragment_shader
);
919 /* Copy state directly into shader. */
921 fs
->state
.tokens
= tgsi_dup_tokens(shader
->tokens
);
926 void r300_mark_fs_code_dirty(struct r300_context
*r300
)
928 struct r300_fragment_shader
* fs
= r300_fs(r300
);
930 r300_mark_atom_dirty(r300
, &r300
->fs
);
931 r300_mark_atom_dirty(r300
, &r300
->fs_rc_constant_state
);
932 r300_mark_atom_dirty(r300
, &r300
->fs_constants
);
933 r300
->fs
.size
= fs
->shader
->cb_code_size
;
935 if (r300
->screen
->caps
.is_r500
) {
936 r300
->fs_rc_constant_state
.size
= fs
->shader
->rc_state_count
* 7;
937 r300
->fs_constants
.size
= fs
->shader
->externals_count
* 4 + 3;
939 r300
->fs_rc_constant_state
.size
= fs
->shader
->rc_state_count
* 5;
940 r300
->fs_constants
.size
= fs
->shader
->externals_count
* 4 + 1;
943 ((struct r300_constant_buffer
*)r300
->fs_constants
.state
)->remap_table
=
944 fs
->shader
->code
.constants_remap_table
;
947 /* Bind fragment shader state. */
948 static void r300_bind_fs_state(struct pipe_context
* pipe
, void* shader
)
950 struct r300_context
* r300
= r300_context(pipe
);
951 struct r300_fragment_shader
* fs
= (struct r300_fragment_shader
*)shader
;
952 struct pipe_framebuffer_state
*fb
= r300
->fb_state
.state
;
953 boolean last_multi_write
;
956 r300
->fs
.state
= NULL
;
960 last_multi_write
= r300_fragment_shader_writes_all(r300_fs(r300
));
963 r300_pick_fragment_shader(r300
);
964 r300_mark_fs_code_dirty(r300
);
966 if (fb
->nr_cbufs
> 1 &&
967 last_multi_write
!= r300_fragment_shader_writes_all(fs
)) {
968 r300_mark_fb_state_dirty(r300
, R300_CHANGED_MULTIWRITE
);
971 r300_mark_atom_dirty(r300
, &r300
->rs_block_state
); /* Will be updated before the emission. */
974 /* Delete fragment shader state. */
975 static void r300_delete_fs_state(struct pipe_context
* pipe
, void* shader
)
977 struct r300_fragment_shader
* fs
= (struct r300_fragment_shader
*)shader
;
978 struct r300_fragment_shader_code
*tmp
, *ptr
= fs
->first
;
983 rc_constants_destroy(&tmp
->code
.constants
);
987 FREE((void*)fs
->state
.tokens
);
991 static void r300_set_polygon_stipple(struct pipe_context
* pipe
,
992 const struct pipe_poly_stipple
* state
)
994 /* XXX no idea how to set this up, but not terribly important */
997 /* Create a new rasterizer state based on the CSO rasterizer state.
999 * This is a very large chunk of state, and covers most of the graphics
1000 * backend (GB), geometry assembly (GA), and setup unit (SU) blocks.
1002 * In a not entirely unironic sidenote, this state has nearly nothing to do
1003 * with the actual block on the Radeon called the rasterizer (RS). */
1004 static void* r300_create_rs_state(struct pipe_context
* pipe
,
1005 const struct pipe_rasterizer_state
* state
)
1007 struct r300_rs_state
* rs
= CALLOC_STRUCT(r300_rs_state
);
1009 uint32_t vap_control_status
; /* R300_VAP_CNTL_STATUS: 0x2140 */
1010 uint32_t point_size
; /* R300_GA_POINT_SIZE: 0x421c */
1011 uint32_t point_minmax
; /* R300_GA_POINT_MINMAX: 0x4230 */
1012 uint32_t line_control
; /* R300_GA_LINE_CNTL: 0x4234 */
1013 uint32_t polygon_offset_enable
; /* R300_SU_POLY_OFFSET_ENABLE: 0x42b4 */
1014 uint32_t cull_mode
; /* R300_SU_CULL_MODE: 0x42b8 */
1015 uint32_t line_stipple_config
; /* R300_GA_LINE_STIPPLE_CONFIG: 0x4328 */
1016 uint32_t line_stipple_value
; /* R300_GA_LINE_STIPPLE_VALUE: 0x4260 */
1017 uint32_t polygon_mode
; /* R300_GA_POLY_MODE: 0x4288 */
1018 uint32_t clip_rule
; /* R300_SC_CLIP_RULE: 0x43D0 */
1019 uint32_t round_mode
; /* R300_GA_ROUND_MODE: 0x428c */
1021 /* Point sprites texture coordinates, 0: lower left, 1: upper right */
1022 float point_texcoord_left
= 0; /* R300_GA_POINT_S0: 0x4200 */
1023 float point_texcoord_bottom
= 0;/* R300_GA_POINT_T0: 0x4204 */
1024 float point_texcoord_right
= 1; /* R300_GA_POINT_S1: 0x4208 */
1025 float point_texcoord_top
= 0; /* R300_GA_POINT_T1: 0x420c */
1026 boolean vclamp
= TRUE
;
1029 /* Copy rasterizer state. */
1031 rs
->rs_draw
= *state
;
1033 rs
->rs
.sprite_coord_enable
= state
->point_quad_rasterization
*
1034 state
->sprite_coord_enable
;
1036 /* Override some states for Draw. */
1037 rs
->rs_draw
.sprite_coord_enable
= 0; /* We can do this in HW. */
1039 #ifdef PIPE_ARCH_LITTLE_ENDIAN
1040 vap_control_status
= R300_VC_NO_SWAP
;
1042 vap_control_status
= R300_VC_32BIT_SWAP
;
1045 /* If no TCL engine is present, turn off the HW TCL. */
1046 if (!r300_screen(pipe
->screen
)->caps
.has_tcl
) {
1047 vap_control_status
|= R300_VAP_TCL_BYPASS
;
1050 /* Point size width and height. */
1052 pack_float_16_6x(state
->point_size
) |
1053 (pack_float_16_6x(state
->point_size
) << R300_POINTSIZE_X_SHIFT
);
1055 /* Point size clamping. */
1056 if (state
->point_size_per_vertex
) {
1057 /* Per-vertex point size.
1058 * Clamp to [0, max FB size] */
1059 psiz
= pipe
->screen
->get_paramf(pipe
->screen
,
1060 PIPE_CAP_MAX_POINT_WIDTH
);
1062 pack_float_16_6x(psiz
) << R300_GA_POINT_MINMAX_MAX_SHIFT
;
1064 /* We cannot disable the point-size vertex output,
1066 psiz
= state
->point_size
;
1068 (pack_float_16_6x(psiz
) << R300_GA_POINT_MINMAX_MIN_SHIFT
) |
1069 (pack_float_16_6x(psiz
) << R300_GA_POINT_MINMAX_MAX_SHIFT
);
1073 line_control
= pack_float_16_6x(state
->line_width
) |
1074 R300_GA_LINE_CNTL_END_TYPE_COMP
;
1076 /* Enable polygon mode */
1078 if (state
->fill_front
!= PIPE_POLYGON_MODE_FILL
||
1079 state
->fill_back
!= PIPE_POLYGON_MODE_FILL
) {
1080 polygon_mode
= R300_GA_POLY_MODE_DUAL
;
1084 if (state
->front_ccw
)
1085 cull_mode
= R300_FRONT_FACE_CCW
;
1087 cull_mode
= R300_FRONT_FACE_CW
;
1089 /* Polygon offset */
1090 polygon_offset_enable
= 0;
1091 if (util_get_offset(state
, state
->fill_front
)) {
1092 polygon_offset_enable
|= R300_FRONT_ENABLE
;
1094 if (util_get_offset(state
, state
->fill_back
)) {
1095 polygon_offset_enable
|= R300_BACK_ENABLE
;
1098 rs
->polygon_offset_enable
= polygon_offset_enable
!= 0;
1103 r300_translate_polygon_mode_front(state
->fill_front
);
1105 r300_translate_polygon_mode_back(state
->fill_back
);
1108 if (state
->cull_face
& PIPE_FACE_FRONT
) {
1109 cull_mode
|= R300_CULL_FRONT
;
1111 if (state
->cull_face
& PIPE_FACE_BACK
) {
1112 cull_mode
|= R300_CULL_BACK
;
1115 if (state
->line_stipple_enable
) {
1116 line_stipple_config
=
1117 R300_GA_LINE_STIPPLE_CONFIG_LINE_RESET_LINE
|
1118 (fui((float)state
->line_stipple_factor
) &
1119 R300_GA_LINE_STIPPLE_CONFIG_STIPPLE_SCALE_MASK
);
1120 /* XXX this might need to be scaled up */
1121 line_stipple_value
= state
->line_stipple_pattern
;
1123 line_stipple_config
= 0;
1124 line_stipple_value
= 0;
1127 if (state
->flatshade
) {
1128 rs
->color_control
= R300_SHADE_MODEL_FLAT
;
1130 rs
->color_control
= R300_SHADE_MODEL_SMOOTH
;
1133 clip_rule
= state
->scissor
? 0xAAAA : 0xFFFF;
1135 /* Point sprites coord mode */
1136 if (rs
->rs
.sprite_coord_enable
) {
1137 switch (state
->sprite_coord_mode
) {
1138 case PIPE_SPRITE_COORD_UPPER_LEFT
:
1139 point_texcoord_top
= 0.0f
;
1140 point_texcoord_bottom
= 1.0f
;
1142 case PIPE_SPRITE_COORD_LOWER_LEFT
:
1143 point_texcoord_top
= 1.0f
;
1144 point_texcoord_bottom
= 0.0f
;
1149 /* Vertex color clamping. FP20 means no clamping. */
1151 R300_GA_ROUND_MODE_GEOMETRY_ROUND_NEAREST
|
1152 (!vclamp
? (R300_GA_ROUND_MODE_RGB_CLAMP_FP20
|
1153 R300_GA_ROUND_MODE_ALPHA_CLAMP_FP20
) : 0);
1155 /* Build the main command buffer. */
1156 BEGIN_CB(rs
->cb_main
, RS_STATE_MAIN_SIZE
);
1157 OUT_CB_REG(R300_VAP_CNTL_STATUS
, vap_control_status
);
1158 OUT_CB_REG(R300_GA_POINT_SIZE
, point_size
);
1159 OUT_CB_REG_SEQ(R300_GA_POINT_MINMAX
, 2);
1160 OUT_CB(point_minmax
);
1161 OUT_CB(line_control
);
1162 OUT_CB_REG_SEQ(R300_SU_POLY_OFFSET_ENABLE
, 2);
1163 OUT_CB(polygon_offset_enable
);
1164 rs
->cull_mode_index
= 9;
1166 OUT_CB_REG(R300_GA_LINE_STIPPLE_CONFIG
, line_stipple_config
);
1167 OUT_CB_REG(R300_GA_LINE_STIPPLE_VALUE
, line_stipple_value
);
1168 OUT_CB_REG(R300_GA_POLY_MODE
, polygon_mode
);
1169 OUT_CB_REG(R300_GA_ROUND_MODE
, round_mode
);
1170 OUT_CB_REG(R300_SC_CLIP_RULE
, clip_rule
);
1171 OUT_CB_REG_SEQ(R300_GA_POINT_S0
, 4);
1172 OUT_CB_32F(point_texcoord_left
);
1173 OUT_CB_32F(point_texcoord_bottom
);
1174 OUT_CB_32F(point_texcoord_right
);
1175 OUT_CB_32F(point_texcoord_top
);
1178 /* Build the two command buffers for polygon offset setup. */
1179 if (polygon_offset_enable
) {
1180 float scale
= state
->offset_scale
* 12;
1181 float offset
= state
->offset_units
* 4;
1183 BEGIN_CB(rs
->cb_poly_offset_zb16
, 5);
1184 OUT_CB_REG_SEQ(R300_SU_POLY_OFFSET_FRONT_SCALE
, 4);
1191 offset
= state
->offset_units
* 2;
1193 BEGIN_CB(rs
->cb_poly_offset_zb24
, 5);
1194 OUT_CB_REG_SEQ(R300_SU_POLY_OFFSET_FRONT_SCALE
, 4);
1205 /* Bind rasterizer state. */
1206 static void r300_bind_rs_state(struct pipe_context
* pipe
, void* state
)
1208 struct r300_context
* r300
= r300_context(pipe
);
1209 struct r300_rs_state
* rs
= (struct r300_rs_state
*)state
;
1210 int last_sprite_coord_enable
= r300
->sprite_coord_enable
;
1211 boolean last_two_sided_color
= r300
->two_sided_color
;
1213 if (r300
->draw
&& rs
) {
1214 draw_set_rasterizer_state(r300
->draw
, &rs
->rs_draw
, state
);
1218 r300
->polygon_offset_enabled
= rs
->polygon_offset_enable
;
1219 r300
->sprite_coord_enable
= rs
->rs
.sprite_coord_enable
;
1220 r300
->two_sided_color
= rs
->rs
.light_twoside
;
1222 r300
->polygon_offset_enabled
= FALSE
;
1223 r300
->sprite_coord_enable
= 0;
1224 r300
->two_sided_color
= FALSE
;
1227 UPDATE_STATE(state
, r300
->rs_state
);
1228 r300
->rs_state
.size
= RS_STATE_MAIN_SIZE
+ (r300
->polygon_offset_enabled
? 5 : 0);
1230 if (last_sprite_coord_enable
!= r300
->sprite_coord_enable
||
1231 last_two_sided_color
!= r300
->two_sided_color
) {
1232 r300_mark_atom_dirty(r300
, &r300
->rs_block_state
);
1236 /* Free rasterizer state. */
1237 static void r300_delete_rs_state(struct pipe_context
* pipe
, void* state
)
1243 r300_create_sampler_state(struct pipe_context
* pipe
,
1244 const struct pipe_sampler_state
* state
)
1246 struct r300_context
* r300
= r300_context(pipe
);
1247 struct r300_sampler_state
* sampler
= CALLOC_STRUCT(r300_sampler_state
);
1248 boolean is_r500
= r300
->screen
->caps
.is_r500
;
1251 sampler
->state
= *state
;
1253 /* r300 doesn't handle CLAMP and MIRROR_CLAMP correctly when either MAG
1254 * or MIN filter is NEAREST. Since texwrap produces same results
1255 * for CLAMP and CLAMP_TO_EDGE, we use them instead. */
1256 if (sampler
->state
.min_img_filter
== PIPE_TEX_FILTER_NEAREST
||
1257 sampler
->state
.mag_img_filter
== PIPE_TEX_FILTER_NEAREST
) {
1259 if (sampler
->state
.wrap_s
== PIPE_TEX_WRAP_CLAMP
)
1260 sampler
->state
.wrap_s
= PIPE_TEX_WRAP_CLAMP_TO_EDGE
;
1261 else if (sampler
->state
.wrap_s
== PIPE_TEX_WRAP_MIRROR_CLAMP
)
1262 sampler
->state
.wrap_s
= PIPE_TEX_WRAP_MIRROR_CLAMP_TO_EDGE
;
1265 if (sampler
->state
.wrap_t
== PIPE_TEX_WRAP_CLAMP
)
1266 sampler
->state
.wrap_t
= PIPE_TEX_WRAP_CLAMP_TO_EDGE
;
1267 else if (sampler
->state
.wrap_t
== PIPE_TEX_WRAP_MIRROR_CLAMP
)
1268 sampler
->state
.wrap_t
= PIPE_TEX_WRAP_MIRROR_CLAMP_TO_EDGE
;
1271 if (sampler
->state
.wrap_r
== PIPE_TEX_WRAP_CLAMP
)
1272 sampler
->state
.wrap_r
= PIPE_TEX_WRAP_CLAMP_TO_EDGE
;
1273 else if (sampler
->state
.wrap_r
== PIPE_TEX_WRAP_MIRROR_CLAMP
)
1274 sampler
->state
.wrap_r
= PIPE_TEX_WRAP_MIRROR_CLAMP_TO_EDGE
;
1278 (r300_translate_wrap(sampler
->state
.wrap_s
) << R300_TX_WRAP_S_SHIFT
) |
1279 (r300_translate_wrap(sampler
->state
.wrap_t
) << R300_TX_WRAP_T_SHIFT
) |
1280 (r300_translate_wrap(sampler
->state
.wrap_r
) << R300_TX_WRAP_R_SHIFT
);
1282 sampler
->filter0
|= r300_translate_tex_filters(state
->min_img_filter
,
1283 state
->mag_img_filter
,
1284 state
->min_mip_filter
,
1285 state
->max_anisotropy
> 0);
1287 sampler
->filter0
|= r300_anisotropy(state
->max_anisotropy
);
1289 /* Unfortunately, r300-r500 don't support floating-point mipmap lods. */
1290 /* We must pass these to the merge function to clamp them properly. */
1291 sampler
->min_lod
= (unsigned)MAX2(state
->min_lod
, 0);
1292 sampler
->max_lod
= (unsigned)MAX2(ceilf(state
->max_lod
), 0);
1294 lod_bias
= CLAMP((int)(state
->lod_bias
* 32 + 1), -(1 << 9), (1 << 9) - 1);
1296 sampler
->filter1
|= (lod_bias
<< R300_LOD_BIAS_SHIFT
) & R300_LOD_BIAS_MASK
;
1298 /* This is very high quality anisotropic filtering for R5xx.
1299 * It's good for benchmarking the performance of texturing but
1300 * in practice we don't want to slow down the driver because it's
1301 * a pretty good performance killer. Feel free to play with it. */
1302 if (DBG_ON(r300
, DBG_ANISOHQ
) && is_r500
) {
1303 sampler
->filter1
|= r500_anisotropy(state
->max_anisotropy
);
1306 /* R500-specific fixups and optimizations */
1307 if (r300
->screen
->caps
.is_r500
) {
1308 sampler
->filter1
|= R500_BORDER_FIX
;
1311 return (void*)sampler
;
1314 static void r300_bind_sampler_states(struct pipe_context
* pipe
,
1318 struct r300_context
* r300
= r300_context(pipe
);
1319 struct r300_textures_state
* state
=
1320 (struct r300_textures_state
*)r300
->textures_state
.state
;
1321 unsigned tex_units
= r300
->screen
->caps
.num_tex_units
;
1323 if (count
> tex_units
) {
1327 memcpy(state
->sampler_states
, states
, sizeof(void*) * count
);
1328 state
->sampler_state_count
= count
;
1330 r300_mark_atom_dirty(r300
, &r300
->textures_state
);
1333 static void r300_lacks_vertex_textures(struct pipe_context
* pipe
,
1339 static void r300_delete_sampler_state(struct pipe_context
* pipe
, void* state
)
1344 static uint32_t r300_assign_texture_cache_region(unsigned index
, unsigned num
)
1346 /* This looks like a hack, but I believe it's suppose to work like
1347 * that. To illustrate how this works, let's assume you have 5 textures.
1348 * From docs, 5 and the successive numbers are:
1356 * First 3 textures will get 3/4 of size of the cache, divived evenly
1357 * between them. The last 1/4 of the cache must be divided between
1358 * the last 2 textures, each will therefore get 1/8 of the cache.
1359 * Why not just to use "5 + texture_index" ?
1361 * This simple trick works for all "num" <= 16.
1364 return R300_TX_CACHE(R300_TX_CACHE_WHOLE
);
1366 return R300_TX_CACHE(num
+ index
);
1369 static void r300_set_fragment_sampler_views(struct pipe_context
* pipe
,
1371 struct pipe_sampler_view
** views
)
1373 struct r300_context
* r300
= r300_context(pipe
);
1374 struct r300_textures_state
* state
=
1375 (struct r300_textures_state
*)r300
->textures_state
.state
;
1376 struct r300_resource
*texture
;
1377 unsigned i
, real_num_views
= 0, view_index
= 0;
1378 unsigned tex_units
= r300
->screen
->caps
.num_tex_units
;
1379 boolean dirty_tex
= FALSE
;
1381 if (count
> tex_units
) {
1385 /* Calculate the real number of views. */
1386 for (i
= 0; i
< count
; i
++) {
1391 for (i
= 0; i
< count
; i
++) {
1392 pipe_sampler_view_reference(
1393 (struct pipe_sampler_view
**)&state
->sampler_views
[i
],
1400 /* A new sampler view (= texture)... */
1403 /* Set the texrect factor in the fragment shader.
1404 * Needed for RECT and NPOT fallback. */
1405 texture
= r300_resource(views
[i
]->texture
);
1406 if (texture
->tex
.is_npot
) {
1407 r300_mark_atom_dirty(r300
, &r300
->fs_rc_constant_state
);
1410 state
->sampler_views
[i
]->texcache_region
=
1411 r300_assign_texture_cache_region(view_index
, real_num_views
);
1415 for (i
= count
; i
< tex_units
; i
++) {
1416 if (state
->sampler_views
[i
]) {
1417 pipe_sampler_view_reference(
1418 (struct pipe_sampler_view
**)&state
->sampler_views
[i
],
1423 state
->sampler_view_count
= count
;
1425 r300_mark_atom_dirty(r300
, &r300
->textures_state
);
1428 r300_mark_atom_dirty(r300
, &r300
->texture_cache_inval
);
1432 static struct pipe_sampler_view
*
1433 r300_create_sampler_view(struct pipe_context
*pipe
,
1434 struct pipe_resource
*texture
,
1435 const struct pipe_sampler_view
*templ
)
1437 struct r300_sampler_view
*view
= CALLOC_STRUCT(r300_sampler_view
);
1438 struct r300_resource
*tex
= r300_resource(texture
);
1439 boolean is_r500
= r300_screen(pipe
->screen
)->caps
.is_r500
;
1440 boolean dxtc_swizzle
= r300_screen(pipe
->screen
)->caps
.dxtc_swizzle
;
1443 view
->base
= *templ
;
1444 view
->base
.reference
.count
= 1;
1445 view
->base
.context
= pipe
;
1446 view
->base
.texture
= NULL
;
1447 pipe_resource_reference(&view
->base
.texture
, texture
);
1449 view
->swizzle
[0] = templ
->swizzle_r
;
1450 view
->swizzle
[1] = templ
->swizzle_g
;
1451 view
->swizzle
[2] = templ
->swizzle_b
;
1452 view
->swizzle
[3] = templ
->swizzle_a
;
1454 view
->format
= tex
->tx_format
;
1455 view
->format
.format1
|= r300_translate_texformat(templ
->format
,
1460 view
->format
.format2
|= r500_tx_format_msb_bit(templ
->format
);
1464 return (struct pipe_sampler_view
*)view
;
1468 r300_sampler_view_destroy(struct pipe_context
*pipe
,
1469 struct pipe_sampler_view
*view
)
1471 pipe_resource_reference(&view
->texture
, NULL
);
1475 static void r300_set_scissor_state(struct pipe_context
* pipe
,
1476 const struct pipe_scissor_state
* state
)
1478 struct r300_context
* r300
= r300_context(pipe
);
1480 memcpy(r300
->scissor_state
.state
, state
,
1481 sizeof(struct pipe_scissor_state
));
1483 r300_mark_atom_dirty(r300
, &r300
->scissor_state
);
1486 static void r300_set_viewport_state(struct pipe_context
* pipe
,
1487 const struct pipe_viewport_state
* state
)
1489 struct r300_context
* r300
= r300_context(pipe
);
1490 struct r300_viewport_state
* viewport
=
1491 (struct r300_viewport_state
*)r300
->viewport_state
.state
;
1493 r300
->viewport
= *state
;
1496 draw_set_viewport_state(r300
->draw
, state
);
1497 viewport
->vte_control
= R300_VTX_XY_FMT
| R300_VTX_Z_FMT
;
1501 /* Do the transform in HW. */
1502 viewport
->vte_control
= R300_VTX_W0_FMT
;
1504 if (state
->scale
[0] != 1.0f
) {
1505 viewport
->xscale
= state
->scale
[0];
1506 viewport
->vte_control
|= R300_VPORT_X_SCALE_ENA
;
1508 if (state
->scale
[1] != 1.0f
) {
1509 viewport
->yscale
= state
->scale
[1];
1510 viewport
->vte_control
|= R300_VPORT_Y_SCALE_ENA
;
1512 if (state
->scale
[2] != 1.0f
) {
1513 viewport
->zscale
= state
->scale
[2];
1514 viewport
->vte_control
|= R300_VPORT_Z_SCALE_ENA
;
1516 if (state
->translate
[0] != 0.0f
) {
1517 viewport
->xoffset
= state
->translate
[0];
1518 viewport
->vte_control
|= R300_VPORT_X_OFFSET_ENA
;
1520 if (state
->translate
[1] != 0.0f
) {
1521 viewport
->yoffset
= state
->translate
[1];
1522 viewport
->vte_control
|= R300_VPORT_Y_OFFSET_ENA
;
1524 if (state
->translate
[2] != 0.0f
) {
1525 viewport
->zoffset
= state
->translate
[2];
1526 viewport
->vte_control
|= R300_VPORT_Z_OFFSET_ENA
;
1529 r300_mark_atom_dirty(r300
, &r300
->viewport_state
);
1530 if (r300
->fs
.state
&& r300_fs(r300
)->shader
->inputs
.wpos
!= ATTR_UNUSED
) {
1531 r300_mark_atom_dirty(r300
, &r300
->fs_rc_constant_state
);
1535 static void r300_set_vertex_buffers(struct pipe_context
* pipe
,
1537 const struct pipe_vertex_buffer
* buffers
)
1539 struct r300_context
* r300
= r300_context(pipe
);
1541 struct pipe_vertex_buffer dummy_vb
= {0};
1543 /* There must be at least one vertex buffer set, otherwise it locks up. */
1545 dummy_vb
.buffer
= r300
->dummy_vb
;
1546 buffers
= &dummy_vb
;
1550 u_vbuf_mgr_set_vertex_buffers(r300
->vbuf_mgr
, count
, buffers
);
1552 if (r300
->screen
->caps
.has_tcl
) {
1554 for (i
= 0; i
< count
; i
++) {
1555 if (buffers
[i
].buffer
&&
1556 !r300_resource(buffers
[i
].buffer
)->b
.user_ptr
) {
1559 r300
->vertex_arrays_dirty
= TRUE
;
1562 draw_set_vertex_buffers(r300
->draw
, count
, buffers
);
1566 static void r300_set_index_buffer(struct pipe_context
* pipe
,
1567 const struct pipe_index_buffer
*ib
)
1569 struct r300_context
* r300
= r300_context(pipe
);
1571 if (ib
&& ib
->buffer
) {
1572 assert(ib
->offset
% ib
->index_size
== 0);
1574 pipe_resource_reference(&r300
->index_buffer
.buffer
, ib
->buffer
);
1575 memcpy(&r300
->index_buffer
, ib
, sizeof(r300
->index_buffer
));
1576 r300
->index_buffer
.offset
/= r300
->index_buffer
.index_size
;
1579 pipe_resource_reference(&r300
->index_buffer
.buffer
, NULL
);
1580 memset(&r300
->index_buffer
, 0, sizeof(r300
->index_buffer
));
1583 if (!r300
->screen
->caps
.has_tcl
) {
1584 draw_set_index_buffer(r300
->draw
, ib
);
1588 /* Initialize the PSC tables. */
1589 static void r300_vertex_psc(struct r300_vertex_element_state
*velems
)
1591 struct r300_vertex_stream_state
*vstream
= &velems
->vertex_stream
;
1592 uint16_t type
, swizzle
;
1593 enum pipe_format format
;
1596 /* Vertex shaders have no semantics on their inputs,
1597 * so PSC should just route stuff based on the vertex elements,
1598 * and not on attrib information. */
1599 for (i
= 0; i
< velems
->count
; i
++) {
1600 format
= velems
->velem
[i
].src_format
;
1602 type
= r300_translate_vertex_data_type(format
);
1603 if (type
== R300_INVALID_FORMAT
) {
1604 fprintf(stderr
, "r300: Bad vertex format %s.\n",
1605 util_format_short_name(format
));
1610 type
|= i
<< R300_DST_VEC_LOC_SHIFT
;
1611 swizzle
= r300_translate_vertex_data_swizzle(format
);
1614 vstream
->vap_prog_stream_cntl
[i
>> 1] |= type
<< 16;
1615 vstream
->vap_prog_stream_cntl_ext
[i
>> 1] |= swizzle
<< 16;
1617 vstream
->vap_prog_stream_cntl
[i
>> 1] |= type
;
1618 vstream
->vap_prog_stream_cntl_ext
[i
>> 1] |= swizzle
;
1622 /* Set the last vector in the PSC. */
1626 vstream
->vap_prog_stream_cntl
[i
>> 1] |=
1627 (R300_LAST_VEC
<< (i
& 1 ? 16 : 0));
1629 vstream
->count
= (i
>> 1) + 1;
1632 static void* r300_create_vertex_elements_state(struct pipe_context
* pipe
,
1634 const struct pipe_vertex_element
* attribs
)
1636 struct r300_context
*r300
= r300_context(pipe
);
1637 struct r300_vertex_element_state
*velems
;
1639 struct pipe_vertex_element dummy_attrib
= {0};
1641 /* R300 Programmable Stream Control (PSC) doesn't support 0 vertex elements. */
1643 dummy_attrib
.src_format
= PIPE_FORMAT_R8G8B8A8_UNORM
;
1644 attribs
= &dummy_attrib
;
1646 } else if (count
> 16) {
1647 fprintf(stderr
, "r300: More than 16 vertex elements are not supported,"
1648 " requested %i, using 16.\n", count
);
1652 velems
= CALLOC_STRUCT(r300_vertex_element_state
);
1656 velems
->count
= count
;
1657 velems
->vmgr_elements
=
1658 u_vbuf_mgr_create_vertex_elements(r300
->vbuf_mgr
, count
, attribs
,
1661 if (r300_screen(pipe
->screen
)->caps
.has_tcl
) {
1663 * The unused components will be replaced by (..., 0, 1). */
1664 r300_vertex_psc(velems
);
1666 for (i
= 0; i
< count
; i
++) {
1667 velems
->format_size
[i
] =
1668 align(util_format_get_blocksize(velems
->velem
[i
].src_format
), 4);
1669 velems
->vertex_size_dwords
+= velems
->format_size
[i
] / 4;
1676 static void r300_bind_vertex_elements_state(struct pipe_context
*pipe
,
1679 struct r300_context
*r300
= r300_context(pipe
);
1680 struct r300_vertex_element_state
*velems
= state
;
1682 if (velems
== NULL
) {
1686 r300
->velems
= velems
;
1688 u_vbuf_mgr_bind_vertex_elements(r300
->vbuf_mgr
, state
, velems
->vmgr_elements
);
1691 draw_set_vertex_elements(r300
->draw
, velems
->count
, velems
->velem
);
1695 UPDATE_STATE(&velems
->vertex_stream
, r300
->vertex_stream_state
);
1696 r300
->vertex_stream_state
.size
= (1 + velems
->vertex_stream
.count
) * 2;
1697 r300
->vertex_arrays_dirty
= TRUE
;
1700 static void r300_delete_vertex_elements_state(struct pipe_context
*pipe
, void *state
)
1702 struct r300_context
*r300
= r300_context(pipe
);
1703 struct r300_vertex_element_state
*velems
= state
;
1705 u_vbuf_mgr_destroy_vertex_elements(r300
->vbuf_mgr
, velems
->vmgr_elements
);
1709 static void* r300_create_vs_state(struct pipe_context
* pipe
,
1710 const struct pipe_shader_state
* shader
)
1712 struct r300_context
* r300
= r300_context(pipe
);
1713 struct r300_vertex_shader
* vs
= CALLOC_STRUCT(r300_vertex_shader
);
1715 /* Copy state directly into shader. */
1716 vs
->state
= *shader
;
1717 vs
->state
.tokens
= tgsi_dup_tokens(shader
->tokens
);
1719 if (r300
->screen
->caps
.has_tcl
) {
1720 r300_init_vs_outputs(vs
);
1721 r300_translate_vertex_shader(r300
, vs
);
1723 r300_draw_init_vertex_shader(r300
->draw
, vs
);
1729 static void r300_bind_vs_state(struct pipe_context
* pipe
, void* shader
)
1731 struct r300_context
* r300
= r300_context(pipe
);
1732 struct r300_vertex_shader
* vs
= (struct r300_vertex_shader
*)shader
;
1735 r300
->vs_state
.state
= NULL
;
1738 if (vs
== r300
->vs_state
.state
) {
1741 r300
->vs_state
.state
= vs
;
1743 /* The majority of the RS block bits is dependent on the vertex shader. */
1744 r300_mark_atom_dirty(r300
, &r300
->rs_block_state
); /* Will be updated before the emission. */
1746 if (r300
->screen
->caps
.has_tcl
) {
1747 unsigned fc_op_dwords
= r300
->screen
->caps
.is_r500
? 3 : 2;
1748 r300_mark_atom_dirty(r300
, &r300
->vs_state
);
1749 r300
->vs_state
.size
=
1750 vs
->code
.length
+ 9 +
1751 (vs
->code
.num_fc_ops
? vs
->code
.num_fc_ops
* fc_op_dwords
+ 4 : 0);
1753 r300_mark_atom_dirty(r300
, &r300
->vs_constants
);
1754 r300
->vs_constants
.size
=
1756 (vs
->externals_count
? vs
->externals_count
* 4 + 3 : 0) +
1757 (vs
->immediates_count
? vs
->immediates_count
* 4 + 3 : 0);
1759 ((struct r300_constant_buffer
*)r300
->vs_constants
.state
)->remap_table
=
1760 vs
->code
.constants_remap_table
;
1762 r300_mark_atom_dirty(r300
, &r300
->pvs_flush
);
1764 draw_bind_vertex_shader(r300
->draw
,
1765 (struct draw_vertex_shader
*)vs
->draw_vs
);
1769 static void r300_delete_vs_state(struct pipe_context
* pipe
, void* shader
)
1771 struct r300_context
* r300
= r300_context(pipe
);
1772 struct r300_vertex_shader
* vs
= (struct r300_vertex_shader
*)shader
;
1774 if (r300
->screen
->caps
.has_tcl
) {
1775 rc_constants_destroy(&vs
->code
.constants
);
1776 if (vs
->code
.constants_remap_table
)
1777 FREE(vs
->code
.constants_remap_table
);
1779 draw_delete_vertex_shader(r300
->draw
,
1780 (struct draw_vertex_shader
*)vs
->draw_vs
);
1783 FREE((void*)vs
->state
.tokens
);
1787 static void r300_set_constant_buffer(struct pipe_context
*pipe
,
1788 uint shader
, uint index
,
1789 struct pipe_resource
*buf
)
1791 struct r300_context
* r300
= r300_context(pipe
);
1792 struct r300_constant_buffer
*cbuf
;
1793 struct r300_resource
*rbuf
= r300_resource(buf
);
1797 case PIPE_SHADER_VERTEX
:
1798 cbuf
= (struct r300_constant_buffer
*)r300
->vs_constants
.state
;
1800 case PIPE_SHADER_FRAGMENT
:
1801 cbuf
= (struct r300_constant_buffer
*)r300
->fs_constants
.state
;
1807 if (buf
== NULL
|| buf
->width0
== 0)
1810 if (rbuf
->b
.user_ptr
)
1811 mapped
= (uint32_t*)rbuf
->b
.user_ptr
;
1812 else if (rbuf
->constant_buffer
)
1813 mapped
= (uint32_t*)rbuf
->constant_buffer
;
1817 if (shader
== PIPE_SHADER_FRAGMENT
||
1818 (shader
== PIPE_SHADER_VERTEX
&& r300
->screen
->caps
.has_tcl
)) {
1822 if (shader
== PIPE_SHADER_VERTEX
) {
1823 if (r300
->screen
->caps
.has_tcl
) {
1824 struct r300_vertex_shader
*vs
=
1825 (struct r300_vertex_shader
*)r300
->vs_state
.state
;
1828 cbuf
->buffer_base
= 0;
1832 cbuf
->buffer_base
= r300
->vs_const_base
;
1833 r300
->vs_const_base
+= vs
->code
.constants
.Count
;
1834 if (r300
->vs_const_base
> R500_MAX_PVS_CONST_VECS
) {
1835 r300
->vs_const_base
= vs
->code
.constants
.Count
;
1836 cbuf
->buffer_base
= 0;
1837 r300_mark_atom_dirty(r300
, &r300
->pvs_flush
);
1839 r300_mark_atom_dirty(r300
, &r300
->vs_constants
);
1840 } else if (r300
->draw
) {
1841 draw_set_mapped_constant_buffer(r300
->draw
, PIPE_SHADER_VERTEX
,
1842 0, mapped
, buf
->width0
);
1844 } else if (shader
== PIPE_SHADER_FRAGMENT
) {
1845 r300_mark_atom_dirty(r300
, &r300
->fs_constants
);
1849 void r300_init_state_functions(struct r300_context
* r300
)
1851 r300
->context
.create_blend_state
= r300_create_blend_state
;
1852 r300
->context
.bind_blend_state
= r300_bind_blend_state
;
1853 r300
->context
.delete_blend_state
= r300_delete_blend_state
;
1855 r300
->context
.set_blend_color
= r300_set_blend_color
;
1857 r300
->context
.set_clip_state
= r300_set_clip_state
;
1858 r300
->context
.set_sample_mask
= r300_set_sample_mask
;
1860 r300
->context
.set_constant_buffer
= r300_set_constant_buffer
;
1862 r300
->context
.create_depth_stencil_alpha_state
= r300_create_dsa_state
;
1863 r300
->context
.bind_depth_stencil_alpha_state
= r300_bind_dsa_state
;
1864 r300
->context
.delete_depth_stencil_alpha_state
= r300_delete_dsa_state
;
1866 r300
->context
.set_stencil_ref
= r300_set_stencil_ref
;
1868 r300
->context
.set_framebuffer_state
= r300_set_framebuffer_state
;
1870 r300
->context
.create_fs_state
= r300_create_fs_state
;
1871 r300
->context
.bind_fs_state
= r300_bind_fs_state
;
1872 r300
->context
.delete_fs_state
= r300_delete_fs_state
;
1874 r300
->context
.set_polygon_stipple
= r300_set_polygon_stipple
;
1876 r300
->context
.create_rasterizer_state
= r300_create_rs_state
;
1877 r300
->context
.bind_rasterizer_state
= r300_bind_rs_state
;
1878 r300
->context
.delete_rasterizer_state
= r300_delete_rs_state
;
1880 r300
->context
.create_sampler_state
= r300_create_sampler_state
;
1881 r300
->context
.bind_fragment_sampler_states
= r300_bind_sampler_states
;
1882 r300
->context
.bind_vertex_sampler_states
= r300_lacks_vertex_textures
;
1883 r300
->context
.delete_sampler_state
= r300_delete_sampler_state
;
1885 r300
->context
.set_fragment_sampler_views
= r300_set_fragment_sampler_views
;
1886 r300
->context
.create_sampler_view
= r300_create_sampler_view
;
1887 r300
->context
.sampler_view_destroy
= r300_sampler_view_destroy
;
1889 r300
->context
.set_scissor_state
= r300_set_scissor_state
;
1891 r300
->context
.set_viewport_state
= r300_set_viewport_state
;
1893 r300
->context
.set_vertex_buffers
= r300_set_vertex_buffers
;
1894 r300
->context
.set_index_buffer
= r300_set_index_buffer
;
1895 r300
->context
.redefine_user_buffer
= u_default_redefine_user_buffer
;
1897 r300
->context
.create_vertex_elements_state
= r300_create_vertex_elements_state
;
1898 r300
->context
.bind_vertex_elements_state
= r300_bind_vertex_elements_state
;
1899 r300
->context
.delete_vertex_elements_state
= r300_delete_vertex_elements_state
;
1901 r300
->context
.create_vs_state
= r300_create_vs_state
;
1902 r300
->context
.bind_vs_state
= r300_bind_vs_state
;
1903 r300
->context
.delete_vs_state
= r300_delete_vs_state
;