2 * Copyright 2008 Corbin Simpson <MostAwesomeDude@gmail.com>
3 * Copyright 2009 Marek Olšák <maraeo@gmail.com>
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * on the rights to use, copy, modify, merge, publish, distribute, sub
9 * license, and/or sell copies of the Software, and to permit persons to whom
10 * the Software is furnished to do so, subject to the following conditions:
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
20 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
21 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
22 * USE OR OTHER DEALINGS IN THE SOFTWARE. */
24 #include "draw/draw_context.h"
26 #include "util/u_framebuffer.h"
27 #include "util/u_half.h"
28 #include "util/u_math.h"
29 #include "util/u_mm.h"
30 #include "util/u_memory.h"
31 #include "util/u_pack_color.h"
32 #include "util/u_transfer.h"
34 #include "tgsi/tgsi_parse.h"
36 #include "pipe/p_config.h"
39 #include "r300_context.h"
40 #include "r300_emit.h"
42 #include "r300_screen.h"
43 #include "r300_screen_buffer.h"
44 #include "r300_state_inlines.h"
46 #include "r300_texture.h"
48 #include "r300_winsys.h"
50 /* r300_state: Functions used to intialize state context by translating
51 * Gallium state objects into semi-native r300 state objects. */
53 #define UPDATE_STATE(cso, atom) \
54 if (cso != atom.state) { \
56 r300_mark_atom_dirty(r300, &(atom)); \
59 static boolean
blend_discard_if_src_alpha_0(unsigned srcRGB
, unsigned srcA
,
60 unsigned dstRGB
, unsigned dstA
)
62 /* If the blend equation is ADD or REVERSE_SUBTRACT,
63 * SRC_ALPHA == 0, and the following state is set, the colorbuffer
64 * will not be changed.
65 * Notice that the dst factors are the src factors inverted. */
66 return (srcRGB
== PIPE_BLENDFACTOR_SRC_ALPHA
||
67 srcRGB
== PIPE_BLENDFACTOR_SRC_ALPHA_SATURATE
||
68 srcRGB
== PIPE_BLENDFACTOR_ZERO
) &&
69 (srcA
== PIPE_BLENDFACTOR_SRC_COLOR
||
70 srcA
== PIPE_BLENDFACTOR_SRC_ALPHA
||
71 srcA
== PIPE_BLENDFACTOR_SRC_ALPHA_SATURATE
||
72 srcA
== PIPE_BLENDFACTOR_ZERO
) &&
73 (dstRGB
== PIPE_BLENDFACTOR_INV_SRC_ALPHA
||
74 dstRGB
== PIPE_BLENDFACTOR_ONE
) &&
75 (dstA
== PIPE_BLENDFACTOR_INV_SRC_COLOR
||
76 dstA
== PIPE_BLENDFACTOR_INV_SRC_ALPHA
||
77 dstA
== PIPE_BLENDFACTOR_ONE
);
80 static boolean
blend_discard_if_src_alpha_1(unsigned srcRGB
, unsigned srcA
,
81 unsigned dstRGB
, unsigned dstA
)
83 /* If the blend equation is ADD or REVERSE_SUBTRACT,
84 * SRC_ALPHA == 1, and the following state is set, the colorbuffer
85 * will not be changed.
86 * Notice that the dst factors are the src factors inverted. */
87 return (srcRGB
== PIPE_BLENDFACTOR_INV_SRC_ALPHA
||
88 srcRGB
== PIPE_BLENDFACTOR_ZERO
) &&
89 (srcA
== PIPE_BLENDFACTOR_INV_SRC_COLOR
||
90 srcA
== PIPE_BLENDFACTOR_INV_SRC_ALPHA
||
91 srcA
== PIPE_BLENDFACTOR_ZERO
) &&
92 (dstRGB
== PIPE_BLENDFACTOR_SRC_ALPHA
||
93 dstRGB
== PIPE_BLENDFACTOR_ONE
) &&
94 (dstA
== PIPE_BLENDFACTOR_SRC_COLOR
||
95 dstA
== PIPE_BLENDFACTOR_SRC_ALPHA
||
96 dstA
== PIPE_BLENDFACTOR_ONE
);
99 static boolean
blend_discard_if_src_color_0(unsigned srcRGB
, unsigned srcA
,
100 unsigned dstRGB
, unsigned dstA
)
102 /* If the blend equation is ADD or REVERSE_SUBTRACT,
103 * SRC_COLOR == (0,0,0), and the following state is set, the colorbuffer
104 * will not be changed.
105 * Notice that the dst factors are the src factors inverted. */
106 return (srcRGB
== PIPE_BLENDFACTOR_SRC_COLOR
||
107 srcRGB
== PIPE_BLENDFACTOR_ZERO
) &&
108 (srcA
== PIPE_BLENDFACTOR_ZERO
) &&
109 (dstRGB
== PIPE_BLENDFACTOR_INV_SRC_COLOR
||
110 dstRGB
== PIPE_BLENDFACTOR_ONE
) &&
111 (dstA
== PIPE_BLENDFACTOR_ONE
);
114 static boolean
blend_discard_if_src_color_1(unsigned srcRGB
, unsigned srcA
,
115 unsigned dstRGB
, unsigned dstA
)
117 /* If the blend equation is ADD or REVERSE_SUBTRACT,
118 * SRC_COLOR == (1,1,1), and the following state is set, the colorbuffer
119 * will not be changed.
120 * Notice that the dst factors are the src factors inverted. */
121 return (srcRGB
== PIPE_BLENDFACTOR_INV_SRC_COLOR
||
122 srcRGB
== PIPE_BLENDFACTOR_ZERO
) &&
123 (srcA
== PIPE_BLENDFACTOR_ZERO
) &&
124 (dstRGB
== PIPE_BLENDFACTOR_SRC_COLOR
||
125 dstRGB
== PIPE_BLENDFACTOR_ONE
) &&
126 (dstA
== PIPE_BLENDFACTOR_ONE
);
129 static boolean
blend_discard_if_src_alpha_color_0(unsigned srcRGB
, unsigned srcA
,
130 unsigned dstRGB
, unsigned dstA
)
132 /* If the blend equation is ADD or REVERSE_SUBTRACT,
133 * SRC_ALPHA_COLOR == (0,0,0,0), and the following state is set,
134 * the colorbuffer will not be changed.
135 * Notice that the dst factors are the src factors inverted. */
136 return (srcRGB
== PIPE_BLENDFACTOR_SRC_COLOR
||
137 srcRGB
== PIPE_BLENDFACTOR_SRC_ALPHA
||
138 srcRGB
== PIPE_BLENDFACTOR_SRC_ALPHA_SATURATE
||
139 srcRGB
== PIPE_BLENDFACTOR_ZERO
) &&
140 (srcA
== PIPE_BLENDFACTOR_SRC_COLOR
||
141 srcA
== PIPE_BLENDFACTOR_SRC_ALPHA
||
142 srcA
== PIPE_BLENDFACTOR_SRC_ALPHA_SATURATE
||
143 srcA
== PIPE_BLENDFACTOR_ZERO
) &&
144 (dstRGB
== PIPE_BLENDFACTOR_INV_SRC_COLOR
||
145 dstRGB
== PIPE_BLENDFACTOR_INV_SRC_ALPHA
||
146 dstRGB
== PIPE_BLENDFACTOR_ONE
) &&
147 (dstA
== PIPE_BLENDFACTOR_INV_SRC_COLOR
||
148 dstA
== PIPE_BLENDFACTOR_INV_SRC_ALPHA
||
149 dstA
== PIPE_BLENDFACTOR_ONE
);
152 static boolean
blend_discard_if_src_alpha_color_1(unsigned srcRGB
, unsigned srcA
,
153 unsigned dstRGB
, unsigned dstA
)
155 /* If the blend equation is ADD or REVERSE_SUBTRACT,
156 * SRC_ALPHA_COLOR == (1,1,1,1), and the following state is set,
157 * the colorbuffer will not be changed.
158 * Notice that the dst factors are the src factors inverted. */
159 return (srcRGB
== PIPE_BLENDFACTOR_INV_SRC_COLOR
||
160 srcRGB
== PIPE_BLENDFACTOR_INV_SRC_ALPHA
||
161 srcRGB
== PIPE_BLENDFACTOR_ZERO
) &&
162 (srcA
== PIPE_BLENDFACTOR_INV_SRC_COLOR
||
163 srcA
== PIPE_BLENDFACTOR_INV_SRC_ALPHA
||
164 srcA
== PIPE_BLENDFACTOR_ZERO
) &&
165 (dstRGB
== PIPE_BLENDFACTOR_SRC_COLOR
||
166 dstRGB
== PIPE_BLENDFACTOR_SRC_ALPHA
||
167 dstRGB
== PIPE_BLENDFACTOR_ONE
) &&
168 (dstA
== PIPE_BLENDFACTOR_SRC_COLOR
||
169 dstA
== PIPE_BLENDFACTOR_SRC_ALPHA
||
170 dstA
== PIPE_BLENDFACTOR_ONE
);
173 static unsigned bgra_cmask(unsigned mask
)
175 /* Gallium uses RGBA color ordering while R300 expects BGRA. */
177 return ((mask
& PIPE_MASK_R
) << 2) |
178 ((mask
& PIPE_MASK_B
) >> 2) |
179 (mask
& (PIPE_MASK_G
| PIPE_MASK_A
));
182 /* Create a new blend state based on the CSO blend state.
184 * This encompasses alpha blending, logic/raster ops, and blend dithering. */
185 static void* r300_create_blend_state(struct pipe_context
* pipe
,
186 const struct pipe_blend_state
* state
)
188 struct r300_screen
* r300screen
= r300_screen(pipe
->screen
);
189 struct r300_blend_state
* blend
= CALLOC_STRUCT(r300_blend_state
);
190 uint32_t blend_control
= 0; /* R300_RB3D_CBLEND: 0x4e04 */
191 uint32_t alpha_blend_control
= 0; /* R300_RB3D_ABLEND: 0x4e08 */
192 uint32_t color_channel_mask
= 0; /* R300_RB3D_COLOR_CHANNEL_MASK: 0x4e0c */
193 uint32_t rop
= 0; /* R300_RB3D_ROPCNTL: 0x4e18 */
194 uint32_t dither
= 0; /* R300_RB3D_DITHER_CTL: 0x4e50 */
195 boolean clamp
= TRUE
;
198 blend
->state
= *state
;
200 if (state
->rt
[0].blend_enable
)
202 unsigned eqRGB
= state
->rt
[0].rgb_func
;
203 unsigned srcRGB
= state
->rt
[0].rgb_src_factor
;
204 unsigned dstRGB
= state
->rt
[0].rgb_dst_factor
;
206 unsigned eqA
= state
->rt
[0].alpha_func
;
207 unsigned srcA
= state
->rt
[0].alpha_src_factor
;
208 unsigned dstA
= state
->rt
[0].alpha_dst_factor
;
210 /* despite the name, ALPHA_BLEND_ENABLE has nothing to do with alpha,
211 * this is just the crappy D3D naming */
212 blend_control
= R300_ALPHA_BLEND_ENABLE
|
213 r300_translate_blend_function(eqRGB
, clamp
) |
214 ( r300_translate_blend_factor(srcRGB
) << R300_SRC_BLEND_SHIFT
) |
215 ( r300_translate_blend_factor(dstRGB
) << R300_DST_BLEND_SHIFT
);
217 /* Optimization: some operations do not require the destination color.
219 * When SRC_ALPHA_SATURATE is used, colorbuffer reads must be enabled,
220 * otherwise blending gives incorrect results. It seems to be
222 if (eqRGB
== PIPE_BLEND_MIN
|| eqA
== PIPE_BLEND_MIN
||
223 eqRGB
== PIPE_BLEND_MAX
|| eqA
== PIPE_BLEND_MAX
||
224 dstRGB
!= PIPE_BLENDFACTOR_ZERO
||
225 dstA
!= PIPE_BLENDFACTOR_ZERO
||
226 srcRGB
== PIPE_BLENDFACTOR_DST_COLOR
||
227 srcRGB
== PIPE_BLENDFACTOR_DST_ALPHA
||
228 srcRGB
== PIPE_BLENDFACTOR_INV_DST_COLOR
||
229 srcRGB
== PIPE_BLENDFACTOR_INV_DST_ALPHA
||
230 srcA
== PIPE_BLENDFACTOR_DST_COLOR
||
231 srcA
== PIPE_BLENDFACTOR_DST_ALPHA
||
232 srcA
== PIPE_BLENDFACTOR_INV_DST_COLOR
||
233 srcA
== PIPE_BLENDFACTOR_INV_DST_ALPHA
||
234 srcRGB
== PIPE_BLENDFACTOR_SRC_ALPHA_SATURATE
) {
235 /* Enable reading from the colorbuffer. */
236 blend_control
|= R300_READ_ENABLE
;
238 if (r300screen
->caps
.is_r500
) {
239 /* Optimization: Depending on incoming pixels, we can
240 * conditionally disable the reading in hardware... */
241 if (eqRGB
!= PIPE_BLEND_MIN
&& eqA
!= PIPE_BLEND_MIN
&&
242 eqRGB
!= PIPE_BLEND_MAX
&& eqA
!= PIPE_BLEND_MAX
) {
243 /* Disable reading if SRC_ALPHA == 0. */
244 if ((dstRGB
== PIPE_BLENDFACTOR_SRC_ALPHA
||
245 dstRGB
== PIPE_BLENDFACTOR_ZERO
) &&
246 (dstA
== PIPE_BLENDFACTOR_SRC_COLOR
||
247 dstA
== PIPE_BLENDFACTOR_SRC_ALPHA
||
248 dstA
== PIPE_BLENDFACTOR_ZERO
)) {
249 blend_control
|= R500_SRC_ALPHA_0_NO_READ
;
252 /* Disable reading if SRC_ALPHA == 1. */
253 if ((dstRGB
== PIPE_BLENDFACTOR_INV_SRC_ALPHA
||
254 dstRGB
== PIPE_BLENDFACTOR_ZERO
) &&
255 (dstA
== PIPE_BLENDFACTOR_INV_SRC_COLOR
||
256 dstA
== PIPE_BLENDFACTOR_INV_SRC_ALPHA
||
257 dstA
== PIPE_BLENDFACTOR_ZERO
)) {
258 blend_control
|= R500_SRC_ALPHA_1_NO_READ
;
264 /* Optimization: discard pixels which don't change the colorbuffer.
266 * The code below is non-trivial and some math is involved.
268 * Discarding pixels must be disabled when FP16 AA is enabled.
269 * This is a hardware bug. Also, this implementation wouldn't work
270 * with FP blending enabled and equation clamping disabled.
272 * Equations other than ADD are rarely used and therefore won't be
275 (eqRGB
== PIPE_BLEND_ADD
|| eqRGB
== PIPE_BLEND_REVERSE_SUBTRACT
) &&
276 (eqA
== PIPE_BLEND_ADD
|| eqA
== PIPE_BLEND_REVERSE_SUBTRACT
)) {
278 * REVERSE_SUBTRACT: Y-X
281 * If X = src*srcFactor = 0 and Y = dst*dstFactor = 1,
282 * then CB will not be changed.
284 * Given the srcFactor and dstFactor variables, we can derive
285 * what src and dst should be equal to and discard appropriate
288 if (blend_discard_if_src_alpha_0(srcRGB
, srcA
, dstRGB
, dstA
)) {
289 blend_control
|= R300_DISCARD_SRC_PIXELS_SRC_ALPHA_0
;
290 } else if (blend_discard_if_src_alpha_1(srcRGB
, srcA
,
292 blend_control
|= R300_DISCARD_SRC_PIXELS_SRC_ALPHA_1
;
293 } else if (blend_discard_if_src_color_0(srcRGB
, srcA
,
295 blend_control
|= R300_DISCARD_SRC_PIXELS_SRC_COLOR_0
;
296 } else if (blend_discard_if_src_color_1(srcRGB
, srcA
,
298 blend_control
|= R300_DISCARD_SRC_PIXELS_SRC_COLOR_1
;
299 } else if (blend_discard_if_src_alpha_color_0(srcRGB
, srcA
,
302 R300_DISCARD_SRC_PIXELS_SRC_ALPHA_COLOR_0
;
303 } else if (blend_discard_if_src_alpha_color_1(srcRGB
, srcA
,
306 R300_DISCARD_SRC_PIXELS_SRC_ALPHA_COLOR_1
;
311 if (srcA
!= srcRGB
|| dstA
!= dstRGB
|| eqA
!= eqRGB
) {
312 blend_control
|= R300_SEPARATE_ALPHA_ENABLE
;
313 alpha_blend_control
=
314 r300_translate_blend_function(eqA
, clamp
) |
315 (r300_translate_blend_factor(srcA
) << R300_SRC_BLEND_SHIFT
) |
316 (r300_translate_blend_factor(dstA
) << R300_DST_BLEND_SHIFT
);
320 /* PIPE_LOGICOP_* don't need to be translated, fortunately. */
321 if (state
->logicop_enable
) {
322 rop
= R300_RB3D_ROPCNTL_ROP_ENABLE
|
323 (state
->logicop_func
) << R300_RB3D_ROPCNTL_ROP_SHIFT
;
326 /* Color channel masks for all MRTs. */
327 color_channel_mask
= bgra_cmask(state
->rt
[0].colormask
);
328 if (r300screen
->caps
.is_r500
&& state
->independent_blend_enable
) {
329 if (state
->rt
[1].blend_enable
) {
330 color_channel_mask
|= bgra_cmask(state
->rt
[1].colormask
) << 4;
332 if (state
->rt
[2].blend_enable
) {
333 color_channel_mask
|= bgra_cmask(state
->rt
[2].colormask
) << 8;
335 if (state
->rt
[3].blend_enable
) {
336 color_channel_mask
|= bgra_cmask(state
->rt
[3].colormask
) << 12;
340 /* Neither fglrx nor classic r300 ever set this, regardless of dithering
341 * state. Since it's an optional implementation detail, we can leave it
342 * out and never dither.
344 * This could be revisited if we ever get quality or conformance hints.
347 dither = R300_RB3D_DITHER_CTL_DITHER_MODE_LUT |
348 R300_RB3D_DITHER_CTL_ALPHA_DITHER_MODE_LUT;
352 /* Build a command buffer. */
353 BEGIN_CB(blend
->cb
, 8);
354 OUT_CB_REG(R300_RB3D_ROPCNTL
, rop
);
355 OUT_CB_REG_SEQ(R300_RB3D_CBLEND
, 3);
356 OUT_CB(blend_control
);
357 OUT_CB(alpha_blend_control
);
358 OUT_CB(color_channel_mask
);
359 OUT_CB_REG(R300_RB3D_DITHER_CTL
, dither
);
362 /* The same as above, but with no colorbuffer reads and writes. */
363 BEGIN_CB(blend
->cb_no_readwrite
, 8);
364 OUT_CB_REG(R300_RB3D_ROPCNTL
, rop
);
365 OUT_CB_REG_SEQ(R300_RB3D_CBLEND
, 3);
369 OUT_CB_REG(R300_RB3D_DITHER_CTL
, dither
);
375 /* Bind blend state. */
376 static void r300_bind_blend_state(struct pipe_context
* pipe
,
379 struct r300_context
* r300
= r300_context(pipe
);
381 UPDATE_STATE(state
, r300
->blend_state
);
383 if (r300
->fs
.state
&& r300_pick_fragment_shader(r300
)) {
384 r300_mark_fs_code_dirty(r300
);
388 /* Free blend state. */
389 static void r300_delete_blend_state(struct pipe_context
* pipe
,
395 /* Convert float to 10bit integer */
396 static unsigned float_to_fixed10(float f
)
398 return CLAMP((unsigned)(f
* 1023.9f
), 0, 1023);
402 * Setup both R300 and R500 registers, figure out later which one to write. */
403 static void r300_set_blend_color(struct pipe_context
* pipe
,
404 const struct pipe_blend_color
* color
)
406 struct r300_context
* r300
= r300_context(pipe
);
407 struct pipe_framebuffer_state
*fb
= r300
->fb_state
.state
;
408 struct r300_blend_color_state
*state
=
409 (struct r300_blend_color_state
*)r300
->blend_color_state
.state
;
410 struct pipe_blend_color c
;
411 enum pipe_format format
= fb
->nr_cbufs
? fb
->cbufs
[0]->format
: 0;
414 state
->state
= *color
; /* Save it, so that we can reuse it in set_fb_state */
417 /* The blend color is dependent on the colorbuffer format. */
420 case PIPE_FORMAT_R8_UNORM
:
421 case PIPE_FORMAT_L8_UNORM
:
422 case PIPE_FORMAT_I8_UNORM
:
423 c
.color
[1] = c
.color
[0];
426 case PIPE_FORMAT_A8_UNORM
:
427 c
.color
[1] = c
.color
[3];
430 case PIPE_FORMAT_R8G8_UNORM
:
431 c
.color
[2] = c
.color
[1];
434 case PIPE_FORMAT_L8A8_UNORM
:
435 c
.color
[2] = c
.color
[3];
442 if (r300
->screen
->caps
.is_r500
) {
443 BEGIN_CB(state
->cb
, 3);
444 OUT_CB_REG_SEQ(R500_RB3D_CONSTANT_COLOR_AR
, 2);
447 case PIPE_FORMAT_R16G16B16A16_FLOAT
:
448 OUT_CB(util_float_to_half(c
.color
[2]) |
449 (util_float_to_half(c
.color
[3]) << 16));
450 OUT_CB(util_float_to_half(c
.color
[0]) |
451 (util_float_to_half(c
.color
[1]) << 16));
455 OUT_CB(float_to_fixed10(c
.color
[0]) |
456 (float_to_fixed10(c
.color
[3]) << 16));
457 OUT_CB(float_to_fixed10(c
.color
[2]) |
458 (float_to_fixed10(c
.color
[1]) << 16));
464 util_pack_color(c
.color
, PIPE_FORMAT_B8G8R8A8_UNORM
, &uc
);
466 BEGIN_CB(state
->cb
, 2);
467 OUT_CB_REG(R300_RB3D_BLEND_COLOR
, uc
.ui
);
471 r300_mark_atom_dirty(r300
, &r300
->blend_color_state
);
474 static void r300_set_clip_state(struct pipe_context
* pipe
,
475 const struct pipe_clip_state
* state
)
477 struct r300_context
* r300
= r300_context(pipe
);
478 struct r300_clip_state
*clip
=
479 (struct r300_clip_state
*)r300
->clip_state
.state
;
484 if (r300
->screen
->caps
.has_tcl
) {
485 r300
->clip_state
.size
= 2 + !!state
->nr
* 3 + state
->nr
* 4;
487 BEGIN_CB(clip
->cb
, r300
->clip_state
.size
);
489 OUT_CB_REG(R300_VAP_PVS_VECTOR_INDX_REG
,
490 (r300
->screen
->caps
.is_r500
?
491 R500_PVS_UCP_START
: R300_PVS_UCP_START
));
492 OUT_CB_ONE_REG(R300_VAP_PVS_UPLOAD_DATA
, state
->nr
* 4);
493 OUT_CB_TABLE(state
->ucp
, state
->nr
* 4);
495 OUT_CB_REG(R300_VAP_CLIP_CNTL
, ((1 << state
->nr
) - 1) |
496 R300_PS_UCP_MODE_CLIP_AS_TRIFAN
);
499 r300_mark_atom_dirty(r300
, &r300
->clip_state
);
501 draw_set_clip_state(r300
->draw
, state
);
506 r300_set_sample_mask(struct pipe_context
*pipe
,
507 unsigned sample_mask
)
512 /* Create a new depth, stencil, and alpha state based on the CSO dsa state.
514 * This contains the depth buffer, stencil buffer, alpha test, and such.
515 * On the Radeon, depth and stencil buffer setup are intertwined, which is
516 * the reason for some of the strange-looking assignments across registers. */
518 r300_create_dsa_state(struct pipe_context
* pipe
,
519 const struct pipe_depth_stencil_alpha_state
* state
)
521 struct r300_capabilities
*caps
= &r300_screen(pipe
->screen
)->caps
;
522 struct r300_dsa_state
* dsa
= CALLOC_STRUCT(r300_dsa_state
);
527 /* Depth test setup. - separate write mask depth for decomp flush */
528 if (state
->depth
.writemask
) {
529 dsa
->z_buffer_control
|= R300_Z_WRITE_ENABLE
;
532 if (state
->depth
.enabled
) {
533 dsa
->z_buffer_control
|= R300_Z_ENABLE
;
535 dsa
->z_stencil_control
|=
536 (r300_translate_depth_stencil_function(state
->depth
.func
) <<
540 /* Stencil buffer setup. */
541 if (state
->stencil
[0].enabled
) {
542 dsa
->z_buffer_control
|= R300_STENCIL_ENABLE
;
543 dsa
->z_stencil_control
|=
544 (r300_translate_depth_stencil_function(state
->stencil
[0].func
) <<
545 R300_S_FRONT_FUNC_SHIFT
) |
546 (r300_translate_stencil_op(state
->stencil
[0].fail_op
) <<
547 R300_S_FRONT_SFAIL_OP_SHIFT
) |
548 (r300_translate_stencil_op(state
->stencil
[0].zpass_op
) <<
549 R300_S_FRONT_ZPASS_OP_SHIFT
) |
550 (r300_translate_stencil_op(state
->stencil
[0].zfail_op
) <<
551 R300_S_FRONT_ZFAIL_OP_SHIFT
);
553 dsa
->stencil_ref_mask
=
554 (state
->stencil
[0].valuemask
<< R300_STENCILMASK_SHIFT
) |
555 (state
->stencil
[0].writemask
<< R300_STENCILWRITEMASK_SHIFT
);
557 if (state
->stencil
[1].enabled
) {
558 dsa
->two_sided
= TRUE
;
560 dsa
->z_buffer_control
|= R300_STENCIL_FRONT_BACK
;
561 dsa
->z_stencil_control
|=
562 (r300_translate_depth_stencil_function(state
->stencil
[1].func
) <<
563 R300_S_BACK_FUNC_SHIFT
) |
564 (r300_translate_stencil_op(state
->stencil
[1].fail_op
) <<
565 R300_S_BACK_SFAIL_OP_SHIFT
) |
566 (r300_translate_stencil_op(state
->stencil
[1].zpass_op
) <<
567 R300_S_BACK_ZPASS_OP_SHIFT
) |
568 (r300_translate_stencil_op(state
->stencil
[1].zfail_op
) <<
569 R300_S_BACK_ZFAIL_OP_SHIFT
);
571 dsa
->stencil_ref_bf
=
572 (state
->stencil
[1].valuemask
<< R300_STENCILMASK_SHIFT
) |
573 (state
->stencil
[1].writemask
<< R300_STENCILWRITEMASK_SHIFT
);
576 dsa
->z_buffer_control
|= R500_STENCIL_REFMASK_FRONT_BACK
;
578 dsa
->two_sided_stencil_ref
=
579 (state
->stencil
[0].valuemask
!= state
->stencil
[1].valuemask
||
580 state
->stencil
[0].writemask
!= state
->stencil
[1].writemask
);
585 /* Alpha test setup. */
586 if (state
->alpha
.enabled
) {
587 dsa
->alpha_function
=
588 r300_translate_alpha_function(state
->alpha
.func
) |
589 R300_FG_ALPHA_FUNC_ENABLE
;
591 dsa
->alpha_function
|= float_to_ubyte(state
->alpha
.ref_value
);
592 dsa
->alpha_value
= util_float_to_half(state
->alpha
.ref_value
);
595 dsa
->alpha_function_fp16
= dsa
->alpha_function
|
596 R500_FG_ALPHA_FUNC_FP16_ENABLE
;
597 dsa
->alpha_function
|= R500_FG_ALPHA_FUNC_8BIT
;
601 BEGIN_CB(&dsa
->cb_begin
, 10);
602 OUT_CB_REG(R300_FG_ALPHA_FUNC
, dsa
->alpha_function
);
603 OUT_CB_REG_SEQ(R300_ZB_CNTL
, 3);
604 OUT_CB(dsa
->z_buffer_control
);
605 OUT_CB(dsa
->z_stencil_control
);
606 OUT_CB(dsa
->stencil_ref_mask
);
607 OUT_CB_REG(R500_ZB_STENCILREFMASK_BF
, dsa
->stencil_ref_bf
);
608 OUT_CB_REG(R500_FG_ALPHA_VALUE
, dsa
->alpha_value
);
611 BEGIN_CB(&dsa
->cb_begin_fp16
, 10);
612 OUT_CB_REG(R300_FG_ALPHA_FUNC
, dsa
->alpha_function_fp16
);
613 OUT_CB_REG_SEQ(R300_ZB_CNTL
, 3);
614 OUT_CB(dsa
->z_buffer_control
);
615 OUT_CB(dsa
->z_stencil_control
);
616 OUT_CB(dsa
->stencil_ref_mask
);
617 OUT_CB_REG(R500_ZB_STENCILREFMASK_BF
, dsa
->stencil_ref_bf
);
618 OUT_CB_REG(R500_FG_ALPHA_VALUE
, dsa
->alpha_value
);
621 BEGIN_CB(dsa
->cb_zb_no_readwrite
, 10);
622 OUT_CB_REG(R300_FG_ALPHA_FUNC
, dsa
->alpha_function
);
623 OUT_CB_REG_SEQ(R300_ZB_CNTL
, 3);
627 OUT_CB_REG(R500_ZB_STENCILREFMASK_BF
, 0);
628 OUT_CB_REG(R500_FG_ALPHA_VALUE
, dsa
->alpha_value
);
631 BEGIN_CB(dsa
->cb_fp16_zb_no_readwrite
, 10);
632 OUT_CB_REG(R300_FG_ALPHA_FUNC
, dsa
->alpha_function_fp16
);
633 OUT_CB_REG_SEQ(R300_ZB_CNTL
, 3);
637 OUT_CB_REG(R500_ZB_STENCILREFMASK_BF
, 0);
638 OUT_CB_REG(R500_FG_ALPHA_VALUE
, dsa
->alpha_value
);
644 static void r300_dsa_inject_stencilref(struct r300_context
*r300
)
646 struct r300_dsa_state
*dsa
=
647 (struct r300_dsa_state
*)r300
->dsa_state
.state
;
652 dsa
->stencil_ref_mask
=
653 (dsa
->stencil_ref_mask
& ~R300_STENCILREF_MASK
) |
654 r300
->stencil_ref
.ref_value
[0];
655 dsa
->stencil_ref_bf
=
656 (dsa
->stencil_ref_bf
& ~R300_STENCILREF_MASK
) |
657 r300
->stencil_ref
.ref_value
[1];
660 /* Bind DSA state. */
661 static void r300_bind_dsa_state(struct pipe_context
* pipe
,
664 struct r300_context
* r300
= r300_context(pipe
);
670 UPDATE_STATE(state
, r300
->dsa_state
);
672 r300_mark_atom_dirty(r300
, &r300
->hyperz_state
); /* Will be updated before the emission. */
673 r300_dsa_inject_stencilref(r300
);
676 /* Free DSA state. */
677 static void r300_delete_dsa_state(struct pipe_context
* pipe
,
683 static void r300_set_stencil_ref(struct pipe_context
* pipe
,
684 const struct pipe_stencil_ref
* sr
)
686 struct r300_context
* r300
= r300_context(pipe
);
688 r300
->stencil_ref
= *sr
;
690 r300_dsa_inject_stencilref(r300
);
691 r300_mark_atom_dirty(r300
, &r300
->dsa_state
);
694 static void r300_tex_set_tiling_flags(struct r300_context
*r300
,
695 struct r300_resource
*tex
,
698 /* Check if the macrotile flag needs to be changed.
699 * Skip changing the flags otherwise. */
700 if (tex
->tex
.macrotile
[tex
->surface_level
] !=
701 tex
->tex
.macrotile
[level
]) {
702 r300
->rws
->buffer_set_tiling(tex
->buf
, r300
->cs
,
703 tex
->tex
.microtile
, tex
->tex
.macrotile
[level
],
704 tex
->tex
.stride_in_bytes
[0]);
706 tex
->surface_level
= level
;
710 /* This switcheroo is needed just because of goddamned MACRO_SWITCH. */
711 static void r300_fb_set_tiling_flags(struct r300_context
*r300
,
712 const struct pipe_framebuffer_state
*state
)
716 /* Set tiling flags for new surfaces. */
717 for (i
= 0; i
< state
->nr_cbufs
; i
++) {
718 r300_tex_set_tiling_flags(r300
,
719 r300_resource(state
->cbufs
[i
]->texture
),
720 state
->cbufs
[i
]->u
.tex
.level
);
723 r300_tex_set_tiling_flags(r300
,
724 r300_resource(state
->zsbuf
->texture
),
725 state
->zsbuf
->u
.tex
.level
);
729 static void r300_print_fb_surf_info(struct pipe_surface
*surf
, unsigned index
,
732 struct pipe_resource
*tex
= surf
->texture
;
733 struct r300_resource
*rtex
= r300_resource(tex
);
736 "r300: %s[%i] Dim: %ix%i, Firstlayer: %i, "
737 "Lastlayer: %i, Level: %i, Format: %s\n"
739 "r300: TEX: Macro: %s, Micro: %s, Pitch: %i, "
740 "Dim: %ix%ix%i, LastLevel: %i, Format: %s\n",
742 binding
, index
, surf
->width
, surf
->height
,
743 surf
->u
.tex
.first_layer
, surf
->u
.tex
.last_layer
, surf
->u
.tex
.level
,
744 util_format_short_name(surf
->format
),
746 rtex
->tex
.macrotile
[0] ? "YES" : " NO",
747 rtex
->tex
.microtile
? "YES" : " NO",
748 rtex
->tex
.stride_in_pixels
[0],
749 tex
->width0
, tex
->height0
, tex
->depth0
,
750 tex
->last_level
, util_format_short_name(tex
->format
));
753 void r300_mark_fb_state_dirty(struct r300_context
*r300
,
754 enum r300_fb_state_change change
)
756 struct pipe_framebuffer_state
*state
= r300
->fb_state
.state
;
757 boolean can_hyperz
= r300
->rws
->get_value(r300
->rws
, R300_CAN_HYPERZ
);
759 r300_mark_atom_dirty(r300
, &r300
->gpu_flush
);
760 r300_mark_atom_dirty(r300
, &r300
->fb_state
);
762 /* What is marked as dirty depends on the enum r300_fb_state_change. */
763 if (change
== R300_CHANGED_FB_STATE
) {
764 r300_mark_atom_dirty(r300
, &r300
->aa_state
);
765 r300_mark_atom_dirty(r300
, &r300
->dsa_state
); /* for AlphaRef */
766 r300_set_blend_color(&r300
->context
, r300
->blend_color_state
.state
);
769 if (change
== R300_CHANGED_FB_STATE
||
770 change
== R300_CHANGED_HYPERZ_FLAG
) {
771 r300_mark_atom_dirty(r300
, &r300
->hyperz_state
);
774 if (change
== R300_CHANGED_FB_STATE
||
775 change
== R300_CHANGED_MULTIWRITE
) {
776 r300_mark_atom_dirty(r300
, &r300
->fb_state_pipelined
);
779 /* Now compute the fb_state atom size. */
780 r300
->fb_state
.size
= 2 + (8 * state
->nr_cbufs
);
782 if (r300
->cbzb_clear
)
783 r300
->fb_state
.size
+= 10;
784 else if (state
->zsbuf
) {
785 r300
->fb_state
.size
+= 10;
787 r300
->fb_state
.size
+= 8;
790 /* The size of the rest of atoms stays the same. */
794 r300_set_framebuffer_state(struct pipe_context
* pipe
,
795 const struct pipe_framebuffer_state
* state
)
797 struct r300_context
* r300
= r300_context(pipe
);
798 struct r300_aa_state
*aa
= (struct r300_aa_state
*)r300
->aa_state
.state
;
799 struct pipe_framebuffer_state
*old_state
= r300
->fb_state
.state
;
800 unsigned max_width
, max_height
, i
;
801 uint32_t zbuffer_bpp
= 0;
803 if (r300
->screen
->caps
.is_r500
) {
804 max_width
= max_height
= 4096;
805 } else if (r300
->screen
->caps
.is_r400
) {
806 max_width
= max_height
= 4021;
808 max_width
= max_height
= 2560;
811 if (state
->width
> max_width
|| state
->height
> max_height
) {
812 fprintf(stderr
, "r300: Implementation error: Render targets are too "
813 "big in %s, refusing to bind framebuffer state!\n", __FUNCTION__
);
817 if (old_state
->zsbuf
&& r300
->zmask_in_use
&& !r300
->hyperz_locked
) {
818 /* There is a zmask in use, what are we gonna do? */
820 if (!pipe_surface_equal(old_state
->zsbuf
, state
->zsbuf
)) {
821 /* Decompress the currently bound zbuffer before we bind another one. */
822 r300_decompress_zmask(r300
);
823 r300
->hiz_in_use
= FALSE
;
826 /* We don't bind another zbuffer, so lock the current one. */
827 r300
->hyperz_locked
= TRUE
;
828 pipe_surface_reference(&r300
->locked_zbuffer
, old_state
->zsbuf
);
830 } else if (r300
->hyperz_locked
&& r300
->locked_zbuffer
) {
831 /* We have a locked zbuffer now, what are we gonna do? */
833 if (!pipe_surface_equal(r300
->locked_zbuffer
, state
->zsbuf
)) {
834 /* We are binding some other zbuffer, so decompress the locked one,
835 * it gets unlocked automatically. */
836 r300_decompress_zmask_locked_unsafe(r300
);
837 r300
->hiz_in_use
= FALSE
;
839 /* We are binding the locked zbuffer again, so unlock it. */
840 r300
->hyperz_locked
= FALSE
;
845 /* If nr_cbufs is changed from zero to non-zero or vice versa... */
846 if (!!old_state
->nr_cbufs
!= !!state
->nr_cbufs
) {
847 r300_mark_atom_dirty(r300
, &r300
->blend_state
);
849 /* If zsbuf is set from NULL to non-NULL or vice versa.. */
850 if (!!old_state
->zsbuf
!= !!state
->zsbuf
) {
851 r300_mark_atom_dirty(r300
, &r300
->dsa_state
);
854 /* The tiling flags are dependent on the surface miplevel, unfortunately. */
855 r300_fb_set_tiling_flags(r300
, state
);
857 util_copy_framebuffer_state(r300
->fb_state
.state
, state
);
859 if (!r300
->hyperz_locked
) {
860 pipe_surface_reference(&r300
->locked_zbuffer
, NULL
);
863 r300_mark_fb_state_dirty(r300
, R300_CHANGED_FB_STATE
);
866 switch (util_format_get_blocksize(state
->zsbuf
->texture
->format
)) {
875 /* Polygon offset depends on the zbuffer bit depth. */
876 if (r300
->zbuffer_bpp
!= zbuffer_bpp
) {
877 r300
->zbuffer_bpp
= zbuffer_bpp
;
879 if (r300
->polygon_offset_enabled
)
880 r300_mark_atom_dirty(r300
, &r300
->rs_state
);
884 /* Set up AA config. */
885 if (state
->nr_cbufs
&& state
->cbufs
[0]->texture
->nr_samples
> 1) {
886 aa
->aa_config
= R300_GB_AA_CONFIG_AA_ENABLE
;
888 switch (state
->cbufs
[0]->texture
->nr_samples
) {
890 aa
->aa_config
|= R300_GB_AA_CONFIG_NUM_AA_SUBSAMPLES_2
;
893 aa
->aa_config
|= R300_GB_AA_CONFIG_NUM_AA_SUBSAMPLES_3
;
896 aa
->aa_config
|= R300_GB_AA_CONFIG_NUM_AA_SUBSAMPLES_4
;
899 aa
->aa_config
|= R300_GB_AA_CONFIG_NUM_AA_SUBSAMPLES_6
;
906 if (DBG_ON(r300
, DBG_FB
)) {
907 fprintf(stderr
, "r300: set_framebuffer_state:\n");
908 for (i
= 0; i
< state
->nr_cbufs
; i
++) {
909 r300_print_fb_surf_info(state
->cbufs
[i
], i
, "CB");
912 r300_print_fb_surf_info(state
->zsbuf
, 0, "ZB");
917 /* Create fragment shader state. */
918 static void* r300_create_fs_state(struct pipe_context
* pipe
,
919 const struct pipe_shader_state
* shader
)
921 struct r300_fragment_shader
* fs
= NULL
;
923 fs
= (struct r300_fragment_shader
*)CALLOC_STRUCT(r300_fragment_shader
);
925 /* Copy state directly into shader. */
927 fs
->state
.tokens
= tgsi_dup_tokens(shader
->tokens
);
932 void r300_mark_fs_code_dirty(struct r300_context
*r300
)
934 struct r300_fragment_shader
* fs
= r300_fs(r300
);
936 r300_mark_atom_dirty(r300
, &r300
->fs
);
937 r300_mark_atom_dirty(r300
, &r300
->fs_rc_constant_state
);
938 r300_mark_atom_dirty(r300
, &r300
->fs_constants
);
939 r300
->fs
.size
= fs
->shader
->cb_code_size
;
941 if (r300
->screen
->caps
.is_r500
) {
942 r300
->fs_rc_constant_state
.size
= fs
->shader
->rc_state_count
* 7;
943 r300
->fs_constants
.size
= fs
->shader
->externals_count
* 4 + 3;
945 r300
->fs_rc_constant_state
.size
= fs
->shader
->rc_state_count
* 5;
946 r300
->fs_constants
.size
= fs
->shader
->externals_count
* 4 + 1;
949 ((struct r300_constant_buffer
*)r300
->fs_constants
.state
)->remap_table
=
950 fs
->shader
->code
.constants_remap_table
;
953 /* Bind fragment shader state. */
954 static void r300_bind_fs_state(struct pipe_context
* pipe
, void* shader
)
956 struct r300_context
* r300
= r300_context(pipe
);
957 struct r300_fragment_shader
* fs
= (struct r300_fragment_shader
*)shader
;
958 struct pipe_framebuffer_state
*fb
= r300
->fb_state
.state
;
959 boolean last_multi_write
;
962 r300
->fs
.state
= NULL
;
966 last_multi_write
= r300_fragment_shader_writes_all(r300_fs(r300
));
969 r300_pick_fragment_shader(r300
);
970 r300_mark_fs_code_dirty(r300
);
972 if (fb
->nr_cbufs
> 1 &&
973 last_multi_write
!= r300_fragment_shader_writes_all(fs
)) {
974 r300_mark_fb_state_dirty(r300
, R300_CHANGED_MULTIWRITE
);
977 r300_mark_atom_dirty(r300
, &r300
->rs_block_state
); /* Will be updated before the emission. */
980 /* Delete fragment shader state. */
981 static void r300_delete_fs_state(struct pipe_context
* pipe
, void* shader
)
983 struct r300_fragment_shader
* fs
= (struct r300_fragment_shader
*)shader
;
984 struct r300_fragment_shader_code
*tmp
, *ptr
= fs
->first
;
989 rc_constants_destroy(&tmp
->code
.constants
);
993 FREE((void*)fs
->state
.tokens
);
997 static void r300_set_polygon_stipple(struct pipe_context
* pipe
,
998 const struct pipe_poly_stipple
* state
)
1000 /* XXX no idea how to set this up, but not terribly important */
1003 /* Create a new rasterizer state based on the CSO rasterizer state.
1005 * This is a very large chunk of state, and covers most of the graphics
1006 * backend (GB), geometry assembly (GA), and setup unit (SU) blocks.
1008 * In a not entirely unironic sidenote, this state has nearly nothing to do
1009 * with the actual block on the Radeon called the rasterizer (RS). */
1010 static void* r300_create_rs_state(struct pipe_context
* pipe
,
1011 const struct pipe_rasterizer_state
* state
)
1013 struct r300_rs_state
* rs
= CALLOC_STRUCT(r300_rs_state
);
1015 uint32_t vap_control_status
; /* R300_VAP_CNTL_STATUS: 0x2140 */
1016 uint32_t point_size
; /* R300_GA_POINT_SIZE: 0x421c */
1017 uint32_t point_minmax
; /* R300_GA_POINT_MINMAX: 0x4230 */
1018 uint32_t line_control
; /* R300_GA_LINE_CNTL: 0x4234 */
1019 uint32_t polygon_offset_enable
; /* R300_SU_POLY_OFFSET_ENABLE: 0x42b4 */
1020 uint32_t cull_mode
; /* R300_SU_CULL_MODE: 0x42b8 */
1021 uint32_t line_stipple_config
; /* R300_GA_LINE_STIPPLE_CONFIG: 0x4328 */
1022 uint32_t line_stipple_value
; /* R300_GA_LINE_STIPPLE_VALUE: 0x4260 */
1023 uint32_t polygon_mode
; /* R300_GA_POLY_MODE: 0x4288 */
1024 uint32_t clip_rule
; /* R300_SC_CLIP_RULE: 0x43D0 */
1025 uint32_t round_mode
; /* R300_GA_ROUND_MODE: 0x428c */
1027 /* Point sprites texture coordinates, 0: lower left, 1: upper right */
1028 float point_texcoord_left
= 0; /* R300_GA_POINT_S0: 0x4200 */
1029 float point_texcoord_bottom
= 0;/* R300_GA_POINT_T0: 0x4204 */
1030 float point_texcoord_right
= 1; /* R300_GA_POINT_S1: 0x4208 */
1031 float point_texcoord_top
= 0; /* R300_GA_POINT_T1: 0x420c */
1032 boolean vclamp
= TRUE
;
1035 /* Copy rasterizer state. */
1037 rs
->rs_draw
= *state
;
1039 rs
->rs
.sprite_coord_enable
= state
->point_quad_rasterization
*
1040 state
->sprite_coord_enable
;
1042 /* Override some states for Draw. */
1043 rs
->rs_draw
.sprite_coord_enable
= 0; /* We can do this in HW. */
1045 #ifdef PIPE_ARCH_LITTLE_ENDIAN
1046 vap_control_status
= R300_VC_NO_SWAP
;
1048 vap_control_status
= R300_VC_32BIT_SWAP
;
1051 /* If no TCL engine is present, turn off the HW TCL. */
1052 if (!r300_screen(pipe
->screen
)->caps
.has_tcl
) {
1053 vap_control_status
|= R300_VAP_TCL_BYPASS
;
1056 /* Point size width and height. */
1058 pack_float_16_6x(state
->point_size
) |
1059 (pack_float_16_6x(state
->point_size
) << R300_POINTSIZE_X_SHIFT
);
1061 /* Point size clamping. */
1062 if (state
->point_size_per_vertex
) {
1063 /* Per-vertex point size.
1064 * Clamp to [0, max FB size] */
1065 psiz
= pipe
->screen
->get_paramf(pipe
->screen
,
1066 PIPE_CAP_MAX_POINT_WIDTH
);
1068 pack_float_16_6x(psiz
) << R300_GA_POINT_MINMAX_MAX_SHIFT
;
1070 /* We cannot disable the point-size vertex output,
1072 psiz
= state
->point_size
;
1074 (pack_float_16_6x(psiz
) << R300_GA_POINT_MINMAX_MIN_SHIFT
) |
1075 (pack_float_16_6x(psiz
) << R300_GA_POINT_MINMAX_MAX_SHIFT
);
1079 line_control
= pack_float_16_6x(state
->line_width
) |
1080 R300_GA_LINE_CNTL_END_TYPE_COMP
;
1082 /* Enable polygon mode */
1084 if (state
->fill_front
!= PIPE_POLYGON_MODE_FILL
||
1085 state
->fill_back
!= PIPE_POLYGON_MODE_FILL
) {
1086 polygon_mode
= R300_GA_POLY_MODE_DUAL
;
1090 if (state
->front_ccw
)
1091 cull_mode
= R300_FRONT_FACE_CCW
;
1093 cull_mode
= R300_FRONT_FACE_CW
;
1095 /* Polygon offset */
1096 polygon_offset_enable
= 0;
1097 if (util_get_offset(state
, state
->fill_front
)) {
1098 polygon_offset_enable
|= R300_FRONT_ENABLE
;
1100 if (util_get_offset(state
, state
->fill_back
)) {
1101 polygon_offset_enable
|= R300_BACK_ENABLE
;
1104 rs
->polygon_offset_enable
= polygon_offset_enable
!= 0;
1109 r300_translate_polygon_mode_front(state
->fill_front
);
1111 r300_translate_polygon_mode_back(state
->fill_back
);
1114 if (state
->cull_face
& PIPE_FACE_FRONT
) {
1115 cull_mode
|= R300_CULL_FRONT
;
1117 if (state
->cull_face
& PIPE_FACE_BACK
) {
1118 cull_mode
|= R300_CULL_BACK
;
1121 if (state
->line_stipple_enable
) {
1122 line_stipple_config
=
1123 R300_GA_LINE_STIPPLE_CONFIG_LINE_RESET_LINE
|
1124 (fui((float)state
->line_stipple_factor
) &
1125 R300_GA_LINE_STIPPLE_CONFIG_STIPPLE_SCALE_MASK
);
1126 /* XXX this might need to be scaled up */
1127 line_stipple_value
= state
->line_stipple_pattern
;
1129 line_stipple_config
= 0;
1130 line_stipple_value
= 0;
1133 if (state
->flatshade
) {
1134 rs
->color_control
= R300_SHADE_MODEL_FLAT
;
1136 rs
->color_control
= R300_SHADE_MODEL_SMOOTH
;
1139 clip_rule
= state
->scissor
? 0xAAAA : 0xFFFF;
1141 /* Point sprites coord mode */
1142 if (rs
->rs
.sprite_coord_enable
) {
1143 switch (state
->sprite_coord_mode
) {
1144 case PIPE_SPRITE_COORD_UPPER_LEFT
:
1145 point_texcoord_top
= 0.0f
;
1146 point_texcoord_bottom
= 1.0f
;
1148 case PIPE_SPRITE_COORD_LOWER_LEFT
:
1149 point_texcoord_top
= 1.0f
;
1150 point_texcoord_bottom
= 0.0f
;
1155 /* Vertex color clamping. FP20 means no clamping. */
1157 R300_GA_ROUND_MODE_GEOMETRY_ROUND_NEAREST
|
1158 (!vclamp
? (R300_GA_ROUND_MODE_RGB_CLAMP_FP20
|
1159 R300_GA_ROUND_MODE_ALPHA_CLAMP_FP20
) : 0);
1161 /* Build the main command buffer. */
1162 BEGIN_CB(rs
->cb_main
, RS_STATE_MAIN_SIZE
);
1163 OUT_CB_REG(R300_VAP_CNTL_STATUS
, vap_control_status
);
1164 OUT_CB_REG(R300_GA_POINT_SIZE
, point_size
);
1165 OUT_CB_REG_SEQ(R300_GA_POINT_MINMAX
, 2);
1166 OUT_CB(point_minmax
);
1167 OUT_CB(line_control
);
1168 OUT_CB_REG_SEQ(R300_SU_POLY_OFFSET_ENABLE
, 2);
1169 OUT_CB(polygon_offset_enable
);
1170 rs
->cull_mode_index
= 9;
1172 OUT_CB_REG(R300_GA_LINE_STIPPLE_CONFIG
, line_stipple_config
);
1173 OUT_CB_REG(R300_GA_LINE_STIPPLE_VALUE
, line_stipple_value
);
1174 OUT_CB_REG(R300_GA_POLY_MODE
, polygon_mode
);
1175 OUT_CB_REG(R300_GA_ROUND_MODE
, round_mode
);
1176 OUT_CB_REG(R300_SC_CLIP_RULE
, clip_rule
);
1177 OUT_CB_REG_SEQ(R300_GA_POINT_S0
, 4);
1178 OUT_CB_32F(point_texcoord_left
);
1179 OUT_CB_32F(point_texcoord_bottom
);
1180 OUT_CB_32F(point_texcoord_right
);
1181 OUT_CB_32F(point_texcoord_top
);
1184 /* Build the two command buffers for polygon offset setup. */
1185 if (polygon_offset_enable
) {
1186 float scale
= state
->offset_scale
* 12;
1187 float offset
= state
->offset_units
* 4;
1189 BEGIN_CB(rs
->cb_poly_offset_zb16
, 5);
1190 OUT_CB_REG_SEQ(R300_SU_POLY_OFFSET_FRONT_SCALE
, 4);
1197 offset
= state
->offset_units
* 2;
1199 BEGIN_CB(rs
->cb_poly_offset_zb24
, 5);
1200 OUT_CB_REG_SEQ(R300_SU_POLY_OFFSET_FRONT_SCALE
, 4);
1211 /* Bind rasterizer state. */
1212 static void r300_bind_rs_state(struct pipe_context
* pipe
, void* state
)
1214 struct r300_context
* r300
= r300_context(pipe
);
1215 struct r300_rs_state
* rs
= (struct r300_rs_state
*)state
;
1216 int last_sprite_coord_enable
= r300
->sprite_coord_enable
;
1217 boolean last_two_sided_color
= r300
->two_sided_color
;
1219 if (r300
->draw
&& rs
) {
1220 draw_set_rasterizer_state(r300
->draw
, &rs
->rs_draw
, state
);
1224 r300
->polygon_offset_enabled
= rs
->polygon_offset_enable
;
1225 r300
->sprite_coord_enable
= rs
->rs
.sprite_coord_enable
;
1226 r300
->two_sided_color
= rs
->rs
.light_twoside
;
1228 r300
->polygon_offset_enabled
= FALSE
;
1229 r300
->sprite_coord_enable
= 0;
1230 r300
->two_sided_color
= FALSE
;
1233 UPDATE_STATE(state
, r300
->rs_state
);
1234 r300
->rs_state
.size
= RS_STATE_MAIN_SIZE
+ (r300
->polygon_offset_enabled
? 5 : 0);
1236 if (last_sprite_coord_enable
!= r300
->sprite_coord_enable
||
1237 last_two_sided_color
!= r300
->two_sided_color
) {
1238 r300_mark_atom_dirty(r300
, &r300
->rs_block_state
);
1242 /* Free rasterizer state. */
1243 static void r300_delete_rs_state(struct pipe_context
* pipe
, void* state
)
1249 r300_create_sampler_state(struct pipe_context
* pipe
,
1250 const struct pipe_sampler_state
* state
)
1252 struct r300_context
* r300
= r300_context(pipe
);
1253 struct r300_sampler_state
* sampler
= CALLOC_STRUCT(r300_sampler_state
);
1254 boolean is_r500
= r300
->screen
->caps
.is_r500
;
1257 sampler
->state
= *state
;
1259 /* r300 doesn't handle CLAMP and MIRROR_CLAMP correctly when either MAG
1260 * or MIN filter is NEAREST. Since texwrap produces same results
1261 * for CLAMP and CLAMP_TO_EDGE, we use them instead. */
1262 if (sampler
->state
.min_img_filter
== PIPE_TEX_FILTER_NEAREST
||
1263 sampler
->state
.mag_img_filter
== PIPE_TEX_FILTER_NEAREST
) {
1265 if (sampler
->state
.wrap_s
== PIPE_TEX_WRAP_CLAMP
)
1266 sampler
->state
.wrap_s
= PIPE_TEX_WRAP_CLAMP_TO_EDGE
;
1267 else if (sampler
->state
.wrap_s
== PIPE_TEX_WRAP_MIRROR_CLAMP
)
1268 sampler
->state
.wrap_s
= PIPE_TEX_WRAP_MIRROR_CLAMP_TO_EDGE
;
1271 if (sampler
->state
.wrap_t
== PIPE_TEX_WRAP_CLAMP
)
1272 sampler
->state
.wrap_t
= PIPE_TEX_WRAP_CLAMP_TO_EDGE
;
1273 else if (sampler
->state
.wrap_t
== PIPE_TEX_WRAP_MIRROR_CLAMP
)
1274 sampler
->state
.wrap_t
= PIPE_TEX_WRAP_MIRROR_CLAMP_TO_EDGE
;
1277 if (sampler
->state
.wrap_r
== PIPE_TEX_WRAP_CLAMP
)
1278 sampler
->state
.wrap_r
= PIPE_TEX_WRAP_CLAMP_TO_EDGE
;
1279 else if (sampler
->state
.wrap_r
== PIPE_TEX_WRAP_MIRROR_CLAMP
)
1280 sampler
->state
.wrap_r
= PIPE_TEX_WRAP_MIRROR_CLAMP_TO_EDGE
;
1284 (r300_translate_wrap(sampler
->state
.wrap_s
) << R300_TX_WRAP_S_SHIFT
) |
1285 (r300_translate_wrap(sampler
->state
.wrap_t
) << R300_TX_WRAP_T_SHIFT
) |
1286 (r300_translate_wrap(sampler
->state
.wrap_r
) << R300_TX_WRAP_R_SHIFT
);
1288 sampler
->filter0
|= r300_translate_tex_filters(state
->min_img_filter
,
1289 state
->mag_img_filter
,
1290 state
->min_mip_filter
,
1291 state
->max_anisotropy
> 0);
1293 sampler
->filter0
|= r300_anisotropy(state
->max_anisotropy
);
1295 /* Unfortunately, r300-r500 don't support floating-point mipmap lods. */
1296 /* We must pass these to the merge function to clamp them properly. */
1297 sampler
->min_lod
= (unsigned)MAX2(state
->min_lod
, 0);
1298 sampler
->max_lod
= (unsigned)MAX2(ceilf(state
->max_lod
), 0);
1300 lod_bias
= CLAMP((int)(state
->lod_bias
* 32 + 1), -(1 << 9), (1 << 9) - 1);
1302 sampler
->filter1
|= (lod_bias
<< R300_LOD_BIAS_SHIFT
) & R300_LOD_BIAS_MASK
;
1304 /* This is very high quality anisotropic filtering for R5xx.
1305 * It's good for benchmarking the performance of texturing but
1306 * in practice we don't want to slow down the driver because it's
1307 * a pretty good performance killer. Feel free to play with it. */
1308 if (DBG_ON(r300
, DBG_ANISOHQ
) && is_r500
) {
1309 sampler
->filter1
|= r500_anisotropy(state
->max_anisotropy
);
1312 /* R500-specific fixups and optimizations */
1313 if (r300
->screen
->caps
.is_r500
) {
1314 sampler
->filter1
|= R500_BORDER_FIX
;
1317 return (void*)sampler
;
1320 static void r300_bind_sampler_states(struct pipe_context
* pipe
,
1324 struct r300_context
* r300
= r300_context(pipe
);
1325 struct r300_textures_state
* state
=
1326 (struct r300_textures_state
*)r300
->textures_state
.state
;
1327 unsigned tex_units
= r300
->screen
->caps
.num_tex_units
;
1329 if (count
> tex_units
) {
1333 memcpy(state
->sampler_states
, states
, sizeof(void*) * count
);
1334 state
->sampler_state_count
= count
;
1336 r300_mark_atom_dirty(r300
, &r300
->textures_state
);
1339 static void r300_lacks_vertex_textures(struct pipe_context
* pipe
,
1345 static void r300_delete_sampler_state(struct pipe_context
* pipe
, void* state
)
1350 static uint32_t r300_assign_texture_cache_region(unsigned index
, unsigned num
)
1352 /* This looks like a hack, but I believe it's suppose to work like
1353 * that. To illustrate how this works, let's assume you have 5 textures.
1354 * From docs, 5 and the successive numbers are:
1362 * First 3 textures will get 3/4 of size of the cache, divived evenly
1363 * between them. The last 1/4 of the cache must be divided between
1364 * the last 2 textures, each will therefore get 1/8 of the cache.
1365 * Why not just to use "5 + texture_index" ?
1367 * This simple trick works for all "num" <= 16.
1370 return R300_TX_CACHE(R300_TX_CACHE_WHOLE
);
1372 return R300_TX_CACHE(num
+ index
);
1375 static void r300_set_fragment_sampler_views(struct pipe_context
* pipe
,
1377 struct pipe_sampler_view
** views
)
1379 struct r300_context
* r300
= r300_context(pipe
);
1380 struct r300_textures_state
* state
=
1381 (struct r300_textures_state
*)r300
->textures_state
.state
;
1382 struct r300_resource
*texture
;
1383 unsigned i
, real_num_views
= 0, view_index
= 0;
1384 unsigned tex_units
= r300
->screen
->caps
.num_tex_units
;
1385 boolean dirty_tex
= FALSE
;
1387 if (count
> tex_units
) {
1391 /* Calculate the real number of views. */
1392 for (i
= 0; i
< count
; i
++) {
1397 for (i
= 0; i
< count
; i
++) {
1398 pipe_sampler_view_reference(
1399 (struct pipe_sampler_view
**)&state
->sampler_views
[i
],
1406 /* A new sampler view (= texture)... */
1409 /* Set the texrect factor in the fragment shader.
1410 * Needed for RECT and NPOT fallback. */
1411 texture
= r300_resource(views
[i
]->texture
);
1412 if (texture
->tex
.is_npot
) {
1413 r300_mark_atom_dirty(r300
, &r300
->fs_rc_constant_state
);
1416 state
->sampler_views
[i
]->texcache_region
=
1417 r300_assign_texture_cache_region(view_index
, real_num_views
);
1421 for (i
= count
; i
< tex_units
; i
++) {
1422 if (state
->sampler_views
[i
]) {
1423 pipe_sampler_view_reference(
1424 (struct pipe_sampler_view
**)&state
->sampler_views
[i
],
1429 state
->sampler_view_count
= count
;
1431 r300_mark_atom_dirty(r300
, &r300
->textures_state
);
1434 r300_mark_atom_dirty(r300
, &r300
->texture_cache_inval
);
1438 static struct pipe_sampler_view
*
1439 r300_create_sampler_view(struct pipe_context
*pipe
,
1440 struct pipe_resource
*texture
,
1441 const struct pipe_sampler_view
*templ
)
1443 struct r300_sampler_view
*view
= CALLOC_STRUCT(r300_sampler_view
);
1444 struct r300_resource
*tex
= r300_resource(texture
);
1445 boolean is_r500
= r300_screen(pipe
->screen
)->caps
.is_r500
;
1446 boolean dxtc_swizzle
= r300_screen(pipe
->screen
)->caps
.dxtc_swizzle
;
1449 view
->base
= *templ
;
1450 view
->base
.reference
.count
= 1;
1451 view
->base
.context
= pipe
;
1452 view
->base
.texture
= NULL
;
1453 pipe_resource_reference(&view
->base
.texture
, texture
);
1455 view
->swizzle
[0] = templ
->swizzle_r
;
1456 view
->swizzle
[1] = templ
->swizzle_g
;
1457 view
->swizzle
[2] = templ
->swizzle_b
;
1458 view
->swizzle
[3] = templ
->swizzle_a
;
1460 view
->format
= tex
->tx_format
;
1461 view
->format
.format1
|= r300_translate_texformat(templ
->format
,
1466 view
->format
.format2
|= r500_tx_format_msb_bit(templ
->format
);
1470 return (struct pipe_sampler_view
*)view
;
1474 r300_sampler_view_destroy(struct pipe_context
*pipe
,
1475 struct pipe_sampler_view
*view
)
1477 pipe_resource_reference(&view
->texture
, NULL
);
1481 static void r300_set_scissor_state(struct pipe_context
* pipe
,
1482 const struct pipe_scissor_state
* state
)
1484 struct r300_context
* r300
= r300_context(pipe
);
1486 memcpy(r300
->scissor_state
.state
, state
,
1487 sizeof(struct pipe_scissor_state
));
1489 r300_mark_atom_dirty(r300
, &r300
->scissor_state
);
1492 static void r300_set_viewport_state(struct pipe_context
* pipe
,
1493 const struct pipe_viewport_state
* state
)
1495 struct r300_context
* r300
= r300_context(pipe
);
1496 struct r300_viewport_state
* viewport
=
1497 (struct r300_viewport_state
*)r300
->viewport_state
.state
;
1499 r300
->viewport
= *state
;
1502 draw_set_viewport_state(r300
->draw
, state
);
1503 viewport
->vte_control
= R300_VTX_XY_FMT
| R300_VTX_Z_FMT
;
1507 /* Do the transform in HW. */
1508 viewport
->vte_control
= R300_VTX_W0_FMT
;
1510 if (state
->scale
[0] != 1.0f
) {
1511 viewport
->xscale
= state
->scale
[0];
1512 viewport
->vte_control
|= R300_VPORT_X_SCALE_ENA
;
1514 if (state
->scale
[1] != 1.0f
) {
1515 viewport
->yscale
= state
->scale
[1];
1516 viewport
->vte_control
|= R300_VPORT_Y_SCALE_ENA
;
1518 if (state
->scale
[2] != 1.0f
) {
1519 viewport
->zscale
= state
->scale
[2];
1520 viewport
->vte_control
|= R300_VPORT_Z_SCALE_ENA
;
1522 if (state
->translate
[0] != 0.0f
) {
1523 viewport
->xoffset
= state
->translate
[0];
1524 viewport
->vte_control
|= R300_VPORT_X_OFFSET_ENA
;
1526 if (state
->translate
[1] != 0.0f
) {
1527 viewport
->yoffset
= state
->translate
[1];
1528 viewport
->vte_control
|= R300_VPORT_Y_OFFSET_ENA
;
1530 if (state
->translate
[2] != 0.0f
) {
1531 viewport
->zoffset
= state
->translate
[2];
1532 viewport
->vte_control
|= R300_VPORT_Z_OFFSET_ENA
;
1535 r300_mark_atom_dirty(r300
, &r300
->viewport_state
);
1536 if (r300
->fs
.state
&& r300_fs(r300
)->shader
->inputs
.wpos
!= ATTR_UNUSED
) {
1537 r300_mark_atom_dirty(r300
, &r300
->fs_rc_constant_state
);
1541 static void r300_set_vertex_buffers(struct pipe_context
* pipe
,
1543 const struct pipe_vertex_buffer
* buffers
)
1545 struct r300_context
* r300
= r300_context(pipe
);
1547 struct pipe_vertex_buffer dummy_vb
= {0};
1549 /* There must be at least one vertex buffer set, otherwise it locks up. */
1551 dummy_vb
.buffer
= r300
->dummy_vb
;
1552 buffers
= &dummy_vb
;
1556 u_vbuf_mgr_set_vertex_buffers(r300
->vbuf_mgr
, count
, buffers
);
1558 if (r300
->screen
->caps
.has_tcl
) {
1560 for (i
= 0; i
< count
; i
++) {
1561 if (buffers
[i
].buffer
&&
1562 !r300_resource(buffers
[i
].buffer
)->b
.user_ptr
) {
1565 r300
->vertex_arrays_dirty
= TRUE
;
1568 draw_set_vertex_buffers(r300
->draw
, count
, buffers
);
1572 static void r300_set_index_buffer(struct pipe_context
* pipe
,
1573 const struct pipe_index_buffer
*ib
)
1575 struct r300_context
* r300
= r300_context(pipe
);
1577 if (ib
&& ib
->buffer
) {
1578 assert(ib
->offset
% ib
->index_size
== 0);
1580 pipe_resource_reference(&r300
->index_buffer
.buffer
, ib
->buffer
);
1581 memcpy(&r300
->index_buffer
, ib
, sizeof(r300
->index_buffer
));
1582 r300
->index_buffer
.offset
/= r300
->index_buffer
.index_size
;
1585 pipe_resource_reference(&r300
->index_buffer
.buffer
, NULL
);
1586 memset(&r300
->index_buffer
, 0, sizeof(r300
->index_buffer
));
1589 if (!r300
->screen
->caps
.has_tcl
) {
1590 draw_set_index_buffer(r300
->draw
, ib
);
1594 /* Initialize the PSC tables. */
1595 static void r300_vertex_psc(struct r300_vertex_element_state
*velems
)
1597 struct r300_vertex_stream_state
*vstream
= &velems
->vertex_stream
;
1598 uint16_t type
, swizzle
;
1599 enum pipe_format format
;
1602 /* Vertex shaders have no semantics on their inputs,
1603 * so PSC should just route stuff based on the vertex elements,
1604 * and not on attrib information. */
1605 for (i
= 0; i
< velems
->count
; i
++) {
1606 format
= velems
->velem
[i
].src_format
;
1608 type
= r300_translate_vertex_data_type(format
);
1609 if (type
== R300_INVALID_FORMAT
) {
1610 fprintf(stderr
, "r300: Bad vertex format %s.\n",
1611 util_format_short_name(format
));
1616 type
|= i
<< R300_DST_VEC_LOC_SHIFT
;
1617 swizzle
= r300_translate_vertex_data_swizzle(format
);
1620 vstream
->vap_prog_stream_cntl
[i
>> 1] |= type
<< 16;
1621 vstream
->vap_prog_stream_cntl_ext
[i
>> 1] |= swizzle
<< 16;
1623 vstream
->vap_prog_stream_cntl
[i
>> 1] |= type
;
1624 vstream
->vap_prog_stream_cntl_ext
[i
>> 1] |= swizzle
;
1628 /* Set the last vector in the PSC. */
1632 vstream
->vap_prog_stream_cntl
[i
>> 1] |=
1633 (R300_LAST_VEC
<< (i
& 1 ? 16 : 0));
1635 vstream
->count
= (i
>> 1) + 1;
1638 static void* r300_create_vertex_elements_state(struct pipe_context
* pipe
,
1640 const struct pipe_vertex_element
* attribs
)
1642 struct r300_context
*r300
= r300_context(pipe
);
1643 struct r300_vertex_element_state
*velems
;
1645 struct pipe_vertex_element dummy_attrib
= {0};
1647 /* R300 Programmable Stream Control (PSC) doesn't support 0 vertex elements. */
1649 dummy_attrib
.src_format
= PIPE_FORMAT_R8G8B8A8_UNORM
;
1650 attribs
= &dummy_attrib
;
1652 } else if (count
> 16) {
1653 fprintf(stderr
, "r300: More than 16 vertex elements are not supported,"
1654 " requested %i, using 16.\n", count
);
1658 velems
= CALLOC_STRUCT(r300_vertex_element_state
);
1662 velems
->count
= count
;
1663 velems
->vmgr_elements
=
1664 u_vbuf_mgr_create_vertex_elements(r300
->vbuf_mgr
, count
, attribs
,
1667 if (r300_screen(pipe
->screen
)->caps
.has_tcl
) {
1669 * The unused components will be replaced by (..., 0, 1). */
1670 r300_vertex_psc(velems
);
1672 for (i
= 0; i
< count
; i
++) {
1673 velems
->format_size
[i
] =
1674 align(util_format_get_blocksize(velems
->velem
[i
].src_format
), 4);
1675 velems
->vertex_size_dwords
+= velems
->format_size
[i
] / 4;
1682 static void r300_bind_vertex_elements_state(struct pipe_context
*pipe
,
1685 struct r300_context
*r300
= r300_context(pipe
);
1686 struct r300_vertex_element_state
*velems
= state
;
1688 if (velems
== NULL
) {
1692 r300
->velems
= velems
;
1694 u_vbuf_mgr_bind_vertex_elements(r300
->vbuf_mgr
, state
, velems
->vmgr_elements
);
1697 draw_set_vertex_elements(r300
->draw
, velems
->count
, velems
->velem
);
1701 UPDATE_STATE(&velems
->vertex_stream
, r300
->vertex_stream_state
);
1702 r300
->vertex_stream_state
.size
= (1 + velems
->vertex_stream
.count
) * 2;
1703 r300
->vertex_arrays_dirty
= TRUE
;
1706 static void r300_delete_vertex_elements_state(struct pipe_context
*pipe
, void *state
)
1708 struct r300_context
*r300
= r300_context(pipe
);
1709 struct r300_vertex_element_state
*velems
= state
;
1711 u_vbuf_mgr_destroy_vertex_elements(r300
->vbuf_mgr
, velems
->vmgr_elements
);
1715 static void* r300_create_vs_state(struct pipe_context
* pipe
,
1716 const struct pipe_shader_state
* shader
)
1718 struct r300_context
* r300
= r300_context(pipe
);
1719 struct r300_vertex_shader
* vs
= CALLOC_STRUCT(r300_vertex_shader
);
1721 /* Copy state directly into shader. */
1722 vs
->state
= *shader
;
1723 vs
->state
.tokens
= tgsi_dup_tokens(shader
->tokens
);
1725 if (r300
->screen
->caps
.has_tcl
) {
1726 r300_init_vs_outputs(vs
);
1727 r300_translate_vertex_shader(r300
, vs
);
1729 r300_draw_init_vertex_shader(r300
->draw
, vs
);
1735 static void r300_bind_vs_state(struct pipe_context
* pipe
, void* shader
)
1737 struct r300_context
* r300
= r300_context(pipe
);
1738 struct r300_vertex_shader
* vs
= (struct r300_vertex_shader
*)shader
;
1741 r300
->vs_state
.state
= NULL
;
1744 if (vs
== r300
->vs_state
.state
) {
1747 r300
->vs_state
.state
= vs
;
1749 /* The majority of the RS block bits is dependent on the vertex shader. */
1750 r300_mark_atom_dirty(r300
, &r300
->rs_block_state
); /* Will be updated before the emission. */
1752 if (r300
->screen
->caps
.has_tcl
) {
1753 unsigned fc_op_dwords
= r300
->screen
->caps
.is_r500
? 3 : 2;
1754 r300_mark_atom_dirty(r300
, &r300
->vs_state
);
1755 r300
->vs_state
.size
=
1756 vs
->code
.length
+ 9 +
1757 (vs
->code
.num_fc_ops
? vs
->code
.num_fc_ops
* fc_op_dwords
+ 4 : 0);
1759 r300_mark_atom_dirty(r300
, &r300
->vs_constants
);
1760 r300
->vs_constants
.size
=
1762 (vs
->externals_count
? vs
->externals_count
* 4 + 3 : 0) +
1763 (vs
->immediates_count
? vs
->immediates_count
* 4 + 3 : 0);
1765 ((struct r300_constant_buffer
*)r300
->vs_constants
.state
)->remap_table
=
1766 vs
->code
.constants_remap_table
;
1768 r300_mark_atom_dirty(r300
, &r300
->pvs_flush
);
1770 draw_bind_vertex_shader(r300
->draw
,
1771 (struct draw_vertex_shader
*)vs
->draw_vs
);
1775 static void r300_delete_vs_state(struct pipe_context
* pipe
, void* shader
)
1777 struct r300_context
* r300
= r300_context(pipe
);
1778 struct r300_vertex_shader
* vs
= (struct r300_vertex_shader
*)shader
;
1780 if (r300
->screen
->caps
.has_tcl
) {
1781 rc_constants_destroy(&vs
->code
.constants
);
1782 if (vs
->code
.constants_remap_table
)
1783 FREE(vs
->code
.constants_remap_table
);
1785 draw_delete_vertex_shader(r300
->draw
,
1786 (struct draw_vertex_shader
*)vs
->draw_vs
);
1789 FREE((void*)vs
->state
.tokens
);
1793 static void r300_set_constant_buffer(struct pipe_context
*pipe
,
1794 uint shader
, uint index
,
1795 struct pipe_resource
*buf
)
1797 struct r300_context
* r300
= r300_context(pipe
);
1798 struct r300_constant_buffer
*cbuf
;
1799 struct r300_resource
*rbuf
= r300_resource(buf
);
1803 case PIPE_SHADER_VERTEX
:
1804 cbuf
= (struct r300_constant_buffer
*)r300
->vs_constants
.state
;
1806 case PIPE_SHADER_FRAGMENT
:
1807 cbuf
= (struct r300_constant_buffer
*)r300
->fs_constants
.state
;
1813 if (buf
== NULL
|| buf
->width0
== 0)
1816 if (rbuf
->b
.user_ptr
)
1817 mapped
= (uint32_t*)rbuf
->b
.user_ptr
;
1818 else if (rbuf
->constant_buffer
)
1819 mapped
= (uint32_t*)rbuf
->constant_buffer
;
1823 if (shader
== PIPE_SHADER_FRAGMENT
||
1824 (shader
== PIPE_SHADER_VERTEX
&& r300
->screen
->caps
.has_tcl
)) {
1828 if (shader
== PIPE_SHADER_VERTEX
) {
1829 if (r300
->screen
->caps
.has_tcl
) {
1830 struct r300_vertex_shader
*vs
=
1831 (struct r300_vertex_shader
*)r300
->vs_state
.state
;
1834 cbuf
->buffer_base
= 0;
1838 cbuf
->buffer_base
= r300
->vs_const_base
;
1839 r300
->vs_const_base
+= vs
->code
.constants
.Count
;
1840 if (r300
->vs_const_base
> R500_MAX_PVS_CONST_VECS
) {
1841 r300
->vs_const_base
= vs
->code
.constants
.Count
;
1842 cbuf
->buffer_base
= 0;
1843 r300_mark_atom_dirty(r300
, &r300
->pvs_flush
);
1845 r300_mark_atom_dirty(r300
, &r300
->vs_constants
);
1846 } else if (r300
->draw
) {
1847 draw_set_mapped_constant_buffer(r300
->draw
, PIPE_SHADER_VERTEX
,
1848 0, mapped
, buf
->width0
);
1850 } else if (shader
== PIPE_SHADER_FRAGMENT
) {
1851 r300_mark_atom_dirty(r300
, &r300
->fs_constants
);
1855 void r300_init_state_functions(struct r300_context
* r300
)
1857 r300
->context
.create_blend_state
= r300_create_blend_state
;
1858 r300
->context
.bind_blend_state
= r300_bind_blend_state
;
1859 r300
->context
.delete_blend_state
= r300_delete_blend_state
;
1861 r300
->context
.set_blend_color
= r300_set_blend_color
;
1863 r300
->context
.set_clip_state
= r300_set_clip_state
;
1864 r300
->context
.set_sample_mask
= r300_set_sample_mask
;
1866 r300
->context
.set_constant_buffer
= r300_set_constant_buffer
;
1868 r300
->context
.create_depth_stencil_alpha_state
= r300_create_dsa_state
;
1869 r300
->context
.bind_depth_stencil_alpha_state
= r300_bind_dsa_state
;
1870 r300
->context
.delete_depth_stencil_alpha_state
= r300_delete_dsa_state
;
1872 r300
->context
.set_stencil_ref
= r300_set_stencil_ref
;
1874 r300
->context
.set_framebuffer_state
= r300_set_framebuffer_state
;
1876 r300
->context
.create_fs_state
= r300_create_fs_state
;
1877 r300
->context
.bind_fs_state
= r300_bind_fs_state
;
1878 r300
->context
.delete_fs_state
= r300_delete_fs_state
;
1880 r300
->context
.set_polygon_stipple
= r300_set_polygon_stipple
;
1882 r300
->context
.create_rasterizer_state
= r300_create_rs_state
;
1883 r300
->context
.bind_rasterizer_state
= r300_bind_rs_state
;
1884 r300
->context
.delete_rasterizer_state
= r300_delete_rs_state
;
1886 r300
->context
.create_sampler_state
= r300_create_sampler_state
;
1887 r300
->context
.bind_fragment_sampler_states
= r300_bind_sampler_states
;
1888 r300
->context
.bind_vertex_sampler_states
= r300_lacks_vertex_textures
;
1889 r300
->context
.delete_sampler_state
= r300_delete_sampler_state
;
1891 r300
->context
.set_fragment_sampler_views
= r300_set_fragment_sampler_views
;
1892 r300
->context
.create_sampler_view
= r300_create_sampler_view
;
1893 r300
->context
.sampler_view_destroy
= r300_sampler_view_destroy
;
1895 r300
->context
.set_scissor_state
= r300_set_scissor_state
;
1897 r300
->context
.set_viewport_state
= r300_set_viewport_state
;
1899 r300
->context
.set_vertex_buffers
= r300_set_vertex_buffers
;
1900 r300
->context
.set_index_buffer
= r300_set_index_buffer
;
1901 r300
->context
.redefine_user_buffer
= u_default_redefine_user_buffer
;
1903 r300
->context
.create_vertex_elements_state
= r300_create_vertex_elements_state
;
1904 r300
->context
.bind_vertex_elements_state
= r300_bind_vertex_elements_state
;
1905 r300
->context
.delete_vertex_elements_state
= r300_delete_vertex_elements_state
;
1907 r300
->context
.create_vs_state
= r300_create_vs_state
;
1908 r300
->context
.bind_vs_state
= r300_bind_vs_state
;
1909 r300
->context
.delete_vs_state
= r300_delete_vs_state
;