2 * Copyright 2008 Corbin Simpson <MostAwesomeDude@gmail.com>
3 * Copyright 2009 Marek Olšák <maraeo@gmail.com>
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * on the rights to use, copy, modify, merge, publish, distribute, sub
9 * license, and/or sell copies of the Software, and to permit persons to whom
10 * the Software is furnished to do so, subject to the following conditions:
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
20 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
21 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
22 * USE OR OTHER DEALINGS IN THE SOFTWARE. */
24 #include "draw/draw_context.h"
26 #include "util/u_framebuffer.h"
27 #include "util/u_math.h"
28 #include "util/u_mm.h"
29 #include "util/u_memory.h"
30 #include "util/u_pack_color.h"
31 #include "util/u_transfer.h"
33 #include "tgsi/tgsi_parse.h"
35 #include "pipe/p_config.h"
38 #include "r300_context.h"
39 #include "r300_emit.h"
41 #include "r300_screen.h"
42 #include "r300_screen_buffer.h"
43 #include "r300_state_inlines.h"
45 #include "r300_texture.h"
47 #include "r300_winsys.h"
48 #include "r300_hyperz.h"
50 /* r300_state: Functions used to intialize state context by translating
51 * Gallium state objects into semi-native r300 state objects. */
53 #define UPDATE_STATE(cso, atom) \
54 if (cso != atom.state) { \
56 r300_mark_atom_dirty(r300, &(atom)); \
59 static boolean
blend_discard_if_src_alpha_0(unsigned srcRGB
, unsigned srcA
,
60 unsigned dstRGB
, unsigned dstA
)
62 /* If the blend equation is ADD or REVERSE_SUBTRACT,
63 * SRC_ALPHA == 0, and the following state is set, the colorbuffer
64 * will not be changed.
65 * Notice that the dst factors are the src factors inverted. */
66 return (srcRGB
== PIPE_BLENDFACTOR_SRC_ALPHA
||
67 srcRGB
== PIPE_BLENDFACTOR_SRC_ALPHA_SATURATE
||
68 srcRGB
== PIPE_BLENDFACTOR_ZERO
) &&
69 (srcA
== PIPE_BLENDFACTOR_SRC_COLOR
||
70 srcA
== PIPE_BLENDFACTOR_SRC_ALPHA
||
71 srcA
== PIPE_BLENDFACTOR_SRC_ALPHA_SATURATE
||
72 srcA
== PIPE_BLENDFACTOR_ZERO
) &&
73 (dstRGB
== PIPE_BLENDFACTOR_INV_SRC_ALPHA
||
74 dstRGB
== PIPE_BLENDFACTOR_ONE
) &&
75 (dstA
== PIPE_BLENDFACTOR_INV_SRC_COLOR
||
76 dstA
== PIPE_BLENDFACTOR_INV_SRC_ALPHA
||
77 dstA
== PIPE_BLENDFACTOR_ONE
);
80 static boolean
blend_discard_if_src_alpha_1(unsigned srcRGB
, unsigned srcA
,
81 unsigned dstRGB
, unsigned dstA
)
83 /* If the blend equation is ADD or REVERSE_SUBTRACT,
84 * SRC_ALPHA == 1, and the following state is set, the colorbuffer
85 * will not be changed.
86 * Notice that the dst factors are the src factors inverted. */
87 return (srcRGB
== PIPE_BLENDFACTOR_INV_SRC_ALPHA
||
88 srcRGB
== PIPE_BLENDFACTOR_ZERO
) &&
89 (srcA
== PIPE_BLENDFACTOR_INV_SRC_COLOR
||
90 srcA
== PIPE_BLENDFACTOR_INV_SRC_ALPHA
||
91 srcA
== PIPE_BLENDFACTOR_ZERO
) &&
92 (dstRGB
== PIPE_BLENDFACTOR_SRC_ALPHA
||
93 dstRGB
== PIPE_BLENDFACTOR_ONE
) &&
94 (dstA
== PIPE_BLENDFACTOR_SRC_COLOR
||
95 dstA
== PIPE_BLENDFACTOR_SRC_ALPHA
||
96 dstA
== PIPE_BLENDFACTOR_ONE
);
99 static boolean
blend_discard_if_src_color_0(unsigned srcRGB
, unsigned srcA
,
100 unsigned dstRGB
, unsigned dstA
)
102 /* If the blend equation is ADD or REVERSE_SUBTRACT,
103 * SRC_COLOR == (0,0,0), and the following state is set, the colorbuffer
104 * will not be changed.
105 * Notice that the dst factors are the src factors inverted. */
106 return (srcRGB
== PIPE_BLENDFACTOR_SRC_COLOR
||
107 srcRGB
== PIPE_BLENDFACTOR_ZERO
) &&
108 (srcA
== PIPE_BLENDFACTOR_ZERO
) &&
109 (dstRGB
== PIPE_BLENDFACTOR_INV_SRC_COLOR
||
110 dstRGB
== PIPE_BLENDFACTOR_ONE
) &&
111 (dstA
== PIPE_BLENDFACTOR_ONE
);
114 static boolean
blend_discard_if_src_color_1(unsigned srcRGB
, unsigned srcA
,
115 unsigned dstRGB
, unsigned dstA
)
117 /* If the blend equation is ADD or REVERSE_SUBTRACT,
118 * SRC_COLOR == (1,1,1), and the following state is set, the colorbuffer
119 * will not be changed.
120 * Notice that the dst factors are the src factors inverted. */
121 return (srcRGB
== PIPE_BLENDFACTOR_INV_SRC_COLOR
||
122 srcRGB
== PIPE_BLENDFACTOR_ZERO
) &&
123 (srcA
== PIPE_BLENDFACTOR_ZERO
) &&
124 (dstRGB
== PIPE_BLENDFACTOR_SRC_COLOR
||
125 dstRGB
== PIPE_BLENDFACTOR_ONE
) &&
126 (dstA
== PIPE_BLENDFACTOR_ONE
);
129 static boolean
blend_discard_if_src_alpha_color_0(unsigned srcRGB
, unsigned srcA
,
130 unsigned dstRGB
, unsigned dstA
)
132 /* If the blend equation is ADD or REVERSE_SUBTRACT,
133 * SRC_ALPHA_COLOR == (0,0,0,0), and the following state is set,
134 * the colorbuffer will not be changed.
135 * Notice that the dst factors are the src factors inverted. */
136 return (srcRGB
== PIPE_BLENDFACTOR_SRC_COLOR
||
137 srcRGB
== PIPE_BLENDFACTOR_SRC_ALPHA
||
138 srcRGB
== PIPE_BLENDFACTOR_SRC_ALPHA_SATURATE
||
139 srcRGB
== PIPE_BLENDFACTOR_ZERO
) &&
140 (srcA
== PIPE_BLENDFACTOR_SRC_COLOR
||
141 srcA
== PIPE_BLENDFACTOR_SRC_ALPHA
||
142 srcA
== PIPE_BLENDFACTOR_SRC_ALPHA_SATURATE
||
143 srcA
== PIPE_BLENDFACTOR_ZERO
) &&
144 (dstRGB
== PIPE_BLENDFACTOR_INV_SRC_COLOR
||
145 dstRGB
== PIPE_BLENDFACTOR_INV_SRC_ALPHA
||
146 dstRGB
== PIPE_BLENDFACTOR_ONE
) &&
147 (dstA
== PIPE_BLENDFACTOR_INV_SRC_COLOR
||
148 dstA
== PIPE_BLENDFACTOR_INV_SRC_ALPHA
||
149 dstA
== PIPE_BLENDFACTOR_ONE
);
152 static boolean
blend_discard_if_src_alpha_color_1(unsigned srcRGB
, unsigned srcA
,
153 unsigned dstRGB
, unsigned dstA
)
155 /* If the blend equation is ADD or REVERSE_SUBTRACT,
156 * SRC_ALPHA_COLOR == (1,1,1,1), and the following state is set,
157 * the colorbuffer will not be changed.
158 * Notice that the dst factors are the src factors inverted. */
159 return (srcRGB
== PIPE_BLENDFACTOR_INV_SRC_COLOR
||
160 srcRGB
== PIPE_BLENDFACTOR_INV_SRC_ALPHA
||
161 srcRGB
== PIPE_BLENDFACTOR_ZERO
) &&
162 (srcA
== PIPE_BLENDFACTOR_INV_SRC_COLOR
||
163 srcA
== PIPE_BLENDFACTOR_INV_SRC_ALPHA
||
164 srcA
== PIPE_BLENDFACTOR_ZERO
) &&
165 (dstRGB
== PIPE_BLENDFACTOR_SRC_COLOR
||
166 dstRGB
== PIPE_BLENDFACTOR_SRC_ALPHA
||
167 dstRGB
== PIPE_BLENDFACTOR_ONE
) &&
168 (dstA
== PIPE_BLENDFACTOR_SRC_COLOR
||
169 dstA
== PIPE_BLENDFACTOR_SRC_ALPHA
||
170 dstA
== PIPE_BLENDFACTOR_ONE
);
173 static unsigned bgra_cmask(unsigned mask
)
175 /* Gallium uses RGBA color ordering while R300 expects BGRA. */
177 return ((mask
& PIPE_MASK_R
) << 2) |
178 ((mask
& PIPE_MASK_B
) >> 2) |
179 (mask
& (PIPE_MASK_G
| PIPE_MASK_A
));
182 /* Create a new blend state based on the CSO blend state.
184 * This encompasses alpha blending, logic/raster ops, and blend dithering. */
185 static void* r300_create_blend_state(struct pipe_context
* pipe
,
186 const struct pipe_blend_state
* state
)
188 struct r300_screen
* r300screen
= r300_screen(pipe
->screen
);
189 struct r300_blend_state
* blend
= CALLOC_STRUCT(r300_blend_state
);
190 uint32_t blend_control
= 0; /* R300_RB3D_CBLEND: 0x4e04 */
191 uint32_t alpha_blend_control
= 0; /* R300_RB3D_ABLEND: 0x4e08 */
192 uint32_t color_channel_mask
= 0; /* R300_RB3D_COLOR_CHANNEL_MASK: 0x4e0c */
193 uint32_t rop
= 0; /* R300_RB3D_ROPCNTL: 0x4e18 */
194 uint32_t dither
= 0; /* R300_RB3D_DITHER_CTL: 0x4e50 */
197 if (state
->rt
[0].blend_enable
)
199 unsigned eqRGB
= state
->rt
[0].rgb_func
;
200 unsigned srcRGB
= state
->rt
[0].rgb_src_factor
;
201 unsigned dstRGB
= state
->rt
[0].rgb_dst_factor
;
203 unsigned eqA
= state
->rt
[0].alpha_func
;
204 unsigned srcA
= state
->rt
[0].alpha_src_factor
;
205 unsigned dstA
= state
->rt
[0].alpha_dst_factor
;
207 /* despite the name, ALPHA_BLEND_ENABLE has nothing to do with alpha,
208 * this is just the crappy D3D naming */
209 blend_control
= R300_ALPHA_BLEND_ENABLE
|
210 r300_translate_blend_function(eqRGB
) |
211 ( r300_translate_blend_factor(srcRGB
) << R300_SRC_BLEND_SHIFT
) |
212 ( r300_translate_blend_factor(dstRGB
) << R300_DST_BLEND_SHIFT
);
214 /* Optimization: some operations do not require the destination color.
216 * When SRC_ALPHA_SATURATE is used, colorbuffer reads must be enabled,
217 * otherwise blending gives incorrect results. It seems to be
219 if (eqRGB
== PIPE_BLEND_MIN
|| eqA
== PIPE_BLEND_MIN
||
220 eqRGB
== PIPE_BLEND_MAX
|| eqA
== PIPE_BLEND_MAX
||
221 dstRGB
!= PIPE_BLENDFACTOR_ZERO
||
222 dstA
!= PIPE_BLENDFACTOR_ZERO
||
223 srcRGB
== PIPE_BLENDFACTOR_DST_COLOR
||
224 srcRGB
== PIPE_BLENDFACTOR_DST_ALPHA
||
225 srcRGB
== PIPE_BLENDFACTOR_INV_DST_COLOR
||
226 srcRGB
== PIPE_BLENDFACTOR_INV_DST_ALPHA
||
227 srcA
== PIPE_BLENDFACTOR_DST_COLOR
||
228 srcA
== PIPE_BLENDFACTOR_DST_ALPHA
||
229 srcA
== PIPE_BLENDFACTOR_INV_DST_COLOR
||
230 srcA
== PIPE_BLENDFACTOR_INV_DST_ALPHA
||
231 srcRGB
== PIPE_BLENDFACTOR_SRC_ALPHA_SATURATE
) {
232 /* Enable reading from the colorbuffer. */
233 blend_control
|= R300_READ_ENABLE
;
235 if (r300screen
->caps
.is_r500
) {
236 /* Optimization: Depending on incoming pixels, we can
237 * conditionally disable the reading in hardware... */
238 if (eqRGB
!= PIPE_BLEND_MIN
&& eqA
!= PIPE_BLEND_MIN
&&
239 eqRGB
!= PIPE_BLEND_MAX
&& eqA
!= PIPE_BLEND_MAX
) {
240 /* Disable reading if SRC_ALPHA == 0. */
241 if ((dstRGB
== PIPE_BLENDFACTOR_SRC_ALPHA
||
242 dstRGB
== PIPE_BLENDFACTOR_ZERO
) &&
243 (dstA
== PIPE_BLENDFACTOR_SRC_COLOR
||
244 dstA
== PIPE_BLENDFACTOR_SRC_ALPHA
||
245 dstA
== PIPE_BLENDFACTOR_ZERO
)) {
246 blend_control
|= R500_SRC_ALPHA_0_NO_READ
;
249 /* Disable reading if SRC_ALPHA == 1. */
250 if ((dstRGB
== PIPE_BLENDFACTOR_INV_SRC_ALPHA
||
251 dstRGB
== PIPE_BLENDFACTOR_ZERO
) &&
252 (dstA
== PIPE_BLENDFACTOR_INV_SRC_COLOR
||
253 dstA
== PIPE_BLENDFACTOR_INV_SRC_ALPHA
||
254 dstA
== PIPE_BLENDFACTOR_ZERO
)) {
255 blend_control
|= R500_SRC_ALPHA_1_NO_READ
;
261 /* Optimization: discard pixels which don't change the colorbuffer.
263 * The code below is non-trivial and some math is involved.
265 * Discarding pixels must be disabled when FP16 AA is enabled.
266 * This is a hardware bug. Also, this implementation wouldn't work
267 * with FP blending enabled and equation clamping disabled.
269 * Equations other than ADD are rarely used and therefore won't be
271 if ((eqRGB
== PIPE_BLEND_ADD
|| eqRGB
== PIPE_BLEND_REVERSE_SUBTRACT
) &&
272 (eqA
== PIPE_BLEND_ADD
|| eqA
== PIPE_BLEND_REVERSE_SUBTRACT
)) {
274 * REVERSE_SUBTRACT: Y-X
277 * If X = src*srcFactor = 0 and Y = dst*dstFactor = 1,
278 * then CB will not be changed.
280 * Given the srcFactor and dstFactor variables, we can derive
281 * what src and dst should be equal to and discard appropriate
284 if (blend_discard_if_src_alpha_0(srcRGB
, srcA
, dstRGB
, dstA
)) {
285 blend_control
|= R300_DISCARD_SRC_PIXELS_SRC_ALPHA_0
;
286 } else if (blend_discard_if_src_alpha_1(srcRGB
, srcA
,
288 blend_control
|= R300_DISCARD_SRC_PIXELS_SRC_ALPHA_1
;
289 } else if (blend_discard_if_src_color_0(srcRGB
, srcA
,
291 blend_control
|= R300_DISCARD_SRC_PIXELS_SRC_COLOR_0
;
292 } else if (blend_discard_if_src_color_1(srcRGB
, srcA
,
294 blend_control
|= R300_DISCARD_SRC_PIXELS_SRC_COLOR_1
;
295 } else if (blend_discard_if_src_alpha_color_0(srcRGB
, srcA
,
298 R300_DISCARD_SRC_PIXELS_SRC_ALPHA_COLOR_0
;
299 } else if (blend_discard_if_src_alpha_color_1(srcRGB
, srcA
,
302 R300_DISCARD_SRC_PIXELS_SRC_ALPHA_COLOR_1
;
307 if (srcA
!= srcRGB
|| dstA
!= dstRGB
|| eqA
!= eqRGB
) {
308 blend_control
|= R300_SEPARATE_ALPHA_ENABLE
;
309 alpha_blend_control
=
310 r300_translate_blend_function(eqA
) |
311 (r300_translate_blend_factor(srcA
) << R300_SRC_BLEND_SHIFT
) |
312 (r300_translate_blend_factor(dstA
) << R300_DST_BLEND_SHIFT
);
316 /* PIPE_LOGICOP_* don't need to be translated, fortunately. */
317 if (state
->logicop_enable
) {
318 rop
= R300_RB3D_ROPCNTL_ROP_ENABLE
|
319 (state
->logicop_func
) << R300_RB3D_ROPCNTL_ROP_SHIFT
;
322 /* Color channel masks for all MRTs. */
323 color_channel_mask
= bgra_cmask(state
->rt
[0].colormask
);
324 if (r300screen
->caps
.is_r500
&& state
->independent_blend_enable
) {
325 if (state
->rt
[1].blend_enable
) {
326 color_channel_mask
|= bgra_cmask(state
->rt
[1].colormask
) << 4;
328 if (state
->rt
[2].blend_enable
) {
329 color_channel_mask
|= bgra_cmask(state
->rt
[2].colormask
) << 8;
331 if (state
->rt
[3].blend_enable
) {
332 color_channel_mask
|= bgra_cmask(state
->rt
[3].colormask
) << 12;
336 /* Neither fglrx nor classic r300 ever set this, regardless of dithering
337 * state. Since it's an optional implementation detail, we can leave it
338 * out and never dither.
340 * This could be revisited if we ever get quality or conformance hints.
343 dither = R300_RB3D_DITHER_CTL_DITHER_MODE_LUT |
344 R300_RB3D_DITHER_CTL_ALPHA_DITHER_MODE_LUT;
348 /* Build a command buffer. */
349 BEGIN_CB(blend
->cb
, 8);
350 OUT_CB_REG(R300_RB3D_ROPCNTL
, rop
);
351 OUT_CB_REG_SEQ(R300_RB3D_CBLEND
, 3);
352 OUT_CB(blend_control
);
353 OUT_CB(alpha_blend_control
);
354 OUT_CB(color_channel_mask
);
355 OUT_CB_REG(R300_RB3D_DITHER_CTL
, dither
);
358 /* The same as above, but with no colorbuffer reads and writes. */
359 BEGIN_CB(blend
->cb_no_readwrite
, 8);
360 OUT_CB_REG(R300_RB3D_ROPCNTL
, rop
);
361 OUT_CB_REG_SEQ(R300_RB3D_CBLEND
, 3);
365 OUT_CB_REG(R300_RB3D_DITHER_CTL
, dither
);
371 /* Bind blend state. */
372 static void r300_bind_blend_state(struct pipe_context
* pipe
,
375 struct r300_context
* r300
= r300_context(pipe
);
377 UPDATE_STATE(state
, r300
->blend_state
);
380 /* Free blend state. */
381 static void r300_delete_blend_state(struct pipe_context
* pipe
,
387 /* Convert float to 10bit integer */
388 static unsigned float_to_fixed10(float f
)
390 return CLAMP((unsigned)(f
* 1023.9f
), 0, 1023);
394 * Setup both R300 and R500 registers, figure out later which one to write. */
395 static void r300_set_blend_color(struct pipe_context
* pipe
,
396 const struct pipe_blend_color
* color
)
398 struct r300_context
* r300
= r300_context(pipe
);
399 struct r300_blend_color_state
* state
=
400 (struct r300_blend_color_state
*)r300
->blend_color_state
.state
;
403 if (r300
->screen
->caps
.is_r500
) {
404 /* XXX if FP16 blending is enabled, we should use the FP16 format */
405 BEGIN_CB(state
->cb
, 3);
406 OUT_CB_REG_SEQ(R500_RB3D_CONSTANT_COLOR_AR
, 2);
407 OUT_CB(float_to_fixed10(color
->color
[0]) |
408 (float_to_fixed10(color
->color
[3]) << 16));
409 OUT_CB(float_to_fixed10(color
->color
[2]) |
410 (float_to_fixed10(color
->color
[1]) << 16));
414 util_pack_color(color
->color
, PIPE_FORMAT_B8G8R8A8_UNORM
, &uc
);
416 BEGIN_CB(state
->cb
, 2);
417 OUT_CB_REG(R300_RB3D_BLEND_COLOR
, uc
.ui
);
421 r300_mark_atom_dirty(r300
, &r300
->blend_color_state
);
424 static void r300_set_clip_state(struct pipe_context
* pipe
,
425 const struct pipe_clip_state
* state
)
427 struct r300_context
* r300
= r300_context(pipe
);
428 struct r300_clip_state
*clip
=
429 (struct r300_clip_state
*)r300
->clip_state
.state
;
434 if (r300
->screen
->caps
.has_tcl
) {
435 r300
->clip_state
.size
= 2 + !!state
->nr
* 3 + state
->nr
* 4;
437 BEGIN_CB(clip
->cb
, r300
->clip_state
.size
);
439 OUT_CB_REG(R300_VAP_PVS_VECTOR_INDX_REG
,
440 (r300
->screen
->caps
.is_r500
?
441 R500_PVS_UCP_START
: R300_PVS_UCP_START
));
442 OUT_CB_ONE_REG(R300_VAP_PVS_UPLOAD_DATA
, state
->nr
* 4);
443 OUT_CB_TABLE(state
->ucp
, state
->nr
* 4);
445 OUT_CB_REG(R300_VAP_CLIP_CNTL
, ((1 << state
->nr
) - 1) |
446 R300_PS_UCP_MODE_CLIP_AS_TRIFAN
);
449 r300_mark_atom_dirty(r300
, &r300
->clip_state
);
451 draw_set_clip_state(r300
->draw
, state
);
456 r300_set_sample_mask(struct pipe_context
*pipe
,
457 unsigned sample_mask
)
462 /* Create a new depth, stencil, and alpha state based on the CSO dsa state.
464 * This contains the depth buffer, stencil buffer, alpha test, and such.
465 * On the Radeon, depth and stencil buffer setup are intertwined, which is
466 * the reason for some of the strange-looking assignments across registers. */
468 r300_create_dsa_state(struct pipe_context
* pipe
,
469 const struct pipe_depth_stencil_alpha_state
* state
)
471 struct r300_capabilities
*caps
= &r300_screen(pipe
->screen
)->caps
;
472 struct r300_dsa_state
* dsa
= CALLOC_STRUCT(r300_dsa_state
);
477 /* Depth test setup. - separate write mask depth for decomp flush */
478 if (state
->depth
.writemask
) {
479 dsa
->z_buffer_control
|= R300_Z_WRITE_ENABLE
;
482 if (state
->depth
.enabled
) {
483 dsa
->z_buffer_control
|= R300_Z_ENABLE
;
485 dsa
->z_stencil_control
|=
486 (r300_translate_depth_stencil_function(state
->depth
.func
) <<
490 /* Stencil buffer setup. */
491 if (state
->stencil
[0].enabled
) {
492 dsa
->z_buffer_control
|= R300_STENCIL_ENABLE
;
493 dsa
->z_stencil_control
|=
494 (r300_translate_depth_stencil_function(state
->stencil
[0].func
) <<
495 R300_S_FRONT_FUNC_SHIFT
) |
496 (r300_translate_stencil_op(state
->stencil
[0].fail_op
) <<
497 R300_S_FRONT_SFAIL_OP_SHIFT
) |
498 (r300_translate_stencil_op(state
->stencil
[0].zpass_op
) <<
499 R300_S_FRONT_ZPASS_OP_SHIFT
) |
500 (r300_translate_stencil_op(state
->stencil
[0].zfail_op
) <<
501 R300_S_FRONT_ZFAIL_OP_SHIFT
);
503 dsa
->stencil_ref_mask
=
504 (state
->stencil
[0].valuemask
<< R300_STENCILMASK_SHIFT
) |
505 (state
->stencil
[0].writemask
<< R300_STENCILWRITEMASK_SHIFT
);
507 if (state
->stencil
[1].enabled
) {
508 dsa
->two_sided
= TRUE
;
510 dsa
->z_buffer_control
|= R300_STENCIL_FRONT_BACK
;
511 dsa
->z_stencil_control
|=
512 (r300_translate_depth_stencil_function(state
->stencil
[1].func
) <<
513 R300_S_BACK_FUNC_SHIFT
) |
514 (r300_translate_stencil_op(state
->stencil
[1].fail_op
) <<
515 R300_S_BACK_SFAIL_OP_SHIFT
) |
516 (r300_translate_stencil_op(state
->stencil
[1].zpass_op
) <<
517 R300_S_BACK_ZPASS_OP_SHIFT
) |
518 (r300_translate_stencil_op(state
->stencil
[1].zfail_op
) <<
519 R300_S_BACK_ZFAIL_OP_SHIFT
);
521 dsa
->stencil_ref_bf
=
522 (state
->stencil
[1].valuemask
<< R300_STENCILMASK_SHIFT
) |
523 (state
->stencil
[1].writemask
<< R300_STENCILWRITEMASK_SHIFT
);
526 dsa
->z_buffer_control
|= R500_STENCIL_REFMASK_FRONT_BACK
;
528 dsa
->two_sided_stencil_ref
=
529 (state
->stencil
[0].valuemask
!= state
->stencil
[1].valuemask
||
530 state
->stencil
[0].writemask
!= state
->stencil
[1].writemask
);
535 /* Alpha test setup. */
536 if (state
->alpha
.enabled
) {
537 dsa
->alpha_function
=
538 r300_translate_alpha_function(state
->alpha
.func
) |
539 R300_FG_ALPHA_FUNC_ENABLE
;
541 /* We could use 10bit alpha ref but who needs that? */
542 dsa
->alpha_function
|= float_to_ubyte(state
->alpha
.ref_value
);
545 dsa
->alpha_function
|= R500_FG_ALPHA_FUNC_8BIT
;
548 BEGIN_CB(&dsa
->cb_begin
, 8);
549 OUT_CB_REG(R300_FG_ALPHA_FUNC
, dsa
->alpha_function
);
550 OUT_CB_REG_SEQ(R300_ZB_CNTL
, 3);
551 OUT_CB(dsa
->z_buffer_control
);
552 OUT_CB(dsa
->z_stencil_control
);
553 OUT_CB(dsa
->stencil_ref_mask
);
554 OUT_CB_REG(R500_ZB_STENCILREFMASK_BF
, dsa
->stencil_ref_bf
);
557 BEGIN_CB(dsa
->cb_no_readwrite
, 8);
558 OUT_CB_REG(R300_FG_ALPHA_FUNC
, dsa
->alpha_function
);
559 OUT_CB_REG_SEQ(R300_ZB_CNTL
, 3);
563 OUT_CB_REG(R500_ZB_STENCILREFMASK_BF
, 0);
569 static void r300_dsa_inject_stencilref(struct r300_context
*r300
)
571 struct r300_dsa_state
*dsa
=
572 (struct r300_dsa_state
*)r300
->dsa_state
.state
;
577 dsa
->stencil_ref_mask
=
578 (dsa
->stencil_ref_mask
& ~R300_STENCILREF_MASK
) |
579 r300
->stencil_ref
.ref_value
[0];
580 dsa
->stencil_ref_bf
=
581 (dsa
->stencil_ref_bf
& ~R300_STENCILREF_MASK
) |
582 r300
->stencil_ref
.ref_value
[1];
585 /* Bind DSA state. */
586 static void r300_bind_dsa_state(struct pipe_context
* pipe
,
589 struct r300_context
* r300
= r300_context(pipe
);
595 UPDATE_STATE(state
, r300
->dsa_state
);
597 r300_mark_atom_dirty(r300
, &r300
->hyperz_state
); /* Will be updated before the emission. */
598 r300_dsa_inject_stencilref(r300
);
601 /* Free DSA state. */
602 static void r300_delete_dsa_state(struct pipe_context
* pipe
,
608 static void r300_set_stencil_ref(struct pipe_context
* pipe
,
609 const struct pipe_stencil_ref
* sr
)
611 struct r300_context
* r300
= r300_context(pipe
);
613 r300
->stencil_ref
= *sr
;
615 r300_dsa_inject_stencilref(r300
);
616 r300_mark_atom_dirty(r300
, &r300
->dsa_state
);
619 static void r300_tex_set_tiling_flags(struct r300_context
*r300
,
620 struct r300_resource
*tex
,
623 /* Check if the macrotile flag needs to be changed.
624 * Skip changing the flags otherwise. */
625 if (tex
->tex
.macrotile
[tex
->surface_level
] !=
626 tex
->tex
.macrotile
[level
]) {
627 /* Tiling determines how DRM treats the buffer data.
628 * We must flush CS when changing it if the buffer is referenced. */
629 if (r300
->rws
->cs_is_buffer_referenced(r300
->cs
, tex
->cs_buf
))
630 r300
->context
.flush(&r300
->context
, 0, NULL
);
632 r300
->rws
->buffer_set_tiling(tex
->buf
,
633 tex
->tex
.microtile
, tex
->tex
.macrotile
[level
],
634 tex
->tex
.stride_in_bytes
[0]);
636 tex
->surface_level
= level
;
640 /* This switcheroo is needed just because of goddamned MACRO_SWITCH. */
641 static void r300_fb_set_tiling_flags(struct r300_context
*r300
,
642 const struct pipe_framebuffer_state
*state
)
646 /* Set tiling flags for new surfaces. */
647 for (i
= 0; i
< state
->nr_cbufs
; i
++) {
648 r300_tex_set_tiling_flags(r300
,
649 r300_resource(state
->cbufs
[i
]->texture
),
650 state
->cbufs
[i
]->u
.tex
.level
);
653 r300_tex_set_tiling_flags(r300
,
654 r300_resource(state
->zsbuf
->texture
),
655 state
->zsbuf
->u
.tex
.level
);
659 static void r300_print_fb_surf_info(struct pipe_surface
*surf
, unsigned index
,
662 struct pipe_resource
*tex
= surf
->texture
;
663 struct r300_resource
*rtex
= r300_resource(tex
);
666 "r300: %s[%i] Dim: %ix%i, Firstlayer: %i, "
667 "Lastlayer: %i, Level: %i, Format: %s\n"
669 "r300: TEX: Macro: %s, Micro: %s, Pitch: %i, "
670 "Dim: %ix%ix%i, LastLevel: %i, Format: %s\n",
672 binding
, index
, surf
->width
, surf
->height
,
673 surf
->u
.tex
.first_layer
, surf
->u
.tex
.last_layer
, surf
->u
.tex
.level
,
674 util_format_short_name(surf
->format
),
676 rtex
->tex
.macrotile
[0] ? "YES" : " NO",
677 rtex
->tex
.microtile
? "YES" : " NO",
678 rtex
->tex
.stride_in_pixels
[0],
679 tex
->width0
, tex
->height0
, tex
->depth0
,
680 tex
->last_level
, util_format_short_name(tex
->format
));
683 void r300_mark_fb_state_dirty(struct r300_context
*r300
,
684 enum r300_fb_state_change change
)
686 struct pipe_framebuffer_state
*state
= r300
->fb_state
.state
;
687 boolean can_hyperz
= r300
->rws
->get_value(r300
->rws
, R300_CAN_HYPERZ
);
689 r300_mark_atom_dirty(r300
, &r300
->gpu_flush
);
690 r300_mark_atom_dirty(r300
, &r300
->fb_state
);
692 /* What is marked as dirty depends on the enum r300_fb_state_change. */
693 if (change
== R300_CHANGED_FB_STATE
) {
694 r300_mark_atom_dirty(r300
, &r300
->aa_state
);
697 if (change
== R300_CHANGED_FB_STATE
||
698 change
== R300_CHANGED_HYPERZ_FLAG
) {
699 r300_mark_atom_dirty(r300
, &r300
->hyperz_state
);
702 if (change
== R300_CHANGED_FB_STATE
||
703 change
== R300_CHANGED_MULTIWRITE
) {
704 r300_mark_atom_dirty(r300
, &r300
->fb_state_pipelined
);
707 /* Now compute the fb_state atom size. */
708 r300
->fb_state
.size
= 2 + (8 * state
->nr_cbufs
);
710 if (r300
->cbzb_clear
)
711 r300
->fb_state
.size
+= 10;
712 else if (state
->zsbuf
) {
713 r300
->fb_state
.size
+= 10;
715 r300
->fb_state
.size
+= r300
->screen
->caps
.hiz_ram
? 8 : 4;
718 /* The size of the rest of atoms stays the same. */
722 r300_set_framebuffer_state(struct pipe_context
* pipe
,
723 const struct pipe_framebuffer_state
* state
)
725 struct r300_context
* r300
= r300_context(pipe
);
726 struct r300_aa_state
*aa
= (struct r300_aa_state
*)r300
->aa_state
.state
;
727 struct pipe_framebuffer_state
*old_state
= r300
->fb_state
.state
;
728 boolean can_hyperz
= r300
->rws
->get_value(r300
->rws
, R300_CAN_HYPERZ
);
729 unsigned max_width
, max_height
, i
;
730 uint32_t zbuffer_bpp
= 0;
732 if (r300
->screen
->caps
.is_r500
) {
733 max_width
= max_height
= 4096;
734 } else if (r300
->screen
->caps
.is_r400
) {
735 max_width
= max_height
= 4021;
737 max_width
= max_height
= 2560;
740 if (state
->width
> max_width
|| state
->height
> max_height
) {
741 fprintf(stderr
, "r300: Implementation error: Render targets are too "
742 "big in %s, refusing to bind framebuffer state!\n", __FUNCTION__
);
746 if (old_state
->zsbuf
&& r300
->zmask_in_use
&& !r300
->zmask_locked
) {
747 /* There is a zmask in use, what are we gonna do? */
749 if (!pipe_surface_equal(old_state
->zsbuf
, state
->zsbuf
)) {
750 /* Decompress the currently bound zbuffer before we bind another one. */
751 r300_decompress_zmask(r300
);
754 /* We don't bind another zbuffer, so lock the current one. */
755 r300
->zmask_locked
= TRUE
;
756 pipe_surface_reference(&r300
->locked_zbuffer
, old_state
->zsbuf
);
758 } else if (r300
->zmask_locked
&& r300
->locked_zbuffer
) {
759 /* We have a locked zbuffer now, what are we gonna do? */
761 if (!pipe_surface_equal(r300
->locked_zbuffer
, state
->zsbuf
)) {
762 /* We are binding some other zbuffer, so decompress the locked one,
763 * it gets unlocked automatically. */
764 r300_decompress_zmask_locked_unsafe(r300
);
766 /* We are binding the locked zbuffer again, so unlock it. */
767 r300
->zmask_locked
= FALSE
;
772 /* If nr_cbufs is changed from zero to non-zero or vice versa... */
773 if (!!old_state
->nr_cbufs
!= !!state
->nr_cbufs
) {
774 r300_mark_atom_dirty(r300
, &r300
->blend_state
);
776 /* If zsbuf is set from NULL to non-NULL or vice versa.. */
777 if (!!old_state
->zsbuf
!= !!state
->zsbuf
) {
778 r300_mark_atom_dirty(r300
, &r300
->dsa_state
);
781 /* The tiling flags are dependent on the surface miplevel, unfortunately. */
782 r300_fb_set_tiling_flags(r300
, state
);
784 util_copy_framebuffer_state(r300
->fb_state
.state
, state
);
786 if (!r300
->zmask_locked
) {
787 pipe_surface_reference(&r300
->locked_zbuffer
, NULL
);
790 r300_mark_fb_state_dirty(r300
, R300_CHANGED_FB_STATE
);
791 r300
->validate_buffers
= TRUE
;
794 switch (util_format_get_blocksize(state
->zsbuf
->texture
->format
)) {
805 struct r300_surface
*zs_surf
= r300_surface(state
->zsbuf
);
806 struct r300_resource
*tex
= r300_resource(zs_surf
->base
.texture
);
807 int level
= zs_surf
->base
.u
.tex
.level
;
809 /* work out whether we can support hiz on this buffer */
810 r300_hiz_alloc_block(r300
, zs_surf
);
812 DBG(r300
, DBG_HYPERZ
,
813 "hyper-z features: hiz: %d @ %08x\n", tex
->hiz_mem
[level
] ? 1 : 0,
814 tex
->hiz_mem
[level
] ? tex
->hiz_mem
[level
]->ofs
: 0xdeadbeef);
817 /* Polygon offset depends on the zbuffer bit depth. */
818 if (r300
->zbuffer_bpp
!= zbuffer_bpp
) {
819 r300
->zbuffer_bpp
= zbuffer_bpp
;
821 if (r300
->polygon_offset_enabled
)
822 r300_mark_atom_dirty(r300
, &r300
->rs_state
);
826 /* Set up AA config. */
827 if (r300
->rws
->get_value(r300
->rws
, R300_VID_DRM_2_3_0
)) {
828 if (state
->nr_cbufs
&& state
->cbufs
[0]->texture
->nr_samples
> 1) {
829 aa
->aa_config
= R300_GB_AA_CONFIG_AA_ENABLE
;
831 switch (state
->cbufs
[0]->texture
->nr_samples
) {
833 aa
->aa_config
|= R300_GB_AA_CONFIG_NUM_AA_SUBSAMPLES_2
;
836 aa
->aa_config
|= R300_GB_AA_CONFIG_NUM_AA_SUBSAMPLES_3
;
839 aa
->aa_config
|= R300_GB_AA_CONFIG_NUM_AA_SUBSAMPLES_4
;
842 aa
->aa_config
|= R300_GB_AA_CONFIG_NUM_AA_SUBSAMPLES_6
;
850 if (DBG_ON(r300
, DBG_FB
)) {
851 fprintf(stderr
, "r300: set_framebuffer_state:\n");
852 for (i
= 0; i
< state
->nr_cbufs
; i
++) {
853 r300_print_fb_surf_info(state
->cbufs
[i
], i
, "CB");
856 r300_print_fb_surf_info(state
->zsbuf
, 0, "ZB");
861 /* Create fragment shader state. */
862 static void* r300_create_fs_state(struct pipe_context
* pipe
,
863 const struct pipe_shader_state
* shader
)
865 struct r300_fragment_shader
* fs
= NULL
;
867 fs
= (struct r300_fragment_shader
*)CALLOC_STRUCT(r300_fragment_shader
);
869 /* Copy state directly into shader. */
871 fs
->state
.tokens
= tgsi_dup_tokens(shader
->tokens
);
876 void r300_mark_fs_code_dirty(struct r300_context
*r300
)
878 struct r300_fragment_shader
* fs
= r300_fs(r300
);
880 r300_mark_atom_dirty(r300
, &r300
->fs
);
881 r300_mark_atom_dirty(r300
, &r300
->fs_rc_constant_state
);
882 r300_mark_atom_dirty(r300
, &r300
->fs_constants
);
883 r300
->fs
.size
= fs
->shader
->cb_code_size
;
885 if (r300
->screen
->caps
.is_r500
) {
886 r300
->fs_rc_constant_state
.size
= fs
->shader
->rc_state_count
* 7;
887 r300
->fs_constants
.size
= fs
->shader
->externals_count
* 4 + 3;
889 r300
->fs_rc_constant_state
.size
= fs
->shader
->rc_state_count
* 5;
890 r300
->fs_constants
.size
= fs
->shader
->externals_count
* 4 + 1;
893 ((struct r300_constant_buffer
*)r300
->fs_constants
.state
)->remap_table
=
894 fs
->shader
->code
.constants_remap_table
;
897 /* Bind fragment shader state. */
898 static void r300_bind_fs_state(struct pipe_context
* pipe
, void* shader
)
900 struct r300_context
* r300
= r300_context(pipe
);
901 struct r300_fragment_shader
* fs
= (struct r300_fragment_shader
*)shader
;
902 struct pipe_framebuffer_state
*fb
= r300
->fb_state
.state
;
903 boolean last_multi_write
;
906 r300
->fs
.state
= NULL
;
910 last_multi_write
= r300_fragment_shader_writes_all(r300_fs(r300
));
913 r300_pick_fragment_shader(r300
);
914 r300_mark_fs_code_dirty(r300
);
916 if (fb
->nr_cbufs
> 1 &&
917 last_multi_write
!= r300_fragment_shader_writes_all(fs
)) {
918 r300_mark_fb_state_dirty(r300
, R300_CHANGED_MULTIWRITE
);
921 r300_mark_atom_dirty(r300
, &r300
->rs_block_state
); /* Will be updated before the emission. */
924 /* Delete fragment shader state. */
925 static void r300_delete_fs_state(struct pipe_context
* pipe
, void* shader
)
927 struct r300_fragment_shader
* fs
= (struct r300_fragment_shader
*)shader
;
928 struct r300_fragment_shader_code
*tmp
, *ptr
= fs
->first
;
933 rc_constants_destroy(&tmp
->code
.constants
);
937 FREE((void*)fs
->state
.tokens
);
941 static void r300_set_polygon_stipple(struct pipe_context
* pipe
,
942 const struct pipe_poly_stipple
* state
)
944 /* XXX no idea how to set this up, but not terribly important */
947 /* Create a new rasterizer state based on the CSO rasterizer state.
949 * This is a very large chunk of state, and covers most of the graphics
950 * backend (GB), geometry assembly (GA), and setup unit (SU) blocks.
952 * In a not entirely unironic sidenote, this state has nearly nothing to do
953 * with the actual block on the Radeon called the rasterizer (RS). */
954 static void* r300_create_rs_state(struct pipe_context
* pipe
,
955 const struct pipe_rasterizer_state
* state
)
957 struct r300_rs_state
* rs
= CALLOC_STRUCT(r300_rs_state
);
959 uint32_t vap_control_status
; /* R300_VAP_CNTL_STATUS: 0x2140 */
960 uint32_t point_size
; /* R300_GA_POINT_SIZE: 0x421c */
961 uint32_t point_minmax
; /* R300_GA_POINT_MINMAX: 0x4230 */
962 uint32_t line_control
; /* R300_GA_LINE_CNTL: 0x4234 */
963 uint32_t polygon_offset_enable
; /* R300_SU_POLY_OFFSET_ENABLE: 0x42b4 */
964 uint32_t cull_mode
; /* R300_SU_CULL_MODE: 0x42b8 */
965 uint32_t line_stipple_config
; /* R300_GA_LINE_STIPPLE_CONFIG: 0x4328 */
966 uint32_t line_stipple_value
; /* R300_GA_LINE_STIPPLE_VALUE: 0x4260 */
967 uint32_t polygon_mode
; /* R300_GA_POLY_MODE: 0x4288 */
968 uint32_t clip_rule
; /* R300_SC_CLIP_RULE: 0x43D0 */
970 /* Point sprites texture coordinates, 0: lower left, 1: upper right */
971 float point_texcoord_left
= 0; /* R300_GA_POINT_S0: 0x4200 */
972 float point_texcoord_bottom
= 0;/* R300_GA_POINT_T0: 0x4204 */
973 float point_texcoord_right
= 1; /* R300_GA_POINT_S1: 0x4208 */
974 float point_texcoord_top
= 0; /* R300_GA_POINT_T1: 0x420c */
977 /* Copy rasterizer state. */
979 rs
->rs_draw
= *state
;
981 rs
->rs
.sprite_coord_enable
= state
->point_quad_rasterization
*
982 state
->sprite_coord_enable
;
984 /* Override some states for Draw. */
985 rs
->rs_draw
.sprite_coord_enable
= 0; /* We can do this in HW. */
987 #ifdef PIPE_ARCH_LITTLE_ENDIAN
988 vap_control_status
= R300_VC_NO_SWAP
;
990 vap_control_status
= R300_VC_32BIT_SWAP
;
993 /* If no TCL engine is present, turn off the HW TCL. */
994 if (!r300_screen(pipe
->screen
)->caps
.has_tcl
) {
995 vap_control_status
|= R300_VAP_TCL_BYPASS
;
998 /* Point size width and height. */
1000 pack_float_16_6x(state
->point_size
) |
1001 (pack_float_16_6x(state
->point_size
) << R300_POINTSIZE_X_SHIFT
);
1003 /* Point size clamping. */
1004 if (state
->point_size_per_vertex
) {
1005 /* Per-vertex point size.
1006 * Clamp to [0, max FB size] */
1007 psiz
= pipe
->screen
->get_paramf(pipe
->screen
,
1008 PIPE_CAP_MAX_POINT_WIDTH
);
1010 pack_float_16_6x(psiz
) << R300_GA_POINT_MINMAX_MAX_SHIFT
;
1012 /* We cannot disable the point-size vertex output,
1014 psiz
= state
->point_size
;
1016 (pack_float_16_6x(psiz
) << R300_GA_POINT_MINMAX_MIN_SHIFT
) |
1017 (pack_float_16_6x(psiz
) << R300_GA_POINT_MINMAX_MAX_SHIFT
);
1021 line_control
= pack_float_16_6x(state
->line_width
) |
1022 R300_GA_LINE_CNTL_END_TYPE_COMP
;
1024 /* Enable polygon mode */
1026 if (state
->fill_front
!= PIPE_POLYGON_MODE_FILL
||
1027 state
->fill_back
!= PIPE_POLYGON_MODE_FILL
) {
1028 polygon_mode
= R300_GA_POLY_MODE_DUAL
;
1032 if (state
->front_ccw
)
1033 cull_mode
= R300_FRONT_FACE_CCW
;
1035 cull_mode
= R300_FRONT_FACE_CW
;
1037 /* Polygon offset */
1038 polygon_offset_enable
= 0;
1039 if (util_get_offset(state
, state
->fill_front
)) {
1040 polygon_offset_enable
|= R300_FRONT_ENABLE
;
1042 if (util_get_offset(state
, state
->fill_back
)) {
1043 polygon_offset_enable
|= R300_BACK_ENABLE
;
1046 rs
->polygon_offset_enable
= polygon_offset_enable
!= 0;
1051 r300_translate_polygon_mode_front(state
->fill_front
);
1053 r300_translate_polygon_mode_back(state
->fill_back
);
1056 if (state
->cull_face
& PIPE_FACE_FRONT
) {
1057 cull_mode
|= R300_CULL_FRONT
;
1059 if (state
->cull_face
& PIPE_FACE_BACK
) {
1060 cull_mode
|= R300_CULL_BACK
;
1063 if (state
->line_stipple_enable
) {
1064 line_stipple_config
=
1065 R300_GA_LINE_STIPPLE_CONFIG_LINE_RESET_LINE
|
1066 (fui((float)state
->line_stipple_factor
) &
1067 R300_GA_LINE_STIPPLE_CONFIG_STIPPLE_SCALE_MASK
);
1068 /* XXX this might need to be scaled up */
1069 line_stipple_value
= state
->line_stipple_pattern
;
1071 line_stipple_config
= 0;
1072 line_stipple_value
= 0;
1075 if (state
->flatshade
) {
1076 rs
->color_control
= R300_SHADE_MODEL_FLAT
;
1078 rs
->color_control
= R300_SHADE_MODEL_SMOOTH
;
1081 clip_rule
= state
->scissor
? 0xAAAA : 0xFFFF;
1083 /* Point sprites coord mode */
1084 if (rs
->rs
.sprite_coord_enable
) {
1085 switch (state
->sprite_coord_mode
) {
1086 case PIPE_SPRITE_COORD_UPPER_LEFT
:
1087 point_texcoord_top
= 0.0f
;
1088 point_texcoord_bottom
= 1.0f
;
1090 case PIPE_SPRITE_COORD_LOWER_LEFT
:
1091 point_texcoord_top
= 1.0f
;
1092 point_texcoord_bottom
= 0.0f
;
1097 /* Build the main command buffer. */
1098 BEGIN_CB(rs
->cb_main
, RS_STATE_MAIN_SIZE
);
1099 OUT_CB_REG(R300_VAP_CNTL_STATUS
, vap_control_status
);
1100 OUT_CB_REG(R300_GA_POINT_SIZE
, point_size
);
1101 OUT_CB_REG_SEQ(R300_GA_POINT_MINMAX
, 2);
1102 OUT_CB(point_minmax
);
1103 OUT_CB(line_control
);
1104 OUT_CB_REG_SEQ(R300_SU_POLY_OFFSET_ENABLE
, 2);
1105 OUT_CB(polygon_offset_enable
);
1106 rs
->cull_mode_index
= 9;
1108 OUT_CB_REG(R300_GA_LINE_STIPPLE_CONFIG
, line_stipple_config
);
1109 OUT_CB_REG(R300_GA_LINE_STIPPLE_VALUE
, line_stipple_value
);
1110 OUT_CB_REG(R300_GA_POLY_MODE
, polygon_mode
);
1111 OUT_CB_REG(R300_SC_CLIP_RULE
, clip_rule
);
1112 OUT_CB_REG_SEQ(R300_GA_POINT_S0
, 4);
1113 OUT_CB_32F(point_texcoord_left
);
1114 OUT_CB_32F(point_texcoord_bottom
);
1115 OUT_CB_32F(point_texcoord_right
);
1116 OUT_CB_32F(point_texcoord_top
);
1119 /* Build the two command buffers for polygon offset setup. */
1120 if (polygon_offset_enable
) {
1121 float scale
= state
->offset_scale
* 12;
1122 float offset
= state
->offset_units
* 4;
1124 BEGIN_CB(rs
->cb_poly_offset_zb16
, 5);
1125 OUT_CB_REG_SEQ(R300_SU_POLY_OFFSET_FRONT_SCALE
, 4);
1132 offset
= state
->offset_units
* 2;
1134 BEGIN_CB(rs
->cb_poly_offset_zb24
, 5);
1135 OUT_CB_REG_SEQ(R300_SU_POLY_OFFSET_FRONT_SCALE
, 4);
1146 /* Bind rasterizer state. */
1147 static void r300_bind_rs_state(struct pipe_context
* pipe
, void* state
)
1149 struct r300_context
* r300
= r300_context(pipe
);
1150 struct r300_rs_state
* rs
= (struct r300_rs_state
*)state
;
1151 int last_sprite_coord_enable
= r300
->sprite_coord_enable
;
1152 boolean last_two_sided_color
= r300
->two_sided_color
;
1154 if (r300
->draw
&& rs
) {
1155 draw_set_rasterizer_state(r300
->draw
, &rs
->rs_draw
, state
);
1159 r300
->polygon_offset_enabled
= rs
->polygon_offset_enable
;
1160 r300
->sprite_coord_enable
= rs
->rs
.sprite_coord_enable
;
1161 r300
->two_sided_color
= rs
->rs
.light_twoside
;
1163 r300
->polygon_offset_enabled
= FALSE
;
1164 r300
->sprite_coord_enable
= 0;
1165 r300
->two_sided_color
= FALSE
;
1168 UPDATE_STATE(state
, r300
->rs_state
);
1169 r300
->rs_state
.size
= RS_STATE_MAIN_SIZE
+ (r300
->polygon_offset_enabled
? 5 : 0);
1171 if (last_sprite_coord_enable
!= r300
->sprite_coord_enable
||
1172 last_two_sided_color
!= r300
->two_sided_color
) {
1173 r300_mark_atom_dirty(r300
, &r300
->rs_block_state
);
1177 /* Free rasterizer state. */
1178 static void r300_delete_rs_state(struct pipe_context
* pipe
, void* state
)
1184 r300_create_sampler_state(struct pipe_context
* pipe
,
1185 const struct pipe_sampler_state
* state
)
1187 struct r300_context
* r300
= r300_context(pipe
);
1188 struct r300_sampler_state
* sampler
= CALLOC_STRUCT(r300_sampler_state
);
1189 boolean is_r500
= r300
->screen
->caps
.is_r500
;
1192 sampler
->state
= *state
;
1194 /* r300 doesn't handle CLAMP and MIRROR_CLAMP correctly when either MAG
1195 * or MIN filter is NEAREST. Since texwrap produces same results
1196 * for CLAMP and CLAMP_TO_EDGE, we use them instead. */
1197 if (sampler
->state
.min_img_filter
== PIPE_TEX_FILTER_NEAREST
||
1198 sampler
->state
.mag_img_filter
== PIPE_TEX_FILTER_NEAREST
) {
1200 if (sampler
->state
.wrap_s
== PIPE_TEX_WRAP_CLAMP
)
1201 sampler
->state
.wrap_s
= PIPE_TEX_WRAP_CLAMP_TO_EDGE
;
1202 else if (sampler
->state
.wrap_s
== PIPE_TEX_WRAP_MIRROR_CLAMP
)
1203 sampler
->state
.wrap_s
= PIPE_TEX_WRAP_MIRROR_CLAMP_TO_EDGE
;
1206 if (sampler
->state
.wrap_t
== PIPE_TEX_WRAP_CLAMP
)
1207 sampler
->state
.wrap_t
= PIPE_TEX_WRAP_CLAMP_TO_EDGE
;
1208 else if (sampler
->state
.wrap_t
== PIPE_TEX_WRAP_MIRROR_CLAMP
)
1209 sampler
->state
.wrap_t
= PIPE_TEX_WRAP_MIRROR_CLAMP_TO_EDGE
;
1212 if (sampler
->state
.wrap_r
== PIPE_TEX_WRAP_CLAMP
)
1213 sampler
->state
.wrap_r
= PIPE_TEX_WRAP_CLAMP_TO_EDGE
;
1214 else if (sampler
->state
.wrap_r
== PIPE_TEX_WRAP_MIRROR_CLAMP
)
1215 sampler
->state
.wrap_r
= PIPE_TEX_WRAP_MIRROR_CLAMP_TO_EDGE
;
1219 (r300_translate_wrap(sampler
->state
.wrap_s
) << R300_TX_WRAP_S_SHIFT
) |
1220 (r300_translate_wrap(sampler
->state
.wrap_t
) << R300_TX_WRAP_T_SHIFT
) |
1221 (r300_translate_wrap(sampler
->state
.wrap_r
) << R300_TX_WRAP_R_SHIFT
);
1223 sampler
->filter0
|= r300_translate_tex_filters(state
->min_img_filter
,
1224 state
->mag_img_filter
,
1225 state
->min_mip_filter
,
1226 state
->max_anisotropy
> 0);
1228 sampler
->filter0
|= r300_anisotropy(state
->max_anisotropy
);
1230 /* Unfortunately, r300-r500 don't support floating-point mipmap lods. */
1231 /* We must pass these to the merge function to clamp them properly. */
1232 sampler
->min_lod
= (unsigned)MAX2(state
->min_lod
, 0);
1233 sampler
->max_lod
= (unsigned)MAX2(ceilf(state
->max_lod
), 0);
1235 lod_bias
= CLAMP((int)(state
->lod_bias
* 32 + 1), -(1 << 9), (1 << 9) - 1);
1237 sampler
->filter1
|= (lod_bias
<< R300_LOD_BIAS_SHIFT
) & R300_LOD_BIAS_MASK
;
1239 /* This is very high quality anisotropic filtering for R5xx.
1240 * It's good for benchmarking the performance of texturing but
1241 * in practice we don't want to slow down the driver because it's
1242 * a pretty good performance killer. Feel free to play with it. */
1243 if (DBG_ON(r300
, DBG_ANISOHQ
) && is_r500
) {
1244 sampler
->filter1
|= r500_anisotropy(state
->max_anisotropy
);
1247 /* R500-specific fixups and optimizations */
1248 if (r300
->screen
->caps
.is_r500
) {
1249 sampler
->filter1
|= R500_BORDER_FIX
;
1252 return (void*)sampler
;
1255 static void r300_bind_sampler_states(struct pipe_context
* pipe
,
1259 struct r300_context
* r300
= r300_context(pipe
);
1260 struct r300_textures_state
* state
=
1261 (struct r300_textures_state
*)r300
->textures_state
.state
;
1262 unsigned tex_units
= r300
->screen
->caps
.num_tex_units
;
1264 if (count
> tex_units
) {
1268 memcpy(state
->sampler_states
, states
, sizeof(void*) * count
);
1269 state
->sampler_state_count
= count
;
1271 r300_mark_atom_dirty(r300
, &r300
->textures_state
);
1274 static void r300_lacks_vertex_textures(struct pipe_context
* pipe
,
1280 static void r300_delete_sampler_state(struct pipe_context
* pipe
, void* state
)
1285 static uint32_t r300_assign_texture_cache_region(unsigned index
, unsigned num
)
1287 /* This looks like a hack, but I believe it's suppose to work like
1288 * that. To illustrate how this works, let's assume you have 5 textures.
1289 * From docs, 5 and the successive numbers are:
1297 * First 3 textures will get 3/4 of size of the cache, divived evenly
1298 * between them. The last 1/4 of the cache must be divided between
1299 * the last 2 textures, each will therefore get 1/8 of the cache.
1300 * Why not just to use "5 + texture_index" ?
1302 * This simple trick works for all "num" <= 16.
1305 return R300_TX_CACHE(R300_TX_CACHE_WHOLE
);
1307 return R300_TX_CACHE(num
+ index
);
1310 static void r300_set_fragment_sampler_views(struct pipe_context
* pipe
,
1312 struct pipe_sampler_view
** views
)
1314 struct r300_context
* r300
= r300_context(pipe
);
1315 struct r300_textures_state
* state
=
1316 (struct r300_textures_state
*)r300
->textures_state
.state
;
1317 struct r300_resource
*texture
;
1318 unsigned i
, real_num_views
= 0, view_index
= 0;
1319 unsigned tex_units
= r300
->screen
->caps
.num_tex_units
;
1320 boolean dirty_tex
= FALSE
;
1322 if (count
> tex_units
) {
1326 /* Calculate the real number of views. */
1327 for (i
= 0; i
< count
; i
++) {
1332 for (i
= 0; i
< count
; i
++) {
1333 pipe_sampler_view_reference(
1334 (struct pipe_sampler_view
**)&state
->sampler_views
[i
],
1341 /* A new sampler view (= texture)... */
1344 /* Set the texrect factor in the fragment shader.
1345 * Needed for RECT and NPOT fallback. */
1346 texture
= r300_resource(views
[i
]->texture
);
1347 if (texture
->tex
.is_npot
) {
1348 r300_mark_atom_dirty(r300
, &r300
->fs_rc_constant_state
);
1351 state
->sampler_views
[i
]->texcache_region
=
1352 r300_assign_texture_cache_region(view_index
, real_num_views
);
1356 for (i
= count
; i
< tex_units
; i
++) {
1357 if (state
->sampler_views
[i
]) {
1358 pipe_sampler_view_reference(
1359 (struct pipe_sampler_view
**)&state
->sampler_views
[i
],
1364 state
->sampler_view_count
= count
;
1366 r300_mark_atom_dirty(r300
, &r300
->textures_state
);
1367 r300
->validate_buffers
= TRUE
;
1370 r300_mark_atom_dirty(r300
, &r300
->texture_cache_inval
);
1374 static struct pipe_sampler_view
*
1375 r300_create_sampler_view(struct pipe_context
*pipe
,
1376 struct pipe_resource
*texture
,
1377 const struct pipe_sampler_view
*templ
)
1379 struct r300_sampler_view
*view
= CALLOC_STRUCT(r300_sampler_view
);
1380 struct r300_resource
*tex
= r300_resource(texture
);
1381 boolean is_r500
= r300_screen(pipe
->screen
)->caps
.is_r500
;
1382 boolean dxtc_swizzle
= r300_screen(pipe
->screen
)->caps
.dxtc_swizzle
;
1385 view
->base
= *templ
;
1386 view
->base
.reference
.count
= 1;
1387 view
->base
.context
= pipe
;
1388 view
->base
.texture
= NULL
;
1389 pipe_resource_reference(&view
->base
.texture
, texture
);
1391 view
->swizzle
[0] = templ
->swizzle_r
;
1392 view
->swizzle
[1] = templ
->swizzle_g
;
1393 view
->swizzle
[2] = templ
->swizzle_b
;
1394 view
->swizzle
[3] = templ
->swizzle_a
;
1396 view
->format
= tex
->tx_format
;
1397 view
->format
.format1
|= r300_translate_texformat(templ
->format
,
1402 view
->format
.format2
|= r500_tx_format_msb_bit(templ
->format
);
1406 return (struct pipe_sampler_view
*)view
;
1410 r300_sampler_view_destroy(struct pipe_context
*pipe
,
1411 struct pipe_sampler_view
*view
)
1413 pipe_resource_reference(&view
->texture
, NULL
);
1417 static void r300_set_scissor_state(struct pipe_context
* pipe
,
1418 const struct pipe_scissor_state
* state
)
1420 struct r300_context
* r300
= r300_context(pipe
);
1422 memcpy(r300
->scissor_state
.state
, state
,
1423 sizeof(struct pipe_scissor_state
));
1425 r300_mark_atom_dirty(r300
, &r300
->scissor_state
);
1428 static void r300_set_viewport_state(struct pipe_context
* pipe
,
1429 const struct pipe_viewport_state
* state
)
1431 struct r300_context
* r300
= r300_context(pipe
);
1432 struct r300_viewport_state
* viewport
=
1433 (struct r300_viewport_state
*)r300
->viewport_state
.state
;
1435 r300
->viewport
= *state
;
1438 draw_set_viewport_state(r300
->draw
, state
);
1439 viewport
->vte_control
= R300_VTX_XY_FMT
| R300_VTX_Z_FMT
;
1443 /* Do the transform in HW. */
1444 viewport
->vte_control
= R300_VTX_W0_FMT
;
1446 if (state
->scale
[0] != 1.0f
) {
1447 viewport
->xscale
= state
->scale
[0];
1448 viewport
->vte_control
|= R300_VPORT_X_SCALE_ENA
;
1450 if (state
->scale
[1] != 1.0f
) {
1451 viewport
->yscale
= state
->scale
[1];
1452 viewport
->vte_control
|= R300_VPORT_Y_SCALE_ENA
;
1454 if (state
->scale
[2] != 1.0f
) {
1455 viewport
->zscale
= state
->scale
[2];
1456 viewport
->vte_control
|= R300_VPORT_Z_SCALE_ENA
;
1458 if (state
->translate
[0] != 0.0f
) {
1459 viewport
->xoffset
= state
->translate
[0];
1460 viewport
->vte_control
|= R300_VPORT_X_OFFSET_ENA
;
1462 if (state
->translate
[1] != 0.0f
) {
1463 viewport
->yoffset
= state
->translate
[1];
1464 viewport
->vte_control
|= R300_VPORT_Y_OFFSET_ENA
;
1466 if (state
->translate
[2] != 0.0f
) {
1467 viewport
->zoffset
= state
->translate
[2];
1468 viewport
->vte_control
|= R300_VPORT_Z_OFFSET_ENA
;
1471 r300_mark_atom_dirty(r300
, &r300
->viewport_state
);
1472 if (r300
->fs
.state
&& r300_fs(r300
)->shader
->inputs
.wpos
!= ATTR_UNUSED
) {
1473 r300_mark_atom_dirty(r300
, &r300
->fs_rc_constant_state
);
1477 static void r300_set_vertex_buffers(struct pipe_context
* pipe
,
1479 const struct pipe_vertex_buffer
* buffers
)
1481 struct r300_context
* r300
= r300_context(pipe
);
1483 struct pipe_vertex_buffer dummy_vb
= {0};
1485 /* There must be at least one vertex buffer set, otherwise it locks up. */
1487 dummy_vb
.buffer
= r300
->dummy_vb
;
1488 buffers
= &dummy_vb
;
1492 u_vbuf_mgr_set_vertex_buffers(r300
->vbuf_mgr
, count
, buffers
);
1494 if (r300
->screen
->caps
.has_tcl
) {
1496 for (i
= 0; i
< count
; i
++) {
1497 if (buffers
[i
].buffer
&&
1498 !r300_resource(buffers
[i
].buffer
)->b
.user_ptr
) {
1499 r300
->validate_buffers
= TRUE
;
1502 r300
->vertex_arrays_dirty
= TRUE
;
1505 draw_set_vertex_buffers(r300
->draw
, count
, buffers
);
1509 static void r300_set_index_buffer(struct pipe_context
* pipe
,
1510 const struct pipe_index_buffer
*ib
)
1512 struct r300_context
* r300
= r300_context(pipe
);
1514 assert(ib
->offset
% ib
->index_size
== 0);
1516 if (ib
&& ib
->buffer
) {
1517 pipe_resource_reference(&r300
->index_buffer
.buffer
, ib
->buffer
);
1518 memcpy(&r300
->index_buffer
, ib
, sizeof(r300
->index_buffer
));
1519 r300
->index_buffer
.offset
/= r300
->index_buffer
.index_size
;
1521 if (r300
->screen
->caps
.has_tcl
&&
1522 !r300_resource(ib
->buffer
)->b
.user_ptr
) {
1523 r300
->validate_buffers
= TRUE
;
1524 r300
->upload_ib_validated
= FALSE
;
1528 pipe_resource_reference(&r300
->index_buffer
.buffer
, NULL
);
1529 memset(&r300
->index_buffer
, 0, sizeof(r300
->index_buffer
));
1532 if (!r300
->screen
->caps
.has_tcl
) {
1533 draw_set_index_buffer(r300
->draw
, ib
);
1537 /* Initialize the PSC tables. */
1538 static void r300_vertex_psc(struct r300_vertex_element_state
*velems
)
1540 struct r300_vertex_stream_state
*vstream
= &velems
->vertex_stream
;
1541 uint16_t type
, swizzle
;
1542 enum pipe_format format
;
1545 if (velems
->count
> 16) {
1546 fprintf(stderr
, "r300: More than 16 vertex elements are not supported,"
1547 " requested %i, using 16.\n", velems
->count
);
1551 /* Vertex shaders have no semantics on their inputs,
1552 * so PSC should just route stuff based on the vertex elements,
1553 * and not on attrib information. */
1554 for (i
= 0; i
< velems
->count
; i
++) {
1555 format
= velems
->velem
[i
].src_format
;
1557 type
= r300_translate_vertex_data_type(format
);
1558 if (type
== R300_INVALID_FORMAT
) {
1559 fprintf(stderr
, "r300: Bad vertex format %s.\n",
1560 util_format_short_name(format
));
1565 type
|= i
<< R300_DST_VEC_LOC_SHIFT
;
1566 swizzle
= r300_translate_vertex_data_swizzle(format
);
1569 vstream
->vap_prog_stream_cntl
[i
>> 1] |= type
<< 16;
1570 vstream
->vap_prog_stream_cntl_ext
[i
>> 1] |= swizzle
<< 16;
1572 vstream
->vap_prog_stream_cntl
[i
>> 1] |= type
;
1573 vstream
->vap_prog_stream_cntl_ext
[i
>> 1] |= swizzle
;
1577 /* Set the last vector in the PSC. */
1581 vstream
->vap_prog_stream_cntl
[i
>> 1] |=
1582 (R300_LAST_VEC
<< (i
& 1 ? 16 : 0));
1584 vstream
->count
= (i
>> 1) + 1;
1587 static void* r300_create_vertex_elements_state(struct pipe_context
* pipe
,
1589 const struct pipe_vertex_element
* attribs
)
1591 struct r300_context
*r300
= r300_context(pipe
);
1592 struct r300_vertex_element_state
*velems
;
1594 struct pipe_vertex_element dummy_attrib
= {0};
1596 /* R300 Programmable Stream Control (PSC) doesn't support 0 vertex elements. */
1598 dummy_attrib
.src_format
= PIPE_FORMAT_R8G8B8A8_UNORM
;
1599 attribs
= &dummy_attrib
;
1603 assert(count
<= PIPE_MAX_ATTRIBS
);
1604 velems
= CALLOC_STRUCT(r300_vertex_element_state
);
1608 velems
->count
= count
;
1609 velems
->vmgr_elements
=
1610 u_vbuf_mgr_create_vertex_elements(r300
->vbuf_mgr
, count
, attribs
,
1613 if (r300_screen(pipe
->screen
)->caps
.has_tcl
) {
1615 * The unused components will be replaced by (..., 0, 1). */
1616 r300_vertex_psc(velems
);
1618 for (i
= 0; i
< count
; i
++) {
1619 velems
->format_size
[i
] =
1620 align(util_format_get_blocksize(velems
->velem
[i
].src_format
), 4);
1621 velems
->vertex_size_dwords
+= velems
->format_size
[i
] / 4;
1628 static void r300_bind_vertex_elements_state(struct pipe_context
*pipe
,
1631 struct r300_context
*r300
= r300_context(pipe
);
1632 struct r300_vertex_element_state
*velems
= state
;
1634 if (velems
== NULL
) {
1638 r300
->velems
= velems
;
1640 u_vbuf_mgr_bind_vertex_elements(r300
->vbuf_mgr
, state
, velems
->vmgr_elements
);
1643 draw_set_vertex_elements(r300
->draw
, velems
->count
, velems
->velem
);
1647 UPDATE_STATE(&velems
->vertex_stream
, r300
->vertex_stream_state
);
1648 r300
->vertex_stream_state
.size
= (1 + velems
->vertex_stream
.count
) * 2;
1649 r300
->vertex_arrays_dirty
= TRUE
;
1652 static void r300_delete_vertex_elements_state(struct pipe_context
*pipe
, void *state
)
1654 struct r300_context
*r300
= r300_context(pipe
);
1655 struct r300_vertex_element_state
*velems
= state
;
1657 u_vbuf_mgr_destroy_vertex_elements(r300
->vbuf_mgr
, velems
->vmgr_elements
);
1661 static void* r300_create_vs_state(struct pipe_context
* pipe
,
1662 const struct pipe_shader_state
* shader
)
1664 struct r300_context
* r300
= r300_context(pipe
);
1665 struct r300_vertex_shader
* vs
= CALLOC_STRUCT(r300_vertex_shader
);
1667 /* Copy state directly into shader. */
1668 vs
->state
= *shader
;
1669 vs
->state
.tokens
= tgsi_dup_tokens(shader
->tokens
);
1671 if (r300
->screen
->caps
.has_tcl
) {
1672 r300_init_vs_outputs(vs
);
1673 r300_translate_vertex_shader(r300
, vs
);
1675 r300_draw_init_vertex_shader(r300
->draw
, vs
);
1681 static void r300_bind_vs_state(struct pipe_context
* pipe
, void* shader
)
1683 struct r300_context
* r300
= r300_context(pipe
);
1684 struct r300_vertex_shader
* vs
= (struct r300_vertex_shader
*)shader
;
1687 r300
->vs_state
.state
= NULL
;
1690 if (vs
== r300
->vs_state
.state
) {
1693 r300
->vs_state
.state
= vs
;
1695 /* The majority of the RS block bits is dependent on the vertex shader. */
1696 r300_mark_atom_dirty(r300
, &r300
->rs_block_state
); /* Will be updated before the emission. */
1698 if (r300
->screen
->caps
.has_tcl
) {
1699 unsigned fc_op_dwords
= r300
->screen
->caps
.is_r500
? 3 : 2;
1700 r300_mark_atom_dirty(r300
, &r300
->vs_state
);
1701 r300
->vs_state
.size
=
1702 vs
->code
.length
+ 9 +
1703 (vs
->code
.num_fc_ops
? vs
->code
.num_fc_ops
* fc_op_dwords
+ 4 : 0);
1705 r300_mark_atom_dirty(r300
, &r300
->vs_constants
);
1706 r300
->vs_constants
.size
=
1708 (vs
->externals_count
? vs
->externals_count
* 4 + 3 : 0) +
1709 (vs
->immediates_count
? vs
->immediates_count
* 4 + 3 : 0);
1711 ((struct r300_constant_buffer
*)r300
->vs_constants
.state
)->remap_table
=
1712 vs
->code
.constants_remap_table
;
1714 r300_mark_atom_dirty(r300
, &r300
->pvs_flush
);
1716 draw_bind_vertex_shader(r300
->draw
,
1717 (struct draw_vertex_shader
*)vs
->draw_vs
);
1721 static void r300_delete_vs_state(struct pipe_context
* pipe
, void* shader
)
1723 struct r300_context
* r300
= r300_context(pipe
);
1724 struct r300_vertex_shader
* vs
= (struct r300_vertex_shader
*)shader
;
1726 if (r300
->screen
->caps
.has_tcl
) {
1727 rc_constants_destroy(&vs
->code
.constants
);
1728 if (vs
->code
.constants_remap_table
)
1729 FREE(vs
->code
.constants_remap_table
);
1731 draw_delete_vertex_shader(r300
->draw
,
1732 (struct draw_vertex_shader
*)vs
->draw_vs
);
1735 FREE((void*)vs
->state
.tokens
);
1739 static void r300_set_constant_buffer(struct pipe_context
*pipe
,
1740 uint shader
, uint index
,
1741 struct pipe_resource
*buf
)
1743 struct r300_context
* r300
= r300_context(pipe
);
1744 struct r300_constant_buffer
*cbuf
;
1745 struct r300_resource
*rbuf
= r300_resource(buf
);
1749 case PIPE_SHADER_VERTEX
:
1750 cbuf
= (struct r300_constant_buffer
*)r300
->vs_constants
.state
;
1752 case PIPE_SHADER_FRAGMENT
:
1753 cbuf
= (struct r300_constant_buffer
*)r300
->fs_constants
.state
;
1759 if (buf
== NULL
|| buf
->width0
== 0)
1762 if (rbuf
->b
.user_ptr
)
1763 mapped
= (uint32_t*)rbuf
->b
.user_ptr
;
1764 else if (rbuf
->constant_buffer
)
1765 mapped
= (uint32_t*)rbuf
->constant_buffer
;
1769 if (shader
== PIPE_SHADER_FRAGMENT
||
1770 (shader
== PIPE_SHADER_VERTEX
&& r300
->screen
->caps
.has_tcl
)) {
1774 if (shader
== PIPE_SHADER_VERTEX
) {
1775 if (r300
->screen
->caps
.has_tcl
) {
1776 struct r300_vertex_shader
*vs
=
1777 (struct r300_vertex_shader
*)r300
->vs_state
.state
;
1780 cbuf
->buffer_base
= 0;
1784 cbuf
->buffer_base
= r300
->vs_const_base
;
1785 r300
->vs_const_base
+= vs
->code
.constants
.Count
;
1786 if (r300
->vs_const_base
> R500_MAX_PVS_CONST_VECS
) {
1787 r300
->vs_const_base
= vs
->code
.constants
.Count
;
1788 cbuf
->buffer_base
= 0;
1789 r300_mark_atom_dirty(r300
, &r300
->pvs_flush
);
1791 r300_mark_atom_dirty(r300
, &r300
->vs_constants
);
1792 } else if (r300
->draw
) {
1793 draw_set_mapped_constant_buffer(r300
->draw
, PIPE_SHADER_VERTEX
,
1794 0, mapped
, buf
->width0
);
1796 } else if (shader
== PIPE_SHADER_FRAGMENT
) {
1797 r300_mark_atom_dirty(r300
, &r300
->fs_constants
);
1801 void r300_init_state_functions(struct r300_context
* r300
)
1803 r300
->context
.create_blend_state
= r300_create_blend_state
;
1804 r300
->context
.bind_blend_state
= r300_bind_blend_state
;
1805 r300
->context
.delete_blend_state
= r300_delete_blend_state
;
1807 r300
->context
.set_blend_color
= r300_set_blend_color
;
1809 r300
->context
.set_clip_state
= r300_set_clip_state
;
1810 r300
->context
.set_sample_mask
= r300_set_sample_mask
;
1812 r300
->context
.set_constant_buffer
= r300_set_constant_buffer
;
1814 r300
->context
.create_depth_stencil_alpha_state
= r300_create_dsa_state
;
1815 r300
->context
.bind_depth_stencil_alpha_state
= r300_bind_dsa_state
;
1816 r300
->context
.delete_depth_stencil_alpha_state
= r300_delete_dsa_state
;
1818 r300
->context
.set_stencil_ref
= r300_set_stencil_ref
;
1820 r300
->context
.set_framebuffer_state
= r300_set_framebuffer_state
;
1822 r300
->context
.create_fs_state
= r300_create_fs_state
;
1823 r300
->context
.bind_fs_state
= r300_bind_fs_state
;
1824 r300
->context
.delete_fs_state
= r300_delete_fs_state
;
1826 r300
->context
.set_polygon_stipple
= r300_set_polygon_stipple
;
1828 r300
->context
.create_rasterizer_state
= r300_create_rs_state
;
1829 r300
->context
.bind_rasterizer_state
= r300_bind_rs_state
;
1830 r300
->context
.delete_rasterizer_state
= r300_delete_rs_state
;
1832 r300
->context
.create_sampler_state
= r300_create_sampler_state
;
1833 r300
->context
.bind_fragment_sampler_states
= r300_bind_sampler_states
;
1834 r300
->context
.bind_vertex_sampler_states
= r300_lacks_vertex_textures
;
1835 r300
->context
.delete_sampler_state
= r300_delete_sampler_state
;
1837 r300
->context
.set_fragment_sampler_views
= r300_set_fragment_sampler_views
;
1838 r300
->context
.create_sampler_view
= r300_create_sampler_view
;
1839 r300
->context
.sampler_view_destroy
= r300_sampler_view_destroy
;
1841 r300
->context
.set_scissor_state
= r300_set_scissor_state
;
1843 r300
->context
.set_viewport_state
= r300_set_viewport_state
;
1845 r300
->context
.set_vertex_buffers
= r300_set_vertex_buffers
;
1846 r300
->context
.set_index_buffer
= r300_set_index_buffer
;
1847 r300
->context
.redefine_user_buffer
= u_default_redefine_user_buffer
;
1849 r300
->context
.create_vertex_elements_state
= r300_create_vertex_elements_state
;
1850 r300
->context
.bind_vertex_elements_state
= r300_bind_vertex_elements_state
;
1851 r300
->context
.delete_vertex_elements_state
= r300_delete_vertex_elements_state
;
1853 r300
->context
.create_vs_state
= r300_create_vs_state
;
1854 r300
->context
.bind_vs_state
= r300_bind_vs_state
;
1855 r300
->context
.delete_vs_state
= r300_delete_vs_state
;