Merge branch 'mesa_7_6_branch' of git+ssh://agd5f@git.freedesktop.org/git/mesa/mesa
[mesa.git] / src / gallium / drivers / r300 / r300_state.c
1 /*
2 * Copyright 2008 Corbin Simpson <MostAwesomeDude@gmail.com>
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * on the rights to use, copy, modify, merge, publish, distribute, sub
8 * license, and/or sell copies of the Software, and to permit persons to whom
9 * the Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
19 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
20 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
21 * USE OR OTHER DEALINGS IN THE SOFTWARE. */
22
23 #include "draw/draw_context.h"
24
25 #include "util/u_math.h"
26 #include "util/u_memory.h"
27 #include "util/u_pack_color.h"
28
29 #include "tgsi/tgsi_parse.h"
30
31 #include "pipe/p_config.h"
32 #include "pipe/internal/p_winsys_screen.h"
33
34 #include "r300_context.h"
35 #include "r300_reg.h"
36 #include "r300_screen.h"
37 #include "r300_state_inlines.h"
38 #include "r300_fs.h"
39 #include "r300_vs.h"
40
41 /* r300_state: Functions used to intialize state context by translating
42 * Gallium state objects into semi-native r300 state objects. */
43
44 /* Create a new blend state based on the CSO blend state.
45 *
46 * This encompasses alpha blending, logic/raster ops, and blend dithering. */
47 static void* r300_create_blend_state(struct pipe_context* pipe,
48 const struct pipe_blend_state* state)
49 {
50 struct r300_blend_state* blend = CALLOC_STRUCT(r300_blend_state);
51
52 {
53 unsigned eqRGB = state->rgb_func;
54 unsigned srcRGB = state->rgb_src_factor;
55 unsigned dstRGB = state->rgb_dst_factor;
56
57 unsigned eqA = state->alpha_func;
58 unsigned srcA = state->alpha_src_factor;
59 unsigned dstA = state->alpha_dst_factor;
60
61 if (srcA != srcRGB ||
62 dstA != dstRGB ||
63 eqA != eqRGB) {
64 blend->alpha_blend_control =
65 r300_translate_blend_function(eqA) |
66 (r300_translate_blend_factor(srcA) <<
67 R300_SRC_BLEND_SHIFT) |
68 (r300_translate_blend_factor(dstA) <<
69 R300_DST_BLEND_SHIFT);
70 blend->blend_control |= R300_ALPHA_BLEND_ENABLE |
71 R300_SEPARATE_ALPHA_ENABLE;
72 } else {
73 blend->alpha_blend_control = R300_COMB_FCN_ADD_CLAMP |
74 (R300_BLEND_GL_ONE << R300_SRC_BLEND_SHIFT) |
75 (R300_BLEND_GL_ZERO << R300_DST_BLEND_SHIFT);
76 }
77 }
78 if (state->blend_enable) {
79 /* XXX for now, always do separate alpha...
80 * is it faster to do it with one reg? */
81 blend->blend_control |= R300_READ_ENABLE |
82 r300_translate_blend_function(state->rgb_func) |
83 (r300_translate_blend_factor(state->rgb_src_factor) <<
84 R300_SRC_BLEND_SHIFT) |
85 (r300_translate_blend_factor(state->rgb_dst_factor) <<
86 R300_DST_BLEND_SHIFT);
87 } else {
88 blend->blend_control =
89 R300_COMB_FCN_ADD_CLAMP |
90 (R300_BLEND_GL_ONE << R300_SRC_BLEND_SHIFT) |
91 (R300_BLEND_GL_ZERO << R300_DST_BLEND_SHIFT);
92 }
93
94 /* PIPE_LOGICOP_* don't need to be translated, fortunately. */
95 if (state->logicop_enable) {
96 blend->rop = R300_RB3D_ROPCNTL_ROP_ENABLE |
97 (state->logicop_func) << R300_RB3D_ROPCNTL_ROP_SHIFT;
98 }
99
100 if (state->dither) {
101 blend->dither = R300_RB3D_DITHER_CTL_DITHER_MODE_LUT |
102 R300_RB3D_DITHER_CTL_ALPHA_DITHER_MODE_LUT;
103 }
104
105 return (void*)blend;
106 }
107
108 /* Bind blend state. */
109 static void r300_bind_blend_state(struct pipe_context* pipe,
110 void* state)
111 {
112 struct r300_context* r300 = r300_context(pipe);
113
114 r300->blend_state = (struct r300_blend_state*)state;
115 r300->dirty_state |= R300_NEW_BLEND;
116 }
117
118 /* Free blend state. */
119 static void r300_delete_blend_state(struct pipe_context* pipe,
120 void* state)
121 {
122 FREE(state);
123 }
124
125 /* Set blend color.
126 * Setup both R300 and R500 registers, figure out later which one to write. */
127 static void r300_set_blend_color(struct pipe_context* pipe,
128 const struct pipe_blend_color* color)
129 {
130 struct r300_context* r300 = r300_context(pipe);
131 ubyte ur, ug, ub, ua;
132
133 ur = float_to_ubyte(color->color[0]);
134 ug = float_to_ubyte(color->color[1]);
135 ub = float_to_ubyte(color->color[2]);
136 ua = float_to_ubyte(color->color[3]);
137
138 util_pack_color(color->color, PIPE_FORMAT_A8R8G8B8_UNORM,
139 &r300->blend_color_state->blend_color);
140
141 /* XXX this is wrong */
142 r300->blend_color_state->blend_color_red_alpha = ur | (ua << 16);
143 r300->blend_color_state->blend_color_green_blue = ub | (ug << 16);
144
145 r300->dirty_state |= R300_NEW_BLEND_COLOR;
146 }
147
148 static void r300_set_clip_state(struct pipe_context* pipe,
149 const struct pipe_clip_state* state)
150 {
151 struct r300_context* r300 = r300_context(pipe);
152
153 if (r300_screen(pipe->screen)->caps->has_tcl) {
154 r300->clip_state = *state;
155 r300->dirty_state |= R300_NEW_CLIP;
156 } else {
157 draw_flush(r300->draw);
158 draw_set_clip_state(r300->draw, state);
159 }
160 }
161
162 static void
163 r300_set_constant_buffer(struct pipe_context* pipe,
164 uint shader, uint index,
165 const struct pipe_constant_buffer* buffer)
166 {
167 struct r300_context* r300 = r300_context(pipe);
168
169 /* This entire chunk of code seems ever-so-slightly baked.
170 * It's as if I've got pipe_buffer* matryoshkas... */
171 if (buffer && buffer->buffer && buffer->buffer->size) {
172 void* map = pipe->winsys->buffer_map(pipe->winsys, buffer->buffer,
173 PIPE_BUFFER_USAGE_CPU_READ);
174 memcpy(r300->shader_constants[shader].constants,
175 map, buffer->buffer->size);
176 pipe->winsys->buffer_unmap(pipe->winsys, buffer->buffer);
177
178 r300->shader_constants[shader].count =
179 buffer->buffer->size / (sizeof(float) * 4);
180 } else {
181 r300->shader_constants[shader].count = 0;
182 }
183
184 r300->dirty_state |= R300_NEW_CONSTANTS;
185 }
186
187 /* Create a new depth, stencil, and alpha state based on the CSO dsa state.
188 *
189 * This contains the depth buffer, stencil buffer, alpha test, and such.
190 * On the Radeon, depth and stencil buffer setup are intertwined, which is
191 * the reason for some of the strange-looking assignments across registers. */
192 static void*
193 r300_create_dsa_state(struct pipe_context* pipe,
194 const struct pipe_depth_stencil_alpha_state* state)
195 {
196 struct r300_dsa_state* dsa = CALLOC_STRUCT(r300_dsa_state);
197
198 /* Depth test setup. */
199 if (state->depth.enabled) {
200 dsa->z_buffer_control |= R300_Z_ENABLE;
201
202 if (state->depth.writemask) {
203 dsa->z_buffer_control |= R300_Z_WRITE_ENABLE;
204 }
205
206 dsa->z_stencil_control |=
207 (r300_translate_depth_stencil_function(state->depth.func) <<
208 R300_Z_FUNC_SHIFT);
209 }
210
211 /* Stencil buffer setup. */
212 if (state->stencil[0].enabled) {
213 dsa->z_buffer_control |= R300_STENCIL_ENABLE;
214 dsa->z_stencil_control |=
215 (r300_translate_depth_stencil_function(state->stencil[0].func) <<
216 R300_S_FRONT_FUNC_SHIFT) |
217 (r300_translate_stencil_op(state->stencil[0].fail_op) <<
218 R300_S_FRONT_SFAIL_OP_SHIFT) |
219 (r300_translate_stencil_op(state->stencil[0].zpass_op) <<
220 R300_S_FRONT_ZPASS_OP_SHIFT) |
221 (r300_translate_stencil_op(state->stencil[0].zfail_op) <<
222 R300_S_FRONT_ZFAIL_OP_SHIFT);
223
224 dsa->stencil_ref_mask = (state->stencil[0].ref_value) |
225 (state->stencil[0].valuemask << R300_STENCILMASK_SHIFT) |
226 (state->stencil[0].writemask << R300_STENCILWRITEMASK_SHIFT);
227
228 if (state->stencil[1].enabled) {
229 dsa->z_buffer_control |= R300_STENCIL_FRONT_BACK;
230 dsa->z_stencil_control |=
231 (r300_translate_depth_stencil_function(state->stencil[1].func) <<
232 R300_S_BACK_FUNC_SHIFT) |
233 (r300_translate_stencil_op(state->stencil[1].fail_op) <<
234 R300_S_BACK_SFAIL_OP_SHIFT) |
235 (r300_translate_stencil_op(state->stencil[1].zpass_op) <<
236 R300_S_BACK_ZPASS_OP_SHIFT) |
237 (r300_translate_stencil_op(state->stencil[1].zfail_op) <<
238 R300_S_BACK_ZFAIL_OP_SHIFT);
239
240 dsa->stencil_ref_bf = (state->stencil[1].ref_value) |
241 (state->stencil[1].valuemask << R300_STENCILMASK_SHIFT) |
242 (state->stencil[1].writemask << R300_STENCILWRITEMASK_SHIFT);
243 }
244 }
245
246 /* Alpha test setup. */
247 if (state->alpha.enabled) {
248 dsa->alpha_function =
249 r300_translate_alpha_function(state->alpha.func) |
250 R300_FG_ALPHA_FUNC_ENABLE;
251 dsa->alpha_reference = CLAMP(state->alpha.ref_value * 1023.0f,
252 0, 1023);
253 }
254
255 return (void*)dsa;
256 }
257
258 /* Bind DSA state. */
259 static void r300_bind_dsa_state(struct pipe_context* pipe,
260 void* state)
261 {
262 struct r300_context* r300 = r300_context(pipe);
263
264 r300->dsa_state = (struct r300_dsa_state*)state;
265 r300->dirty_state |= R300_NEW_DSA;
266 }
267
268 /* Free DSA state. */
269 static void r300_delete_dsa_state(struct pipe_context* pipe,
270 void* state)
271 {
272 FREE(state);
273 }
274
275 static void r300_set_edgeflags(struct pipe_context* pipe,
276 const unsigned* bitfield)
277 {
278 /* XXX you know it's bad when i915 has this blank too */
279 /* XXX and even worse, I have no idea WTF the bitfield is */
280 }
281
282 static void
283 r300_set_framebuffer_state(struct pipe_context* pipe,
284 const struct pipe_framebuffer_state* state)
285 {
286 struct r300_context* r300 = r300_context(pipe);
287
288 draw_flush(r300->draw);
289
290 r300->framebuffer_state = *state;
291
292 r300->dirty_state |= R300_NEW_FRAMEBUFFERS;
293 }
294
295 /* Create fragment shader state. */
296 static void* r300_create_fs_state(struct pipe_context* pipe,
297 const struct pipe_shader_state* shader)
298 {
299 struct r300_fragment_shader* fs = NULL;
300
301 fs = (struct r300_fragment_shader*)CALLOC_STRUCT(r300_fragment_shader);
302
303 /* Copy state directly into shader. */
304 fs->state = *shader;
305 fs->state.tokens = tgsi_dup_tokens(shader->tokens);
306
307 tgsi_scan_shader(shader->tokens, &fs->info);
308
309 return (void*)fs;
310 }
311
312 /* Bind fragment shader state. */
313 static void r300_bind_fs_state(struct pipe_context* pipe, void* shader)
314 {
315 struct r300_context* r300 = r300_context(pipe);
316 struct r300_fragment_shader* fs = (struct r300_fragment_shader*)shader;
317
318 if (fs == NULL) {
319 r300->fs = NULL;
320 return;
321 } else if (!fs->translated) {
322 r300_translate_fragment_shader(r300, fs);
323 }
324
325 r300->fs = fs;
326
327 r300->dirty_state |= R300_NEW_FRAGMENT_SHADER;
328 }
329
330 /* Delete fragment shader state. */
331 static void r300_delete_fs_state(struct pipe_context* pipe, void* shader)
332 {
333 struct r300_fragment_shader* fs = (struct r300_fragment_shader*)shader;
334 rc_constants_destroy(&fs->code.constants);
335 FREE((void*)fs->state.tokens);
336 FREE(shader);
337 }
338
339 static void r300_set_polygon_stipple(struct pipe_context* pipe,
340 const struct pipe_poly_stipple* state)
341 {
342 /* XXX no idea how to set this up, but not terribly important */
343 }
344
345 /* Create a new rasterizer state based on the CSO rasterizer state.
346 *
347 * This is a very large chunk of state, and covers most of the graphics
348 * backend (GB), geometry assembly (GA), and setup unit (SU) blocks.
349 *
350 * In a not entirely unironic sidenote, this state has nearly nothing to do
351 * with the actual block on the Radeon called the rasterizer (RS). */
352 static void* r300_create_rs_state(struct pipe_context* pipe,
353 const struct pipe_rasterizer_state* state)
354 {
355 struct r300_rs_state* rs = CALLOC_STRUCT(r300_rs_state);
356
357 /* Copy rasterizer state for Draw. */
358 rs->rs = *state;
359
360 rs->enable_vte = !state->bypass_vs_clip_and_viewport;
361
362 #ifdef PIPE_ARCH_LITTLE_ENDIAN
363 rs->vap_control_status = R300_VC_NO_SWAP;
364 #else
365 rs->vap_control_status = R300_VC_32BIT_SWAP;
366 #endif
367
368 /* If bypassing TCL, or if no TCL engine is present, turn off the HW TCL.
369 * Else, enable HW TCL and force Draw's TCL off. */
370 if (state->bypass_vs_clip_and_viewport ||
371 !r300_screen(pipe->screen)->caps->has_tcl) {
372 rs->vap_control_status |= R300_VAP_TCL_BYPASS;
373 } else {
374 rs->rs.bypass_vs_clip_and_viewport = TRUE;
375 }
376
377 rs->point_size = pack_float_16_6x(state->point_size) |
378 (pack_float_16_6x(state->point_size) << R300_POINTSIZE_X_SHIFT);
379
380 rs->point_minmax =
381 ((int)(state->point_size_min * 6.0) <<
382 R300_GA_POINT_MINMAX_MIN_SHIFT) |
383 ((int)(state->point_size_max * 6.0) <<
384 R300_GA_POINT_MINMAX_MAX_SHIFT);
385
386 rs->line_control = pack_float_16_6x(state->line_width) |
387 R300_GA_LINE_CNTL_END_TYPE_COMP;
388
389 /* Radeons don't think in "CW/CCW", they think in "front/back". */
390 if (state->front_winding == PIPE_WINDING_CW) {
391 rs->cull_mode = R300_FRONT_FACE_CW;
392
393 if (state->offset_cw) {
394 rs->polygon_offset_enable |= R300_FRONT_ENABLE;
395 }
396 if (state->offset_ccw) {
397 rs->polygon_offset_enable |= R300_BACK_ENABLE;
398 }
399 } else {
400 rs->cull_mode = R300_FRONT_FACE_CCW;
401
402 if (state->offset_ccw) {
403 rs->polygon_offset_enable |= R300_FRONT_ENABLE;
404 }
405 if (state->offset_cw) {
406 rs->polygon_offset_enable |= R300_BACK_ENABLE;
407 }
408 }
409 if (state->front_winding & state->cull_mode) {
410 rs->cull_mode |= R300_CULL_FRONT;
411 }
412 if (~(state->front_winding) & state->cull_mode) {
413 rs->cull_mode |= R300_CULL_BACK;
414 }
415
416 if (rs->polygon_offset_enable) {
417 rs->depth_offset_front = rs->depth_offset_back =
418 fui(state->offset_units);
419 rs->depth_scale_front = rs->depth_scale_back =
420 fui(state->offset_scale);
421 }
422
423 if (state->line_stipple_enable) {
424 rs->line_stipple_config =
425 R300_GA_LINE_STIPPLE_CONFIG_LINE_RESET_LINE |
426 (fui((float)state->line_stipple_factor) &
427 R300_GA_LINE_STIPPLE_CONFIG_STIPPLE_SCALE_MASK);
428 /* XXX this might need to be scaled up */
429 rs->line_stipple_value = state->line_stipple_pattern;
430 }
431
432 if (state->flatshade) {
433 rs->color_control = R300_SHADE_MODEL_FLAT;
434 } else {
435 rs->color_control = R300_SHADE_MODEL_SMOOTH;
436 }
437
438 if (!state->flatshade_first) {
439 rs->color_control |= R300_GA_COLOR_CONTROL_PROVOKING_VERTEX_LAST;
440 }
441
442 return (void*)rs;
443 }
444
445 /* Bind rasterizer state. */
446 static void r300_bind_rs_state(struct pipe_context* pipe, void* state)
447 {
448 struct r300_context* r300 = r300_context(pipe);
449 struct r300_rs_state* rs = (struct r300_rs_state*)state;
450
451 draw_flush(r300->draw);
452 draw_set_rasterizer_state(r300->draw, &rs->rs);
453
454 r300->rs_state = rs;
455 r300->dirty_state |= R300_NEW_RASTERIZER;
456 r300->dirty_state |= R300_NEW_RS_BLOCK;
457 r300->dirty_state |= R300_NEW_SCISSOR;
458 r300->dirty_state |= R300_NEW_VIEWPORT;
459 }
460
461 /* Free rasterizer state. */
462 static void r300_delete_rs_state(struct pipe_context* pipe, void* state)
463 {
464 FREE(state);
465 }
466
467 static void*
468 r300_create_sampler_state(struct pipe_context* pipe,
469 const struct pipe_sampler_state* state)
470 {
471 struct r300_context* r300 = r300_context(pipe);
472 struct r300_sampler_state* sampler = CALLOC_STRUCT(r300_sampler_state);
473 int lod_bias;
474
475 sampler->filter0 |=
476 (r300_translate_wrap(state->wrap_s) << R300_TX_WRAP_S_SHIFT) |
477 (r300_translate_wrap(state->wrap_t) << R300_TX_WRAP_T_SHIFT) |
478 (r300_translate_wrap(state->wrap_r) << R300_TX_WRAP_R_SHIFT);
479
480 sampler->filter0 |= r300_translate_tex_filters(state->min_img_filter,
481 state->mag_img_filter,
482 state->min_mip_filter);
483
484 lod_bias = CLAMP((int)(state->lod_bias * 32), -(1 << 9), (1 << 9) - 1);
485
486 sampler->filter1 |= lod_bias << R300_LOD_BIAS_SHIFT;
487
488 sampler->filter1 |= r300_anisotropy(state->max_anisotropy);
489
490 util_pack_color(state->border_color, PIPE_FORMAT_A8R8G8B8_UNORM,
491 &sampler->border_color);
492
493 /* R500-specific fixups and optimizations */
494 if (r300_screen(r300->context.screen)->caps->is_r500) {
495 sampler->filter1 |= R500_BORDER_FIX;
496 }
497
498 return (void*)sampler;
499 }
500
501 static void r300_bind_sampler_states(struct pipe_context* pipe,
502 unsigned count,
503 void** states)
504 {
505 struct r300_context* r300 = r300_context(pipe);
506 int i;
507
508 if (count > 8) {
509 return;
510 }
511
512 for (i = 0; i < count; i++) {
513 if (r300->sampler_states[i] != states[i]) {
514 r300->sampler_states[i] = (struct r300_sampler_state*)states[i];
515 r300->dirty_state |= (R300_NEW_SAMPLER << i);
516 }
517 }
518
519 r300->sampler_count = count;
520 }
521
522 static void r300_delete_sampler_state(struct pipe_context* pipe, void* state)
523 {
524 FREE(state);
525 }
526
527 static void r300_set_sampler_textures(struct pipe_context* pipe,
528 unsigned count,
529 struct pipe_texture** texture)
530 {
531 struct r300_context* r300 = r300_context(pipe);
532 int i;
533
534 /* XXX magic num */
535 if (count > 8) {
536 return;
537 }
538
539 for (i = 0; i < count; i++) {
540 if (r300->textures[i] != (struct r300_texture*)texture[i]) {
541 pipe_texture_reference((struct pipe_texture**)&r300->textures[i],
542 texture[i]);
543 r300->dirty_state |= (R300_NEW_TEXTURE << i);
544 }
545 }
546
547 for (i = count; i < 8; i++) {
548 if (r300->textures[i]) {
549 pipe_texture_reference((struct pipe_texture**)&r300->textures[i],
550 NULL);
551 r300->dirty_state |= (R300_NEW_TEXTURE << i);
552 }
553 }
554
555 r300->texture_count = count;
556 }
557
558 static void r300_set_scissor_state(struct pipe_context* pipe,
559 const struct pipe_scissor_state* state)
560 {
561 struct r300_context* r300 = r300_context(pipe);
562
563 if (r300_screen(r300->context.screen)->caps->is_r500) {
564 r300->scissor_state->scissor_top_left =
565 (state->minx << R300_SCISSORS_X_SHIFT) |
566 (state->miny << R300_SCISSORS_Y_SHIFT);
567 r300->scissor_state->scissor_bottom_right =
568 ((state->maxx - 1) << R300_SCISSORS_X_SHIFT) |
569 ((state->maxy - 1) << R300_SCISSORS_Y_SHIFT);
570 } else {
571 /* Offset of 1440 in non-R500 chipsets. */
572 r300->scissor_state->scissor_top_left =
573 ((state->minx + 1440) << R300_SCISSORS_X_SHIFT) |
574 ((state->miny + 1440) << R300_SCISSORS_Y_SHIFT);
575 r300->scissor_state->scissor_bottom_right =
576 (((state->maxx - 1) + 1440) << R300_SCISSORS_X_SHIFT) |
577 (((state->maxy - 1) + 1440) << R300_SCISSORS_Y_SHIFT);
578 }
579
580 r300->dirty_state |= R300_NEW_SCISSOR;
581 }
582
583 static void r300_set_viewport_state(struct pipe_context* pipe,
584 const struct pipe_viewport_state* state)
585 {
586 struct r300_context* r300 = r300_context(pipe);
587
588 /* Do the transform in HW. */
589 r300->viewport_state->vte_control = R300_VTX_W0_FMT;
590
591 if (state->scale[0] != 1.0f) {
592 assert(state->scale[0] != 0.0f);
593 r300->viewport_state->xscale = state->scale[0];
594 r300->viewport_state->vte_control |= R300_VPORT_X_SCALE_ENA;
595 }
596 if (state->scale[1] != 1.0f) {
597 assert(state->scale[1] != 0.0f);
598 r300->viewport_state->yscale = state->scale[1];
599 r300->viewport_state->vte_control |= R300_VPORT_Y_SCALE_ENA;
600 }
601 if (state->scale[2] != 1.0f) {
602 assert(state->scale[2] != 0.0f);
603 r300->viewport_state->zscale = state->scale[2];
604 r300->viewport_state->vte_control |= R300_VPORT_Z_SCALE_ENA;
605 }
606 if (state->translate[0] != 0.0f) {
607 r300->viewport_state->xoffset = state->translate[0];
608 r300->viewport_state->vte_control |= R300_VPORT_X_OFFSET_ENA;
609 }
610 if (state->translate[1] != 0.0f) {
611 r300->viewport_state->yoffset = state->translate[1];
612 r300->viewport_state->vte_control |= R300_VPORT_Y_OFFSET_ENA;
613 }
614 if (state->translate[2] != 0.0f) {
615 r300->viewport_state->zoffset = state->translate[2];
616 r300->viewport_state->vte_control |= R300_VPORT_Z_OFFSET_ENA;
617 }
618
619 r300->dirty_state |= R300_NEW_VIEWPORT;
620 }
621
622 static void r300_set_vertex_buffers(struct pipe_context* pipe,
623 unsigned count,
624 const struct pipe_vertex_buffer* buffers)
625 {
626 struct r300_context* r300 = r300_context(pipe);
627
628 memcpy(r300->vertex_buffers, buffers,
629 sizeof(struct pipe_vertex_buffer) * count);
630
631 r300->vertex_buffer_count = count;
632
633 draw_flush(r300->draw);
634 draw_set_vertex_buffers(r300->draw, count, buffers);
635 }
636
637 static void r300_set_vertex_elements(struct pipe_context* pipe,
638 unsigned count,
639 const struct pipe_vertex_element* elements)
640 {
641 struct r300_context* r300 = r300_context(pipe);
642
643 draw_flush(r300->draw);
644 draw_set_vertex_elements(r300->draw, count, elements);
645 }
646
647 static void* r300_create_vs_state(struct pipe_context* pipe,
648 const struct pipe_shader_state* shader)
649 {
650 struct r300_context* r300 = r300_context(pipe);
651
652 if (r300_screen(pipe->screen)->caps->has_tcl) {
653 struct r300_vertex_shader* vs = CALLOC_STRUCT(r300_vertex_shader);
654 /* Copy state directly into shader. */
655 vs->state = *shader;
656 vs->state.tokens = tgsi_dup_tokens(shader->tokens);
657
658 tgsi_scan_shader(shader->tokens, &vs->info);
659
660 /* Appease Draw. */
661 vs->draw = draw_create_vertex_shader(r300->draw, shader);
662
663 return (void*)vs;
664 } else {
665 return draw_create_vertex_shader(r300->draw, shader);
666 }
667 }
668
669 static void r300_bind_vs_state(struct pipe_context* pipe, void* shader)
670 {
671 struct r300_context* r300 = r300_context(pipe);
672
673 draw_flush(r300->draw);
674
675 if (r300_screen(pipe->screen)->caps->has_tcl) {
676 struct r300_vertex_shader* vs = (struct r300_vertex_shader*)shader;
677
678 if (vs == NULL) {
679 r300->vs = NULL;
680 return;
681 } else if (!vs->translated) {
682 r300_translate_vertex_shader(r300, vs);
683 }
684
685 draw_bind_vertex_shader(r300->draw, vs->draw);
686 r300->vs = vs;
687 r300->dirty_state |= R300_NEW_VERTEX_SHADER;
688 } else {
689 draw_bind_vertex_shader(r300->draw,
690 (struct draw_vertex_shader*)shader);
691 }
692 }
693
694 static void r300_delete_vs_state(struct pipe_context* pipe, void* shader)
695 {
696 struct r300_context* r300 = r300_context(pipe);
697
698 if (r300_screen(pipe->screen)->caps->has_tcl) {
699 struct r300_vertex_shader* vs = (struct r300_vertex_shader*)shader;
700
701 rc_constants_destroy(&vs->code.constants);
702 draw_delete_vertex_shader(r300->draw, vs->draw);
703 FREE((void*)vs->state.tokens);
704 FREE(shader);
705 } else {
706 draw_delete_vertex_shader(r300->draw,
707 (struct draw_vertex_shader*)shader);
708 }
709 }
710
711 void r300_init_state_functions(struct r300_context* r300)
712 {
713 r300->context.create_blend_state = r300_create_blend_state;
714 r300->context.bind_blend_state = r300_bind_blend_state;
715 r300->context.delete_blend_state = r300_delete_blend_state;
716
717 r300->context.set_blend_color = r300_set_blend_color;
718
719 r300->context.set_clip_state = r300_set_clip_state;
720
721 r300->context.set_constant_buffer = r300_set_constant_buffer;
722
723 r300->context.create_depth_stencil_alpha_state = r300_create_dsa_state;
724 r300->context.bind_depth_stencil_alpha_state = r300_bind_dsa_state;
725 r300->context.delete_depth_stencil_alpha_state = r300_delete_dsa_state;
726
727 r300->context.set_edgeflags = r300_set_edgeflags;
728
729 r300->context.set_framebuffer_state = r300_set_framebuffer_state;
730
731 r300->context.create_fs_state = r300_create_fs_state;
732 r300->context.bind_fs_state = r300_bind_fs_state;
733 r300->context.delete_fs_state = r300_delete_fs_state;
734
735 r300->context.set_polygon_stipple = r300_set_polygon_stipple;
736
737 r300->context.create_rasterizer_state = r300_create_rs_state;
738 r300->context.bind_rasterizer_state = r300_bind_rs_state;
739 r300->context.delete_rasterizer_state = r300_delete_rs_state;
740
741 r300->context.create_sampler_state = r300_create_sampler_state;
742 r300->context.bind_sampler_states = r300_bind_sampler_states;
743 r300->context.delete_sampler_state = r300_delete_sampler_state;
744
745 r300->context.set_sampler_textures = r300_set_sampler_textures;
746
747 r300->context.set_scissor_state = r300_set_scissor_state;
748
749 r300->context.set_viewport_state = r300_set_viewport_state;
750
751 r300->context.set_vertex_buffers = r300_set_vertex_buffers;
752 r300->context.set_vertex_elements = r300_set_vertex_elements;
753
754 r300->context.create_vs_state = r300_create_vs_state;
755 r300->context.bind_vs_state = r300_bind_vs_state;
756 r300->context.delete_vs_state = r300_delete_vs_state;
757 }