2 * Copyright 2008 Corbin Simpson <MostAwesomeDude@gmail.com>
3 * Copyright 2009 Marek Olšák <maraeo@gmail.com>
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * on the rights to use, copy, modify, merge, publish, distribute, sub
9 * license, and/or sell copies of the Software, and to permit persons to whom
10 * the Software is furnished to do so, subject to the following conditions:
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
20 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
21 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
22 * USE OR OTHER DEALINGS IN THE SOFTWARE. */
24 #include "draw/draw_context.h"
26 #include "util/u_framebuffer.h"
27 #include "util/u_half.h"
28 #include "util/u_helpers.h"
29 #include "util/u_math.h"
30 #include "util/u_mm.h"
31 #include "util/u_memory.h"
32 #include "util/u_pack_color.h"
33 #include "util/u_transfer.h"
35 #include "tgsi/tgsi_parse.h"
37 #include "pipe/p_config.h"
40 #include "r300_context.h"
41 #include "r300_emit.h"
43 #include "r300_screen.h"
44 #include "r300_screen_buffer.h"
45 #include "r300_state_inlines.h"
47 #include "r300_texture.h"
50 /* r300_state: Functions used to intialize state context by translating
51 * Gallium state objects into semi-native r300 state objects. */
53 #define UPDATE_STATE(cso, atom) \
54 if (cso != atom.state) { \
56 r300_mark_atom_dirty(r300, &(atom)); \
59 static boolean
blend_discard_if_src_alpha_0(unsigned srcRGB
, unsigned srcA
,
60 unsigned dstRGB
, unsigned dstA
)
62 /* If the blend equation is ADD or REVERSE_SUBTRACT,
63 * SRC_ALPHA == 0, and the following state is set, the colorbuffer
64 * will not be changed.
65 * Notice that the dst factors are the src factors inverted. */
66 return (srcRGB
== PIPE_BLENDFACTOR_SRC_ALPHA
||
67 srcRGB
== PIPE_BLENDFACTOR_SRC_ALPHA_SATURATE
||
68 srcRGB
== PIPE_BLENDFACTOR_ZERO
) &&
69 (srcA
== PIPE_BLENDFACTOR_SRC_COLOR
||
70 srcA
== PIPE_BLENDFACTOR_SRC_ALPHA
||
71 srcA
== PIPE_BLENDFACTOR_SRC_ALPHA_SATURATE
||
72 srcA
== PIPE_BLENDFACTOR_ZERO
) &&
73 (dstRGB
== PIPE_BLENDFACTOR_INV_SRC_ALPHA
||
74 dstRGB
== PIPE_BLENDFACTOR_ONE
) &&
75 (dstA
== PIPE_BLENDFACTOR_INV_SRC_COLOR
||
76 dstA
== PIPE_BLENDFACTOR_INV_SRC_ALPHA
||
77 dstA
== PIPE_BLENDFACTOR_ONE
);
80 static boolean
blend_discard_if_src_alpha_1(unsigned srcRGB
, unsigned srcA
,
81 unsigned dstRGB
, unsigned dstA
)
83 /* If the blend equation is ADD or REVERSE_SUBTRACT,
84 * SRC_ALPHA == 1, and the following state is set, the colorbuffer
85 * will not be changed.
86 * Notice that the dst factors are the src factors inverted. */
87 return (srcRGB
== PIPE_BLENDFACTOR_INV_SRC_ALPHA
||
88 srcRGB
== PIPE_BLENDFACTOR_ZERO
) &&
89 (srcA
== PIPE_BLENDFACTOR_INV_SRC_COLOR
||
90 srcA
== PIPE_BLENDFACTOR_INV_SRC_ALPHA
||
91 srcA
== PIPE_BLENDFACTOR_ZERO
) &&
92 (dstRGB
== PIPE_BLENDFACTOR_SRC_ALPHA
||
93 dstRGB
== PIPE_BLENDFACTOR_ONE
) &&
94 (dstA
== PIPE_BLENDFACTOR_SRC_COLOR
||
95 dstA
== PIPE_BLENDFACTOR_SRC_ALPHA
||
96 dstA
== PIPE_BLENDFACTOR_ONE
);
99 static boolean
blend_discard_if_src_color_0(unsigned srcRGB
, unsigned srcA
,
100 unsigned dstRGB
, unsigned dstA
)
102 /* If the blend equation is ADD or REVERSE_SUBTRACT,
103 * SRC_COLOR == (0,0,0), and the following state is set, the colorbuffer
104 * will not be changed.
105 * Notice that the dst factors are the src factors inverted. */
106 return (srcRGB
== PIPE_BLENDFACTOR_SRC_COLOR
||
107 srcRGB
== PIPE_BLENDFACTOR_ZERO
) &&
108 (srcA
== PIPE_BLENDFACTOR_ZERO
) &&
109 (dstRGB
== PIPE_BLENDFACTOR_INV_SRC_COLOR
||
110 dstRGB
== PIPE_BLENDFACTOR_ONE
) &&
111 (dstA
== PIPE_BLENDFACTOR_ONE
);
114 static boolean
blend_discard_if_src_color_1(unsigned srcRGB
, unsigned srcA
,
115 unsigned dstRGB
, unsigned dstA
)
117 /* If the blend equation is ADD or REVERSE_SUBTRACT,
118 * SRC_COLOR == (1,1,1), and the following state is set, the colorbuffer
119 * will not be changed.
120 * Notice that the dst factors are the src factors inverted. */
121 return (srcRGB
== PIPE_BLENDFACTOR_INV_SRC_COLOR
||
122 srcRGB
== PIPE_BLENDFACTOR_ZERO
) &&
123 (srcA
== PIPE_BLENDFACTOR_ZERO
) &&
124 (dstRGB
== PIPE_BLENDFACTOR_SRC_COLOR
||
125 dstRGB
== PIPE_BLENDFACTOR_ONE
) &&
126 (dstA
== PIPE_BLENDFACTOR_ONE
);
129 static boolean
blend_discard_if_src_alpha_color_0(unsigned srcRGB
, unsigned srcA
,
130 unsigned dstRGB
, unsigned dstA
)
132 /* If the blend equation is ADD or REVERSE_SUBTRACT,
133 * SRC_ALPHA_COLOR == (0,0,0,0), and the following state is set,
134 * the colorbuffer will not be changed.
135 * Notice that the dst factors are the src factors inverted. */
136 return (srcRGB
== PIPE_BLENDFACTOR_SRC_COLOR
||
137 srcRGB
== PIPE_BLENDFACTOR_SRC_ALPHA
||
138 srcRGB
== PIPE_BLENDFACTOR_SRC_ALPHA_SATURATE
||
139 srcRGB
== PIPE_BLENDFACTOR_ZERO
) &&
140 (srcA
== PIPE_BLENDFACTOR_SRC_COLOR
||
141 srcA
== PIPE_BLENDFACTOR_SRC_ALPHA
||
142 srcA
== PIPE_BLENDFACTOR_SRC_ALPHA_SATURATE
||
143 srcA
== PIPE_BLENDFACTOR_ZERO
) &&
144 (dstRGB
== PIPE_BLENDFACTOR_INV_SRC_COLOR
||
145 dstRGB
== PIPE_BLENDFACTOR_INV_SRC_ALPHA
||
146 dstRGB
== PIPE_BLENDFACTOR_ONE
) &&
147 (dstA
== PIPE_BLENDFACTOR_INV_SRC_COLOR
||
148 dstA
== PIPE_BLENDFACTOR_INV_SRC_ALPHA
||
149 dstA
== PIPE_BLENDFACTOR_ONE
);
152 static boolean
blend_discard_if_src_alpha_color_1(unsigned srcRGB
, unsigned srcA
,
153 unsigned dstRGB
, unsigned dstA
)
155 /* If the blend equation is ADD or REVERSE_SUBTRACT,
156 * SRC_ALPHA_COLOR == (1,1,1,1), and the following state is set,
157 * the colorbuffer will not be changed.
158 * Notice that the dst factors are the src factors inverted. */
159 return (srcRGB
== PIPE_BLENDFACTOR_INV_SRC_COLOR
||
160 srcRGB
== PIPE_BLENDFACTOR_INV_SRC_ALPHA
||
161 srcRGB
== PIPE_BLENDFACTOR_ZERO
) &&
162 (srcA
== PIPE_BLENDFACTOR_INV_SRC_COLOR
||
163 srcA
== PIPE_BLENDFACTOR_INV_SRC_ALPHA
||
164 srcA
== PIPE_BLENDFACTOR_ZERO
) &&
165 (dstRGB
== PIPE_BLENDFACTOR_SRC_COLOR
||
166 dstRGB
== PIPE_BLENDFACTOR_SRC_ALPHA
||
167 dstRGB
== PIPE_BLENDFACTOR_ONE
) &&
168 (dstA
== PIPE_BLENDFACTOR_SRC_COLOR
||
169 dstA
== PIPE_BLENDFACTOR_SRC_ALPHA
||
170 dstA
== PIPE_BLENDFACTOR_ONE
);
173 /* The hardware colormask is clunky a must be swizzled depending on the format.
174 * This was figured out by trial-and-error. */
175 static unsigned bgra_cmask(unsigned mask
)
177 return ((mask
& PIPE_MASK_R
) << 2) |
178 ((mask
& PIPE_MASK_B
) >> 2) |
179 (mask
& (PIPE_MASK_G
| PIPE_MASK_A
));
182 static unsigned rgba_cmask(unsigned mask
)
184 return mask
& PIPE_MASK_RGBA
;
187 static unsigned rrrr_cmask(unsigned mask
)
189 return (mask
& PIPE_MASK_R
) |
190 ((mask
& PIPE_MASK_R
) << 1) |
191 ((mask
& PIPE_MASK_R
) << 2) |
192 ((mask
& PIPE_MASK_R
) << 3);
195 static unsigned aaaa_cmask(unsigned mask
)
197 return ((mask
& PIPE_MASK_A
) >> 3) |
198 ((mask
& PIPE_MASK_A
) >> 2) |
199 ((mask
& PIPE_MASK_A
) >> 1) |
200 (mask
& PIPE_MASK_A
);
203 static unsigned grrg_cmask(unsigned mask
)
205 return ((mask
& PIPE_MASK_R
) << 1) |
206 ((mask
& PIPE_MASK_R
) << 2) |
207 ((mask
& PIPE_MASK_G
) >> 1) |
208 ((mask
& PIPE_MASK_G
) << 2);
211 static unsigned arra_cmask(unsigned mask
)
213 return ((mask
& PIPE_MASK_R
) << 1) |
214 ((mask
& PIPE_MASK_R
) << 2) |
215 ((mask
& PIPE_MASK_A
) >> 3) |
216 (mask
& PIPE_MASK_A
);
219 /* Create a new blend state based on the CSO blend state.
221 * This encompasses alpha blending, logic/raster ops, and blend dithering. */
222 static void* r300_create_blend_state(struct pipe_context
* pipe
,
223 const struct pipe_blend_state
* state
)
225 struct r300_screen
* r300screen
= r300_screen(pipe
->screen
);
226 struct r300_blend_state
* blend
= CALLOC_STRUCT(r300_blend_state
);
227 uint32_t blend_control
= 0; /* R300_RB3D_CBLEND: 0x4e04 */
228 uint32_t blend_control_noclamp
= 0; /* R300_RB3D_CBLEND: 0x4e04 */
229 uint32_t alpha_blend_control
= 0; /* R300_RB3D_ABLEND: 0x4e08 */
230 uint32_t alpha_blend_control_noclamp
= 0; /* R300_RB3D_ABLEND: 0x4e08 */
231 uint32_t rop
= 0; /* R300_RB3D_ROPCNTL: 0x4e18 */
232 uint32_t dither
= 0; /* R300_RB3D_DITHER_CTL: 0x4e50 */
236 blend
->state
= *state
;
238 if (state
->rt
[0].blend_enable
)
240 unsigned eqRGB
= state
->rt
[0].rgb_func
;
241 unsigned srcRGB
= state
->rt
[0].rgb_src_factor
;
242 unsigned dstRGB
= state
->rt
[0].rgb_dst_factor
;
244 unsigned eqA
= state
->rt
[0].alpha_func
;
245 unsigned srcA
= state
->rt
[0].alpha_src_factor
;
246 unsigned dstA
= state
->rt
[0].alpha_dst_factor
;
248 /* despite the name, ALPHA_BLEND_ENABLE has nothing to do with alpha,
249 * this is just the crappy D3D naming */
250 blend_control
= blend_control_noclamp
=
251 R300_ALPHA_BLEND_ENABLE
|
252 ( r300_translate_blend_factor(srcRGB
) << R300_SRC_BLEND_SHIFT
) |
253 ( r300_translate_blend_factor(dstRGB
) << R300_DST_BLEND_SHIFT
);
255 r300_translate_blend_function(eqRGB
, TRUE
);
256 blend_control_noclamp
|=
257 r300_translate_blend_function(eqRGB
, FALSE
);
259 /* Optimization: some operations do not require the destination color.
261 * When SRC_ALPHA_SATURATE is used, colorbuffer reads must be enabled,
262 * otherwise blending gives incorrect results. It seems to be
264 if (eqRGB
== PIPE_BLEND_MIN
|| eqA
== PIPE_BLEND_MIN
||
265 eqRGB
== PIPE_BLEND_MAX
|| eqA
== PIPE_BLEND_MAX
||
266 dstRGB
!= PIPE_BLENDFACTOR_ZERO
||
267 dstA
!= PIPE_BLENDFACTOR_ZERO
||
268 srcRGB
== PIPE_BLENDFACTOR_DST_COLOR
||
269 srcRGB
== PIPE_BLENDFACTOR_DST_ALPHA
||
270 srcRGB
== PIPE_BLENDFACTOR_INV_DST_COLOR
||
271 srcRGB
== PIPE_BLENDFACTOR_INV_DST_ALPHA
||
272 srcA
== PIPE_BLENDFACTOR_DST_COLOR
||
273 srcA
== PIPE_BLENDFACTOR_DST_ALPHA
||
274 srcA
== PIPE_BLENDFACTOR_INV_DST_COLOR
||
275 srcA
== PIPE_BLENDFACTOR_INV_DST_ALPHA
||
276 srcRGB
== PIPE_BLENDFACTOR_SRC_ALPHA_SATURATE
) {
277 /* Enable reading from the colorbuffer. */
278 blend_control
|= R300_READ_ENABLE
;
279 blend_control_noclamp
|= R300_READ_ENABLE
;
281 if (r300screen
->caps
.is_r500
) {
282 /* Optimization: Depending on incoming pixels, we can
283 * conditionally disable the reading in hardware... */
284 if (eqRGB
!= PIPE_BLEND_MIN
&& eqA
!= PIPE_BLEND_MIN
&&
285 eqRGB
!= PIPE_BLEND_MAX
&& eqA
!= PIPE_BLEND_MAX
) {
286 /* Disable reading if SRC_ALPHA == 0. */
287 if ((dstRGB
== PIPE_BLENDFACTOR_SRC_ALPHA
||
288 dstRGB
== PIPE_BLENDFACTOR_ZERO
) &&
289 (dstA
== PIPE_BLENDFACTOR_SRC_COLOR
||
290 dstA
== PIPE_BLENDFACTOR_SRC_ALPHA
||
291 dstA
== PIPE_BLENDFACTOR_ZERO
)) {
292 blend_control
|= R500_SRC_ALPHA_0_NO_READ
;
295 /* Disable reading if SRC_ALPHA == 1. */
296 if ((dstRGB
== PIPE_BLENDFACTOR_INV_SRC_ALPHA
||
297 dstRGB
== PIPE_BLENDFACTOR_ZERO
) &&
298 (dstA
== PIPE_BLENDFACTOR_INV_SRC_COLOR
||
299 dstA
== PIPE_BLENDFACTOR_INV_SRC_ALPHA
||
300 dstA
== PIPE_BLENDFACTOR_ZERO
)) {
301 blend_control
|= R500_SRC_ALPHA_1_NO_READ
;
307 /* Optimization: discard pixels which don't change the colorbuffer.
309 * The code below is non-trivial and some math is involved.
311 * Discarding pixels must be disabled when FP16 AA is enabled.
312 * This is a hardware bug. Also, this implementation wouldn't work
313 * with FP blending enabled and equation clamping disabled.
315 * Equations other than ADD are rarely used and therefore won't be
317 if ((eqRGB
== PIPE_BLEND_ADD
|| eqRGB
== PIPE_BLEND_REVERSE_SUBTRACT
) &&
318 (eqA
== PIPE_BLEND_ADD
|| eqA
== PIPE_BLEND_REVERSE_SUBTRACT
)) {
320 * REVERSE_SUBTRACT: Y-X
323 * If X = src*srcFactor = 0 and Y = dst*dstFactor = 1,
324 * then CB will not be changed.
326 * Given the srcFactor and dstFactor variables, we can derive
327 * what src and dst should be equal to and discard appropriate
330 if (blend_discard_if_src_alpha_0(srcRGB
, srcA
, dstRGB
, dstA
)) {
331 blend_control
|= R300_DISCARD_SRC_PIXELS_SRC_ALPHA_0
;
332 } else if (blend_discard_if_src_alpha_1(srcRGB
, srcA
,
334 blend_control
|= R300_DISCARD_SRC_PIXELS_SRC_ALPHA_1
;
335 } else if (blend_discard_if_src_color_0(srcRGB
, srcA
,
337 blend_control
|= R300_DISCARD_SRC_PIXELS_SRC_COLOR_0
;
338 } else if (blend_discard_if_src_color_1(srcRGB
, srcA
,
340 blend_control
|= R300_DISCARD_SRC_PIXELS_SRC_COLOR_1
;
341 } else if (blend_discard_if_src_alpha_color_0(srcRGB
, srcA
,
344 R300_DISCARD_SRC_PIXELS_SRC_ALPHA_COLOR_0
;
345 } else if (blend_discard_if_src_alpha_color_1(srcRGB
, srcA
,
348 R300_DISCARD_SRC_PIXELS_SRC_ALPHA_COLOR_1
;
353 if (srcA
!= srcRGB
|| dstA
!= dstRGB
|| eqA
!= eqRGB
) {
354 blend_control
|= R300_SEPARATE_ALPHA_ENABLE
;
355 blend_control_noclamp
|= R300_SEPARATE_ALPHA_ENABLE
;
356 alpha_blend_control
= alpha_blend_control_noclamp
=
357 (r300_translate_blend_factor(srcA
) << R300_SRC_BLEND_SHIFT
) |
358 (r300_translate_blend_factor(dstA
) << R300_DST_BLEND_SHIFT
);
359 alpha_blend_control
|=
360 r300_translate_blend_function(eqA
, TRUE
);
361 alpha_blend_control_noclamp
|=
362 r300_translate_blend_function(eqA
, FALSE
);
366 /* PIPE_LOGICOP_* don't need to be translated, fortunately. */
367 if (state
->logicop_enable
) {
368 rop
= R300_RB3D_ROPCNTL_ROP_ENABLE
|
369 (state
->logicop_func
) << R300_RB3D_ROPCNTL_ROP_SHIFT
;
372 /* Neither fglrx nor classic r300 ever set this, regardless of dithering
373 * state. Since it's an optional implementation detail, we can leave it
374 * out and never dither.
376 * This could be revisited if we ever get quality or conformance hints.
379 dither = R300_RB3D_DITHER_CTL_DITHER_MODE_LUT |
380 R300_RB3D_DITHER_CTL_ALPHA_DITHER_MODE_LUT;
384 /* Build a command buffer. */
386 unsigned (*func
[COLORMASK_NUM_SWIZZLES
])(unsigned) = {
395 for (i
= 0; i
< COLORMASK_NUM_SWIZZLES
; i
++) {
396 BEGIN_CB(blend
->cb_clamp
[i
], 8);
397 OUT_CB_REG(R300_RB3D_ROPCNTL
, rop
);
398 OUT_CB_REG_SEQ(R300_RB3D_CBLEND
, 3);
399 OUT_CB(blend_control
);
400 OUT_CB(alpha_blend_control
);
401 OUT_CB(func
[i
](state
->rt
[0].colormask
));
402 OUT_CB_REG(R300_RB3D_DITHER_CTL
, dither
);
407 /* Build a command buffer. */
408 BEGIN_CB(blend
->cb_noclamp
, 8);
409 OUT_CB_REG(R300_RB3D_ROPCNTL
, rop
);
410 OUT_CB_REG_SEQ(R300_RB3D_CBLEND
, 3);
411 OUT_CB(blend_control_noclamp
);
412 OUT_CB(alpha_blend_control_noclamp
);
413 OUT_CB(rgba_cmask(state
->rt
[0].colormask
));
414 OUT_CB_REG(R300_RB3D_DITHER_CTL
, dither
);
417 /* The same as above, but with no colorbuffer reads and writes. */
418 BEGIN_CB(blend
->cb_no_readwrite
, 8);
419 OUT_CB_REG(R300_RB3D_ROPCNTL
, rop
);
420 OUT_CB_REG_SEQ(R300_RB3D_CBLEND
, 3);
424 OUT_CB_REG(R300_RB3D_DITHER_CTL
, dither
);
430 /* Bind blend state. */
431 static void r300_bind_blend_state(struct pipe_context
* pipe
,
434 struct r300_context
* r300
= r300_context(pipe
);
436 UPDATE_STATE(state
, r300
->blend_state
);
439 /* Free blend state. */
440 static void r300_delete_blend_state(struct pipe_context
* pipe
,
446 /* Convert float to 10bit integer */
447 static unsigned float_to_fixed10(float f
)
449 return CLAMP((unsigned)(f
* 1023.9f
), 0, 1023);
453 * Setup both R300 and R500 registers, figure out later which one to write. */
454 static void r300_set_blend_color(struct pipe_context
* pipe
,
455 const struct pipe_blend_color
* color
)
457 struct r300_context
* r300
= r300_context(pipe
);
458 struct pipe_framebuffer_state
*fb
= r300
->fb_state
.state
;
459 struct r300_blend_color_state
*state
=
460 (struct r300_blend_color_state
*)r300
->blend_color_state
.state
;
461 struct pipe_blend_color c
;
462 enum pipe_format format
= fb
->nr_cbufs
? fb
->cbufs
[0]->format
: 0;
465 state
->state
= *color
; /* Save it, so that we can reuse it in set_fb_state */
468 /* The blend color is dependent on the colorbuffer format. */
471 case PIPE_FORMAT_R8_UNORM
:
472 case PIPE_FORMAT_L8_UNORM
:
473 case PIPE_FORMAT_I8_UNORM
:
474 c
.color
[1] = c
.color
[0];
477 case PIPE_FORMAT_A8_UNORM
:
478 c
.color
[1] = c
.color
[3];
481 case PIPE_FORMAT_R8G8_UNORM
:
482 c
.color
[2] = c
.color
[1];
485 case PIPE_FORMAT_L8A8_UNORM
:
486 c
.color
[2] = c
.color
[3];
493 if (r300
->screen
->caps
.is_r500
) {
494 BEGIN_CB(state
->cb
, 3);
495 OUT_CB_REG_SEQ(R500_RB3D_CONSTANT_COLOR_AR
, 2);
498 case PIPE_FORMAT_R16G16B16A16_FLOAT
:
499 OUT_CB(util_float_to_half(c
.color
[2]) |
500 (util_float_to_half(c
.color
[3]) << 16));
501 OUT_CB(util_float_to_half(c
.color
[0]) |
502 (util_float_to_half(c
.color
[1]) << 16));
506 OUT_CB(float_to_fixed10(c
.color
[0]) |
507 (float_to_fixed10(c
.color
[3]) << 16));
508 OUT_CB(float_to_fixed10(c
.color
[2]) |
509 (float_to_fixed10(c
.color
[1]) << 16));
515 util_pack_color(c
.color
, PIPE_FORMAT_B8G8R8A8_UNORM
, &uc
);
517 BEGIN_CB(state
->cb
, 2);
518 OUT_CB_REG(R300_RB3D_BLEND_COLOR
, uc
.ui
);
522 r300_mark_atom_dirty(r300
, &r300
->blend_color_state
);
525 static void r300_set_clip_state(struct pipe_context
* pipe
,
526 const struct pipe_clip_state
* state
)
528 struct r300_context
* r300
= r300_context(pipe
);
529 struct r300_clip_state
*clip
=
530 (struct r300_clip_state
*)r300
->clip_state
.state
;
533 if (r300
->screen
->caps
.has_tcl
) {
534 BEGIN_CB(clip
->cb
, r300
->clip_state
.size
);
535 OUT_CB_REG(R300_VAP_PVS_VECTOR_INDX_REG
,
536 (r300
->screen
->caps
.is_r500
?
537 R500_PVS_UCP_START
: R300_PVS_UCP_START
));
538 OUT_CB_ONE_REG(R300_VAP_PVS_UPLOAD_DATA
, 6 * 4);
539 OUT_CB_TABLE(state
->ucp
, 6 * 4);
542 r300_mark_atom_dirty(r300
, &r300
->clip_state
);
544 draw_set_clip_state(r300
->draw
, state
);
549 r300_set_sample_mask(struct pipe_context
*pipe
,
550 unsigned sample_mask
)
555 /* Create a new depth, stencil, and alpha state based on the CSO dsa state.
557 * This contains the depth buffer, stencil buffer, alpha test, and such.
558 * On the Radeon, depth and stencil buffer setup are intertwined, which is
559 * the reason for some of the strange-looking assignments across registers. */
561 r300_create_dsa_state(struct pipe_context
* pipe
,
562 const struct pipe_depth_stencil_alpha_state
* state
)
564 struct r300_capabilities
*caps
= &r300_screen(pipe
->screen
)->caps
;
565 struct r300_dsa_state
* dsa
= CALLOC_STRUCT(r300_dsa_state
);
570 /* Depth test setup. - separate write mask depth for decomp flush */
571 if (state
->depth
.writemask
) {
572 dsa
->z_buffer_control
|= R300_Z_WRITE_ENABLE
;
575 if (state
->depth
.enabled
) {
576 dsa
->z_buffer_control
|= R300_Z_ENABLE
;
578 dsa
->z_stencil_control
|=
579 (r300_translate_depth_stencil_function(state
->depth
.func
) <<
583 /* Stencil buffer setup. */
584 if (state
->stencil
[0].enabled
) {
585 dsa
->z_buffer_control
|= R300_STENCIL_ENABLE
;
586 dsa
->z_stencil_control
|=
587 (r300_translate_depth_stencil_function(state
->stencil
[0].func
) <<
588 R300_S_FRONT_FUNC_SHIFT
) |
589 (r300_translate_stencil_op(state
->stencil
[0].fail_op
) <<
590 R300_S_FRONT_SFAIL_OP_SHIFT
) |
591 (r300_translate_stencil_op(state
->stencil
[0].zpass_op
) <<
592 R300_S_FRONT_ZPASS_OP_SHIFT
) |
593 (r300_translate_stencil_op(state
->stencil
[0].zfail_op
) <<
594 R300_S_FRONT_ZFAIL_OP_SHIFT
);
596 dsa
->stencil_ref_mask
=
597 (state
->stencil
[0].valuemask
<< R300_STENCILMASK_SHIFT
) |
598 (state
->stencil
[0].writemask
<< R300_STENCILWRITEMASK_SHIFT
);
600 if (state
->stencil
[1].enabled
) {
601 dsa
->two_sided
= TRUE
;
603 dsa
->z_buffer_control
|= R300_STENCIL_FRONT_BACK
;
604 dsa
->z_stencil_control
|=
605 (r300_translate_depth_stencil_function(state
->stencil
[1].func
) <<
606 R300_S_BACK_FUNC_SHIFT
) |
607 (r300_translate_stencil_op(state
->stencil
[1].fail_op
) <<
608 R300_S_BACK_SFAIL_OP_SHIFT
) |
609 (r300_translate_stencil_op(state
->stencil
[1].zpass_op
) <<
610 R300_S_BACK_ZPASS_OP_SHIFT
) |
611 (r300_translate_stencil_op(state
->stencil
[1].zfail_op
) <<
612 R300_S_BACK_ZFAIL_OP_SHIFT
);
614 dsa
->stencil_ref_bf
=
615 (state
->stencil
[1].valuemask
<< R300_STENCILMASK_SHIFT
) |
616 (state
->stencil
[1].writemask
<< R300_STENCILWRITEMASK_SHIFT
);
619 dsa
->z_buffer_control
|= R500_STENCIL_REFMASK_FRONT_BACK
;
621 dsa
->two_sided_stencil_ref
=
622 (state
->stencil
[0].valuemask
!= state
->stencil
[1].valuemask
||
623 state
->stencil
[0].writemask
!= state
->stencil
[1].writemask
);
628 /* Alpha test setup. */
629 if (state
->alpha
.enabled
) {
630 dsa
->alpha_function
=
631 r300_translate_alpha_function(state
->alpha
.func
) |
632 R300_FG_ALPHA_FUNC_ENABLE
;
634 dsa
->alpha_function
|= float_to_ubyte(state
->alpha
.ref_value
);
635 dsa
->alpha_value
= util_float_to_half(state
->alpha
.ref_value
);
638 dsa
->alpha_function_fp16
= dsa
->alpha_function
|
639 R500_FG_ALPHA_FUNC_FP16_ENABLE
;
640 dsa
->alpha_function
|= R500_FG_ALPHA_FUNC_8BIT
;
644 BEGIN_CB(&dsa
->cb_begin
, 10);
645 OUT_CB_REG(R300_FG_ALPHA_FUNC
, dsa
->alpha_function
);
646 OUT_CB_REG_SEQ(R300_ZB_CNTL
, 3);
647 OUT_CB(dsa
->z_buffer_control
);
648 OUT_CB(dsa
->z_stencil_control
);
649 OUT_CB(dsa
->stencil_ref_mask
);
650 OUT_CB_REG(R500_ZB_STENCILREFMASK_BF
, dsa
->stencil_ref_bf
);
651 OUT_CB_REG(R500_FG_ALPHA_VALUE
, dsa
->alpha_value
);
654 BEGIN_CB(&dsa
->cb_begin_fp16
, 10);
655 OUT_CB_REG(R300_FG_ALPHA_FUNC
, dsa
->alpha_function_fp16
);
656 OUT_CB_REG_SEQ(R300_ZB_CNTL
, 3);
657 OUT_CB(dsa
->z_buffer_control
);
658 OUT_CB(dsa
->z_stencil_control
);
659 OUT_CB(dsa
->stencil_ref_mask
);
660 OUT_CB_REG(R500_ZB_STENCILREFMASK_BF
, dsa
->stencil_ref_bf
);
661 OUT_CB_REG(R500_FG_ALPHA_VALUE
, dsa
->alpha_value
);
664 BEGIN_CB(dsa
->cb_zb_no_readwrite
, 10);
665 OUT_CB_REG(R300_FG_ALPHA_FUNC
, dsa
->alpha_function
);
666 OUT_CB_REG_SEQ(R300_ZB_CNTL
, 3);
670 OUT_CB_REG(R500_ZB_STENCILREFMASK_BF
, 0);
671 OUT_CB_REG(R500_FG_ALPHA_VALUE
, dsa
->alpha_value
);
674 BEGIN_CB(dsa
->cb_fp16_zb_no_readwrite
, 10);
675 OUT_CB_REG(R300_FG_ALPHA_FUNC
, dsa
->alpha_function_fp16
);
676 OUT_CB_REG_SEQ(R300_ZB_CNTL
, 3);
680 OUT_CB_REG(R500_ZB_STENCILREFMASK_BF
, 0);
681 OUT_CB_REG(R500_FG_ALPHA_VALUE
, dsa
->alpha_value
);
687 static void r300_dsa_inject_stencilref(struct r300_context
*r300
)
689 struct r300_dsa_state
*dsa
=
690 (struct r300_dsa_state
*)r300
->dsa_state
.state
;
695 dsa
->stencil_ref_mask
=
696 (dsa
->stencil_ref_mask
& ~R300_STENCILREF_MASK
) |
697 r300
->stencil_ref
.ref_value
[0];
698 dsa
->stencil_ref_bf
=
699 (dsa
->stencil_ref_bf
& ~R300_STENCILREF_MASK
) |
700 r300
->stencil_ref
.ref_value
[1];
703 /* Bind DSA state. */
704 static void r300_bind_dsa_state(struct pipe_context
* pipe
,
707 struct r300_context
* r300
= r300_context(pipe
);
713 UPDATE_STATE(state
, r300
->dsa_state
);
715 r300_mark_atom_dirty(r300
, &r300
->hyperz_state
); /* Will be updated before the emission. */
716 r300_dsa_inject_stencilref(r300
);
719 /* Free DSA state. */
720 static void r300_delete_dsa_state(struct pipe_context
* pipe
,
726 static void r300_set_stencil_ref(struct pipe_context
* pipe
,
727 const struct pipe_stencil_ref
* sr
)
729 struct r300_context
* r300
= r300_context(pipe
);
731 r300
->stencil_ref
= *sr
;
733 r300_dsa_inject_stencilref(r300
);
734 r300_mark_atom_dirty(r300
, &r300
->dsa_state
);
737 static void r300_tex_set_tiling_flags(struct r300_context
*r300
,
738 struct r300_resource
*tex
,
741 /* Check if the macrotile flag needs to be changed.
742 * Skip changing the flags otherwise. */
743 if (tex
->tex
.macrotile
[tex
->surface_level
] !=
744 tex
->tex
.macrotile
[level
]) {
745 r300
->rws
->buffer_set_tiling(tex
->buf
, r300
->cs
,
746 tex
->tex
.microtile
, tex
->tex
.macrotile
[level
],
748 tex
->tex
.stride_in_bytes
[0]);
750 tex
->surface_level
= level
;
754 /* This switcheroo is needed just because of goddamned MACRO_SWITCH. */
755 static void r300_fb_set_tiling_flags(struct r300_context
*r300
,
756 const struct pipe_framebuffer_state
*state
)
760 /* Set tiling flags for new surfaces. */
761 for (i
= 0; i
< state
->nr_cbufs
; i
++) {
762 r300_tex_set_tiling_flags(r300
,
763 r300_resource(state
->cbufs
[i
]->texture
),
764 state
->cbufs
[i
]->u
.tex
.level
);
767 r300_tex_set_tiling_flags(r300
,
768 r300_resource(state
->zsbuf
->texture
),
769 state
->zsbuf
->u
.tex
.level
);
773 static void r300_print_fb_surf_info(struct pipe_surface
*surf
, unsigned index
,
776 struct pipe_resource
*tex
= surf
->texture
;
777 struct r300_resource
*rtex
= r300_resource(tex
);
780 "r300: %s[%i] Dim: %ix%i, Firstlayer: %i, "
781 "Lastlayer: %i, Level: %i, Format: %s\n"
783 "r300: TEX: Macro: %s, Micro: %s, "
784 "Dim: %ix%ix%i, LastLevel: %i, Format: %s\n",
786 binding
, index
, surf
->width
, surf
->height
,
787 surf
->u
.tex
.first_layer
, surf
->u
.tex
.last_layer
, surf
->u
.tex
.level
,
788 util_format_short_name(surf
->format
),
790 rtex
->tex
.macrotile
[0] ? "YES" : " NO",
791 rtex
->tex
.microtile
? "YES" : " NO",
792 tex
->width0
, tex
->height0
, tex
->depth0
,
793 tex
->last_level
, util_format_short_name(surf
->format
));
796 void r300_mark_fb_state_dirty(struct r300_context
*r300
,
797 enum r300_fb_state_change change
)
799 struct pipe_framebuffer_state
*state
= r300
->fb_state
.state
;
801 r300_mark_atom_dirty(r300
, &r300
->gpu_flush
);
802 r300_mark_atom_dirty(r300
, &r300
->fb_state
);
804 /* What is marked as dirty depends on the enum r300_fb_state_change. */
805 if (change
== R300_CHANGED_FB_STATE
) {
806 r300_mark_atom_dirty(r300
, &r300
->aa_state
);
807 r300_mark_atom_dirty(r300
, &r300
->dsa_state
); /* for AlphaRef */
808 r300_set_blend_color(&r300
->context
, r300
->blend_color_state
.state
);
811 if (change
== R300_CHANGED_FB_STATE
||
812 change
== R300_CHANGED_HYPERZ_FLAG
) {
813 r300_mark_atom_dirty(r300
, &r300
->hyperz_state
);
816 if (change
== R300_CHANGED_FB_STATE
||
817 change
== R300_CHANGED_MULTIWRITE
) {
818 r300_mark_atom_dirty(r300
, &r300
->fb_state_pipelined
);
821 /* Now compute the fb_state atom size. */
822 r300
->fb_state
.size
= 2 + (8 * state
->nr_cbufs
);
824 if (r300
->cbzb_clear
)
825 r300
->fb_state
.size
+= 10;
826 else if (state
->zsbuf
) {
827 r300
->fb_state
.size
+= 10;
828 if (r300
->hyperz_enabled
)
829 r300
->fb_state
.size
+= 8;
832 /* The size of the rest of atoms stays the same. */
836 r300_set_framebuffer_state(struct pipe_context
* pipe
,
837 const struct pipe_framebuffer_state
* state
)
839 struct r300_context
* r300
= r300_context(pipe
);
840 struct r300_aa_state
*aa
= (struct r300_aa_state
*)r300
->aa_state
.state
;
841 struct pipe_framebuffer_state
*old_state
= r300
->fb_state
.state
;
842 unsigned max_width
, max_height
, i
;
843 uint32_t zbuffer_bpp
= 0;
844 boolean unlock_zbuffer
= FALSE
;
846 if (r300
->screen
->caps
.is_r500
) {
847 max_width
= max_height
= 4096;
848 } else if (r300
->screen
->caps
.is_r400
) {
849 max_width
= max_height
= 4021;
851 max_width
= max_height
= 2560;
854 if (state
->width
> max_width
|| state
->height
> max_height
) {
855 fprintf(stderr
, "r300: Implementation error: Render targets are too "
856 "big in %s, refusing to bind framebuffer state!\n", __FUNCTION__
);
860 if (old_state
->zsbuf
&& r300
->zmask_in_use
&& !r300
->locked_zbuffer
) {
861 /* There is a zmask in use, what are we gonna do? */
863 if (!pipe_surface_equal(old_state
->zsbuf
, state
->zsbuf
)) {
864 /* Decompress the currently bound zbuffer before we bind another one. */
865 r300_decompress_zmask(r300
);
866 r300
->hiz_in_use
= FALSE
;
869 /* We don't bind another zbuffer, so lock the current one. */
870 pipe_surface_reference(&r300
->locked_zbuffer
, old_state
->zsbuf
);
872 } else if (r300
->locked_zbuffer
) {
873 /* We have a locked zbuffer now, what are we gonna do? */
875 if (!pipe_surface_equal(r300
->locked_zbuffer
, state
->zsbuf
)) {
876 /* We are binding some other zbuffer, so decompress the locked one,
877 * it gets unlocked automatically. */
878 r300_decompress_zmask_locked_unsafe(r300
);
879 r300
->hiz_in_use
= FALSE
;
881 /* We are binding the locked zbuffer again, so unlock it. */
882 unlock_zbuffer
= TRUE
;
886 assert(state
->zsbuf
|| (r300
->locked_zbuffer
&& !unlock_zbuffer
) || !r300
->zmask_in_use
);
888 /* Need to reset clamping or colormask. */
889 r300_mark_atom_dirty(r300
, &r300
->blend_state
);
891 /* If zsbuf is set from NULL to non-NULL or vice versa.. */
892 if (!!old_state
->zsbuf
!= !!state
->zsbuf
) {
893 r300_mark_atom_dirty(r300
, &r300
->dsa_state
);
896 if (r300
->screen
->info
.drm_minor
< 12) {
897 /* The tiling flags are dependent on the surface miplevel, unfortunately.
898 * This workarounds a bad design decision in old kernels which were
899 * rewriting tile fields in registers. */
900 r300_fb_set_tiling_flags(r300
, state
);
903 util_copy_framebuffer_state(r300
->fb_state
.state
, state
);
905 if (unlock_zbuffer
) {
906 pipe_surface_reference(&r300
->locked_zbuffer
, NULL
);
909 r300_mark_fb_state_dirty(r300
, R300_CHANGED_FB_STATE
);
912 switch (util_format_get_blocksize(state
->zsbuf
->format
)) {
921 /* Polygon offset depends on the zbuffer bit depth. */
922 if (r300
->zbuffer_bpp
!= zbuffer_bpp
) {
923 r300
->zbuffer_bpp
= zbuffer_bpp
;
925 if (r300
->polygon_offset_enabled
)
926 r300_mark_atom_dirty(r300
, &r300
->rs_state
);
930 /* Set up AA config. */
931 if (state
->nr_cbufs
&& state
->cbufs
[0]->texture
->nr_samples
> 1) {
932 aa
->aa_config
= R300_GB_AA_CONFIG_AA_ENABLE
;
934 switch (state
->cbufs
[0]->texture
->nr_samples
) {
936 aa
->aa_config
|= R300_GB_AA_CONFIG_NUM_AA_SUBSAMPLES_2
;
939 aa
->aa_config
|= R300_GB_AA_CONFIG_NUM_AA_SUBSAMPLES_3
;
942 aa
->aa_config
|= R300_GB_AA_CONFIG_NUM_AA_SUBSAMPLES_4
;
945 aa
->aa_config
|= R300_GB_AA_CONFIG_NUM_AA_SUBSAMPLES_6
;
952 if (DBG_ON(r300
, DBG_FB
)) {
953 fprintf(stderr
, "r300: set_framebuffer_state:\n");
954 for (i
= 0; i
< state
->nr_cbufs
; i
++) {
955 r300_print_fb_surf_info(state
->cbufs
[i
], i
, "CB");
958 r300_print_fb_surf_info(state
->zsbuf
, 0, "ZB");
963 /* Create fragment shader state. */
964 static void* r300_create_fs_state(struct pipe_context
* pipe
,
965 const struct pipe_shader_state
* shader
)
967 struct r300_fragment_shader
* fs
= NULL
;
969 fs
= (struct r300_fragment_shader
*)CALLOC_STRUCT(r300_fragment_shader
);
971 /* Copy state directly into shader. */
973 fs
->state
.tokens
= tgsi_dup_tokens(shader
->tokens
);
978 void r300_mark_fs_code_dirty(struct r300_context
*r300
)
980 struct r300_fragment_shader
* fs
= r300_fs(r300
);
982 r300_mark_atom_dirty(r300
, &r300
->fs
);
983 r300_mark_atom_dirty(r300
, &r300
->fs_rc_constant_state
);
984 r300_mark_atom_dirty(r300
, &r300
->fs_constants
);
985 r300
->fs
.size
= fs
->shader
->cb_code_size
;
987 if (r300
->screen
->caps
.is_r500
) {
988 r300
->fs_rc_constant_state
.size
= fs
->shader
->rc_state_count
* 7;
989 r300
->fs_constants
.size
= fs
->shader
->externals_count
* 4 + 3;
991 r300
->fs_rc_constant_state
.size
= fs
->shader
->rc_state_count
* 5;
992 r300
->fs_constants
.size
= fs
->shader
->externals_count
* 4 + 1;
995 ((struct r300_constant_buffer
*)r300
->fs_constants
.state
)->remap_table
=
996 fs
->shader
->code
.constants_remap_table
;
999 /* Bind fragment shader state. */
1000 static void r300_bind_fs_state(struct pipe_context
* pipe
, void* shader
)
1002 struct r300_context
* r300
= r300_context(pipe
);
1003 struct r300_fragment_shader
* fs
= (struct r300_fragment_shader
*)shader
;
1006 r300
->fs
.state
= NULL
;
1010 r300
->fs
.state
= fs
;
1011 r300
->fs_status
= FRAGMENT_SHADER_DIRTY
;
1013 r300_mark_atom_dirty(r300
, &r300
->rs_block_state
); /* Will be updated before the emission. */
1016 /* Delete fragment shader state. */
1017 static void r300_delete_fs_state(struct pipe_context
* pipe
, void* shader
)
1019 struct r300_fragment_shader
* fs
= (struct r300_fragment_shader
*)shader
;
1020 struct r300_fragment_shader_code
*tmp
, *ptr
= fs
->first
;
1025 rc_constants_destroy(&tmp
->code
.constants
);
1029 FREE((void*)fs
->state
.tokens
);
1033 static void r300_set_polygon_stipple(struct pipe_context
* pipe
,
1034 const struct pipe_poly_stipple
* state
)
1036 /* XXX no idea how to set this up, but not terribly important */
1039 /* Create a new rasterizer state based on the CSO rasterizer state.
1041 * This is a very large chunk of state, and covers most of the graphics
1042 * backend (GB), geometry assembly (GA), and setup unit (SU) blocks.
1044 * In a not entirely unironic sidenote, this state has nearly nothing to do
1045 * with the actual block on the Radeon called the rasterizer (RS). */
1046 static void* r300_create_rs_state(struct pipe_context
* pipe
,
1047 const struct pipe_rasterizer_state
* state
)
1049 struct r300_rs_state
* rs
= CALLOC_STRUCT(r300_rs_state
);
1050 uint32_t vap_control_status
; /* R300_VAP_CNTL_STATUS: 0x2140 */
1051 uint32_t vap_clip_cntl
; /* R300_VAP_CLIP_CNTL: 0x221C */
1052 uint32_t point_size
; /* R300_GA_POINT_SIZE: 0x421c */
1053 uint32_t point_minmax
; /* R300_GA_POINT_MINMAX: 0x4230 */
1054 uint32_t line_control
; /* R300_GA_LINE_CNTL: 0x4234 */
1055 uint32_t polygon_offset_enable
; /* R300_SU_POLY_OFFSET_ENABLE: 0x42b4 */
1056 uint32_t cull_mode
; /* R300_SU_CULL_MODE: 0x42b8 */
1057 uint32_t line_stipple_config
; /* R300_GA_LINE_STIPPLE_CONFIG: 0x4328 */
1058 uint32_t line_stipple_value
; /* R300_GA_LINE_STIPPLE_VALUE: 0x4260 */
1059 uint32_t polygon_mode
; /* R300_GA_POLY_MODE: 0x4288 */
1060 uint32_t clip_rule
; /* R300_SC_CLIP_RULE: 0x43D0 */
1061 uint32_t round_mode
; /* R300_GA_ROUND_MODE: 0x428c */
1063 /* Point sprites texture coordinates, 0: lower left, 1: upper right */
1064 float point_texcoord_left
= 0; /* R300_GA_POINT_S0: 0x4200 */
1065 float point_texcoord_bottom
= 0;/* R300_GA_POINT_T0: 0x4204 */
1066 float point_texcoord_right
= 1; /* R300_GA_POINT_S1: 0x4208 */
1067 float point_texcoord_top
= 0; /* R300_GA_POINT_T1: 0x420c */
1068 boolean vclamp
= state
->clamp_vertex_color
||
1069 !r300_context(pipe
)->screen
->caps
.is_r500
;
1072 /* Copy rasterizer state. */
1074 rs
->rs_draw
= *state
;
1076 rs
->rs
.sprite_coord_enable
= state
->point_quad_rasterization
*
1077 state
->sprite_coord_enable
;
1079 /* Override some states for Draw. */
1080 rs
->rs_draw
.sprite_coord_enable
= 0; /* We can do this in HW. */
1081 rs
->rs_draw
.offset_point
= 0;
1082 rs
->rs_draw
.offset_line
= 0;
1083 rs
->rs_draw
.offset_tri
= 0;
1084 rs
->rs_draw
.offset_clamp
= 0;
1086 #ifdef PIPE_ARCH_LITTLE_ENDIAN
1087 vap_control_status
= R300_VC_NO_SWAP
;
1089 vap_control_status
= R300_VC_32BIT_SWAP
;
1092 /* If no TCL engine is present, turn off the HW TCL. */
1093 if (!r300_screen(pipe
->screen
)->caps
.has_tcl
) {
1094 vap_control_status
|= R300_VAP_TCL_BYPASS
;
1097 /* Point size width and height. */
1099 pack_float_16_6x(state
->point_size
) |
1100 (pack_float_16_6x(state
->point_size
) << R300_POINTSIZE_X_SHIFT
);
1102 /* Point size clamping. */
1103 if (state
->point_size_per_vertex
) {
1104 /* Per-vertex point size.
1105 * Clamp to [0, max FB size] */
1106 float min_psiz
= util_get_min_point_size(state
);
1107 float max_psiz
= pipe
->screen
->get_paramf(pipe
->screen
,
1108 PIPE_CAPF_MAX_POINT_WIDTH
);
1110 (pack_float_16_6x(min_psiz
) << R300_GA_POINT_MINMAX_MIN_SHIFT
) |
1111 (pack_float_16_6x(max_psiz
) << R300_GA_POINT_MINMAX_MAX_SHIFT
);
1113 /* We cannot disable the point-size vertex output,
1115 float psiz
= state
->point_size
;
1117 (pack_float_16_6x(psiz
) << R300_GA_POINT_MINMAX_MIN_SHIFT
) |
1118 (pack_float_16_6x(psiz
) << R300_GA_POINT_MINMAX_MAX_SHIFT
);
1122 line_control
= pack_float_16_6x(state
->line_width
) |
1123 R300_GA_LINE_CNTL_END_TYPE_COMP
;
1125 /* Enable polygon mode */
1127 if (state
->fill_front
!= PIPE_POLYGON_MODE_FILL
||
1128 state
->fill_back
!= PIPE_POLYGON_MODE_FILL
) {
1129 polygon_mode
= R300_GA_POLY_MODE_DUAL
;
1133 if (state
->front_ccw
)
1134 cull_mode
= R300_FRONT_FACE_CCW
;
1136 cull_mode
= R300_FRONT_FACE_CW
;
1138 /* Polygon offset */
1139 polygon_offset_enable
= 0;
1140 if (util_get_offset(state
, state
->fill_front
)) {
1141 polygon_offset_enable
|= R300_FRONT_ENABLE
;
1143 if (util_get_offset(state
, state
->fill_back
)) {
1144 polygon_offset_enable
|= R300_BACK_ENABLE
;
1147 rs
->polygon_offset_enable
= polygon_offset_enable
!= 0;
1152 r300_translate_polygon_mode_front(state
->fill_front
);
1154 r300_translate_polygon_mode_back(state
->fill_back
);
1157 if (state
->cull_face
& PIPE_FACE_FRONT
) {
1158 cull_mode
|= R300_CULL_FRONT
;
1160 if (state
->cull_face
& PIPE_FACE_BACK
) {
1161 cull_mode
|= R300_CULL_BACK
;
1164 if (state
->line_stipple_enable
) {
1165 line_stipple_config
=
1166 R300_GA_LINE_STIPPLE_CONFIG_LINE_RESET_LINE
|
1167 (fui((float)state
->line_stipple_factor
) &
1168 R300_GA_LINE_STIPPLE_CONFIG_STIPPLE_SCALE_MASK
);
1169 /* XXX this might need to be scaled up */
1170 line_stipple_value
= state
->line_stipple_pattern
;
1172 line_stipple_config
= 0;
1173 line_stipple_value
= 0;
1176 if (state
->flatshade
) {
1177 rs
->color_control
= R300_SHADE_MODEL_FLAT
;
1179 rs
->color_control
= R300_SHADE_MODEL_SMOOTH
;
1182 clip_rule
= state
->scissor
? 0xAAAA : 0xFFFF;
1184 /* Point sprites coord mode */
1185 if (rs
->rs
.sprite_coord_enable
) {
1186 switch (state
->sprite_coord_mode
) {
1187 case PIPE_SPRITE_COORD_UPPER_LEFT
:
1188 point_texcoord_top
= 0.0f
;
1189 point_texcoord_bottom
= 1.0f
;
1191 case PIPE_SPRITE_COORD_LOWER_LEFT
:
1192 point_texcoord_top
= 1.0f
;
1193 point_texcoord_bottom
= 0.0f
;
1198 if (r300_screen(pipe
->screen
)->caps
.has_tcl
) {
1199 vap_clip_cntl
= (state
->clip_plane_enable
& 63) |
1200 R300_PS_UCP_MODE_CLIP_AS_TRIFAN
;
1202 vap_clip_cntl
= R300_CLIP_DISABLE
;
1205 /* Vertex color clamping. FP20 means no clamping. */
1207 R300_GA_ROUND_MODE_GEOMETRY_ROUND_NEAREST
|
1208 (!vclamp
? (R300_GA_ROUND_MODE_RGB_CLAMP_FP20
|
1209 R300_GA_ROUND_MODE_ALPHA_CLAMP_FP20
) : 0);
1211 /* Build the main command buffer. */
1212 BEGIN_CB(rs
->cb_main
, RS_STATE_MAIN_SIZE
);
1213 OUT_CB_REG(R300_VAP_CNTL_STATUS
, vap_control_status
);
1214 OUT_CB_REG(R300_VAP_CLIP_CNTL
, vap_clip_cntl
);
1215 OUT_CB_REG(R300_GA_POINT_SIZE
, point_size
);
1216 OUT_CB_REG_SEQ(R300_GA_POINT_MINMAX
, 2);
1217 OUT_CB(point_minmax
);
1218 OUT_CB(line_control
);
1219 OUT_CB_REG_SEQ(R300_SU_POLY_OFFSET_ENABLE
, 2);
1220 OUT_CB(polygon_offset_enable
);
1221 rs
->cull_mode_index
= 11;
1223 OUT_CB_REG(R300_GA_LINE_STIPPLE_CONFIG
, line_stipple_config
);
1224 OUT_CB_REG(R300_GA_LINE_STIPPLE_VALUE
, line_stipple_value
);
1225 OUT_CB_REG(R300_GA_POLY_MODE
, polygon_mode
);
1226 OUT_CB_REG(R300_GA_ROUND_MODE
, round_mode
);
1227 OUT_CB_REG(R300_SC_CLIP_RULE
, clip_rule
);
1228 OUT_CB_REG_SEQ(R300_GA_POINT_S0
, 4);
1229 OUT_CB_32F(point_texcoord_left
);
1230 OUT_CB_32F(point_texcoord_bottom
);
1231 OUT_CB_32F(point_texcoord_right
);
1232 OUT_CB_32F(point_texcoord_top
);
1235 /* Build the two command buffers for polygon offset setup. */
1236 if (polygon_offset_enable
) {
1237 float scale
= state
->offset_scale
* 12;
1238 float offset
= state
->offset_units
* 4;
1240 BEGIN_CB(rs
->cb_poly_offset_zb16
, 5);
1241 OUT_CB_REG_SEQ(R300_SU_POLY_OFFSET_FRONT_SCALE
, 4);
1248 offset
= state
->offset_units
* 2;
1250 BEGIN_CB(rs
->cb_poly_offset_zb24
, 5);
1251 OUT_CB_REG_SEQ(R300_SU_POLY_OFFSET_FRONT_SCALE
, 4);
1262 /* Bind rasterizer state. */
1263 static void r300_bind_rs_state(struct pipe_context
* pipe
, void* state
)
1265 struct r300_context
* r300
= r300_context(pipe
);
1266 struct r300_rs_state
* rs
= (struct r300_rs_state
*)state
;
1267 int last_sprite_coord_enable
= r300
->sprite_coord_enable
;
1268 boolean last_two_sided_color
= r300
->two_sided_color
;
1270 if (r300
->draw
&& rs
) {
1271 draw_set_rasterizer_state(r300
->draw
, &rs
->rs_draw
, state
);
1275 r300
->polygon_offset_enabled
= rs
->polygon_offset_enable
;
1276 r300
->sprite_coord_enable
= rs
->rs
.sprite_coord_enable
;
1277 r300
->two_sided_color
= rs
->rs
.light_twoside
;
1279 r300
->polygon_offset_enabled
= FALSE
;
1280 r300
->sprite_coord_enable
= 0;
1281 r300
->two_sided_color
= FALSE
;
1284 UPDATE_STATE(state
, r300
->rs_state
);
1285 r300
->rs_state
.size
= RS_STATE_MAIN_SIZE
+ (r300
->polygon_offset_enabled
? 5 : 0);
1287 if (last_sprite_coord_enable
!= r300
->sprite_coord_enable
||
1288 last_two_sided_color
!= r300
->two_sided_color
) {
1289 r300_mark_atom_dirty(r300
, &r300
->rs_block_state
);
1293 /* Free rasterizer state. */
1294 static void r300_delete_rs_state(struct pipe_context
* pipe
, void* state
)
1300 r300_create_sampler_state(struct pipe_context
* pipe
,
1301 const struct pipe_sampler_state
* state
)
1303 struct r300_context
* r300
= r300_context(pipe
);
1304 struct r300_sampler_state
* sampler
= CALLOC_STRUCT(r300_sampler_state
);
1305 boolean is_r500
= r300
->screen
->caps
.is_r500
;
1308 sampler
->state
= *state
;
1310 /* r300 doesn't handle CLAMP and MIRROR_CLAMP correctly when either MAG
1311 * or MIN filter is NEAREST. Since texwrap produces same results
1312 * for CLAMP and CLAMP_TO_EDGE, we use them instead. */
1313 if (sampler
->state
.min_img_filter
== PIPE_TEX_FILTER_NEAREST
||
1314 sampler
->state
.mag_img_filter
== PIPE_TEX_FILTER_NEAREST
) {
1316 if (sampler
->state
.wrap_s
== PIPE_TEX_WRAP_CLAMP
)
1317 sampler
->state
.wrap_s
= PIPE_TEX_WRAP_CLAMP_TO_EDGE
;
1318 else if (sampler
->state
.wrap_s
== PIPE_TEX_WRAP_MIRROR_CLAMP
)
1319 sampler
->state
.wrap_s
= PIPE_TEX_WRAP_MIRROR_CLAMP_TO_EDGE
;
1322 if (sampler
->state
.wrap_t
== PIPE_TEX_WRAP_CLAMP
)
1323 sampler
->state
.wrap_t
= PIPE_TEX_WRAP_CLAMP_TO_EDGE
;
1324 else if (sampler
->state
.wrap_t
== PIPE_TEX_WRAP_MIRROR_CLAMP
)
1325 sampler
->state
.wrap_t
= PIPE_TEX_WRAP_MIRROR_CLAMP_TO_EDGE
;
1328 if (sampler
->state
.wrap_r
== PIPE_TEX_WRAP_CLAMP
)
1329 sampler
->state
.wrap_r
= PIPE_TEX_WRAP_CLAMP_TO_EDGE
;
1330 else if (sampler
->state
.wrap_r
== PIPE_TEX_WRAP_MIRROR_CLAMP
)
1331 sampler
->state
.wrap_r
= PIPE_TEX_WRAP_MIRROR_CLAMP_TO_EDGE
;
1335 (r300_translate_wrap(sampler
->state
.wrap_s
) << R300_TX_WRAP_S_SHIFT
) |
1336 (r300_translate_wrap(sampler
->state
.wrap_t
) << R300_TX_WRAP_T_SHIFT
) |
1337 (r300_translate_wrap(sampler
->state
.wrap_r
) << R300_TX_WRAP_R_SHIFT
);
1339 sampler
->filter0
|= r300_translate_tex_filters(state
->min_img_filter
,
1340 state
->mag_img_filter
,
1341 state
->min_mip_filter
,
1342 state
->max_anisotropy
> 1);
1344 sampler
->filter0
|= r300_anisotropy(state
->max_anisotropy
);
1346 /* Unfortunately, r300-r500 don't support floating-point mipmap lods. */
1347 /* We must pass these to the merge function to clamp them properly. */
1348 sampler
->min_lod
= (unsigned)MAX2(state
->min_lod
, 0);
1349 sampler
->max_lod
= (unsigned)MAX2(ceilf(state
->max_lod
), 0);
1351 lod_bias
= CLAMP((int)(state
->lod_bias
* 32 + 1), -(1 << 9), (1 << 9) - 1);
1353 sampler
->filter1
|= (lod_bias
<< R300_LOD_BIAS_SHIFT
) & R300_LOD_BIAS_MASK
;
1355 /* This is very high quality anisotropic filtering for R5xx.
1356 * It's good for benchmarking the performance of texturing but
1357 * in practice we don't want to slow down the driver because it's
1358 * a pretty good performance killer. Feel free to play with it. */
1359 if (DBG_ON(r300
, DBG_ANISOHQ
) && is_r500
) {
1360 sampler
->filter1
|= r500_anisotropy(state
->max_anisotropy
);
1363 /* R500-specific fixups and optimizations */
1364 if (r300
->screen
->caps
.is_r500
) {
1365 sampler
->filter1
|= R500_BORDER_FIX
;
1368 return (void*)sampler
;
1371 static void r300_bind_sampler_states(struct pipe_context
* pipe
,
1375 struct r300_context
* r300
= r300_context(pipe
);
1376 struct r300_textures_state
* state
=
1377 (struct r300_textures_state
*)r300
->textures_state
.state
;
1378 unsigned tex_units
= r300
->screen
->caps
.num_tex_units
;
1380 if (count
> tex_units
) {
1384 memcpy(state
->sampler_states
, states
, sizeof(void*) * count
);
1385 state
->sampler_state_count
= count
;
1387 r300_mark_atom_dirty(r300
, &r300
->textures_state
);
1390 static void r300_lacks_vertex_textures(struct pipe_context
* pipe
,
1396 static void r300_delete_sampler_state(struct pipe_context
* pipe
, void* state
)
1401 static uint32_t r300_assign_texture_cache_region(unsigned index
, unsigned num
)
1403 /* This looks like a hack, but I believe it's suppose to work like
1404 * that. To illustrate how this works, let's assume you have 5 textures.
1405 * From docs, 5 and the successive numbers are:
1413 * First 3 textures will get 3/4 of size of the cache, divived evenly
1414 * between them. The last 1/4 of the cache must be divided between
1415 * the last 2 textures, each will therefore get 1/8 of the cache.
1416 * Why not just to use "5 + texture_index" ?
1418 * This simple trick works for all "num" <= 16.
1421 return R300_TX_CACHE(R300_TX_CACHE_WHOLE
);
1423 return R300_TX_CACHE(num
+ index
);
1426 static void r300_set_fragment_sampler_views(struct pipe_context
* pipe
,
1428 struct pipe_sampler_view
** views
)
1430 struct r300_context
* r300
= r300_context(pipe
);
1431 struct r300_textures_state
* state
=
1432 (struct r300_textures_state
*)r300
->textures_state
.state
;
1433 struct r300_resource
*texture
;
1434 unsigned i
, real_num_views
= 0, view_index
= 0;
1435 unsigned tex_units
= r300
->screen
->caps
.num_tex_units
;
1436 boolean dirty_tex
= FALSE
;
1438 if (count
> tex_units
) {
1442 /* Calculate the real number of views. */
1443 for (i
= 0; i
< count
; i
++) {
1448 for (i
= 0; i
< count
; i
++) {
1449 pipe_sampler_view_reference(
1450 (struct pipe_sampler_view
**)&state
->sampler_views
[i
],
1457 /* A new sampler view (= texture)... */
1460 /* Set the texrect factor in the fragment shader.
1461 * Needed for RECT and NPOT fallback. */
1462 texture
= r300_resource(views
[i
]->texture
);
1463 if (texture
->tex
.is_npot
) {
1464 r300_mark_atom_dirty(r300
, &r300
->fs_rc_constant_state
);
1467 state
->sampler_views
[i
]->texcache_region
=
1468 r300_assign_texture_cache_region(view_index
, real_num_views
);
1472 for (i
= count
; i
< tex_units
; i
++) {
1473 if (state
->sampler_views
[i
]) {
1474 pipe_sampler_view_reference(
1475 (struct pipe_sampler_view
**)&state
->sampler_views
[i
],
1480 state
->sampler_view_count
= count
;
1482 r300_mark_atom_dirty(r300
, &r300
->textures_state
);
1485 r300_mark_atom_dirty(r300
, &r300
->texture_cache_inval
);
1489 struct pipe_sampler_view
*
1490 r300_create_sampler_view_custom(struct pipe_context
*pipe
,
1491 struct pipe_resource
*texture
,
1492 const struct pipe_sampler_view
*templ
,
1493 unsigned width0_override
,
1494 unsigned height0_override
)
1496 struct r300_sampler_view
*view
= CALLOC_STRUCT(r300_sampler_view
);
1497 struct r300_resource
*tex
= r300_resource(texture
);
1498 boolean is_r500
= r300_screen(pipe
->screen
)->caps
.is_r500
;
1499 boolean dxtc_swizzle
= r300_screen(pipe
->screen
)->caps
.dxtc_swizzle
;
1504 view
->base
= *templ
;
1505 view
->base
.reference
.count
= 1;
1506 view
->base
.context
= pipe
;
1507 view
->base
.texture
= NULL
;
1508 pipe_resource_reference(&view
->base
.texture
, texture
);
1510 view
->width0_override
= width0_override
;
1511 view
->height0_override
= height0_override
;
1512 view
->swizzle
[0] = templ
->swizzle_r
;
1513 view
->swizzle
[1] = templ
->swizzle_g
;
1514 view
->swizzle
[2] = templ
->swizzle_b
;
1515 view
->swizzle
[3] = templ
->swizzle_a
;
1517 hwformat
= r300_translate_texformat(templ
->format
,
1522 if (hwformat
== ~0) {
1523 fprintf(stderr
, "r300: Ooops. Got unsupported format %s in %s.\n",
1524 util_format_short_name(templ
->format
), __func__
);
1526 assert(hwformat
!= ~0);
1528 r300_texture_setup_format_state(r300_screen(pipe
->screen
), tex
,
1530 width0_override
, height0_override
,
1532 view
->format
.format1
|= hwformat
;
1534 view
->format
.format2
|= r500_tx_format_msb_bit(templ
->format
);
1538 return (struct pipe_sampler_view
*)view
;
1541 static struct pipe_sampler_view
*
1542 r300_create_sampler_view(struct pipe_context
*pipe
,
1543 struct pipe_resource
*texture
,
1544 const struct pipe_sampler_view
*templ
)
1546 return r300_create_sampler_view_custom(pipe
, texture
, templ
,
1547 r300_resource(texture
)->tex
.width0
,
1548 r300_resource(texture
)->tex
.height0
);
1553 r300_sampler_view_destroy(struct pipe_context
*pipe
,
1554 struct pipe_sampler_view
*view
)
1556 pipe_resource_reference(&view
->texture
, NULL
);
1560 static void r300_set_scissor_state(struct pipe_context
* pipe
,
1561 const struct pipe_scissor_state
* state
)
1563 struct r300_context
* r300
= r300_context(pipe
);
1565 memcpy(r300
->scissor_state
.state
, state
,
1566 sizeof(struct pipe_scissor_state
));
1568 r300_mark_atom_dirty(r300
, &r300
->scissor_state
);
1571 static void r300_set_viewport_state(struct pipe_context
* pipe
,
1572 const struct pipe_viewport_state
* state
)
1574 struct r300_context
* r300
= r300_context(pipe
);
1575 struct r300_viewport_state
* viewport
=
1576 (struct r300_viewport_state
*)r300
->viewport_state
.state
;
1578 r300
->viewport
= *state
;
1581 draw_set_viewport_state(r300
->draw
, state
);
1582 viewport
->vte_control
= R300_VTX_XY_FMT
| R300_VTX_Z_FMT
;
1586 /* Do the transform in HW. */
1587 viewport
->vte_control
= R300_VTX_W0_FMT
;
1589 if (state
->scale
[0] != 1.0f
) {
1590 viewport
->xscale
= state
->scale
[0];
1591 viewport
->vte_control
|= R300_VPORT_X_SCALE_ENA
;
1593 if (state
->scale
[1] != 1.0f
) {
1594 viewport
->yscale
= state
->scale
[1];
1595 viewport
->vte_control
|= R300_VPORT_Y_SCALE_ENA
;
1597 if (state
->scale
[2] != 1.0f
) {
1598 viewport
->zscale
= state
->scale
[2];
1599 viewport
->vte_control
|= R300_VPORT_Z_SCALE_ENA
;
1601 if (state
->translate
[0] != 0.0f
) {
1602 viewport
->xoffset
= state
->translate
[0];
1603 viewport
->vte_control
|= R300_VPORT_X_OFFSET_ENA
;
1605 if (state
->translate
[1] != 0.0f
) {
1606 viewport
->yoffset
= state
->translate
[1];
1607 viewport
->vte_control
|= R300_VPORT_Y_OFFSET_ENA
;
1609 if (state
->translate
[2] != 0.0f
) {
1610 viewport
->zoffset
= state
->translate
[2];
1611 viewport
->vte_control
|= R300_VPORT_Z_OFFSET_ENA
;
1614 r300_mark_atom_dirty(r300
, &r300
->viewport_state
);
1615 if (r300
->fs
.state
&& r300_fs(r300
)->shader
&&
1616 r300_fs(r300
)->shader
->inputs
.wpos
!= ATTR_UNUSED
) {
1617 r300_mark_atom_dirty(r300
, &r300
->fs_rc_constant_state
);
1621 static void r300_set_vertex_buffers_hwtcl(struct pipe_context
* pipe
,
1622 unsigned start_slot
, unsigned count
,
1623 const struct pipe_vertex_buffer
* buffers
)
1625 struct r300_context
* r300
= r300_context(pipe
);
1627 util_set_vertex_buffers_count(r300
->vertex_buffer
,
1628 &r300
->nr_vertex_buffers
,
1629 buffers
, start_slot
, count
);
1631 /* There must be at least one vertex buffer set, otherwise it locks up. */
1632 if (!r300
->nr_vertex_buffers
) {
1633 util_set_vertex_buffers_count(r300
->vertex_buffer
,
1634 &r300
->nr_vertex_buffers
,
1635 &r300
->dummy_vb
, 0, 1);
1638 r300
->vertex_arrays_dirty
= TRUE
;
1641 static void r300_set_vertex_buffers_swtcl(struct pipe_context
* pipe
,
1642 unsigned start_slot
, unsigned count
,
1643 const struct pipe_vertex_buffer
* buffers
)
1645 struct r300_context
* r300
= r300_context(pipe
);
1648 util_set_vertex_buffers_count(r300
->vertex_buffer
,
1649 &r300
->nr_vertex_buffers
,
1650 buffers
, start_slot
, count
);
1651 draw_set_vertex_buffers(r300
->draw
, start_slot
, count
, buffers
);
1653 for (i
= 0; i
< count
; i
++) {
1654 if (buffers
[i
].user_buffer
) {
1655 draw_set_mapped_vertex_buffer(r300
->draw
, start_slot
+ i
,
1656 buffers
[i
].user_buffer
);
1657 } else if (buffers
[i
].buffer
) {
1658 draw_set_mapped_vertex_buffer(r300
->draw
, start_slot
+ i
,
1659 r300_resource(buffers
[i
].buffer
)->malloced_buffer
);
1664 static void r300_set_index_buffer_hwtcl(struct pipe_context
* pipe
,
1665 const struct pipe_index_buffer
*ib
)
1667 struct r300_context
* r300
= r300_context(pipe
);
1670 pipe_resource_reference(&r300
->index_buffer
.buffer
, ib
->buffer
);
1671 memcpy(&r300
->index_buffer
, ib
, sizeof(*ib
));
1673 pipe_resource_reference(&r300
->index_buffer
.buffer
, NULL
);
1677 static void r300_set_index_buffer_swtcl(struct pipe_context
* pipe
,
1678 const struct pipe_index_buffer
*ib
)
1680 struct r300_context
* r300
= r300_context(pipe
);
1683 const void *buf
= NULL
;
1684 if (ib
->user_buffer
) {
1685 buf
= ib
->user_buffer
;
1686 } else if (ib
->buffer
) {
1687 buf
= r300_resource(ib
->buffer
)->malloced_buffer
;
1689 draw_set_indexes(r300
->draw
,
1690 (const ubyte
*) buf
+ ib
->offset
,
1695 /* Initialize the PSC tables. */
1696 static void r300_vertex_psc(struct r300_vertex_element_state
*velems
)
1698 struct r300_vertex_stream_state
*vstream
= &velems
->vertex_stream
;
1699 uint16_t type
, swizzle
;
1700 enum pipe_format format
;
1703 /* Vertex shaders have no semantics on their inputs,
1704 * so PSC should just route stuff based on the vertex elements,
1705 * and not on attrib information. */
1706 for (i
= 0; i
< velems
->count
; i
++) {
1707 format
= velems
->velem
[i
].src_format
;
1709 type
= r300_translate_vertex_data_type(format
);
1710 if (type
== R300_INVALID_FORMAT
) {
1711 fprintf(stderr
, "r300: Bad vertex format %s.\n",
1712 util_format_short_name(format
));
1717 type
|= i
<< R300_DST_VEC_LOC_SHIFT
;
1718 swizzle
= r300_translate_vertex_data_swizzle(format
);
1721 vstream
->vap_prog_stream_cntl
[i
>> 1] |= type
<< 16;
1722 vstream
->vap_prog_stream_cntl_ext
[i
>> 1] |= swizzle
<< 16;
1724 vstream
->vap_prog_stream_cntl
[i
>> 1] |= type
;
1725 vstream
->vap_prog_stream_cntl_ext
[i
>> 1] |= swizzle
;
1729 /* Set the last vector in the PSC. */
1733 vstream
->vap_prog_stream_cntl
[i
>> 1] |=
1734 (R300_LAST_VEC
<< (i
& 1 ? 16 : 0));
1736 vstream
->count
= (i
>> 1) + 1;
1739 static void* r300_create_vertex_elements_state(struct pipe_context
* pipe
,
1741 const struct pipe_vertex_element
* attribs
)
1743 struct r300_vertex_element_state
*velems
;
1745 struct pipe_vertex_element dummy_attrib
= {0};
1747 /* R300 Programmable Stream Control (PSC) doesn't support 0 vertex elements. */
1749 dummy_attrib
.src_format
= PIPE_FORMAT_R8G8B8A8_UNORM
;
1750 attribs
= &dummy_attrib
;
1752 } else if (count
> 16) {
1753 fprintf(stderr
, "r300: More than 16 vertex elements are not supported,"
1754 " requested %i, using 16.\n", count
);
1758 velems
= CALLOC_STRUCT(r300_vertex_element_state
);
1762 velems
->count
= count
;
1763 memcpy(velems
->velem
, attribs
, sizeof(struct pipe_vertex_element
) * count
);
1765 if (r300_screen(pipe
->screen
)->caps
.has_tcl
) {
1767 * The unused components will be replaced by (..., 0, 1). */
1768 r300_vertex_psc(velems
);
1770 for (i
= 0; i
< count
; i
++) {
1771 velems
->format_size
[i
] =
1772 align(util_format_get_blocksize(velems
->velem
[i
].src_format
), 4);
1773 velems
->vertex_size_dwords
+= velems
->format_size
[i
] / 4;
1780 static void r300_bind_vertex_elements_state(struct pipe_context
*pipe
,
1783 struct r300_context
*r300
= r300_context(pipe
);
1784 struct r300_vertex_element_state
*velems
= state
;
1786 if (velems
== NULL
) {
1790 r300
->velems
= velems
;
1793 draw_set_vertex_elements(r300
->draw
, velems
->count
, velems
->velem
);
1797 UPDATE_STATE(&velems
->vertex_stream
, r300
->vertex_stream_state
);
1798 r300
->vertex_stream_state
.size
= (1 + velems
->vertex_stream
.count
) * 2;
1799 r300
->vertex_arrays_dirty
= TRUE
;
1802 static void r300_delete_vertex_elements_state(struct pipe_context
*pipe
, void *state
)
1807 static void* r300_create_vs_state(struct pipe_context
* pipe
,
1808 const struct pipe_shader_state
* shader
)
1810 struct r300_context
* r300
= r300_context(pipe
);
1811 struct r300_vertex_shader
* vs
= CALLOC_STRUCT(r300_vertex_shader
);
1813 /* Copy state directly into shader. */
1814 vs
->state
= *shader
;
1815 vs
->state
.tokens
= tgsi_dup_tokens(shader
->tokens
);
1817 if (r300
->screen
->caps
.has_tcl
) {
1818 r300_init_vs_outputs(r300
, vs
);
1819 r300_translate_vertex_shader(r300
, vs
);
1821 r300_draw_init_vertex_shader(r300
, vs
);
1827 static void r300_bind_vs_state(struct pipe_context
* pipe
, void* shader
)
1829 struct r300_context
* r300
= r300_context(pipe
);
1830 struct r300_vertex_shader
* vs
= (struct r300_vertex_shader
*)shader
;
1833 r300
->vs_state
.state
= NULL
;
1836 if (vs
== r300
->vs_state
.state
) {
1839 r300
->vs_state
.state
= vs
;
1841 /* The majority of the RS block bits is dependent on the vertex shader. */
1842 r300_mark_atom_dirty(r300
, &r300
->rs_block_state
); /* Will be updated before the emission. */
1844 if (r300
->screen
->caps
.has_tcl
) {
1845 unsigned fc_op_dwords
= r300
->screen
->caps
.is_r500
? 3 : 2;
1846 r300_mark_atom_dirty(r300
, &r300
->vs_state
);
1847 r300
->vs_state
.size
= vs
->code
.length
+ 9 +
1848 (R300_VS_MAX_FC_OPS
* fc_op_dwords
+ 4);
1850 r300_mark_atom_dirty(r300
, &r300
->vs_constants
);
1851 r300
->vs_constants
.size
=
1853 (vs
->externals_count
? vs
->externals_count
* 4 + 3 : 0) +
1854 (vs
->immediates_count
? vs
->immediates_count
* 4 + 3 : 0);
1856 ((struct r300_constant_buffer
*)r300
->vs_constants
.state
)->remap_table
=
1857 vs
->code
.constants_remap_table
;
1859 r300_mark_atom_dirty(r300
, &r300
->pvs_flush
);
1861 draw_bind_vertex_shader(r300
->draw
,
1862 (struct draw_vertex_shader
*)vs
->draw_vs
);
1866 static void r300_delete_vs_state(struct pipe_context
* pipe
, void* shader
)
1868 struct r300_context
* r300
= r300_context(pipe
);
1869 struct r300_vertex_shader
* vs
= (struct r300_vertex_shader
*)shader
;
1871 if (r300
->screen
->caps
.has_tcl
) {
1872 rc_constants_destroy(&vs
->code
.constants
);
1873 FREE(vs
->code
.constants_remap_table
);
1875 draw_delete_vertex_shader(r300
->draw
,
1876 (struct draw_vertex_shader
*)vs
->draw_vs
);
1879 FREE((void*)vs
->state
.tokens
);
1883 static void r300_set_constant_buffer(struct pipe_context
*pipe
,
1884 uint shader
, uint index
,
1885 struct pipe_constant_buffer
*cb
)
1887 struct r300_context
* r300
= r300_context(pipe
);
1888 struct r300_constant_buffer
*cbuf
;
1895 case PIPE_SHADER_VERTEX
:
1896 cbuf
= (struct r300_constant_buffer
*)r300
->vs_constants
.state
;
1898 case PIPE_SHADER_FRAGMENT
:
1899 cbuf
= (struct r300_constant_buffer
*)r300
->fs_constants
.state
;
1906 if (cb
->user_buffer
)
1907 mapped
= (uint32_t*)cb
->user_buffer
;
1909 struct r300_resource
*rbuf
= r300_resource(cb
->buffer
);
1911 if (rbuf
&& rbuf
->malloced_buffer
)
1912 mapped
= (uint32_t*)rbuf
->malloced_buffer
;
1917 if (shader
== PIPE_SHADER_FRAGMENT
||
1918 (shader
== PIPE_SHADER_VERTEX
&& r300
->screen
->caps
.has_tcl
)) {
1922 if (shader
== PIPE_SHADER_VERTEX
) {
1923 if (r300
->screen
->caps
.has_tcl
) {
1924 struct r300_vertex_shader
*vs
=
1925 (struct r300_vertex_shader
*)r300
->vs_state
.state
;
1928 cbuf
->buffer_base
= 0;
1932 cbuf
->buffer_base
= r300
->vs_const_base
;
1933 r300
->vs_const_base
+= vs
->code
.constants
.Count
;
1934 if (r300
->vs_const_base
> R500_MAX_PVS_CONST_VECS
) {
1935 r300
->vs_const_base
= vs
->code
.constants
.Count
;
1936 cbuf
->buffer_base
= 0;
1937 r300_mark_atom_dirty(r300
, &r300
->pvs_flush
);
1939 r300_mark_atom_dirty(r300
, &r300
->vs_constants
);
1940 } else if (r300
->draw
) {
1941 draw_set_mapped_constant_buffer(r300
->draw
, PIPE_SHADER_VERTEX
,
1942 0, mapped
, cb
->buffer_size
);
1944 } else if (shader
== PIPE_SHADER_FRAGMENT
) {
1945 r300_mark_atom_dirty(r300
, &r300
->fs_constants
);
1949 static void r300_texture_barrier(struct pipe_context
*pipe
)
1951 struct r300_context
*r300
= r300_context(pipe
);
1953 r300_mark_atom_dirty(r300
, &r300
->gpu_flush
);
1954 r300_mark_atom_dirty(r300
, &r300
->texture_cache_inval
);
1957 void r300_init_state_functions(struct r300_context
* r300
)
1959 r300
->context
.create_blend_state
= r300_create_blend_state
;
1960 r300
->context
.bind_blend_state
= r300_bind_blend_state
;
1961 r300
->context
.delete_blend_state
= r300_delete_blend_state
;
1963 r300
->context
.set_blend_color
= r300_set_blend_color
;
1965 r300
->context
.set_clip_state
= r300_set_clip_state
;
1966 r300
->context
.set_sample_mask
= r300_set_sample_mask
;
1968 r300
->context
.set_constant_buffer
= r300_set_constant_buffer
;
1970 r300
->context
.create_depth_stencil_alpha_state
= r300_create_dsa_state
;
1971 r300
->context
.bind_depth_stencil_alpha_state
= r300_bind_dsa_state
;
1972 r300
->context
.delete_depth_stencil_alpha_state
= r300_delete_dsa_state
;
1974 r300
->context
.set_stencil_ref
= r300_set_stencil_ref
;
1976 r300
->context
.set_framebuffer_state
= r300_set_framebuffer_state
;
1978 r300
->context
.create_fs_state
= r300_create_fs_state
;
1979 r300
->context
.bind_fs_state
= r300_bind_fs_state
;
1980 r300
->context
.delete_fs_state
= r300_delete_fs_state
;
1982 r300
->context
.set_polygon_stipple
= r300_set_polygon_stipple
;
1984 r300
->context
.create_rasterizer_state
= r300_create_rs_state
;
1985 r300
->context
.bind_rasterizer_state
= r300_bind_rs_state
;
1986 r300
->context
.delete_rasterizer_state
= r300_delete_rs_state
;
1988 r300
->context
.create_sampler_state
= r300_create_sampler_state
;
1989 r300
->context
.bind_fragment_sampler_states
= r300_bind_sampler_states
;
1990 r300
->context
.bind_vertex_sampler_states
= r300_lacks_vertex_textures
;
1991 r300
->context
.delete_sampler_state
= r300_delete_sampler_state
;
1993 r300
->context
.set_fragment_sampler_views
= r300_set_fragment_sampler_views
;
1994 r300
->context
.create_sampler_view
= r300_create_sampler_view
;
1995 r300
->context
.sampler_view_destroy
= r300_sampler_view_destroy
;
1997 r300
->context
.set_scissor_state
= r300_set_scissor_state
;
1999 r300
->context
.set_viewport_state
= r300_set_viewport_state
;
2001 if (r300
->screen
->caps
.has_tcl
) {
2002 r300
->context
.set_vertex_buffers
= r300_set_vertex_buffers_hwtcl
;
2003 r300
->context
.set_index_buffer
= r300_set_index_buffer_hwtcl
;
2005 r300
->context
.set_vertex_buffers
= r300_set_vertex_buffers_swtcl
;
2006 r300
->context
.set_index_buffer
= r300_set_index_buffer_swtcl
;
2009 r300
->context
.create_vertex_elements_state
= r300_create_vertex_elements_state
;
2010 r300
->context
.bind_vertex_elements_state
= r300_bind_vertex_elements_state
;
2011 r300
->context
.delete_vertex_elements_state
= r300_delete_vertex_elements_state
;
2013 r300
->context
.create_vs_state
= r300_create_vs_state
;
2014 r300
->context
.bind_vs_state
= r300_bind_vs_state
;
2015 r300
->context
.delete_vs_state
= r300_delete_vs_state
;
2017 r300
->context
.texture_barrier
= r300_texture_barrier
;