r300g: fix reading from the destination buffer in blending
[mesa.git] / src / gallium / drivers / r300 / r300_state.c
1 /*
2 * Copyright 2008 Corbin Simpson <MostAwesomeDude@gmail.com>
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * on the rights to use, copy, modify, merge, publish, distribute, sub
8 * license, and/or sell copies of the Software, and to permit persons to whom
9 * the Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
19 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
20 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
21 * USE OR OTHER DEALINGS IN THE SOFTWARE. */
22
23 #include "draw/draw_context.h"
24
25 #include "util/u_math.h"
26 #include "util/u_memory.h"
27 #include "util/u_pack_color.h"
28
29 #include "tgsi/tgsi_parse.h"
30
31 #include "pipe/p_config.h"
32 #include "pipe/internal/p_winsys_screen.h"
33
34 #include "r300_context.h"
35 #include "r300_reg.h"
36 #include "r300_screen.h"
37 #include "r300_state_inlines.h"
38 #include "r300_fs.h"
39 #include "r300_vs.h"
40
41 /* r300_state: Functions used to intialize state context by translating
42 * Gallium state objects into semi-native r300 state objects. */
43
44 /* Create a new blend state based on the CSO blend state.
45 *
46 * This encompasses alpha blending, logic/raster ops, and blend dithering. */
47 static void* r300_create_blend_state(struct pipe_context* pipe,
48 const struct pipe_blend_state* state)
49 {
50 struct r300_blend_state* blend = CALLOC_STRUCT(r300_blend_state);
51
52 if (state->blend_enable)
53 {
54 unsigned eqRGB = state->rgb_func;
55 unsigned srcRGB = state->rgb_src_factor;
56 unsigned dstRGB = state->rgb_dst_factor;
57
58 unsigned eqA = state->alpha_func;
59 unsigned srcA = state->alpha_src_factor;
60 unsigned dstA = state->alpha_dst_factor;
61
62 /* despite the name, ALPHA_BLEND_ENABLE has nothing to do with alpha,
63 * this is just the crappy D3D naming */
64 blend->blend_control = R300_ALPHA_BLEND_ENABLE |
65 r300_translate_blend_function(eqRGB) |
66 ( r300_translate_blend_factor(srcRGB) << R300_SRC_BLEND_SHIFT) |
67 ( r300_translate_blend_factor(dstRGB) << R300_DST_BLEND_SHIFT);
68
69 /* optimization: some operations do not require the destination color */
70 if (eqRGB == PIPE_BLEND_MIN || eqA == PIPE_BLEND_MIN ||
71 eqRGB == PIPE_BLEND_MAX || eqA == PIPE_BLEND_MAX ||
72 dstRGB != PIPE_BLENDFACTOR_ZERO ||
73 dstA != PIPE_BLENDFACTOR_ZERO ||
74 srcRGB == PIPE_BLENDFACTOR_DST_COLOR ||
75 srcRGB == PIPE_BLENDFACTOR_DST_ALPHA ||
76 srcRGB == PIPE_BLENDFACTOR_INV_DST_COLOR ||
77 srcRGB == PIPE_BLENDFACTOR_INV_DST_ALPHA ||
78 srcA == PIPE_BLENDFACTOR_DST_COLOR ||
79 srcA == PIPE_BLENDFACTOR_DST_ALPHA ||
80 srcA == PIPE_BLENDFACTOR_INV_DST_COLOR ||
81 srcA == PIPE_BLENDFACTOR_INV_DST_ALPHA)
82 blend->blend_control |= R300_READ_ENABLE;
83
84 /* XXX implement the optimization with DISCARD_SRC_PIXELS*/
85 /* XXX implement the optimization with SRC_ALPHA_?_NO_READ */
86
87 /* separate alpha */
88 if (srcA != srcRGB || dstA != dstRGB || eqA != eqRGB) {
89 blend->blend_control |= R300_SEPARATE_ALPHA_ENABLE;
90 blend->alpha_blend_control =
91 r300_translate_blend_function(eqA) |
92 (r300_translate_blend_factor(srcA) << R300_SRC_BLEND_SHIFT) |
93 (r300_translate_blend_factor(dstA) << R300_DST_BLEND_SHIFT);
94 }
95 }
96
97 /* PIPE_LOGICOP_* don't need to be translated, fortunately. */
98 if (state->logicop_enable) {
99 blend->rop = R300_RB3D_ROPCNTL_ROP_ENABLE |
100 (state->logicop_func) << R300_RB3D_ROPCNTL_ROP_SHIFT;
101 }
102
103 if (state->dither) {
104 blend->dither = R300_RB3D_DITHER_CTL_DITHER_MODE_LUT |
105 R300_RB3D_DITHER_CTL_ALPHA_DITHER_MODE_LUT;
106 }
107
108 return (void*)blend;
109 }
110
111 /* Bind blend state. */
112 static void r300_bind_blend_state(struct pipe_context* pipe,
113 void* state)
114 {
115 struct r300_context* r300 = r300_context(pipe);
116
117 r300->blend_state = (struct r300_blend_state*)state;
118 r300->dirty_state |= R300_NEW_BLEND;
119 }
120
121 /* Free blend state. */
122 static void r300_delete_blend_state(struct pipe_context* pipe,
123 void* state)
124 {
125 FREE(state);
126 }
127
128 /* Convert float to 10bit integer */
129 static unsigned float_to_fixed10(float f)
130 {
131 return CLAMP((unsigned)(f * 1023.9f), 0, 1023);
132 }
133
134 /* Set blend color.
135 * Setup both R300 and R500 registers, figure out later which one to write. */
136 static void r300_set_blend_color(struct pipe_context* pipe,
137 const struct pipe_blend_color* color)
138 {
139 struct r300_context* r300 = r300_context(pipe);
140
141 util_pack_color(color->color, PIPE_FORMAT_A8R8G8B8_UNORM,
142 &r300->blend_color_state->blend_color);
143
144 /* XXX if FP16 blending is enabled, we should use the FP16 format */
145 r300->blend_color_state->blend_color_red_alpha =
146 float_to_fixed10(color->color[0]) |
147 (float_to_fixed10(color->color[3]) << 16);
148 r300->blend_color_state->blend_color_green_blue =
149 float_to_fixed10(color->color[2]) |
150 (float_to_fixed10(color->color[1]) << 16);
151
152 r300->dirty_state |= R300_NEW_BLEND_COLOR;
153 }
154
155 static void r300_set_clip_state(struct pipe_context* pipe,
156 const struct pipe_clip_state* state)
157 {
158 struct r300_context* r300 = r300_context(pipe);
159
160 if (r300_screen(pipe->screen)->caps->has_tcl) {
161 r300->clip_state = *state;
162 r300->dirty_state |= R300_NEW_CLIP;
163 } else {
164 draw_flush(r300->draw);
165 draw_set_clip_state(r300->draw, state);
166 }
167 }
168
169 static void
170 r300_set_constant_buffer(struct pipe_context* pipe,
171 uint shader, uint index,
172 const struct pipe_constant_buffer* buffer)
173 {
174 struct r300_context* r300 = r300_context(pipe);
175
176 /* This entire chunk of code seems ever-so-slightly baked.
177 * It's as if I've got pipe_buffer* matryoshkas... */
178 if (buffer && buffer->buffer && buffer->buffer->size) {
179 void* map = pipe->winsys->buffer_map(pipe->winsys, buffer->buffer,
180 PIPE_BUFFER_USAGE_CPU_READ);
181 memcpy(r300->shader_constants[shader].constants,
182 map, buffer->buffer->size);
183 pipe->winsys->buffer_unmap(pipe->winsys, buffer->buffer);
184
185 r300->shader_constants[shader].count =
186 buffer->buffer->size / (sizeof(float) * 4);
187 } else {
188 r300->shader_constants[shader].count = 0;
189 }
190
191 r300->dirty_state |= R300_NEW_CONSTANTS;
192 }
193
194 /* Create a new depth, stencil, and alpha state based on the CSO dsa state.
195 *
196 * This contains the depth buffer, stencil buffer, alpha test, and such.
197 * On the Radeon, depth and stencil buffer setup are intertwined, which is
198 * the reason for some of the strange-looking assignments across registers. */
199 static void*
200 r300_create_dsa_state(struct pipe_context* pipe,
201 const struct pipe_depth_stencil_alpha_state* state)
202 {
203 struct r300_capabilities *caps =
204 r300_screen(r300_context(pipe)->context.screen)->caps;
205 struct r300_dsa_state* dsa = CALLOC_STRUCT(r300_dsa_state);
206
207 /* Depth test setup. */
208 if (state->depth.enabled) {
209 dsa->z_buffer_control |= R300_Z_ENABLE;
210
211 if (state->depth.writemask) {
212 dsa->z_buffer_control |= R300_Z_WRITE_ENABLE;
213 }
214
215 dsa->z_stencil_control |=
216 (r300_translate_depth_stencil_function(state->depth.func) <<
217 R300_Z_FUNC_SHIFT);
218 }
219
220 /* Stencil buffer setup. */
221 if (state->stencil[0].enabled) {
222 dsa->z_buffer_control |= R300_STENCIL_ENABLE;
223 dsa->z_stencil_control |=
224 (r300_translate_depth_stencil_function(state->stencil[0].func) <<
225 R300_S_FRONT_FUNC_SHIFT) |
226 (r300_translate_stencil_op(state->stencil[0].fail_op) <<
227 R300_S_FRONT_SFAIL_OP_SHIFT) |
228 (r300_translate_stencil_op(state->stencil[0].zpass_op) <<
229 R300_S_FRONT_ZPASS_OP_SHIFT) |
230 (r300_translate_stencil_op(state->stencil[0].zfail_op) <<
231 R300_S_FRONT_ZFAIL_OP_SHIFT);
232
233 dsa->stencil_ref_mask = (state->stencil[0].ref_value) |
234 (state->stencil[0].valuemask << R300_STENCILMASK_SHIFT) |
235 (state->stencil[0].writemask << R300_STENCILWRITEMASK_SHIFT);
236
237 if (state->stencil[1].enabled) {
238 dsa->z_buffer_control |= R300_STENCIL_FRONT_BACK;
239 dsa->z_stencil_control |=
240 (r300_translate_depth_stencil_function(state->stencil[1].func) <<
241 R300_S_BACK_FUNC_SHIFT) |
242 (r300_translate_stencil_op(state->stencil[1].fail_op) <<
243 R300_S_BACK_SFAIL_OP_SHIFT) |
244 (r300_translate_stencil_op(state->stencil[1].zpass_op) <<
245 R300_S_BACK_ZPASS_OP_SHIFT) |
246 (r300_translate_stencil_op(state->stencil[1].zfail_op) <<
247 R300_S_BACK_ZFAIL_OP_SHIFT);
248
249 /* XXX it seems r3xx doesn't support STENCILREFMASK_BF */
250 if (caps->is_r500)
251 {
252 dsa->z_buffer_control |= R500_STENCIL_REFMASK_FRONT_BACK;
253 dsa->stencil_ref_bf = (state->stencil[1].ref_value) |
254 (state->stencil[1].valuemask <<
255 R300_STENCILMASK_SHIFT) |
256 (state->stencil[1].writemask <<
257 R300_STENCILWRITEMASK_SHIFT);
258 }
259 }
260 }
261
262 /* Alpha test setup. */
263 if (state->alpha.enabled) {
264 dsa->alpha_function =
265 r300_translate_alpha_function(state->alpha.func) |
266 R300_FG_ALPHA_FUNC_ENABLE;
267
268 /* XXX figure out why emitting 10bit alpha ref causes CS to dump */
269 /* always use 8bit alpha ref */
270 dsa->alpha_function |= float_to_ubyte(state->alpha.ref_value);
271
272 if (caps->is_r500)
273 dsa->alpha_function |= R500_FG_ALPHA_FUNC_8BIT;
274 }
275
276 return (void*)dsa;
277 }
278
279 /* Bind DSA state. */
280 static void r300_bind_dsa_state(struct pipe_context* pipe,
281 void* state)
282 {
283 struct r300_context* r300 = r300_context(pipe);
284
285 r300->dsa_state = (struct r300_dsa_state*)state;
286 r300->dirty_state |= R300_NEW_DSA;
287 }
288
289 /* Free DSA state. */
290 static void r300_delete_dsa_state(struct pipe_context* pipe,
291 void* state)
292 {
293 FREE(state);
294 }
295
296 static void r300_set_edgeflags(struct pipe_context* pipe,
297 const unsigned* bitfield)
298 {
299 /* XXX you know it's bad when i915 has this blank too */
300 /* XXX and even worse, I have no idea WTF the bitfield is */
301 }
302
303 static void
304 r300_set_framebuffer_state(struct pipe_context* pipe,
305 const struct pipe_framebuffer_state* state)
306 {
307 struct r300_context* r300 = r300_context(pipe);
308
309 draw_flush(r300->draw);
310
311 r300->framebuffer_state = *state;
312
313 r300->dirty_state |= R300_NEW_FRAMEBUFFERS;
314 }
315
316 /* Create fragment shader state. */
317 static void* r300_create_fs_state(struct pipe_context* pipe,
318 const struct pipe_shader_state* shader)
319 {
320 struct r300_fragment_shader* fs = NULL;
321
322 fs = (struct r300_fragment_shader*)CALLOC_STRUCT(r300_fragment_shader);
323
324 /* Copy state directly into shader. */
325 fs->state = *shader;
326 fs->state.tokens = tgsi_dup_tokens(shader->tokens);
327
328 tgsi_scan_shader(shader->tokens, &fs->info);
329
330 return (void*)fs;
331 }
332
333 /* Bind fragment shader state. */
334 static void r300_bind_fs_state(struct pipe_context* pipe, void* shader)
335 {
336 struct r300_context* r300 = r300_context(pipe);
337 struct r300_fragment_shader* fs = (struct r300_fragment_shader*)shader;
338
339 if (fs == NULL) {
340 r300->fs = NULL;
341 return;
342 } else if (!fs->translated) {
343 r300_translate_fragment_shader(r300, fs);
344 }
345
346 r300->fs = fs;
347
348 r300->dirty_state |= R300_NEW_FRAGMENT_SHADER;
349 }
350
351 /* Delete fragment shader state. */
352 static void r300_delete_fs_state(struct pipe_context* pipe, void* shader)
353 {
354 struct r300_fragment_shader* fs = (struct r300_fragment_shader*)shader;
355 rc_constants_destroy(&fs->code.constants);
356 FREE((void*)fs->state.tokens);
357 FREE(shader);
358 }
359
360 static void r300_set_polygon_stipple(struct pipe_context* pipe,
361 const struct pipe_poly_stipple* state)
362 {
363 /* XXX no idea how to set this up, but not terribly important */
364 }
365
366 /* Create a new rasterizer state based on the CSO rasterizer state.
367 *
368 * This is a very large chunk of state, and covers most of the graphics
369 * backend (GB), geometry assembly (GA), and setup unit (SU) blocks.
370 *
371 * In a not entirely unironic sidenote, this state has nearly nothing to do
372 * with the actual block on the Radeon called the rasterizer (RS). */
373 static void* r300_create_rs_state(struct pipe_context* pipe,
374 const struct pipe_rasterizer_state* state)
375 {
376 struct r300_rs_state* rs = CALLOC_STRUCT(r300_rs_state);
377
378 /* Copy rasterizer state for Draw. */
379 rs->rs = *state;
380
381 rs->enable_vte = !state->bypass_vs_clip_and_viewport;
382
383 #ifdef PIPE_ARCH_LITTLE_ENDIAN
384 rs->vap_control_status = R300_VC_NO_SWAP;
385 #else
386 rs->vap_control_status = R300_VC_32BIT_SWAP;
387 #endif
388
389 /* If bypassing TCL, or if no TCL engine is present, turn off the HW TCL.
390 * Else, enable HW TCL and force Draw's TCL off. */
391 if (state->bypass_vs_clip_and_viewport ||
392 !r300_screen(pipe->screen)->caps->has_tcl) {
393 rs->vap_control_status |= R300_VAP_TCL_BYPASS;
394 } else {
395 rs->rs.bypass_vs_clip_and_viewport = TRUE;
396 }
397
398 rs->point_size = pack_float_16_6x(state->point_size) |
399 (pack_float_16_6x(state->point_size) << R300_POINTSIZE_X_SHIFT);
400
401 rs->point_minmax =
402 ((int)(state->point_size_min * 6.0) <<
403 R300_GA_POINT_MINMAX_MIN_SHIFT) |
404 ((int)(state->point_size_max * 6.0) <<
405 R300_GA_POINT_MINMAX_MAX_SHIFT);
406
407 rs->line_control = pack_float_16_6x(state->line_width) |
408 R300_GA_LINE_CNTL_END_TYPE_COMP;
409
410 /* Radeons don't think in "CW/CCW", they think in "front/back". */
411 if (state->front_winding == PIPE_WINDING_CW) {
412 rs->cull_mode = R300_FRONT_FACE_CW;
413
414 if (state->offset_cw) {
415 rs->polygon_offset_enable |= R300_FRONT_ENABLE;
416 }
417 if (state->offset_ccw) {
418 rs->polygon_offset_enable |= R300_BACK_ENABLE;
419 }
420 } else {
421 rs->cull_mode = R300_FRONT_FACE_CCW;
422
423 if (state->offset_ccw) {
424 rs->polygon_offset_enable |= R300_FRONT_ENABLE;
425 }
426 if (state->offset_cw) {
427 rs->polygon_offset_enable |= R300_BACK_ENABLE;
428 }
429 }
430 if (state->front_winding & state->cull_mode) {
431 rs->cull_mode |= R300_CULL_FRONT;
432 }
433 if (~(state->front_winding) & state->cull_mode) {
434 rs->cull_mode |= R300_CULL_BACK;
435 }
436
437 if (rs->polygon_offset_enable) {
438 rs->depth_offset_front = rs->depth_offset_back =
439 fui(state->offset_units);
440 rs->depth_scale_front = rs->depth_scale_back =
441 fui(state->offset_scale);
442 }
443
444 if (state->line_stipple_enable) {
445 rs->line_stipple_config =
446 R300_GA_LINE_STIPPLE_CONFIG_LINE_RESET_LINE |
447 (fui((float)state->line_stipple_factor) &
448 R300_GA_LINE_STIPPLE_CONFIG_STIPPLE_SCALE_MASK);
449 /* XXX this might need to be scaled up */
450 rs->line_stipple_value = state->line_stipple_pattern;
451 }
452
453 if (state->flatshade) {
454 rs->color_control = R300_SHADE_MODEL_FLAT;
455 } else {
456 rs->color_control = R300_SHADE_MODEL_SMOOTH;
457 }
458
459 if (!state->flatshade_first) {
460 rs->color_control |= R300_GA_COLOR_CONTROL_PROVOKING_VERTEX_LAST;
461 }
462
463 return (void*)rs;
464 }
465
466 /* Bind rasterizer state. */
467 static void r300_bind_rs_state(struct pipe_context* pipe, void* state)
468 {
469 struct r300_context* r300 = r300_context(pipe);
470 struct r300_rs_state* rs = (struct r300_rs_state*)state;
471
472 draw_flush(r300->draw);
473 draw_set_rasterizer_state(r300->draw, &rs->rs);
474
475 r300->rs_state = rs;
476 r300->dirty_state |= R300_NEW_RASTERIZER;
477 r300->dirty_state |= R300_NEW_RS_BLOCK;
478 r300->dirty_state |= R300_NEW_SCISSOR;
479 r300->dirty_state |= R300_NEW_VIEWPORT;
480 }
481
482 /* Free rasterizer state. */
483 static void r300_delete_rs_state(struct pipe_context* pipe, void* state)
484 {
485 FREE(state);
486 }
487
488 static void*
489 r300_create_sampler_state(struct pipe_context* pipe,
490 const struct pipe_sampler_state* state)
491 {
492 struct r300_context* r300 = r300_context(pipe);
493 struct r300_sampler_state* sampler = CALLOC_STRUCT(r300_sampler_state);
494 int lod_bias;
495
496 sampler->filter0 |=
497 (r300_translate_wrap(state->wrap_s) << R300_TX_WRAP_S_SHIFT) |
498 (r300_translate_wrap(state->wrap_t) << R300_TX_WRAP_T_SHIFT) |
499 (r300_translate_wrap(state->wrap_r) << R300_TX_WRAP_R_SHIFT);
500
501 sampler->filter0 |= r300_translate_tex_filters(state->min_img_filter,
502 state->mag_img_filter,
503 state->min_mip_filter);
504
505 lod_bias = CLAMP((int)(state->lod_bias * 32), -(1 << 9), (1 << 9) - 1);
506
507 sampler->filter1 |= lod_bias << R300_LOD_BIAS_SHIFT;
508
509 sampler->filter1 |= r300_anisotropy(state->max_anisotropy);
510
511 util_pack_color(state->border_color, PIPE_FORMAT_A8R8G8B8_UNORM,
512 &sampler->border_color);
513
514 /* R500-specific fixups and optimizations */
515 if (r300_screen(r300->context.screen)->caps->is_r500) {
516 sampler->filter1 |= R500_BORDER_FIX;
517 }
518
519 return (void*)sampler;
520 }
521
522 static void r300_bind_sampler_states(struct pipe_context* pipe,
523 unsigned count,
524 void** states)
525 {
526 struct r300_context* r300 = r300_context(pipe);
527 int i;
528
529 if (count > 8) {
530 return;
531 }
532
533 for (i = 0; i < count; i++) {
534 if (r300->sampler_states[i] != states[i]) {
535 r300->sampler_states[i] = (struct r300_sampler_state*)states[i];
536 r300->dirty_state |= (R300_NEW_SAMPLER << i);
537 }
538 }
539
540 r300->sampler_count = count;
541 }
542
543 static void r300_delete_sampler_state(struct pipe_context* pipe, void* state)
544 {
545 FREE(state);
546 }
547
548 static void r300_set_sampler_textures(struct pipe_context* pipe,
549 unsigned count,
550 struct pipe_texture** texture)
551 {
552 struct r300_context* r300 = r300_context(pipe);
553 int i;
554
555 /* XXX magic num */
556 if (count > 8) {
557 return;
558 }
559
560 for (i = 0; i < count; i++) {
561 if (r300->textures[i] != (struct r300_texture*)texture[i]) {
562 pipe_texture_reference((struct pipe_texture**)&r300->textures[i],
563 texture[i]);
564 r300->dirty_state |= (R300_NEW_TEXTURE << i);
565 }
566 }
567
568 for (i = count; i < 8; i++) {
569 if (r300->textures[i]) {
570 pipe_texture_reference((struct pipe_texture**)&r300->textures[i],
571 NULL);
572 r300->dirty_state |= (R300_NEW_TEXTURE << i);
573 }
574 }
575
576 r300->texture_count = count;
577 }
578
579 static void r300_set_scissor_state(struct pipe_context* pipe,
580 const struct pipe_scissor_state* state)
581 {
582 struct r300_context* r300 = r300_context(pipe);
583
584 if (r300_screen(r300->context.screen)->caps->is_r500) {
585 r300->scissor_state->scissor_top_left =
586 (state->minx << R300_SCISSORS_X_SHIFT) |
587 (state->miny << R300_SCISSORS_Y_SHIFT);
588 r300->scissor_state->scissor_bottom_right =
589 ((state->maxx - 1) << R300_SCISSORS_X_SHIFT) |
590 ((state->maxy - 1) << R300_SCISSORS_Y_SHIFT);
591 } else {
592 /* Offset of 1440 in non-R500 chipsets. */
593 r300->scissor_state->scissor_top_left =
594 ((state->minx + 1440) << R300_SCISSORS_X_SHIFT) |
595 ((state->miny + 1440) << R300_SCISSORS_Y_SHIFT);
596 r300->scissor_state->scissor_bottom_right =
597 (((state->maxx - 1) + 1440) << R300_SCISSORS_X_SHIFT) |
598 (((state->maxy - 1) + 1440) << R300_SCISSORS_Y_SHIFT);
599 }
600
601 r300->dirty_state |= R300_NEW_SCISSOR;
602 }
603
604 static void r300_set_viewport_state(struct pipe_context* pipe,
605 const struct pipe_viewport_state* state)
606 {
607 struct r300_context* r300 = r300_context(pipe);
608
609 /* Do the transform in HW. */
610 r300->viewport_state->vte_control = R300_VTX_W0_FMT;
611
612 if (state->scale[0] != 1.0f) {
613 r300->viewport_state->xscale = state->scale[0];
614 r300->viewport_state->vte_control |= R300_VPORT_X_SCALE_ENA;
615 }
616 if (state->scale[1] != 1.0f) {
617 r300->viewport_state->yscale = state->scale[1];
618 r300->viewport_state->vte_control |= R300_VPORT_Y_SCALE_ENA;
619 }
620 if (state->scale[2] != 1.0f) {
621 r300->viewport_state->zscale = state->scale[2];
622 r300->viewport_state->vte_control |= R300_VPORT_Z_SCALE_ENA;
623 }
624 if (state->translate[0] != 0.0f) {
625 r300->viewport_state->xoffset = state->translate[0];
626 r300->viewport_state->vte_control |= R300_VPORT_X_OFFSET_ENA;
627 }
628 if (state->translate[1] != 0.0f) {
629 r300->viewport_state->yoffset = state->translate[1];
630 r300->viewport_state->vte_control |= R300_VPORT_Y_OFFSET_ENA;
631 }
632 if (state->translate[2] != 0.0f) {
633 r300->viewport_state->zoffset = state->translate[2];
634 r300->viewport_state->vte_control |= R300_VPORT_Z_OFFSET_ENA;
635 }
636
637 r300->dirty_state |= R300_NEW_VIEWPORT;
638 }
639
640 static void r300_set_vertex_buffers(struct pipe_context* pipe,
641 unsigned count,
642 const struct pipe_vertex_buffer* buffers)
643 {
644 struct r300_context* r300 = r300_context(pipe);
645
646 memcpy(r300->vertex_buffers, buffers,
647 sizeof(struct pipe_vertex_buffer) * count);
648
649 r300->vertex_buffer_count = count;
650
651 draw_flush(r300->draw);
652 draw_set_vertex_buffers(r300->draw, count, buffers);
653 }
654
655 static void r300_set_vertex_elements(struct pipe_context* pipe,
656 unsigned count,
657 const struct pipe_vertex_element* elements)
658 {
659 struct r300_context* r300 = r300_context(pipe);
660
661 draw_flush(r300->draw);
662 draw_set_vertex_elements(r300->draw, count, elements);
663 }
664
665 static void* r300_create_vs_state(struct pipe_context* pipe,
666 const struct pipe_shader_state* shader)
667 {
668 struct r300_context* r300 = r300_context(pipe);
669
670 if (r300_screen(pipe->screen)->caps->has_tcl) {
671 struct r300_vertex_shader* vs = CALLOC_STRUCT(r300_vertex_shader);
672 /* Copy state directly into shader. */
673 vs->state = *shader;
674 vs->state.tokens = tgsi_dup_tokens(shader->tokens);
675
676 tgsi_scan_shader(shader->tokens, &vs->info);
677
678 /* Appease Draw. */
679 vs->draw = draw_create_vertex_shader(r300->draw, shader);
680
681 return (void*)vs;
682 } else {
683 return draw_create_vertex_shader(r300->draw, shader);
684 }
685 }
686
687 static void r300_bind_vs_state(struct pipe_context* pipe, void* shader)
688 {
689 struct r300_context* r300 = r300_context(pipe);
690
691 draw_flush(r300->draw);
692
693 if (r300_screen(pipe->screen)->caps->has_tcl) {
694 struct r300_vertex_shader* vs = (struct r300_vertex_shader*)shader;
695
696 if (vs == NULL) {
697 r300->vs = NULL;
698 return;
699 } else if (!vs->translated) {
700 r300_translate_vertex_shader(r300, vs);
701 }
702
703 draw_bind_vertex_shader(r300->draw, vs->draw);
704 r300->vs = vs;
705 r300->dirty_state |= R300_NEW_VERTEX_SHADER;
706 } else {
707 draw_bind_vertex_shader(r300->draw,
708 (struct draw_vertex_shader*)shader);
709 }
710 }
711
712 static void r300_delete_vs_state(struct pipe_context* pipe, void* shader)
713 {
714 struct r300_context* r300 = r300_context(pipe);
715
716 if (r300_screen(pipe->screen)->caps->has_tcl) {
717 struct r300_vertex_shader* vs = (struct r300_vertex_shader*)shader;
718
719 rc_constants_destroy(&vs->code.constants);
720 draw_delete_vertex_shader(r300->draw, vs->draw);
721 FREE((void*)vs->state.tokens);
722 FREE(shader);
723 } else {
724 draw_delete_vertex_shader(r300->draw,
725 (struct draw_vertex_shader*)shader);
726 }
727 }
728
729 void r300_init_state_functions(struct r300_context* r300)
730 {
731 r300->context.create_blend_state = r300_create_blend_state;
732 r300->context.bind_blend_state = r300_bind_blend_state;
733 r300->context.delete_blend_state = r300_delete_blend_state;
734
735 r300->context.set_blend_color = r300_set_blend_color;
736
737 r300->context.set_clip_state = r300_set_clip_state;
738
739 r300->context.set_constant_buffer = r300_set_constant_buffer;
740
741 r300->context.create_depth_stencil_alpha_state = r300_create_dsa_state;
742 r300->context.bind_depth_stencil_alpha_state = r300_bind_dsa_state;
743 r300->context.delete_depth_stencil_alpha_state = r300_delete_dsa_state;
744
745 r300->context.set_edgeflags = r300_set_edgeflags;
746
747 r300->context.set_framebuffer_state = r300_set_framebuffer_state;
748
749 r300->context.create_fs_state = r300_create_fs_state;
750 r300->context.bind_fs_state = r300_bind_fs_state;
751 r300->context.delete_fs_state = r300_delete_fs_state;
752
753 r300->context.set_polygon_stipple = r300_set_polygon_stipple;
754
755 r300->context.create_rasterizer_state = r300_create_rs_state;
756 r300->context.bind_rasterizer_state = r300_bind_rs_state;
757 r300->context.delete_rasterizer_state = r300_delete_rs_state;
758
759 r300->context.create_sampler_state = r300_create_sampler_state;
760 r300->context.bind_sampler_states = r300_bind_sampler_states;
761 r300->context.delete_sampler_state = r300_delete_sampler_state;
762
763 r300->context.set_sampler_textures = r300_set_sampler_textures;
764
765 r300->context.set_scissor_state = r300_set_scissor_state;
766
767 r300->context.set_viewport_state = r300_set_viewport_state;
768
769 r300->context.set_vertex_buffers = r300_set_vertex_buffers;
770 r300->context.set_vertex_elements = r300_set_vertex_elements;
771
772 r300->context.create_vs_state = r300_create_vs_state;
773 r300->context.bind_vs_state = r300_bind_vs_state;
774 r300->context.delete_vs_state = r300_delete_vs_state;
775 }