Merge branch 'mesa_7_5_branch'
[mesa.git] / src / gallium / drivers / r300 / r300_state.c
1 /*
2 * Copyright 2008 Corbin Simpson <MostAwesomeDude@gmail.com>
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * on the rights to use, copy, modify, merge, publish, distribute, sub
8 * license, and/or sell copies of the Software, and to permit persons to whom
9 * the Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
19 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
20 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
21 * USE OR OTHER DEALINGS IN THE SOFTWARE. */
22
23 #include "util/u_math.h"
24 #include "util/u_pack_color.h"
25
26 #include "util/u_debug.h"
27 #include "pipe/internal/p_winsys_screen.h"
28
29 #include "r300_context.h"
30 #include "r300_reg.h"
31 #include "r300_state_inlines.h"
32 #include "r300_state_shader.h"
33
34 /* r300_state: Functions used to intialize state context by translating
35 * Gallium state objects into semi-native r300 state objects. */
36
37 /* Create a new blend state based on the CSO blend state.
38 *
39 * This encompasses alpha blending, logic/raster ops, and blend dithering. */
40 static void* r300_create_blend_state(struct pipe_context* pipe,
41 const struct pipe_blend_state* state)
42 {
43 struct r300_blend_state* blend = CALLOC_STRUCT(r300_blend_state);
44
45 if (state->blend_enable) {
46 /* XXX for now, always do separate alpha...
47 * is it faster to do it with one reg? */
48 blend->blend_control = R300_ALPHA_BLEND_ENABLE |
49 R300_SEPARATE_ALPHA_ENABLE |
50 R300_READ_ENABLE |
51 r300_translate_blend_function(state->rgb_func) |
52 (r300_translate_blend_factor(state->rgb_src_factor) <<
53 R300_SRC_BLEND_SHIFT) |
54 (r300_translate_blend_factor(state->rgb_dst_factor) <<
55 R300_DST_BLEND_SHIFT);
56 blend->alpha_blend_control =
57 r300_translate_blend_function(state->alpha_func) |
58 (r300_translate_blend_factor(state->alpha_src_factor) <<
59 R300_SRC_BLEND_SHIFT) |
60 (r300_translate_blend_factor(state->alpha_dst_factor) <<
61 R300_DST_BLEND_SHIFT);
62 }
63
64 /* PIPE_LOGICOP_* don't need to be translated, fortunately. */
65 if (state->logicop_enable) {
66 blend->rop = R300_RB3D_ROPCNTL_ROP_ENABLE |
67 (state->logicop_func) << R300_RB3D_ROPCNTL_ROP_SHIFT;
68 }
69
70 if (state->dither) {
71 blend->dither = R300_RB3D_DITHER_CTL_DITHER_MODE_LUT |
72 R300_RB3D_DITHER_CTL_ALPHA_DITHER_MODE_LUT;
73 }
74
75 return (void*)blend;
76 }
77
78 /* Bind blend state. */
79 static void r300_bind_blend_state(struct pipe_context* pipe,
80 void* state)
81 {
82 struct r300_context* r300 = r300_context(pipe);
83
84 r300->blend_state = (struct r300_blend_state*)state;
85 r300->dirty_state |= R300_NEW_BLEND;
86 }
87
88 /* Free blend state. */
89 static void r300_delete_blend_state(struct pipe_context* pipe,
90 void* state)
91 {
92 FREE(state);
93 }
94
95 /* Set blend color.
96 * Setup both R300 and R500 registers, figure out later which one to write. */
97 static void r300_set_blend_color(struct pipe_context* pipe,
98 const struct pipe_blend_color* color)
99 {
100 struct r300_context* r300 = r300_context(pipe);
101 ubyte ur, ug, ub, ua;
102
103 ur = float_to_ubyte(color->color[0]);
104 ug = float_to_ubyte(color->color[1]);
105 ub = float_to_ubyte(color->color[2]);
106 ua = float_to_ubyte(color->color[3]);
107
108 util_pack_color(color->color, PIPE_FORMAT_A8R8G8B8_UNORM,
109 &r300->blend_color_state->blend_color);
110
111 /* XXX this is wrong */
112 r300->blend_color_state->blend_color_red_alpha = ur | (ua << 16);
113 r300->blend_color_state->blend_color_green_blue = ub | (ug << 16);
114
115 r300->dirty_state |= R300_NEW_BLEND_COLOR;
116 }
117
118 static void r300_set_clip_state(struct pipe_context* pipe,
119 const struct pipe_clip_state* state)
120 {
121 struct r300_context* r300 = r300_context(pipe);
122
123 if (r300_screen(pipe->screen)->caps->has_tcl) {
124 r300->clip_state = *state;
125 r300->dirty_state |= R300_NEW_CLIP;
126 } else {
127 draw_flush(r300->draw);
128 draw_set_clip_state(r300->draw, state);
129 }
130 }
131
132 static void
133 r300_set_constant_buffer(struct pipe_context* pipe,
134 uint shader, uint index,
135 const struct pipe_constant_buffer* buffer)
136 {
137 struct r300_context* r300 = r300_context(pipe);
138 int i = r300->shader_constants[shader].user_count;
139
140 /* This entire chunk of code seems ever-so-slightly baked.
141 * It's as if I've got pipe_buffer* matryoshkas... */
142 if (buffer && buffer->buffer && buffer->buffer->size) {
143 void* map = pipe->winsys->buffer_map(pipe->winsys, buffer->buffer,
144 PIPE_BUFFER_USAGE_CPU_READ);
145 memcpy(r300->shader_constants[shader].constants,
146 map, buffer->buffer->size);
147 pipe->winsys->buffer_unmap(pipe->winsys, buffer->buffer);
148
149 r300->shader_constants[shader].user_count =
150 buffer->buffer->size / (sizeof(float) * 4);
151 } else {
152 r300->shader_constants[shader].user_count = 0;
153 }
154
155 r300->dirty_state |= R300_NEW_CONSTANTS;
156
157 /* If the number of constants have changed, invalidate the shader. */
158 if (r300->shader_constants[shader].user_count != i) {
159 if (shader == PIPE_SHADER_FRAGMENT && r300->fs &&
160 r300->fs->uses_imms) {
161 r300->fs->translated = FALSE;
162 r300_translate_fragment_shader(r300, r300->fs);
163 } else if (shader == PIPE_SHADER_VERTEX && r300->vs &&
164 r300->vs->uses_imms) {
165 r300->vs->translated = FALSE;
166 r300_translate_vertex_shader(r300, r300->vs);
167 }
168 }
169 }
170
171 /* Create a new depth, stencil, and alpha state based on the CSO dsa state.
172 *
173 * This contains the depth buffer, stencil buffer, alpha test, and such.
174 * On the Radeon, depth and stencil buffer setup are intertwined, which is
175 * the reason for some of the strange-looking assignments across registers. */
176 static void*
177 r300_create_dsa_state(struct pipe_context* pipe,
178 const struct pipe_depth_stencil_alpha_state* state)
179 {
180 struct r300_dsa_state* dsa = CALLOC_STRUCT(r300_dsa_state);
181
182 /* Depth test setup. */
183 if (state->depth.enabled) {
184 dsa->z_buffer_control |= R300_Z_ENABLE;
185
186 if (state->depth.writemask) {
187 dsa->z_buffer_control |= R300_Z_WRITE_ENABLE;
188 }
189
190 dsa->z_stencil_control |=
191 (r300_translate_depth_stencil_function(state->depth.func) <<
192 R300_Z_FUNC_SHIFT);
193 }
194
195 /* Stencil buffer setup. */
196 if (state->stencil[0].enabled) {
197 dsa->z_buffer_control |= R300_STENCIL_ENABLE;
198 dsa->z_stencil_control |=
199 (r300_translate_depth_stencil_function(state->stencil[0].func) <<
200 R300_S_FRONT_FUNC_SHIFT) |
201 (r300_translate_stencil_op(state->stencil[0].fail_op) <<
202 R300_S_FRONT_SFAIL_OP_SHIFT) |
203 (r300_translate_stencil_op(state->stencil[0].zpass_op) <<
204 R300_S_FRONT_ZPASS_OP_SHIFT) |
205 (r300_translate_stencil_op(state->stencil[0].zfail_op) <<
206 R300_S_FRONT_ZFAIL_OP_SHIFT);
207
208 dsa->stencil_ref_mask = (state->stencil[0].ref_value) |
209 (state->stencil[0].valuemask << R300_STENCILMASK_SHIFT) |
210 (state->stencil[0].writemask << R300_STENCILWRITEMASK_SHIFT);
211
212 if (state->stencil[1].enabled) {
213 dsa->z_buffer_control |= R300_STENCIL_FRONT_BACK;
214 dsa->z_stencil_control |=
215 (r300_translate_depth_stencil_function(state->stencil[1].func) <<
216 R300_S_BACK_FUNC_SHIFT) |
217 (r300_translate_stencil_op(state->stencil[1].fail_op) <<
218 R300_S_BACK_SFAIL_OP_SHIFT) |
219 (r300_translate_stencil_op(state->stencil[1].zpass_op) <<
220 R300_S_BACK_ZPASS_OP_SHIFT) |
221 (r300_translate_stencil_op(state->stencil[1].zfail_op) <<
222 R300_S_BACK_ZFAIL_OP_SHIFT);
223
224 dsa->stencil_ref_bf = (state->stencil[1].ref_value) |
225 (state->stencil[1].valuemask << R300_STENCILMASK_SHIFT) |
226 (state->stencil[1].writemask << R300_STENCILWRITEMASK_SHIFT);
227 }
228 }
229
230 /* Alpha test setup. */
231 if (state->alpha.enabled) {
232 dsa->alpha_function =
233 r300_translate_alpha_function(state->alpha.func) |
234 R300_FG_ALPHA_FUNC_ENABLE;
235 dsa->alpha_reference = CLAMP(state->alpha.ref_value * 1023.0f,
236 0, 1023);
237 } else {
238 dsa->z_buffer_top = R300_ZTOP_ENABLE;
239 }
240
241 return (void*)dsa;
242 }
243
244 /* Bind DSA state. */
245 static void r300_bind_dsa_state(struct pipe_context* pipe,
246 void* state)
247 {
248 struct r300_context* r300 = r300_context(pipe);
249
250 r300->dsa_state = (struct r300_dsa_state*)state;
251 r300->dirty_state |= R300_NEW_DSA;
252 }
253
254 /* Free DSA state. */
255 static void r300_delete_dsa_state(struct pipe_context* pipe,
256 void* state)
257 {
258 FREE(state);
259 }
260
261 static void r300_set_edgeflags(struct pipe_context* pipe,
262 const unsigned* bitfield)
263 {
264 /* XXX you know it's bad when i915 has this blank too */
265 /* XXX and even worse, I have no idea WTF the bitfield is */
266 }
267
268 static void
269 r300_set_framebuffer_state(struct pipe_context* pipe,
270 const struct pipe_framebuffer_state* state)
271 {
272 struct r300_context* r300 = r300_context(pipe);
273
274 draw_flush(r300->draw);
275
276 r300->framebuffer_state = *state;
277
278 r300->dirty_state |= R300_NEW_FRAMEBUFFERS;
279 }
280
281 /* Create fragment shader state. */
282 static void* r300_create_fs_state(struct pipe_context* pipe,
283 const struct pipe_shader_state* shader)
284 {
285 struct r300_context* r300 = r300_context(pipe);
286 struct r3xx_fragment_shader* fs = NULL;
287
288 if (r300_screen(r300->context.screen)->caps->is_r500) {
289 fs =
290 (struct r3xx_fragment_shader*)CALLOC_STRUCT(r500_fragment_shader);
291 } else {
292 fs =
293 (struct r3xx_fragment_shader*)CALLOC_STRUCT(r300_fragment_shader);
294 }
295
296 /* Copy state directly into shader. */
297 fs->state = *shader;
298 fs->state.tokens = tgsi_dup_tokens(shader->tokens);
299
300 tgsi_scan_shader(shader->tokens, &fs->info);
301
302 return (void*)fs;
303 }
304
305 /* Bind fragment shader state. */
306 static void r300_bind_fs_state(struct pipe_context* pipe, void* shader)
307 {
308 struct r300_context* r300 = r300_context(pipe);
309 struct r3xx_fragment_shader* fs = (struct r3xx_fragment_shader*)shader;
310
311 if (fs == NULL) {
312 r300->fs = NULL;
313 return;
314 } else if (!fs->translated) {
315 r300_translate_fragment_shader(r300, fs);
316 }
317
318 fs->translated = TRUE;
319 r300->fs = fs;
320
321 r300->dirty_state |= R300_NEW_FRAGMENT_SHADER;
322 }
323
324 /* Delete fragment shader state. */
325 static void r300_delete_fs_state(struct pipe_context* pipe, void* shader)
326 {
327 struct r3xx_fragment_shader* fs = (struct r3xx_fragment_shader*)shader;
328 FREE(fs->state.tokens);
329 FREE(shader);
330 }
331
332 static void r300_set_polygon_stipple(struct pipe_context* pipe,
333 const struct pipe_poly_stipple* state)
334 {
335 /* XXX no idea how to set this up, but not terribly important */
336 }
337
338 /* Create a new rasterizer state based on the CSO rasterizer state.
339 *
340 * This is a very large chunk of state, and covers most of the graphics
341 * backend (GB), geometry assembly (GA), and setup unit (SU) blocks.
342 *
343 * In a not entirely unironic sidenote, this state has nearly nothing to do
344 * with the actual block on the Radeon called the rasterizer (RS). */
345 static void* r300_create_rs_state(struct pipe_context* pipe,
346 const struct pipe_rasterizer_state* state)
347 {
348 struct r300_rs_state* rs = CALLOC_STRUCT(r300_rs_state);
349
350 /* Copy rasterizer state for Draw. */
351 rs->rs = *state;
352
353 rs->enable_vte = !state->bypass_vs_clip_and_viewport;
354
355 /* If bypassing TCL, or if no TCL engine is present, turn off the HW TCL.
356 * Else, enable HW TCL and force Draw's TCL off. */
357 if (state->bypass_vs_clip_and_viewport ||
358 !r300_screen(pipe->screen)->caps->has_tcl) {
359 rs->vap_control_status = R300_VAP_TCL_BYPASS;
360 } else {
361 rs->rs.bypass_vs_clip_and_viewport = TRUE;
362 rs->vap_control_status = 0;
363 }
364
365 rs->point_size = pack_float_16_6x(state->point_size) |
366 (pack_float_16_6x(state->point_size) << R300_POINTSIZE_X_SHIFT);
367
368 rs->point_minmax =
369 ((int)(state->point_size_min * 6.0) <<
370 R300_GA_POINT_MINMAX_MIN_SHIFT) |
371 ((int)(state->point_size_max * 6.0) <<
372 R300_GA_POINT_MINMAX_MAX_SHIFT);
373
374 rs->line_control = pack_float_16_6x(state->line_width) |
375 R300_GA_LINE_CNTL_END_TYPE_COMP;
376
377 /* Radeons don't think in "CW/CCW", they think in "front/back". */
378 if (state->front_winding == PIPE_WINDING_CW) {
379 rs->cull_mode = R300_FRONT_FACE_CW;
380
381 if (state->offset_cw) {
382 rs->polygon_offset_enable |= R300_FRONT_ENABLE;
383 }
384 if (state->offset_ccw) {
385 rs->polygon_offset_enable |= R300_BACK_ENABLE;
386 }
387 } else {
388 rs->cull_mode = R300_FRONT_FACE_CCW;
389
390 if (state->offset_ccw) {
391 rs->polygon_offset_enable |= R300_FRONT_ENABLE;
392 }
393 if (state->offset_cw) {
394 rs->polygon_offset_enable |= R300_BACK_ENABLE;
395 }
396 }
397 if (state->front_winding & state->cull_mode) {
398 rs->cull_mode |= R300_CULL_FRONT;
399 }
400 if (~(state->front_winding) & state->cull_mode) {
401 rs->cull_mode |= R300_CULL_BACK;
402 }
403
404 if (rs->polygon_offset_enable) {
405 rs->depth_offset_front = rs->depth_offset_back =
406 fui(state->offset_units);
407 rs->depth_scale_front = rs->depth_scale_back =
408 fui(state->offset_scale);
409 }
410
411 if (state->line_stipple_enable) {
412 rs->line_stipple_config =
413 R300_GA_LINE_STIPPLE_CONFIG_LINE_RESET_LINE |
414 (fui((float)state->line_stipple_factor) &
415 R300_GA_LINE_STIPPLE_CONFIG_STIPPLE_SCALE_MASK);
416 /* XXX this might need to be scaled up */
417 rs->line_stipple_value = state->line_stipple_pattern;
418 }
419
420 if (state->flatshade) {
421 rs->color_control = R300_SHADE_MODEL_FLAT;
422 } else {
423 rs->color_control = R300_SHADE_MODEL_SMOOTH;
424 }
425
426 return (void*)rs;
427 }
428
429 /* Bind rasterizer state. */
430 static void r300_bind_rs_state(struct pipe_context* pipe, void* state)
431 {
432 struct r300_context* r300 = r300_context(pipe);
433 struct r300_rs_state* rs = (struct r300_rs_state*)state;
434
435 draw_flush(r300->draw);
436 draw_set_rasterizer_state(r300->draw, &rs->rs);
437
438 r300->rs_state = rs;
439 r300->dirty_state |= R300_NEW_RASTERIZER;
440 }
441
442 /* Free rasterizer state. */
443 static void r300_delete_rs_state(struct pipe_context* pipe, void* state)
444 {
445 FREE(state);
446 }
447
448 static void*
449 r300_create_sampler_state(struct pipe_context* pipe,
450 const struct pipe_sampler_state* state)
451 {
452 struct r300_context* r300 = r300_context(pipe);
453 struct r300_sampler_state* sampler = CALLOC_STRUCT(r300_sampler_state);
454 int lod_bias;
455
456 sampler->filter0 |=
457 (r300_translate_wrap(state->wrap_s) << R300_TX_WRAP_S_SHIFT) |
458 (r300_translate_wrap(state->wrap_t) << R300_TX_WRAP_T_SHIFT) |
459 (r300_translate_wrap(state->wrap_r) << R300_TX_WRAP_R_SHIFT);
460
461 sampler->filter0 |= r300_translate_tex_filters(state->min_img_filter,
462 state->mag_img_filter,
463 state->min_mip_filter);
464
465 lod_bias = CLAMP((int)(state->lod_bias * 32), -(1 << 9), (1 << 9) - 1);
466
467 sampler->filter1 |= lod_bias << R300_LOD_BIAS_SHIFT;
468
469 sampler->filter1 |= r300_anisotropy(state->max_anisotropy);
470
471 util_pack_color(state->border_color, PIPE_FORMAT_A8R8G8B8_UNORM,
472 &sampler->border_color);
473
474 /* R500-specific fixups and optimizations */
475 if (r300_screen(r300->context.screen)->caps->is_r500) {
476 sampler->filter1 |= R500_BORDER_FIX;
477 }
478
479 return (void*)sampler;
480 }
481
482 static void r300_bind_sampler_states(struct pipe_context* pipe,
483 unsigned count,
484 void** states)
485 {
486 struct r300_context* r300 = r300_context(pipe);
487 int i;
488
489 if (count > 8) {
490 return;
491 }
492
493 for (i = 0; i < count; i++) {
494 if (r300->sampler_states[i] != states[i]) {
495 r300->sampler_states[i] = (struct r300_sampler_state*)states[i];
496 r300->dirty_state |= (R300_NEW_SAMPLER << i);
497 }
498 }
499
500 r300->sampler_count = count;
501 }
502
503 static void r300_delete_sampler_state(struct pipe_context* pipe, void* state)
504 {
505 FREE(state);
506 }
507
508 static void r300_set_sampler_textures(struct pipe_context* pipe,
509 unsigned count,
510 struct pipe_texture** texture)
511 {
512 struct r300_context* r300 = r300_context(pipe);
513 int i;
514
515 /* XXX magic num */
516 if (count > 8) {
517 return;
518 }
519
520 for (i = 0; i < count; i++) {
521 if (r300->textures[i] != (struct r300_texture*)texture[i]) {
522 pipe_texture_reference((struct pipe_texture**)&r300->textures[i],
523 texture[i]);
524 r300->dirty_state |= (R300_NEW_TEXTURE << i);
525 }
526 }
527
528 for (i = count; i < 8; i++) {
529 if (r300->textures[i]) {
530 pipe_texture_reference((struct pipe_texture**)&r300->textures[i],
531 NULL);
532 r300->dirty_state |= (R300_NEW_TEXTURE << i);
533 }
534 }
535
536 r300->texture_count = count;
537 }
538
539 static void r300_set_scissor_state(struct pipe_context* pipe,
540 const struct pipe_scissor_state* state)
541 {
542 struct r300_context* r300 = r300_context(pipe);
543
544 if (r300_screen(r300->context.screen)->caps->is_r500) {
545 r300->scissor_state->scissor_top_left =
546 (state->minx << R300_SCISSORS_X_SHIFT) |
547 (state->miny << R300_SCISSORS_Y_SHIFT);
548 r300->scissor_state->scissor_bottom_right =
549 (state->maxx << R300_SCISSORS_X_SHIFT) |
550 (state->maxy << R300_SCISSORS_Y_SHIFT);
551 } else {
552 /* Offset of 1440 in non-R500 chipsets. */
553 r300->scissor_state->scissor_top_left =
554 ((state->minx + 1440) << R300_SCISSORS_X_SHIFT) |
555 ((state->miny + 1440) << R300_SCISSORS_Y_SHIFT);
556 r300->scissor_state->scissor_bottom_right =
557 ((state->maxx + 1440) << R300_SCISSORS_X_SHIFT) |
558 ((state->maxy + 1440) << R300_SCISSORS_Y_SHIFT);
559 }
560
561 r300->dirty_state |= R300_NEW_SCISSOR;
562 }
563
564 static void r300_set_viewport_state(struct pipe_context* pipe,
565 const struct pipe_viewport_state* state)
566 {
567 struct r300_context* r300 = r300_context(pipe);
568
569 /* Do the transform in HW. */
570 r300->viewport_state->vte_control = R300_VTX_W0_FMT;
571
572 if (state->scale[0] != 1.0f) {
573 assert(state->scale[0] != 0.0f);
574 r300->viewport_state->xscale = state->scale[0];
575 r300->viewport_state->vte_control |= R300_VPORT_X_SCALE_ENA;
576 }
577 if (state->scale[1] != 1.0f) {
578 assert(state->scale[1] != 0.0f);
579 r300->viewport_state->yscale = state->scale[1];
580 r300->viewport_state->vte_control |= R300_VPORT_Y_SCALE_ENA;
581 }
582 if (state->scale[2] != 1.0f) {
583 assert(state->scale[2] != 0.0f);
584 r300->viewport_state->zscale = state->scale[2];
585 r300->viewport_state->vte_control |= R300_VPORT_Z_SCALE_ENA;
586 }
587 if (state->translate[0] != 0.0f) {
588 r300->viewport_state->xoffset = state->translate[0];
589 r300->viewport_state->vte_control |= R300_VPORT_X_OFFSET_ENA;
590 }
591 if (state->translate[1] != 0.0f) {
592 r300->viewport_state->yoffset = state->translate[1];
593 r300->viewport_state->vte_control |= R300_VPORT_Y_OFFSET_ENA;
594 }
595 if (state->translate[2] != 0.0f) {
596 r300->viewport_state->zoffset = state->translate[2];
597 r300->viewport_state->vte_control |= R300_VPORT_Z_OFFSET_ENA;
598 }
599
600 r300->dirty_state |= R300_NEW_VIEWPORT;
601 }
602
603 static void r300_set_vertex_buffers(struct pipe_context* pipe,
604 unsigned count,
605 const struct pipe_vertex_buffer* buffers)
606 {
607 struct r300_context* r300 = r300_context(pipe);
608
609 memcpy(r300->vertex_buffers, buffers,
610 sizeof(struct pipe_vertex_buffer) * count);
611
612 r300->vertex_buffer_count = count;
613
614 draw_flush(r300->draw);
615 draw_set_vertex_buffers(r300->draw, count, buffers);
616 }
617
618 static void r300_set_vertex_elements(struct pipe_context* pipe,
619 unsigned count,
620 const struct pipe_vertex_element* elements)
621 {
622 struct r300_context* r300 = r300_context(pipe);
623
624 draw_flush(r300->draw);
625 draw_set_vertex_elements(r300->draw, count, elements);
626 }
627
628 static void* r300_create_vs_state(struct pipe_context* pipe,
629 const struct pipe_shader_state* shader)
630 {
631 struct r300_context* r300 = r300_context(pipe);
632
633 if (r300_screen(pipe->screen)->caps->has_tcl) {
634 struct r300_vertex_shader* vs = CALLOC_STRUCT(r300_vertex_shader);
635 /* Copy state directly into shader. */
636 vs->state = *shader;
637 vs->state.tokens = tgsi_dup_tokens(shader->tokens);
638
639 tgsi_scan_shader(shader->tokens, &vs->info);
640
641 /* Appease Draw. */
642 vs->draw = draw_create_vertex_shader(r300->draw, shader);
643
644 return (void*)vs;
645 } else {
646 return draw_create_vertex_shader(r300->draw, shader);
647 }
648 }
649
650 static void r300_bind_vs_state(struct pipe_context* pipe, void* shader)
651 {
652 struct r300_context* r300 = r300_context(pipe);
653
654 draw_flush(r300->draw);
655
656 if (r300_screen(pipe->screen)->caps->has_tcl) {
657 struct r300_vertex_shader* vs = (struct r300_vertex_shader*)shader;
658
659 if (vs == NULL) {
660 r300->vs = NULL;
661 return;
662 } else if (!vs->translated) {
663 r300_translate_vertex_shader(r300, vs);
664 }
665
666 draw_bind_vertex_shader(r300->draw, vs->draw);
667 r300->vs = vs;
668 r300->dirty_state |= R300_NEW_VERTEX_SHADER;
669 } else {
670 draw_bind_vertex_shader(r300->draw,
671 (struct draw_vertex_shader*)shader);
672 }
673 }
674
675 static void r300_delete_vs_state(struct pipe_context* pipe, void* shader)
676 {
677 struct r300_context* r300 = r300_context(pipe);
678
679 if (r300_screen(pipe->screen)->caps->has_tcl) {
680 struct r300_vertex_shader* vs = (struct r300_vertex_shader*)shader;
681
682 draw_delete_vertex_shader(r300->draw, vs->draw);
683 FREE(vs->state.tokens);
684 FREE(shader);
685 } else {
686 draw_delete_vertex_shader(r300->draw,
687 (struct draw_vertex_shader*)shader);
688 }
689 }
690
691 void r300_init_state_functions(struct r300_context* r300)
692 {
693 r300->context.create_blend_state = r300_create_blend_state;
694 r300->context.bind_blend_state = r300_bind_blend_state;
695 r300->context.delete_blend_state = r300_delete_blend_state;
696
697 r300->context.set_blend_color = r300_set_blend_color;
698
699 r300->context.set_clip_state = r300_set_clip_state;
700
701 r300->context.set_constant_buffer = r300_set_constant_buffer;
702
703 r300->context.create_depth_stencil_alpha_state = r300_create_dsa_state;
704 r300->context.bind_depth_stencil_alpha_state = r300_bind_dsa_state;
705 r300->context.delete_depth_stencil_alpha_state = r300_delete_dsa_state;
706
707 r300->context.set_edgeflags = r300_set_edgeflags;
708
709 r300->context.set_framebuffer_state = r300_set_framebuffer_state;
710
711 r300->context.create_fs_state = r300_create_fs_state;
712 r300->context.bind_fs_state = r300_bind_fs_state;
713 r300->context.delete_fs_state = r300_delete_fs_state;
714
715 r300->context.set_polygon_stipple = r300_set_polygon_stipple;
716
717 r300->context.create_rasterizer_state = r300_create_rs_state;
718 r300->context.bind_rasterizer_state = r300_bind_rs_state;
719 r300->context.delete_rasterizer_state = r300_delete_rs_state;
720
721 r300->context.create_sampler_state = r300_create_sampler_state;
722 r300->context.bind_sampler_states = r300_bind_sampler_states;
723 r300->context.delete_sampler_state = r300_delete_sampler_state;
724
725 r300->context.set_sampler_textures = r300_set_sampler_textures;
726
727 r300->context.set_scissor_state = r300_set_scissor_state;
728
729 r300->context.set_viewport_state = r300_set_viewport_state;
730
731 r300->context.set_vertex_buffers = r300_set_vertex_buffers;
732 r300->context.set_vertex_elements = r300_set_vertex_elements;
733
734 r300->context.create_vs_state = r300_create_vs_state;
735 r300->context.bind_vs_state = r300_bind_vs_state;
736 r300->context.delete_vs_state = r300_delete_vs_state;
737 }