r300g: make dithering work like fglrx.
[mesa.git] / src / gallium / drivers / r300 / r300_state.c
1 /*
2 * Copyright 2008 Corbin Simpson <MostAwesomeDude@gmail.com>
3 * Copyright 2009 Marek Olšák <maraeo@gmail.com>
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * on the rights to use, copy, modify, merge, publish, distribute, sub
9 * license, and/or sell copies of the Software, and to permit persons to whom
10 * the Software is furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
14 * Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
20 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
21 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
22 * USE OR OTHER DEALINGS IN THE SOFTWARE. */
23
24 #include "draw/draw_context.h"
25
26 #include "util/u_math.h"
27 #include "util/u_memory.h"
28 #include "util/u_pack_color.h"
29
30 #include "tgsi/tgsi_parse.h"
31
32 #include "pipe/p_config.h"
33
34 #include "r300_context.h"
35 #include "r300_reg.h"
36 #include "r300_screen.h"
37 #include "r300_screen_buffer.h"
38 #include "r300_state_inlines.h"
39 #include "r300_fs.h"
40 #include "r300_vs.h"
41 #include "r300_winsys.h"
42
43 /* r300_state: Functions used to intialize state context by translating
44 * Gallium state objects into semi-native r300 state objects. */
45
46 #define UPDATE_STATE(cso, atom) \
47 if (cso != atom.state) { \
48 atom.state = cso; \
49 atom.dirty = TRUE; \
50 }
51
52 static boolean blend_discard_if_src_alpha_0(unsigned srcRGB, unsigned srcA,
53 unsigned dstRGB, unsigned dstA)
54 {
55 /* If the blend equation is ADD or REVERSE_SUBTRACT,
56 * SRC_ALPHA == 0, and the following state is set, the colorbuffer
57 * will not be changed.
58 * Notice that the dst factors are the src factors inverted. */
59 return (srcRGB == PIPE_BLENDFACTOR_SRC_ALPHA ||
60 srcRGB == PIPE_BLENDFACTOR_SRC_ALPHA_SATURATE ||
61 srcRGB == PIPE_BLENDFACTOR_ZERO) &&
62 (srcA == PIPE_BLENDFACTOR_SRC_COLOR ||
63 srcA == PIPE_BLENDFACTOR_SRC_ALPHA ||
64 srcA == PIPE_BLENDFACTOR_SRC_ALPHA_SATURATE ||
65 srcA == PIPE_BLENDFACTOR_ZERO) &&
66 (dstRGB == PIPE_BLENDFACTOR_INV_SRC_ALPHA ||
67 dstRGB == PIPE_BLENDFACTOR_ONE) &&
68 (dstA == PIPE_BLENDFACTOR_INV_SRC_COLOR ||
69 dstA == PIPE_BLENDFACTOR_INV_SRC_ALPHA ||
70 dstA == PIPE_BLENDFACTOR_ONE);
71 }
72
73 static boolean blend_discard_if_src_alpha_1(unsigned srcRGB, unsigned srcA,
74 unsigned dstRGB, unsigned dstA)
75 {
76 /* If the blend equation is ADD or REVERSE_SUBTRACT,
77 * SRC_ALPHA == 1, and the following state is set, the colorbuffer
78 * will not be changed.
79 * Notice that the dst factors are the src factors inverted. */
80 return (srcRGB == PIPE_BLENDFACTOR_INV_SRC_ALPHA ||
81 srcRGB == PIPE_BLENDFACTOR_ZERO) &&
82 (srcA == PIPE_BLENDFACTOR_INV_SRC_COLOR ||
83 srcA == PIPE_BLENDFACTOR_INV_SRC_ALPHA ||
84 srcA == PIPE_BLENDFACTOR_ZERO) &&
85 (dstRGB == PIPE_BLENDFACTOR_SRC_ALPHA ||
86 dstRGB == PIPE_BLENDFACTOR_ONE) &&
87 (dstA == PIPE_BLENDFACTOR_SRC_COLOR ||
88 dstA == PIPE_BLENDFACTOR_SRC_ALPHA ||
89 dstA == PIPE_BLENDFACTOR_ONE);
90 }
91
92 static boolean blend_discard_if_src_color_0(unsigned srcRGB, unsigned srcA,
93 unsigned dstRGB, unsigned dstA)
94 {
95 /* If the blend equation is ADD or REVERSE_SUBTRACT,
96 * SRC_COLOR == (0,0,0), and the following state is set, the colorbuffer
97 * will not be changed.
98 * Notice that the dst factors are the src factors inverted. */
99 return (srcRGB == PIPE_BLENDFACTOR_SRC_COLOR ||
100 srcRGB == PIPE_BLENDFACTOR_ZERO) &&
101 (srcA == PIPE_BLENDFACTOR_ZERO) &&
102 (dstRGB == PIPE_BLENDFACTOR_INV_SRC_COLOR ||
103 dstRGB == PIPE_BLENDFACTOR_ONE) &&
104 (dstA == PIPE_BLENDFACTOR_ONE);
105 }
106
107 static boolean blend_discard_if_src_color_1(unsigned srcRGB, unsigned srcA,
108 unsigned dstRGB, unsigned dstA)
109 {
110 /* If the blend equation is ADD or REVERSE_SUBTRACT,
111 * SRC_COLOR == (1,1,1), and the following state is set, the colorbuffer
112 * will not be changed.
113 * Notice that the dst factors are the src factors inverted. */
114 return (srcRGB == PIPE_BLENDFACTOR_INV_SRC_COLOR ||
115 srcRGB == PIPE_BLENDFACTOR_ZERO) &&
116 (srcA == PIPE_BLENDFACTOR_ZERO) &&
117 (dstRGB == PIPE_BLENDFACTOR_SRC_COLOR ||
118 dstRGB == PIPE_BLENDFACTOR_ONE) &&
119 (dstA == PIPE_BLENDFACTOR_ONE);
120 }
121
122 static boolean blend_discard_if_src_alpha_color_0(unsigned srcRGB, unsigned srcA,
123 unsigned dstRGB, unsigned dstA)
124 {
125 /* If the blend equation is ADD or REVERSE_SUBTRACT,
126 * SRC_ALPHA_COLOR == (0,0,0,0), and the following state is set,
127 * the colorbuffer will not be changed.
128 * Notice that the dst factors are the src factors inverted. */
129 return (srcRGB == PIPE_BLENDFACTOR_SRC_COLOR ||
130 srcRGB == PIPE_BLENDFACTOR_SRC_ALPHA ||
131 srcRGB == PIPE_BLENDFACTOR_SRC_ALPHA_SATURATE ||
132 srcRGB == PIPE_BLENDFACTOR_ZERO) &&
133 (srcA == PIPE_BLENDFACTOR_SRC_COLOR ||
134 srcA == PIPE_BLENDFACTOR_SRC_ALPHA ||
135 srcA == PIPE_BLENDFACTOR_SRC_ALPHA_SATURATE ||
136 srcA == PIPE_BLENDFACTOR_ZERO) &&
137 (dstRGB == PIPE_BLENDFACTOR_INV_SRC_COLOR ||
138 dstRGB == PIPE_BLENDFACTOR_INV_SRC_ALPHA ||
139 dstRGB == PIPE_BLENDFACTOR_ONE) &&
140 (dstA == PIPE_BLENDFACTOR_INV_SRC_COLOR ||
141 dstA == PIPE_BLENDFACTOR_INV_SRC_ALPHA ||
142 dstA == PIPE_BLENDFACTOR_ONE);
143 }
144
145 static boolean blend_discard_if_src_alpha_color_1(unsigned srcRGB, unsigned srcA,
146 unsigned dstRGB, unsigned dstA)
147 {
148 /* If the blend equation is ADD or REVERSE_SUBTRACT,
149 * SRC_ALPHA_COLOR == (1,1,1,1), and the following state is set,
150 * the colorbuffer will not be changed.
151 * Notice that the dst factors are the src factors inverted. */
152 return (srcRGB == PIPE_BLENDFACTOR_INV_SRC_COLOR ||
153 srcRGB == PIPE_BLENDFACTOR_INV_SRC_ALPHA ||
154 srcRGB == PIPE_BLENDFACTOR_ZERO) &&
155 (srcA == PIPE_BLENDFACTOR_INV_SRC_COLOR ||
156 srcA == PIPE_BLENDFACTOR_INV_SRC_ALPHA ||
157 srcA == PIPE_BLENDFACTOR_ZERO) &&
158 (dstRGB == PIPE_BLENDFACTOR_SRC_COLOR ||
159 dstRGB == PIPE_BLENDFACTOR_SRC_ALPHA ||
160 dstRGB == PIPE_BLENDFACTOR_ONE) &&
161 (dstA == PIPE_BLENDFACTOR_SRC_COLOR ||
162 dstA == PIPE_BLENDFACTOR_SRC_ALPHA ||
163 dstA == PIPE_BLENDFACTOR_ONE);
164 }
165
166 static unsigned bgra_cmask(unsigned mask)
167 {
168 /* Gallium uses RGBA color ordering while R300 expects BGRA. */
169
170 return ((mask & PIPE_MASK_R) << 2) |
171 ((mask & PIPE_MASK_B) >> 2) |
172 (mask & (PIPE_MASK_G | PIPE_MASK_A));
173 }
174
175 /* Create a new blend state based on the CSO blend state.
176 *
177 * This encompasses alpha blending, logic/raster ops, and blend dithering. */
178 static void* r300_create_blend_state(struct pipe_context* pipe,
179 const struct pipe_blend_state* state)
180 {
181 struct r300_screen* r300screen = r300_screen(pipe->screen);
182 struct r300_blend_state* blend = CALLOC_STRUCT(r300_blend_state);
183
184 if (state->rt[0].blend_enable)
185 {
186 unsigned eqRGB = state->rt[0].rgb_func;
187 unsigned srcRGB = state->rt[0].rgb_src_factor;
188 unsigned dstRGB = state->rt[0].rgb_dst_factor;
189
190 unsigned eqA = state->rt[0].alpha_func;
191 unsigned srcA = state->rt[0].alpha_src_factor;
192 unsigned dstA = state->rt[0].alpha_dst_factor;
193
194 /* despite the name, ALPHA_BLEND_ENABLE has nothing to do with alpha,
195 * this is just the crappy D3D naming */
196 blend->blend_control = R300_ALPHA_BLEND_ENABLE |
197 r300_translate_blend_function(eqRGB) |
198 ( r300_translate_blend_factor(srcRGB) << R300_SRC_BLEND_SHIFT) |
199 ( r300_translate_blend_factor(dstRGB) << R300_DST_BLEND_SHIFT);
200
201 /* Optimization: some operations do not require the destination color.
202 *
203 * When SRC_ALPHA_SATURATE is used, colorbuffer reads must be enabled,
204 * otherwise blending gives incorrect results. It seems to be
205 * a hardware bug. */
206 if (eqRGB == PIPE_BLEND_MIN || eqA == PIPE_BLEND_MIN ||
207 eqRGB == PIPE_BLEND_MAX || eqA == PIPE_BLEND_MAX ||
208 dstRGB != PIPE_BLENDFACTOR_ZERO ||
209 dstA != PIPE_BLENDFACTOR_ZERO ||
210 srcRGB == PIPE_BLENDFACTOR_DST_COLOR ||
211 srcRGB == PIPE_BLENDFACTOR_DST_ALPHA ||
212 srcRGB == PIPE_BLENDFACTOR_INV_DST_COLOR ||
213 srcRGB == PIPE_BLENDFACTOR_INV_DST_ALPHA ||
214 srcA == PIPE_BLENDFACTOR_DST_COLOR ||
215 srcA == PIPE_BLENDFACTOR_DST_ALPHA ||
216 srcA == PIPE_BLENDFACTOR_INV_DST_COLOR ||
217 srcA == PIPE_BLENDFACTOR_INV_DST_ALPHA ||
218 srcRGB == PIPE_BLENDFACTOR_SRC_ALPHA_SATURATE) {
219 /* Enable reading from the colorbuffer. */
220 blend->blend_control |= R300_READ_ENABLE;
221
222 if (r300_screen(r300_context(pipe)->context.screen)->caps->is_r500) {
223 /* Optimization: Depending on incoming pixels, we can
224 * conditionally disable the reading in hardware... */
225 if (eqRGB != PIPE_BLEND_MIN && eqA != PIPE_BLEND_MIN &&
226 eqRGB != PIPE_BLEND_MAX && eqA != PIPE_BLEND_MAX) {
227 /* Disable reading if SRC_ALPHA == 0. */
228 if ((dstRGB == PIPE_BLENDFACTOR_SRC_ALPHA ||
229 dstRGB == PIPE_BLENDFACTOR_ZERO) &&
230 (dstA == PIPE_BLENDFACTOR_SRC_COLOR ||
231 dstA == PIPE_BLENDFACTOR_SRC_ALPHA ||
232 dstA == PIPE_BLENDFACTOR_ZERO)) {
233 blend->blend_control |= R500_SRC_ALPHA_0_NO_READ;
234 }
235
236 /* Disable reading if SRC_ALPHA == 1. */
237 if ((dstRGB == PIPE_BLENDFACTOR_INV_SRC_ALPHA ||
238 dstRGB == PIPE_BLENDFACTOR_ZERO) &&
239 (dstA == PIPE_BLENDFACTOR_INV_SRC_COLOR ||
240 dstA == PIPE_BLENDFACTOR_INV_SRC_ALPHA ||
241 dstA == PIPE_BLENDFACTOR_ZERO)) {
242 blend->blend_control |= R500_SRC_ALPHA_1_NO_READ;
243 }
244 }
245 }
246 }
247
248 /* Optimization: discard pixels which don't change the colorbuffer.
249 *
250 * The code below is non-trivial and some math is involved.
251 *
252 * Discarding pixels must be disabled when FP16 AA is enabled.
253 * This is a hardware bug. Also, this implementation wouldn't work
254 * with FP blending enabled and equation clamping disabled.
255 *
256 * Equations other than ADD are rarely used and therefore won't be
257 * optimized. */
258 if ((eqRGB == PIPE_BLEND_ADD || eqRGB == PIPE_BLEND_REVERSE_SUBTRACT) &&
259 (eqA == PIPE_BLEND_ADD || eqA == PIPE_BLEND_REVERSE_SUBTRACT)) {
260 /* ADD: X+Y
261 * REVERSE_SUBTRACT: Y-X
262 *
263 * The idea is:
264 * If X = src*srcFactor = 0 and Y = dst*dstFactor = 1,
265 * then CB will not be changed.
266 *
267 * Given the srcFactor and dstFactor variables, we can derive
268 * what src and dst should be equal to and discard appropriate
269 * pixels.
270 */
271 if (blend_discard_if_src_alpha_0(srcRGB, srcA, dstRGB, dstA)) {
272 blend->blend_control |= R300_DISCARD_SRC_PIXELS_SRC_ALPHA_0;
273 } else if (blend_discard_if_src_alpha_1(srcRGB, srcA,
274 dstRGB, dstA)) {
275 blend->blend_control |= R300_DISCARD_SRC_PIXELS_SRC_ALPHA_1;
276 } else if (blend_discard_if_src_color_0(srcRGB, srcA,
277 dstRGB, dstA)) {
278 blend->blend_control |= R300_DISCARD_SRC_PIXELS_SRC_COLOR_0;
279 } else if (blend_discard_if_src_color_1(srcRGB, srcA,
280 dstRGB, dstA)) {
281 blend->blend_control |= R300_DISCARD_SRC_PIXELS_SRC_COLOR_1;
282 } else if (blend_discard_if_src_alpha_color_0(srcRGB, srcA,
283 dstRGB, dstA)) {
284 blend->blend_control |=
285 R300_DISCARD_SRC_PIXELS_SRC_ALPHA_COLOR_0;
286 } else if (blend_discard_if_src_alpha_color_1(srcRGB, srcA,
287 dstRGB, dstA)) {
288 blend->blend_control |=
289 R300_DISCARD_SRC_PIXELS_SRC_ALPHA_COLOR_1;
290 }
291 }
292
293 /* separate alpha */
294 if (srcA != srcRGB || dstA != dstRGB || eqA != eqRGB) {
295 blend->blend_control |= R300_SEPARATE_ALPHA_ENABLE;
296 blend->alpha_blend_control =
297 r300_translate_blend_function(eqA) |
298 (r300_translate_blend_factor(srcA) << R300_SRC_BLEND_SHIFT) |
299 (r300_translate_blend_factor(dstA) << R300_DST_BLEND_SHIFT);
300 }
301 }
302
303 /* PIPE_LOGICOP_* don't need to be translated, fortunately. */
304 if (state->logicop_enable) {
305 blend->rop = R300_RB3D_ROPCNTL_ROP_ENABLE |
306 (state->logicop_func) << R300_RB3D_ROPCNTL_ROP_SHIFT;
307 }
308
309 /* Color channel masks for all MRTs. */
310 blend->color_channel_mask = bgra_cmask(state->rt[0].colormask);
311 if (r300screen->caps->is_r500 && state->independent_blend_enable) {
312 if (state->rt[1].blend_enable) {
313 blend->color_channel_mask |= bgra_cmask(state->rt[1].colormask) << 4;
314 }
315 if (state->rt[2].blend_enable) {
316 blend->color_channel_mask |= bgra_cmask(state->rt[2].colormask) << 8;
317 }
318 if (state->rt[3].blend_enable) {
319 blend->color_channel_mask |= bgra_cmask(state->rt[3].colormask) << 12;
320 }
321 }
322
323 if (state->dither) {
324 /* fglrx appears to never set this */
325 blend->dither = 0;
326 /* blend->dither = R300_RB3D_DITHER_CTL_DITHER_MODE_LUT |
327 R300_RB3D_DITHER_CTL_ALPHA_DITHER_MODE_LUT; */
328 }
329
330 return (void*)blend;
331 }
332
333 /* Bind blend state. */
334 static void r300_bind_blend_state(struct pipe_context* pipe,
335 void* state)
336 {
337 struct r300_context* r300 = r300_context(pipe);
338
339 UPDATE_STATE(state, r300->blend_state);
340 }
341
342 /* Free blend state. */
343 static void r300_delete_blend_state(struct pipe_context* pipe,
344 void* state)
345 {
346 FREE(state);
347 }
348
349 /* Convert float to 10bit integer */
350 static unsigned float_to_fixed10(float f)
351 {
352 return CLAMP((unsigned)(f * 1023.9f), 0, 1023);
353 }
354
355 /* Set blend color.
356 * Setup both R300 and R500 registers, figure out later which one to write. */
357 static void r300_set_blend_color(struct pipe_context* pipe,
358 const struct pipe_blend_color* color)
359 {
360 struct r300_context* r300 = r300_context(pipe);
361 struct r300_screen* r300screen = r300_screen(pipe->screen);
362 struct r300_blend_color_state* state =
363 (struct r300_blend_color_state*)r300->blend_color_state.state;
364 union util_color uc;
365
366 util_pack_color(color->color, PIPE_FORMAT_B8G8R8A8_UNORM, &uc);
367 state->blend_color = uc.ui;
368
369 /* XXX if FP16 blending is enabled, we should use the FP16 format */
370 state->blend_color_red_alpha =
371 float_to_fixed10(color->color[0]) |
372 (float_to_fixed10(color->color[3]) << 16);
373 state->blend_color_green_blue =
374 float_to_fixed10(color->color[2]) |
375 (float_to_fixed10(color->color[1]) << 16);
376
377 r300->blend_color_state.size = r300screen->caps->is_r500 ? 3 : 2;
378 r300->blend_color_state.dirty = TRUE;
379 }
380
381 static void r300_set_clip_state(struct pipe_context* pipe,
382 const struct pipe_clip_state* state)
383 {
384 struct r300_context* r300 = r300_context(pipe);
385
386 r300->clip = *state;
387
388 if (r300_screen(pipe->screen)->caps->has_tcl) {
389 memcpy(r300->clip_state.state, state, sizeof(struct pipe_clip_state));
390 r300->clip_state.size = 29;
391 } else {
392 draw_flush(r300->draw);
393 draw_set_clip_state(r300->draw, state);
394 r300->clip_state.size = 2;
395 }
396
397 r300->clip_state.dirty = TRUE;
398 }
399
400 /* Create a new depth, stencil, and alpha state based on the CSO dsa state.
401 *
402 * This contains the depth buffer, stencil buffer, alpha test, and such.
403 * On the Radeon, depth and stencil buffer setup are intertwined, which is
404 * the reason for some of the strange-looking assignments across registers. */
405 static void*
406 r300_create_dsa_state(struct pipe_context* pipe,
407 const struct pipe_depth_stencil_alpha_state* state)
408 {
409 struct r300_capabilities *caps =
410 r300_screen(r300_context(pipe)->context.screen)->caps;
411 struct r300_dsa_state* dsa = CALLOC_STRUCT(r300_dsa_state);
412
413 /* Depth test setup. */
414 if (state->depth.enabled) {
415 dsa->z_buffer_control |= R300_Z_ENABLE;
416
417 if (state->depth.writemask) {
418 dsa->z_buffer_control |= R300_Z_WRITE_ENABLE;
419 }
420
421 dsa->z_stencil_control |=
422 (r300_translate_depth_stencil_function(state->depth.func) <<
423 R300_Z_FUNC_SHIFT);
424 }
425
426 /* Stencil buffer setup. */
427 if (state->stencil[0].enabled) {
428 dsa->z_buffer_control |= R300_STENCIL_ENABLE;
429 dsa->z_stencil_control |=
430 (r300_translate_depth_stencil_function(state->stencil[0].func) <<
431 R300_S_FRONT_FUNC_SHIFT) |
432 (r300_translate_stencil_op(state->stencil[0].fail_op) <<
433 R300_S_FRONT_SFAIL_OP_SHIFT) |
434 (r300_translate_stencil_op(state->stencil[0].zpass_op) <<
435 R300_S_FRONT_ZPASS_OP_SHIFT) |
436 (r300_translate_stencil_op(state->stencil[0].zfail_op) <<
437 R300_S_FRONT_ZFAIL_OP_SHIFT);
438
439 dsa->stencil_ref_mask =
440 (state->stencil[0].valuemask << R300_STENCILMASK_SHIFT) |
441 (state->stencil[0].writemask << R300_STENCILWRITEMASK_SHIFT);
442
443 if (state->stencil[1].enabled) {
444 dsa->z_buffer_control |= R300_STENCIL_FRONT_BACK;
445 dsa->z_stencil_control |=
446 (r300_translate_depth_stencil_function(state->stencil[1].func) <<
447 R300_S_BACK_FUNC_SHIFT) |
448 (r300_translate_stencil_op(state->stencil[1].fail_op) <<
449 R300_S_BACK_SFAIL_OP_SHIFT) |
450 (r300_translate_stencil_op(state->stencil[1].zpass_op) <<
451 R300_S_BACK_ZPASS_OP_SHIFT) |
452 (r300_translate_stencil_op(state->stencil[1].zfail_op) <<
453 R300_S_BACK_ZFAIL_OP_SHIFT);
454
455 if (caps->is_r500)
456 {
457 dsa->z_buffer_control |= R500_STENCIL_REFMASK_FRONT_BACK;
458 dsa->stencil_ref_bf =
459 (state->stencil[1].valuemask <<
460 R300_STENCILMASK_SHIFT) |
461 (state->stencil[1].writemask <<
462 R300_STENCILWRITEMASK_SHIFT);
463 }
464 }
465 }
466
467 /* Alpha test setup. */
468 if (state->alpha.enabled) {
469 dsa->alpha_function =
470 r300_translate_alpha_function(state->alpha.func) |
471 R300_FG_ALPHA_FUNC_ENABLE;
472
473 /* We could use 10bit alpha ref but who needs that? */
474 dsa->alpha_function |= float_to_ubyte(state->alpha.ref_value);
475
476 if (caps->is_r500)
477 dsa->alpha_function |= R500_FG_ALPHA_FUNC_8BIT;
478 }
479
480 return (void*)dsa;
481 }
482
483 /* Bind DSA state. */
484 static void r300_bind_dsa_state(struct pipe_context* pipe,
485 void* state)
486 {
487 struct r300_context* r300 = r300_context(pipe);
488
489 UPDATE_STATE(state, r300->dsa_state);
490 }
491
492 /* Free DSA state. */
493 static void r300_delete_dsa_state(struct pipe_context* pipe,
494 void* state)
495 {
496 FREE(state);
497 }
498
499 static void r300_set_stencil_ref(struct pipe_context* pipe,
500 const struct pipe_stencil_ref* sr)
501 {
502 struct r300_context* r300 = r300_context(pipe);
503 r300->stencil_ref = *sr;
504 r300->dsa_state.dirty = TRUE;
505 }
506
507 /* This switcheroo is needed just because of goddamned MACRO_SWITCH. */
508 static void r300_fb_update_tiling_flags(struct r300_context *r300,
509 const struct pipe_framebuffer_state *old_state,
510 const struct pipe_framebuffer_state *new_state)
511 {
512 struct r300_texture *tex;
513 unsigned i, j, level;
514
515 /* Reset tiling flags for old surfaces to default values. */
516 for (i = 0; i < old_state->nr_cbufs; i++) {
517 for (j = 0; j < new_state->nr_cbufs; j++) {
518 if (old_state->cbufs[i]->texture == new_state->cbufs[j]->texture) {
519 break;
520 }
521 }
522 /* If not binding the surface again... */
523 if (j != new_state->nr_cbufs) {
524 continue;
525 }
526
527 tex = (struct r300_texture*)old_state->cbufs[i]->texture;
528
529 if (tex) {
530 r300->rws->buffer_set_tiling(r300->rws, tex->buffer,
531 tex->pitch[0],
532 tex->microtile,
533 tex->macrotile);
534 }
535 }
536 if (old_state->zsbuf &&
537 (!new_state->zsbuf ||
538 old_state->zsbuf->texture != new_state->zsbuf->texture)) {
539 tex = (struct r300_texture*)old_state->zsbuf->texture;
540
541 if (tex) {
542 r300->rws->buffer_set_tiling(r300->rws, tex->buffer,
543 tex->pitch[0],
544 tex->microtile,
545 tex->macrotile);
546 }
547 }
548
549 /* Set tiling flags for new surfaces. */
550 for (i = 0; i < new_state->nr_cbufs; i++) {
551 tex = (struct r300_texture*)new_state->cbufs[i]->texture;
552 level = new_state->cbufs[i]->level;
553
554 r300->rws->buffer_set_tiling(r300->rws, tex->buffer,
555 tex->pitch[level],
556 tex->microtile,
557 tex->mip_macrotile[level]);
558 }
559 if (new_state->zsbuf) {
560 tex = (struct r300_texture*)new_state->zsbuf->texture;
561 level = new_state->zsbuf->level;
562
563 r300->rws->buffer_set_tiling(r300->rws, tex->buffer,
564 tex->pitch[level],
565 tex->microtile,
566 tex->mip_macrotile[level]);
567 }
568 }
569
570 static void
571 r300_set_framebuffer_state(struct pipe_context* pipe,
572 const struct pipe_framebuffer_state* state)
573 {
574 struct r300_context* r300 = r300_context(pipe);
575 struct r300_screen* r300screen = r300_screen(pipe->screen);
576 struct pipe_framebuffer_state *old_state = r300->fb_state.state;
577 unsigned max_width, max_height;
578 uint32_t zbuffer_bpp = 0;
579
580 if (state->nr_cbufs > 4) {
581 fprintf(stderr, "r300: Implementation error: Too many MRTs in %s, "
582 "refusing to bind framebuffer state!\n", __FUNCTION__);
583 return;
584 }
585
586 if (r300screen->caps->is_r500) {
587 max_width = max_height = 4096;
588 } else if (r300screen->caps->is_r400) {
589 max_width = max_height = 4021;
590 } else {
591 max_width = max_height = 2560;
592 }
593
594 if (state->width > max_width || state->height > max_height) {
595 fprintf(stderr, "r300: Implementation error: Render targets are too "
596 "big in %s, refusing to bind framebuffer state!\n", __FUNCTION__);
597 return;
598 }
599
600 if (r300->draw) {
601 draw_flush(r300->draw);
602 }
603
604 r300->fb_state.dirty = TRUE;
605
606 /* If nr_cbufs is changed from zero to non-zero or vice versa... */
607 if (!!old_state->nr_cbufs != !!state->nr_cbufs) {
608 r300->blend_state.dirty = TRUE;
609 }
610 /* If zsbuf is set from NULL to non-NULL or vice versa.. */
611 if (!!old_state->zsbuf != !!state->zsbuf) {
612 r300->dsa_state.dirty = TRUE;
613 }
614 if (!r300->scissor_enabled) {
615 r300->scissor_state.dirty = TRUE;
616 }
617
618 r300_fb_update_tiling_flags(r300, r300->fb_state.state, state);
619
620 memcpy(r300->fb_state.state, state, sizeof(struct pipe_framebuffer_state));
621
622 r300->fb_state.size = (10 * state->nr_cbufs) + (2 * (4 - state->nr_cbufs)) +
623 (state->zsbuf ? 10 : 0) + 8;
624
625 /* Polygon offset depends on the zbuffer bit depth. */
626 if (state->zsbuf && r300->polygon_offset_enabled) {
627 switch (util_format_get_blocksize(state->zsbuf->texture->format)) {
628 case 2:
629 zbuffer_bpp = 16;
630 break;
631 case 4:
632 zbuffer_bpp = 24;
633 break;
634 }
635
636 if (r300->zbuffer_bpp != zbuffer_bpp) {
637 r300->zbuffer_bpp = zbuffer_bpp;
638 r300->rs_state.dirty = TRUE;
639 }
640 }
641 }
642
643 /* Create fragment shader state. */
644 static void* r300_create_fs_state(struct pipe_context* pipe,
645 const struct pipe_shader_state* shader)
646 {
647 struct r300_fragment_shader* fs = NULL;
648
649 fs = (struct r300_fragment_shader*)CALLOC_STRUCT(r300_fragment_shader);
650
651 /* Copy state directly into shader. */
652 fs->state = *shader;
653 fs->state.tokens = tgsi_dup_tokens(shader->tokens);
654
655 tgsi_scan_shader(shader->tokens, &fs->info);
656 r300_shader_read_fs_inputs(&fs->info, &fs->inputs);
657
658 return (void*)fs;
659 }
660
661 /* Bind fragment shader state. */
662 static void r300_bind_fs_state(struct pipe_context* pipe, void* shader)
663 {
664 struct r300_context* r300 = r300_context(pipe);
665 struct r300_fragment_shader* fs = (struct r300_fragment_shader*)shader;
666
667 if (fs == NULL) {
668 r300->fs = NULL;
669 return;
670 }
671
672 r300->fs = fs;
673 r300_pick_fragment_shader(r300);
674
675 r300->rs_block_state.dirty = TRUE; /* Will be updated before the emission. */
676
677 if (r300->vs_state.state && r300_vertex_shader_setup_wpos(r300)) {
678 r300->vap_output_state.dirty = TRUE;
679 }
680
681 r300->dirty_state |= R300_NEW_FRAGMENT_SHADER | R300_NEW_FRAGMENT_SHADER_CONSTANTS;
682 }
683
684 /* Delete fragment shader state. */
685 static void r300_delete_fs_state(struct pipe_context* pipe, void* shader)
686 {
687 struct r300_fragment_shader* fs = (struct r300_fragment_shader*)shader;
688 struct r300_fragment_shader_code *tmp, *ptr = fs->first;
689
690 while (ptr) {
691 tmp = ptr;
692 ptr = ptr->next;
693 rc_constants_destroy(&tmp->code.constants);
694 FREE(tmp);
695 }
696 FREE((void*)fs->state.tokens);
697 FREE(shader);
698 }
699
700 static void r300_set_polygon_stipple(struct pipe_context* pipe,
701 const struct pipe_poly_stipple* state)
702 {
703 /* XXX no idea how to set this up, but not terribly important */
704 }
705
706 /* Create a new rasterizer state based on the CSO rasterizer state.
707 *
708 * This is a very large chunk of state, and covers most of the graphics
709 * backend (GB), geometry assembly (GA), and setup unit (SU) blocks.
710 *
711 * In a not entirely unironic sidenote, this state has nearly nothing to do
712 * with the actual block on the Radeon called the rasterizer (RS). */
713 static void* r300_create_rs_state(struct pipe_context* pipe,
714 const struct pipe_rasterizer_state* state)
715 {
716 struct r300_screen* r300screen = r300_screen(pipe->screen);
717 struct r300_rs_state* rs = CALLOC_STRUCT(r300_rs_state);
718
719 /* Copy rasterizer state for Draw. */
720 rs->rs = *state;
721
722 #ifdef PIPE_ARCH_LITTLE_ENDIAN
723 rs->vap_control_status = R300_VC_NO_SWAP;
724 #else
725 rs->vap_control_status = R300_VC_32BIT_SWAP;
726 #endif
727
728 /* If no TCL engine is present, turn off the HW TCL. */
729 if (!r300screen->caps->has_tcl) {
730 rs->vap_control_status |= R300_VAP_TCL_BYPASS;
731 }
732
733 rs->point_size = pack_float_16_6x(state->point_size) |
734 (pack_float_16_6x(state->point_size) << R300_POINTSIZE_X_SHIFT);
735
736 rs->line_control = pack_float_16_6x(state->line_width) |
737 R300_GA_LINE_CNTL_END_TYPE_COMP;
738
739 /* Enable polygon mode */
740 if (state->fill_cw != PIPE_POLYGON_MODE_FILL ||
741 state->fill_ccw != PIPE_POLYGON_MODE_FILL) {
742 rs->polygon_mode = R300_GA_POLY_MODE_DUAL;
743 }
744
745 /* Radeons don't think in "CW/CCW", they think in "front/back". */
746 if (state->front_winding == PIPE_WINDING_CW) {
747 rs->cull_mode = R300_FRONT_FACE_CW;
748
749 /* Polygon offset */
750 if (state->offset_cw) {
751 rs->polygon_offset_enable |= R300_FRONT_ENABLE;
752 }
753 if (state->offset_ccw) {
754 rs->polygon_offset_enable |= R300_BACK_ENABLE;
755 }
756
757 /* Polygon mode */
758 if (rs->polygon_mode) {
759 rs->polygon_mode |=
760 r300_translate_polygon_mode_front(state->fill_cw);
761 rs->polygon_mode |=
762 r300_translate_polygon_mode_back(state->fill_ccw);
763 }
764 } else {
765 rs->cull_mode = R300_FRONT_FACE_CCW;
766
767 /* Polygon offset */
768 if (state->offset_ccw) {
769 rs->polygon_offset_enable |= R300_FRONT_ENABLE;
770 }
771 if (state->offset_cw) {
772 rs->polygon_offset_enable |= R300_BACK_ENABLE;
773 }
774
775 /* Polygon mode */
776 if (rs->polygon_mode) {
777 rs->polygon_mode |=
778 r300_translate_polygon_mode_front(state->fill_ccw);
779 rs->polygon_mode |=
780 r300_translate_polygon_mode_back(state->fill_cw);
781 }
782 }
783 if (state->front_winding & state->cull_mode) {
784 rs->cull_mode |= R300_CULL_FRONT;
785 }
786 if (~(state->front_winding) & state->cull_mode) {
787 rs->cull_mode |= R300_CULL_BACK;
788 }
789
790 if (rs->polygon_offset_enable) {
791 rs->depth_offset = state->offset_units;
792 rs->depth_scale = state->offset_scale;
793 }
794
795 if (state->line_stipple_enable) {
796 rs->line_stipple_config =
797 R300_GA_LINE_STIPPLE_CONFIG_LINE_RESET_LINE |
798 (fui((float)state->line_stipple_factor) &
799 R300_GA_LINE_STIPPLE_CONFIG_STIPPLE_SCALE_MASK);
800 /* XXX this might need to be scaled up */
801 rs->line_stipple_value = state->line_stipple_pattern;
802 }
803
804 if (state->flatshade) {
805 rs->color_control = R300_SHADE_MODEL_FLAT;
806 } else {
807 rs->color_control = R300_SHADE_MODEL_SMOOTH;
808 }
809
810 return (void*)rs;
811 }
812
813 /* Bind rasterizer state. */
814 static void r300_bind_rs_state(struct pipe_context* pipe, void* state)
815 {
816 struct r300_context* r300 = r300_context(pipe);
817 struct r300_rs_state* rs = (struct r300_rs_state*)state;
818 boolean scissor_was_enabled = r300->scissor_enabled;
819
820 if (r300->draw) {
821 draw_flush(r300->draw);
822 draw_set_rasterizer_state(r300->draw, &rs->rs);
823 }
824
825 if (rs) {
826 r300->polygon_offset_enabled = rs->rs.offset_cw || rs->rs.offset_ccw;
827 r300->scissor_enabled = rs->rs.scissor;
828 } else {
829 r300->polygon_offset_enabled = FALSE;
830 r300->scissor_enabled = FALSE;
831 }
832
833 UPDATE_STATE(state, r300->rs_state);
834 r300->rs_state.size = 17 + (r300->polygon_offset_enabled ? 5 : 0);
835
836 if (scissor_was_enabled != r300->scissor_enabled) {
837 r300->scissor_state.dirty = TRUE;
838 }
839 }
840
841 /* Free rasterizer state. */
842 static void r300_delete_rs_state(struct pipe_context* pipe, void* state)
843 {
844 FREE(state);
845 }
846
847 static void*
848 r300_create_sampler_state(struct pipe_context* pipe,
849 const struct pipe_sampler_state* state)
850 {
851 struct r300_context* r300 = r300_context(pipe);
852 struct r300_sampler_state* sampler = CALLOC_STRUCT(r300_sampler_state);
853 boolean is_r500 = r300_screen(pipe->screen)->caps->is_r500;
854 int lod_bias;
855 union util_color uc;
856
857 sampler->state = *state;
858
859 sampler->filter0 |=
860 (r300_translate_wrap(state->wrap_s) << R300_TX_WRAP_S_SHIFT) |
861 (r300_translate_wrap(state->wrap_t) << R300_TX_WRAP_T_SHIFT) |
862 (r300_translate_wrap(state->wrap_r) << R300_TX_WRAP_R_SHIFT);
863
864 sampler->filter0 |= r300_translate_tex_filters(state->min_img_filter,
865 state->mag_img_filter,
866 state->min_mip_filter,
867 state->max_anisotropy > 0);
868
869 sampler->filter0 |= r300_anisotropy(state->max_anisotropy);
870
871 /* Unfortunately, r300-r500 don't support floating-point mipmap lods. */
872 /* We must pass these to the merge function to clamp them properly. */
873 sampler->min_lod = MAX2((unsigned)state->min_lod, 0);
874 sampler->max_lod = MAX2((unsigned)ceilf(state->max_lod), 0);
875
876 lod_bias = CLAMP((int)(state->lod_bias * 32), -(1 << 9), (1 << 9) - 1);
877
878 sampler->filter1 |= lod_bias << R300_LOD_BIAS_SHIFT;
879
880 /* This is very high quality anisotropic filtering for R5xx.
881 * It's good for benchmarking the performance of texturing but
882 * in practice we don't want to slow down the driver because it's
883 * a pretty good performance killer. Feel free to play with it. */
884 if (DBG_ON(r300, DBG_ANISOHQ) && is_r500) {
885 sampler->filter1 |= r500_anisotropy(state->max_anisotropy);
886 }
887
888 util_pack_color(state->border_color, PIPE_FORMAT_B8G8R8A8_UNORM, &uc);
889 sampler->border_color = uc.ui;
890
891 /* R500-specific fixups and optimizations */
892 if (r300_screen(r300->context.screen)->caps->is_r500) {
893 sampler->filter1 |= R500_BORDER_FIX;
894 }
895
896 return (void*)sampler;
897 }
898
899 static void r300_bind_sampler_states(struct pipe_context* pipe,
900 unsigned count,
901 void** states)
902 {
903 struct r300_context* r300 = r300_context(pipe);
904 struct r300_textures_state* state =
905 (struct r300_textures_state*)r300->textures_state.state;
906
907 if (count > 8) {
908 return;
909 }
910
911 memcpy(state->sampler_states, states, sizeof(void*) * count);
912 state->sampler_count = count;
913
914 r300->textures_state.dirty = TRUE;
915
916 /* Pick a fragment shader based on the texture compare state. */
917 if (r300->fs && count) {
918 if (r300_pick_fragment_shader(r300)) {
919 r300->dirty_state |= R300_NEW_FRAGMENT_SHADER |
920 R300_NEW_FRAGMENT_SHADER_CONSTANTS;
921 }
922 }
923 }
924
925 static void r300_lacks_vertex_textures(struct pipe_context* pipe,
926 unsigned count,
927 void** states)
928 {
929 }
930
931 static void r300_delete_sampler_state(struct pipe_context* pipe, void* state)
932 {
933 FREE(state);
934 }
935
936 static void r300_set_fragment_sampler_views(struct pipe_context* pipe,
937 unsigned count,
938 struct pipe_sampler_view** views)
939 {
940 struct r300_context* r300 = r300_context(pipe);
941 struct r300_textures_state* state =
942 (struct r300_textures_state*)r300->textures_state.state;
943 struct r300_texture *texture;
944 unsigned i;
945 boolean is_r500 = r300_screen(r300->context.screen)->caps->is_r500;
946 boolean dirty_tex = FALSE;
947
948 /* XXX magic num */
949 if (count > 8) {
950 return;
951 }
952
953 for (i = 0; i < count; i++) {
954 if (state->fragment_sampler_views[i] != views[i]) {
955 pipe_sampler_view_reference(&state->fragment_sampler_views[i],
956 views[i]);
957
958 if (!views[i]) {
959 continue;
960 }
961
962 /* A new sampler view (= texture)... */
963 dirty_tex = TRUE;
964
965 /* R300-specific - set the texrect factor in the fragment shader */
966 texture = (struct r300_texture *)views[i]->texture;
967 if (!is_r500 && texture->is_npot) {
968 /* XXX It would be nice to re-emit just 1 constant,
969 * XXX not all of them */
970 r300->dirty_state |= R300_NEW_FRAGMENT_SHADER_CONSTANTS;
971 }
972 }
973 }
974
975 for (i = count; i < 8; i++) {
976 if (state->fragment_sampler_views[i]) {
977 pipe_sampler_view_reference(&state->fragment_sampler_views[i],
978 NULL);
979 }
980 }
981
982 state->texture_count = count;
983
984 r300->textures_state.dirty = TRUE;
985
986 if (dirty_tex) {
987 r300->texture_cache_inval.dirty = TRUE;
988 }
989 }
990
991 static struct pipe_sampler_view *
992 r300_create_sampler_view(struct pipe_context *pipe,
993 struct pipe_texture *texture,
994 const struct pipe_sampler_view *templ)
995 {
996 struct pipe_sampler_view *view = CALLOC_STRUCT(pipe_sampler_view);
997
998 if (view) {
999 *view = *templ;
1000 view->reference.count = 1;
1001 view->texture = NULL;
1002 pipe_texture_reference(&view->texture, texture);
1003 view->context = pipe;
1004 }
1005
1006 return view;
1007 }
1008
1009 static void
1010 r300_sampler_view_destroy(struct pipe_context *pipe,
1011 struct pipe_sampler_view *view)
1012 {
1013 pipe_texture_reference(&view->texture, NULL);
1014 FREE(view);
1015 }
1016
1017 static void r300_set_scissor_state(struct pipe_context* pipe,
1018 const struct pipe_scissor_state* state)
1019 {
1020 struct r300_context* r300 = r300_context(pipe);
1021
1022 memcpy(r300->scissor_state.state, state,
1023 sizeof(struct pipe_scissor_state));
1024
1025 if (r300->scissor_enabled) {
1026 r300->scissor_state.dirty = TRUE;
1027 }
1028 }
1029
1030 static void r300_set_viewport_state(struct pipe_context* pipe,
1031 const struct pipe_viewport_state* state)
1032 {
1033 struct r300_context* r300 = r300_context(pipe);
1034 struct r300_viewport_state* viewport =
1035 (struct r300_viewport_state*)r300->viewport_state.state;
1036
1037 r300->viewport = *state;
1038
1039 /* Do the transform in HW. */
1040 viewport->vte_control = R300_VTX_W0_FMT;
1041
1042 if (state->scale[0] != 1.0f) {
1043 viewport->xscale = state->scale[0];
1044 viewport->vte_control |= R300_VPORT_X_SCALE_ENA;
1045 }
1046 if (state->scale[1] != 1.0f) {
1047 viewport->yscale = state->scale[1];
1048 viewport->vte_control |= R300_VPORT_Y_SCALE_ENA;
1049 }
1050 if (state->scale[2] != 1.0f) {
1051 viewport->zscale = state->scale[2];
1052 viewport->vte_control |= R300_VPORT_Z_SCALE_ENA;
1053 }
1054 if (state->translate[0] != 0.0f) {
1055 viewport->xoffset = state->translate[0];
1056 viewport->vte_control |= R300_VPORT_X_OFFSET_ENA;
1057 }
1058 if (state->translate[1] != 0.0f) {
1059 viewport->yoffset = state->translate[1];
1060 viewport->vte_control |= R300_VPORT_Y_OFFSET_ENA;
1061 }
1062 if (state->translate[2] != 0.0f) {
1063 viewport->zoffset = state->translate[2];
1064 viewport->vte_control |= R300_VPORT_Z_OFFSET_ENA;
1065 }
1066
1067 r300->viewport_state.dirty = TRUE;
1068 if (r300->fs && r300->fs->inputs.wpos != ATTR_UNUSED) {
1069 r300->dirty_state |= R300_NEW_FRAGMENT_SHADER_CONSTANTS;
1070 }
1071 }
1072
1073 static void r300_set_vertex_buffers(struct pipe_context* pipe,
1074 unsigned count,
1075 const struct pipe_vertex_buffer* buffers)
1076 {
1077 struct r300_context* r300 = r300_context(pipe);
1078 struct pipe_vertex_buffer *vbo;
1079 unsigned i, max_index = (1 << 24) - 1;
1080 boolean any_user_buffer = FALSE;
1081
1082 if (count == r300->vertex_buffer_count &&
1083 memcmp(r300->vertex_buffer, buffers,
1084 sizeof(struct pipe_vertex_buffer) * count) == 0) {
1085 return;
1086 }
1087
1088 /* Check if the stride is aligned to the size of DWORD. */
1089 for (i = 0; i < count; i++) {
1090 if (buffers[i].buffer) {
1091 if (buffers[i].stride % 4 != 0) {
1092 // XXX Shouldn't we align the buffer?
1093 fprintf(stderr, "r300_set_vertex_buffers: "
1094 "Unaligned buffer stride %i isn't supported.\n",
1095 buffers[i].stride);
1096 assert(0);
1097 abort();
1098 }
1099 }
1100 }
1101
1102 for (i = 0; i < count; i++) {
1103 /* Why, yes, I AM casting away constness. How did you know? */
1104 vbo = (struct pipe_vertex_buffer*)&buffers[i];
1105
1106 /* Reference our buffer. */
1107 pipe_buffer_reference(&r300->vertex_buffer[i].buffer, vbo->buffer);
1108
1109 /* Skip NULL buffers */
1110 if (!buffers[i].buffer) {
1111 continue;
1112 }
1113
1114 if (r300_buffer_is_user_buffer(vbo->buffer)) {
1115 any_user_buffer = TRUE;
1116 }
1117
1118 if (vbo->max_index == ~0) {
1119 /* Bogus value from broken state tracker; hax it. */
1120 vbo->max_index =
1121 (vbo->buffer->size - vbo->buffer_offset) / vbo->stride;
1122 }
1123
1124 max_index = MIN2(vbo->max_index, max_index);
1125 }
1126
1127 for (; i < r300->vertex_buffer_count; i++) {
1128 /* Dereference any old buffers. */
1129 pipe_buffer_reference(&r300->vertex_buffer[i].buffer, NULL);
1130 }
1131
1132 memcpy(r300->vertex_buffer, buffers,
1133 sizeof(struct pipe_vertex_buffer) * count);
1134
1135 r300->vertex_buffer_count = count;
1136 r300->vertex_buffer_max_index = max_index;
1137 r300->any_user_vbs = any_user_buffer;
1138
1139 if (r300->draw) {
1140 draw_flush(r300->draw);
1141 draw_set_vertex_buffers(r300->draw, count, buffers);
1142 }
1143 }
1144
1145 /* Update the PSC tables. */
1146 static void r300_vertex_psc(struct r300_vertex_element_state *velems)
1147 {
1148 struct r300_vertex_stream_state *vstream = &velems->vertex_stream;
1149 uint16_t type, swizzle;
1150 enum pipe_format format;
1151 unsigned i;
1152
1153 assert(velems->count <= 16);
1154
1155 /* Vertex shaders have no semantics on their inputs,
1156 * so PSC should just route stuff based on the vertex elements,
1157 * and not on attrib information. */
1158 for (i = 0; i < velems->count; i++) {
1159 format = velems->velem[i].src_format;
1160
1161 type = r300_translate_vertex_data_type(format) |
1162 (i << R300_DST_VEC_LOC_SHIFT);
1163 swizzle = r300_translate_vertex_data_swizzle(format);
1164
1165 if (i & 1) {
1166 vstream->vap_prog_stream_cntl[i >> 1] |= type << 16;
1167 vstream->vap_prog_stream_cntl_ext[i >> 1] |= swizzle << 16;
1168 } else {
1169 vstream->vap_prog_stream_cntl[i >> 1] |= type;
1170 vstream->vap_prog_stream_cntl_ext[i >> 1] |= swizzle;
1171 }
1172 }
1173
1174 /* Set the last vector in the PSC. */
1175 if (i) {
1176 i -= 1;
1177 }
1178 vstream->vap_prog_stream_cntl[i >> 1] |=
1179 (R300_LAST_VEC << (i & 1 ? 16 : 0));
1180
1181 vstream->count = (i >> 1) + 1;
1182 }
1183
1184 static void* r300_create_vertex_elements_state(struct pipe_context* pipe,
1185 unsigned count,
1186 const struct pipe_vertex_element* attribs)
1187 {
1188 struct r300_screen* r300screen = r300_screen(pipe->screen);
1189 struct r300_vertex_element_state *velems;
1190 unsigned i, size;
1191
1192 assert(count <= PIPE_MAX_ATTRIBS);
1193 velems = CALLOC_STRUCT(r300_vertex_element_state);
1194 if (velems != NULL) {
1195 velems->count = count;
1196 memcpy(velems->velem, attribs, sizeof(struct pipe_vertex_element) * count);
1197
1198 if (r300screen->caps->has_tcl) {
1199 /* Check if the format is aligned to the size of DWORD. */
1200 for (i = 0; i < count; i++) {
1201 size = util_format_get_blocksize(attribs[i].src_format);
1202
1203 if (size % 4 != 0) {
1204 /* XXX Shouldn't we align the format? */
1205 fprintf(stderr, "r300_create_vertex_elements_state: "
1206 "Unaligned format %s:%i isn't supported\n",
1207 util_format_name(attribs[i].src_format), size);
1208 assert(0);
1209 abort();
1210 }
1211 }
1212
1213 r300_vertex_psc(velems);
1214 }
1215 }
1216 return velems;
1217 }
1218
1219 static void r300_bind_vertex_elements_state(struct pipe_context *pipe,
1220 void *state)
1221 {
1222 struct r300_context *r300 = r300_context(pipe);
1223 struct r300_vertex_element_state *velems = state;
1224
1225 if (velems == NULL) {
1226 return;
1227 }
1228
1229 r300->velems = velems;
1230
1231 if (r300->draw) {
1232 draw_flush(r300->draw);
1233 draw_set_vertex_elements(r300->draw, velems->count, velems->velem);
1234 }
1235
1236 UPDATE_STATE(&velems->vertex_stream, r300->vertex_stream_state);
1237 r300->vertex_stream_state.size = (1 + velems->vertex_stream.count) * 2;
1238 }
1239
1240 static void r300_delete_vertex_elements_state(struct pipe_context *pipe, void *state)
1241 {
1242 FREE(state);
1243 }
1244
1245 static void* r300_create_vs_state(struct pipe_context* pipe,
1246 const struct pipe_shader_state* shader)
1247 {
1248 struct r300_context* r300 = r300_context(pipe);
1249
1250 struct r300_vertex_shader* vs = CALLOC_STRUCT(r300_vertex_shader);
1251 r300_vertex_shader_common_init(vs, shader);
1252
1253 if (r300_screen(pipe->screen)->caps->has_tcl) {
1254 r300_translate_vertex_shader(r300, vs);
1255 } else {
1256 vs->draw_vs = draw_create_vertex_shader(r300->draw, shader);
1257 }
1258
1259 return vs;
1260 }
1261
1262 static void r300_bind_vs_state(struct pipe_context* pipe, void* shader)
1263 {
1264 struct r300_context* r300 = r300_context(pipe);
1265 struct r300_vertex_shader* vs = (struct r300_vertex_shader*)shader;
1266
1267 if (vs == NULL) {
1268 r300->vs_state.state = NULL;
1269 return;
1270 }
1271 if (vs == r300->vs_state.state) {
1272 return;
1273 }
1274 r300->vs_state.state = vs;
1275
1276 // VS output mapping for HWTCL or stream mapping for SWTCL to the RS block
1277 if (r300->fs) {
1278 r300_vertex_shader_setup_wpos(r300);
1279 }
1280 memcpy(r300->vap_output_state.state, &vs->vap_out,
1281 sizeof(struct r300_vap_output_state));
1282 r300->vap_output_state.dirty = TRUE;
1283
1284 /* The majority of the RS block bits is dependent on the vertex shader. */
1285 r300->rs_block_state.dirty = TRUE; /* Will be updated before the emission. */
1286
1287 if (r300_screen(pipe->screen)->caps->has_tcl) {
1288 r300->vs_state.dirty = TRUE;
1289 r300->vs_state.size = vs->code.length + 9;
1290
1291 r300->pvs_flush.dirty = TRUE;
1292
1293 r300->dirty_state |= R300_NEW_VERTEX_SHADER_CONSTANTS;
1294 } else {
1295 draw_flush(r300->draw);
1296 draw_bind_vertex_shader(r300->draw,
1297 (struct draw_vertex_shader*)vs->draw_vs);
1298 }
1299 }
1300
1301 static void r300_delete_vs_state(struct pipe_context* pipe, void* shader)
1302 {
1303 struct r300_context* r300 = r300_context(pipe);
1304 struct r300_vertex_shader* vs = (struct r300_vertex_shader*)shader;
1305
1306 if (r300_screen(pipe->screen)->caps->has_tcl) {
1307 rc_constants_destroy(&vs->code.constants);
1308 } else {
1309 draw_delete_vertex_shader(r300->draw,
1310 (struct draw_vertex_shader*)vs->draw_vs);
1311 }
1312
1313 FREE((void*)vs->state.tokens);
1314 FREE(shader);
1315 }
1316
1317 static void r300_set_constant_buffer(struct pipe_context *pipe,
1318 uint shader, uint index,
1319 struct pipe_buffer *buf)
1320 {
1321 struct r300_context* r300 = r300_context(pipe);
1322 struct r300_screen *r300screen = r300_screen(pipe->screen);
1323 void *mapped;
1324 int max_size = 0;
1325
1326 if (buf == NULL || buf->size == 0 ||
1327 (mapped = pipe_buffer_map(pipe->screen, buf, PIPE_BUFFER_USAGE_CPU_READ)) == NULL)
1328 {
1329 r300->shader_constants[shader].count = 0;
1330 return;
1331 }
1332
1333 assert((buf->size % 4 * sizeof(float)) == 0);
1334
1335 /* Check the size of the constant buffer. */
1336 switch (shader) {
1337 case PIPE_SHADER_VERTEX:
1338 max_size = 256;
1339 break;
1340 case PIPE_SHADER_FRAGMENT:
1341 if (r300screen->caps->is_r500) {
1342 max_size = 256;
1343 /* XXX Implement emission of r400's extended constant buffer. */
1344 /*} else if (r300screen->caps->is_r400) {
1345 max_size = 64;*/
1346 } else {
1347 max_size = 32;
1348 }
1349 break;
1350 default:
1351 assert(0);
1352 }
1353
1354 /* XXX Subtract immediates and RC_STATE_* variables. */
1355 if (buf->size > (sizeof(float) * 4 * max_size)) {
1356 fprintf(stderr, "r300: Max size of the constant buffer is "
1357 "%i*4 floats.\n", max_size);
1358 abort();
1359 }
1360
1361 memcpy(r300->shader_constants[shader].constants, mapped, buf->size);
1362 r300->shader_constants[shader].count = buf->size / (4 * sizeof(float));
1363 pipe_buffer_unmap(pipe->screen, buf);
1364
1365 if (shader == PIPE_SHADER_VERTEX) {
1366 if (r300screen->caps->has_tcl) {
1367 r300->dirty_state |= R300_NEW_VERTEX_SHADER_CONSTANTS;
1368 r300->pvs_flush.dirty = TRUE;
1369 } else if (r300->draw) {
1370 draw_set_mapped_constant_buffer(r300->draw, PIPE_SHADER_VERTEX,
1371 0, r300->shader_constants[PIPE_SHADER_VERTEX].constants,
1372 buf->size);
1373 }
1374 } else if (shader == PIPE_SHADER_FRAGMENT) {
1375 r300->dirty_state |= R300_NEW_FRAGMENT_SHADER_CONSTANTS;
1376 }
1377 }
1378
1379 void r300_init_state_functions(struct r300_context* r300)
1380 {
1381 r300->context.create_blend_state = r300_create_blend_state;
1382 r300->context.bind_blend_state = r300_bind_blend_state;
1383 r300->context.delete_blend_state = r300_delete_blend_state;
1384
1385 r300->context.set_blend_color = r300_set_blend_color;
1386
1387 r300->context.set_clip_state = r300_set_clip_state;
1388
1389 r300->context.set_constant_buffer = r300_set_constant_buffer;
1390
1391 r300->context.create_depth_stencil_alpha_state = r300_create_dsa_state;
1392 r300->context.bind_depth_stencil_alpha_state = r300_bind_dsa_state;
1393 r300->context.delete_depth_stencil_alpha_state = r300_delete_dsa_state;
1394
1395 r300->context.set_stencil_ref = r300_set_stencil_ref;
1396
1397 r300->context.set_framebuffer_state = r300_set_framebuffer_state;
1398
1399 r300->context.create_fs_state = r300_create_fs_state;
1400 r300->context.bind_fs_state = r300_bind_fs_state;
1401 r300->context.delete_fs_state = r300_delete_fs_state;
1402
1403 r300->context.set_polygon_stipple = r300_set_polygon_stipple;
1404
1405 r300->context.create_rasterizer_state = r300_create_rs_state;
1406 r300->context.bind_rasterizer_state = r300_bind_rs_state;
1407 r300->context.delete_rasterizer_state = r300_delete_rs_state;
1408
1409 r300->context.create_sampler_state = r300_create_sampler_state;
1410 r300->context.bind_fragment_sampler_states = r300_bind_sampler_states;
1411 r300->context.bind_vertex_sampler_states = r300_lacks_vertex_textures;
1412 r300->context.delete_sampler_state = r300_delete_sampler_state;
1413
1414 r300->context.set_fragment_sampler_views = r300_set_fragment_sampler_views;
1415 r300->context.create_sampler_view = r300_create_sampler_view;
1416 r300->context.sampler_view_destroy = r300_sampler_view_destroy;
1417
1418 r300->context.set_scissor_state = r300_set_scissor_state;
1419
1420 r300->context.set_viewport_state = r300_set_viewport_state;
1421
1422 r300->context.set_vertex_buffers = r300_set_vertex_buffers;
1423
1424 r300->context.create_vertex_elements_state = r300_create_vertex_elements_state;
1425 r300->context.bind_vertex_elements_state = r300_bind_vertex_elements_state;
1426 r300->context.delete_vertex_elements_state = r300_delete_vertex_elements_state;
1427
1428 r300->context.create_vs_state = r300_create_vs_state;
1429 r300->context.bind_vs_state = r300_bind_vs_state;
1430 r300->context.delete_vs_state = r300_delete_vs_state;
1431 }