2 * Copyright 2008 Corbin Simpson <MostAwesomeDude@gmail.com>
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * on the rights to use, copy, modify, merge, publish, distribute, sub
8 * license, and/or sell copies of the Software, and to permit persons to whom
9 * the Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
19 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
20 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
21 * USE OR OTHER DEALINGS IN THE SOFTWARE. */
23 #include "util/u_debug.h"
24 #include "util/u_math.h"
25 #include "util/u_pack_color.h"
27 #include "tgsi/tgsi_parse.h"
29 #include "pipe/p_config.h"
30 #include "pipe/internal/p_winsys_screen.h"
32 #include "r300_context.h"
34 #include "r300_state_inlines.h"
38 /* r300_state: Functions used to intialize state context by translating
39 * Gallium state objects into semi-native r300 state objects. */
41 /* Create a new blend state based on the CSO blend state.
43 * This encompasses alpha blending, logic/raster ops, and blend dithering. */
44 static void* r300_create_blend_state(struct pipe_context
* pipe
,
45 const struct pipe_blend_state
* state
)
47 struct r300_blend_state
* blend
= CALLOC_STRUCT(r300_blend_state
);
49 if (state
->blend_enable
) {
50 /* XXX for now, always do separate alpha...
51 * is it faster to do it with one reg? */
52 blend
->blend_control
= R300_ALPHA_BLEND_ENABLE
|
53 R300_SEPARATE_ALPHA_ENABLE
|
55 r300_translate_blend_function(state
->rgb_func
) |
56 (r300_translate_blend_factor(state
->rgb_src_factor
) <<
57 R300_SRC_BLEND_SHIFT
) |
58 (r300_translate_blend_factor(state
->rgb_dst_factor
) <<
59 R300_DST_BLEND_SHIFT
);
60 blend
->alpha_blend_control
=
61 r300_translate_blend_function(state
->alpha_func
) |
62 (r300_translate_blend_factor(state
->alpha_src_factor
) <<
63 R300_SRC_BLEND_SHIFT
) |
64 (r300_translate_blend_factor(state
->alpha_dst_factor
) <<
65 R300_DST_BLEND_SHIFT
);
68 /* PIPE_LOGICOP_* don't need to be translated, fortunately. */
69 if (state
->logicop_enable
) {
70 blend
->rop
= R300_RB3D_ROPCNTL_ROP_ENABLE
|
71 (state
->logicop_func
) << R300_RB3D_ROPCNTL_ROP_SHIFT
;
75 blend
->dither
= R300_RB3D_DITHER_CTL_DITHER_MODE_LUT
|
76 R300_RB3D_DITHER_CTL_ALPHA_DITHER_MODE_LUT
;
82 /* Bind blend state. */
83 static void r300_bind_blend_state(struct pipe_context
* pipe
,
86 struct r300_context
* r300
= r300_context(pipe
);
88 r300
->blend_state
= (struct r300_blend_state
*)state
;
89 r300
->dirty_state
|= R300_NEW_BLEND
;
92 /* Free blend state. */
93 static void r300_delete_blend_state(struct pipe_context
* pipe
,
100 * Setup both R300 and R500 registers, figure out later which one to write. */
101 static void r300_set_blend_color(struct pipe_context
* pipe
,
102 const struct pipe_blend_color
* color
)
104 struct r300_context
* r300
= r300_context(pipe
);
105 ubyte ur
, ug
, ub
, ua
;
107 ur
= float_to_ubyte(color
->color
[0]);
108 ug
= float_to_ubyte(color
->color
[1]);
109 ub
= float_to_ubyte(color
->color
[2]);
110 ua
= float_to_ubyte(color
->color
[3]);
112 util_pack_color(color
->color
, PIPE_FORMAT_A8R8G8B8_UNORM
,
113 &r300
->blend_color_state
->blend_color
);
115 /* XXX this is wrong */
116 r300
->blend_color_state
->blend_color_red_alpha
= ur
| (ua
<< 16);
117 r300
->blend_color_state
->blend_color_green_blue
= ub
| (ug
<< 16);
119 r300
->dirty_state
|= R300_NEW_BLEND_COLOR
;
122 static void r300_set_clip_state(struct pipe_context
* pipe
,
123 const struct pipe_clip_state
* state
)
125 struct r300_context
* r300
= r300_context(pipe
);
127 if (r300_screen(pipe
->screen
)->caps
->has_tcl
) {
128 r300
->clip_state
= *state
;
129 r300
->dirty_state
|= R300_NEW_CLIP
;
131 draw_flush(r300
->draw
);
132 draw_set_clip_state(r300
->draw
, state
);
137 r300_set_constant_buffer(struct pipe_context
* pipe
,
138 uint shader
, uint index
,
139 const struct pipe_constant_buffer
* buffer
)
141 struct r300_context
* r300
= r300_context(pipe
);
143 /* This entire chunk of code seems ever-so-slightly baked.
144 * It's as if I've got pipe_buffer* matryoshkas... */
145 if (buffer
&& buffer
->buffer
&& buffer
->buffer
->size
) {
146 void* map
= pipe
->winsys
->buffer_map(pipe
->winsys
, buffer
->buffer
,
147 PIPE_BUFFER_USAGE_CPU_READ
);
148 memcpy(r300
->shader_constants
[shader
].constants
,
149 map
, buffer
->buffer
->size
);
150 pipe
->winsys
->buffer_unmap(pipe
->winsys
, buffer
->buffer
);
152 r300
->shader_constants
[shader
].count
=
153 buffer
->buffer
->size
/ (sizeof(float) * 4);
155 r300
->shader_constants
[shader
].count
= 0;
158 r300
->dirty_state
|= R300_NEW_CONSTANTS
;
161 /* Create a new depth, stencil, and alpha state based on the CSO dsa state.
163 * This contains the depth buffer, stencil buffer, alpha test, and such.
164 * On the Radeon, depth and stencil buffer setup are intertwined, which is
165 * the reason for some of the strange-looking assignments across registers. */
167 r300_create_dsa_state(struct pipe_context
* pipe
,
168 const struct pipe_depth_stencil_alpha_state
* state
)
170 struct r300_dsa_state
* dsa
= CALLOC_STRUCT(r300_dsa_state
);
172 /* Depth test setup. */
173 if (state
->depth
.enabled
) {
174 dsa
->z_buffer_control
|= R300_Z_ENABLE
;
176 if (state
->depth
.writemask
) {
177 dsa
->z_buffer_control
|= R300_Z_WRITE_ENABLE
;
180 dsa
->z_stencil_control
|=
181 (r300_translate_depth_stencil_function(state
->depth
.func
) <<
185 /* Stencil buffer setup. */
186 if (state
->stencil
[0].enabled
) {
187 dsa
->z_buffer_control
|= R300_STENCIL_ENABLE
;
188 dsa
->z_stencil_control
|=
189 (r300_translate_depth_stencil_function(state
->stencil
[0].func
) <<
190 R300_S_FRONT_FUNC_SHIFT
) |
191 (r300_translate_stencil_op(state
->stencil
[0].fail_op
) <<
192 R300_S_FRONT_SFAIL_OP_SHIFT
) |
193 (r300_translate_stencil_op(state
->stencil
[0].zpass_op
) <<
194 R300_S_FRONT_ZPASS_OP_SHIFT
) |
195 (r300_translate_stencil_op(state
->stencil
[0].zfail_op
) <<
196 R300_S_FRONT_ZFAIL_OP_SHIFT
);
198 dsa
->stencil_ref_mask
= (state
->stencil
[0].ref_value
) |
199 (state
->stencil
[0].valuemask
<< R300_STENCILMASK_SHIFT
) |
200 (state
->stencil
[0].writemask
<< R300_STENCILWRITEMASK_SHIFT
);
202 if (state
->stencil
[1].enabled
) {
203 dsa
->z_buffer_control
|= R300_STENCIL_FRONT_BACK
;
204 dsa
->z_stencil_control
|=
205 (r300_translate_depth_stencil_function(state
->stencil
[1].func
) <<
206 R300_S_BACK_FUNC_SHIFT
) |
207 (r300_translate_stencil_op(state
->stencil
[1].fail_op
) <<
208 R300_S_BACK_SFAIL_OP_SHIFT
) |
209 (r300_translate_stencil_op(state
->stencil
[1].zpass_op
) <<
210 R300_S_BACK_ZPASS_OP_SHIFT
) |
211 (r300_translate_stencil_op(state
->stencil
[1].zfail_op
) <<
212 R300_S_BACK_ZFAIL_OP_SHIFT
);
214 dsa
->stencil_ref_bf
= (state
->stencil
[1].ref_value
) |
215 (state
->stencil
[1].valuemask
<< R300_STENCILMASK_SHIFT
) |
216 (state
->stencil
[1].writemask
<< R300_STENCILWRITEMASK_SHIFT
);
220 /* Alpha test setup. */
221 if (state
->alpha
.enabled
) {
222 dsa
->alpha_function
=
223 r300_translate_alpha_function(state
->alpha
.func
) |
224 R300_FG_ALPHA_FUNC_ENABLE
;
225 dsa
->alpha_reference
= CLAMP(state
->alpha
.ref_value
* 1023.0f
,
228 /* XXX need to fix this to be dynamically set
229 dsa->z_buffer_top = R300_ZTOP_ENABLE; */
235 /* Bind DSA state. */
236 static void r300_bind_dsa_state(struct pipe_context
* pipe
,
239 struct r300_context
* r300
= r300_context(pipe
);
241 r300
->dsa_state
= (struct r300_dsa_state
*)state
;
242 r300
->dirty_state
|= R300_NEW_DSA
;
245 /* Free DSA state. */
246 static void r300_delete_dsa_state(struct pipe_context
* pipe
,
252 static void r300_set_edgeflags(struct pipe_context
* pipe
,
253 const unsigned* bitfield
)
255 /* XXX you know it's bad when i915 has this blank too */
256 /* XXX and even worse, I have no idea WTF the bitfield is */
260 r300_set_framebuffer_state(struct pipe_context
* pipe
,
261 const struct pipe_framebuffer_state
* state
)
263 struct r300_context
* r300
= r300_context(pipe
);
265 draw_flush(r300
->draw
);
267 r300
->framebuffer_state
= *state
;
269 r300
->dirty_state
|= R300_NEW_FRAMEBUFFERS
;
272 /* Create fragment shader state. */
273 static void* r300_create_fs_state(struct pipe_context
* pipe
,
274 const struct pipe_shader_state
* shader
)
276 struct r300_fragment_shader
* fs
= NULL
;
278 fs
= (struct r300_fragment_shader
*)CALLOC_STRUCT(r300_fragment_shader
);
280 /* Copy state directly into shader. */
282 fs
->state
.tokens
= tgsi_dup_tokens(shader
->tokens
);
284 tgsi_scan_shader(shader
->tokens
, &fs
->info
);
289 /* Bind fragment shader state. */
290 static void r300_bind_fs_state(struct pipe_context
* pipe
, void* shader
)
292 struct r300_context
* r300
= r300_context(pipe
);
293 struct r300_fragment_shader
* fs
= (struct r300_fragment_shader
*)shader
;
298 } else if (!fs
->translated
) {
299 r300_translate_fragment_shader(r300
, fs
);
304 r300
->dirty_state
|= R300_NEW_FRAGMENT_SHADER
;
307 /* Delete fragment shader state. */
308 static void r300_delete_fs_state(struct pipe_context
* pipe
, void* shader
)
310 struct r300_fragment_shader
* fs
= (struct r300_fragment_shader
*)shader
;
311 rc_constants_destroy(&fs
->code
.constants
);
312 FREE(fs
->state
.tokens
);
316 static void r300_set_polygon_stipple(struct pipe_context
* pipe
,
317 const struct pipe_poly_stipple
* state
)
319 /* XXX no idea how to set this up, but not terribly important */
322 /* Create a new rasterizer state based on the CSO rasterizer state.
324 * This is a very large chunk of state, and covers most of the graphics
325 * backend (GB), geometry assembly (GA), and setup unit (SU) blocks.
327 * In a not entirely unironic sidenote, this state has nearly nothing to do
328 * with the actual block on the Radeon called the rasterizer (RS). */
329 static void* r300_create_rs_state(struct pipe_context
* pipe
,
330 const struct pipe_rasterizer_state
* state
)
332 struct r300_rs_state
* rs
= CALLOC_STRUCT(r300_rs_state
);
334 /* Copy rasterizer state for Draw. */
337 rs
->enable_vte
= !state
->bypass_vs_clip_and_viewport
;
339 #ifdef PIPE_ARCH_LITTLE_ENDIAN
340 rs
->vap_control_status
= R300_VC_NO_SWAP
;
342 rs
->vap_control_status
= R300_VC_32BIT_SWAP
;
345 /* If bypassing TCL, or if no TCL engine is present, turn off the HW TCL.
346 * Else, enable HW TCL and force Draw's TCL off. */
347 if (state
->bypass_vs_clip_and_viewport
||
348 !r300_screen(pipe
->screen
)->caps
->has_tcl
) {
349 rs
->vap_control_status
|= R300_VAP_TCL_BYPASS
;
351 rs
->rs
.bypass_vs_clip_and_viewport
= TRUE
;
354 rs
->point_size
= pack_float_16_6x(state
->point_size
) |
355 (pack_float_16_6x(state
->point_size
) << R300_POINTSIZE_X_SHIFT
);
358 ((int)(state
->point_size_min
* 6.0) <<
359 R300_GA_POINT_MINMAX_MIN_SHIFT
) |
360 ((int)(state
->point_size_max
* 6.0) <<
361 R300_GA_POINT_MINMAX_MAX_SHIFT
);
363 rs
->line_control
= pack_float_16_6x(state
->line_width
) |
364 R300_GA_LINE_CNTL_END_TYPE_COMP
;
366 /* Radeons don't think in "CW/CCW", they think in "front/back". */
367 if (state
->front_winding
== PIPE_WINDING_CW
) {
368 rs
->cull_mode
= R300_FRONT_FACE_CW
;
370 if (state
->offset_cw
) {
371 rs
->polygon_offset_enable
|= R300_FRONT_ENABLE
;
373 if (state
->offset_ccw
) {
374 rs
->polygon_offset_enable
|= R300_BACK_ENABLE
;
377 rs
->cull_mode
= R300_FRONT_FACE_CCW
;
379 if (state
->offset_ccw
) {
380 rs
->polygon_offset_enable
|= R300_FRONT_ENABLE
;
382 if (state
->offset_cw
) {
383 rs
->polygon_offset_enable
|= R300_BACK_ENABLE
;
386 if (state
->front_winding
& state
->cull_mode
) {
387 rs
->cull_mode
|= R300_CULL_FRONT
;
389 if (~(state
->front_winding
) & state
->cull_mode
) {
390 rs
->cull_mode
|= R300_CULL_BACK
;
393 if (rs
->polygon_offset_enable
) {
394 rs
->depth_offset_front
= rs
->depth_offset_back
=
395 fui(state
->offset_units
);
396 rs
->depth_scale_front
= rs
->depth_scale_back
=
397 fui(state
->offset_scale
);
400 if (state
->line_stipple_enable
) {
401 rs
->line_stipple_config
=
402 R300_GA_LINE_STIPPLE_CONFIG_LINE_RESET_LINE
|
403 (fui((float)state
->line_stipple_factor
) &
404 R300_GA_LINE_STIPPLE_CONFIG_STIPPLE_SCALE_MASK
);
405 /* XXX this might need to be scaled up */
406 rs
->line_stipple_value
= state
->line_stipple_pattern
;
409 if (state
->flatshade
) {
410 rs
->color_control
= R300_SHADE_MODEL_FLAT
;
412 rs
->color_control
= R300_SHADE_MODEL_SMOOTH
;
415 if (!state
->flatshade_first
) {
416 rs
->color_control
|= R300_GA_COLOR_CONTROL_PROVOKING_VERTEX_LAST
;
422 /* Bind rasterizer state. */
423 static void r300_bind_rs_state(struct pipe_context
* pipe
, void* state
)
425 struct r300_context
* r300
= r300_context(pipe
);
426 struct r300_rs_state
* rs
= (struct r300_rs_state
*)state
;
428 draw_flush(r300
->draw
);
429 draw_set_rasterizer_state(r300
->draw
, &rs
->rs
);
432 r300
->dirty_state
|= R300_NEW_RASTERIZER
;
433 r300
->dirty_state
|= R300_NEW_RS_BLOCK
;
434 r300
->dirty_state
|= R300_NEW_SCISSOR
;
435 r300
->dirty_state
|= R300_NEW_VIEWPORT
;
438 /* Free rasterizer state. */
439 static void r300_delete_rs_state(struct pipe_context
* pipe
, void* state
)
445 r300_create_sampler_state(struct pipe_context
* pipe
,
446 const struct pipe_sampler_state
* state
)
448 struct r300_context
* r300
= r300_context(pipe
);
449 struct r300_sampler_state
* sampler
= CALLOC_STRUCT(r300_sampler_state
);
453 (r300_translate_wrap(state
->wrap_s
) << R300_TX_WRAP_S_SHIFT
) |
454 (r300_translate_wrap(state
->wrap_t
) << R300_TX_WRAP_T_SHIFT
) |
455 (r300_translate_wrap(state
->wrap_r
) << R300_TX_WRAP_R_SHIFT
);
457 sampler
->filter0
|= r300_translate_tex_filters(state
->min_img_filter
,
458 state
->mag_img_filter
,
459 state
->min_mip_filter
);
461 lod_bias
= CLAMP((int)(state
->lod_bias
* 32), -(1 << 9), (1 << 9) - 1);
463 sampler
->filter1
|= lod_bias
<< R300_LOD_BIAS_SHIFT
;
465 sampler
->filter1
|= r300_anisotropy(state
->max_anisotropy
);
467 util_pack_color(state
->border_color
, PIPE_FORMAT_A8R8G8B8_UNORM
,
468 &sampler
->border_color
);
470 /* R500-specific fixups and optimizations */
471 if (r300_screen(r300
->context
.screen
)->caps
->is_r500
) {
472 sampler
->filter1
|= R500_BORDER_FIX
;
475 return (void*)sampler
;
478 static void r300_bind_sampler_states(struct pipe_context
* pipe
,
482 struct r300_context
* r300
= r300_context(pipe
);
489 for (i
= 0; i
< count
; i
++) {
490 if (r300
->sampler_states
[i
] != states
[i
]) {
491 r300
->sampler_states
[i
] = (struct r300_sampler_state
*)states
[i
];
492 r300
->dirty_state
|= (R300_NEW_SAMPLER
<< i
);
496 r300
->sampler_count
= count
;
499 static void r300_delete_sampler_state(struct pipe_context
* pipe
, void* state
)
504 static void r300_set_sampler_textures(struct pipe_context
* pipe
,
506 struct pipe_texture
** texture
)
508 struct r300_context
* r300
= r300_context(pipe
);
516 for (i
= 0; i
< count
; i
++) {
517 if (r300
->textures
[i
] != (struct r300_texture
*)texture
[i
]) {
518 pipe_texture_reference((struct pipe_texture
**)&r300
->textures
[i
],
520 r300
->dirty_state
|= (R300_NEW_TEXTURE
<< i
);
524 for (i
= count
; i
< 8; i
++) {
525 if (r300
->textures
[i
]) {
526 pipe_texture_reference((struct pipe_texture
**)&r300
->textures
[i
],
528 r300
->dirty_state
|= (R300_NEW_TEXTURE
<< i
);
532 r300
->texture_count
= count
;
535 static void r300_set_scissor_state(struct pipe_context
* pipe
,
536 const struct pipe_scissor_state
* state
)
538 struct r300_context
* r300
= r300_context(pipe
);
540 if (r300_screen(r300
->context
.screen
)->caps
->is_r500
) {
541 r300
->scissor_state
->scissor_top_left
=
542 (state
->minx
<< R300_SCISSORS_X_SHIFT
) |
543 (state
->miny
<< R300_SCISSORS_Y_SHIFT
);
544 r300
->scissor_state
->scissor_bottom_right
=
545 ((state
->maxx
- 1) << R300_SCISSORS_X_SHIFT
) |
546 ((state
->maxy
- 1) << R300_SCISSORS_Y_SHIFT
);
548 /* Offset of 1440 in non-R500 chipsets. */
549 r300
->scissor_state
->scissor_top_left
=
550 ((state
->minx
+ 1440) << R300_SCISSORS_X_SHIFT
) |
551 ((state
->miny
+ 1440) << R300_SCISSORS_Y_SHIFT
);
552 r300
->scissor_state
->scissor_bottom_right
=
553 (((state
->maxx
- 1) + 1440) << R300_SCISSORS_X_SHIFT
) |
554 (((state
->maxy
- 1) + 1440) << R300_SCISSORS_Y_SHIFT
);
557 r300
->dirty_state
|= R300_NEW_SCISSOR
;
560 static void r300_set_viewport_state(struct pipe_context
* pipe
,
561 const struct pipe_viewport_state
* state
)
563 struct r300_context
* r300
= r300_context(pipe
);
565 /* Do the transform in HW. */
566 r300
->viewport_state
->vte_control
= R300_VTX_W0_FMT
;
568 if (state
->scale
[0] != 1.0f
) {
569 assert(state
->scale
[0] != 0.0f
);
570 r300
->viewport_state
->xscale
= state
->scale
[0];
571 r300
->viewport_state
->vte_control
|= R300_VPORT_X_SCALE_ENA
;
573 if (state
->scale
[1] != 1.0f
) {
574 assert(state
->scale
[1] != 0.0f
);
575 r300
->viewport_state
->yscale
= state
->scale
[1];
576 r300
->viewport_state
->vte_control
|= R300_VPORT_Y_SCALE_ENA
;
578 if (state
->scale
[2] != 1.0f
) {
579 assert(state
->scale
[2] != 0.0f
);
580 r300
->viewport_state
->zscale
= state
->scale
[2];
581 r300
->viewport_state
->vte_control
|= R300_VPORT_Z_SCALE_ENA
;
583 if (state
->translate
[0] != 0.0f
) {
584 r300
->viewport_state
->xoffset
= state
->translate
[0];
585 r300
->viewport_state
->vte_control
|= R300_VPORT_X_OFFSET_ENA
;
587 if (state
->translate
[1] != 0.0f
) {
588 r300
->viewport_state
->yoffset
= state
->translate
[1];
589 r300
->viewport_state
->vte_control
|= R300_VPORT_Y_OFFSET_ENA
;
591 if (state
->translate
[2] != 0.0f
) {
592 r300
->viewport_state
->zoffset
= state
->translate
[2];
593 r300
->viewport_state
->vte_control
|= R300_VPORT_Z_OFFSET_ENA
;
596 r300
->dirty_state
|= R300_NEW_VIEWPORT
;
599 static void r300_set_vertex_buffers(struct pipe_context
* pipe
,
601 const struct pipe_vertex_buffer
* buffers
)
603 struct r300_context
* r300
= r300_context(pipe
);
605 memcpy(r300
->vertex_buffers
, buffers
,
606 sizeof(struct pipe_vertex_buffer
) * count
);
608 r300
->vertex_buffer_count
= count
;
610 draw_flush(r300
->draw
);
611 draw_set_vertex_buffers(r300
->draw
, count
, buffers
);
614 static void r300_set_vertex_elements(struct pipe_context
* pipe
,
616 const struct pipe_vertex_element
* elements
)
618 struct r300_context
* r300
= r300_context(pipe
);
620 draw_flush(r300
->draw
);
621 draw_set_vertex_elements(r300
->draw
, count
, elements
);
624 static void* r300_create_vs_state(struct pipe_context
* pipe
,
625 const struct pipe_shader_state
* shader
)
627 struct r300_context
* r300
= r300_context(pipe
);
629 if (r300_screen(pipe
->screen
)->caps
->has_tcl
) {
630 struct r300_vertex_shader
* vs
= CALLOC_STRUCT(r300_vertex_shader
);
631 /* Copy state directly into shader. */
633 vs
->state
.tokens
= tgsi_dup_tokens(shader
->tokens
);
635 tgsi_scan_shader(shader
->tokens
, &vs
->info
);
638 vs
->draw
= draw_create_vertex_shader(r300
->draw
, shader
);
642 return draw_create_vertex_shader(r300
->draw
, shader
);
646 static void r300_bind_vs_state(struct pipe_context
* pipe
, void* shader
)
648 struct r300_context
* r300
= r300_context(pipe
);
650 draw_flush(r300
->draw
);
652 if (r300_screen(pipe
->screen
)->caps
->has_tcl
) {
653 struct r300_vertex_shader
* vs
= (struct r300_vertex_shader
*)shader
;
658 } else if (!vs
->translated
) {
659 r300_translate_vertex_shader(r300
, vs
);
662 draw_bind_vertex_shader(r300
->draw
, vs
->draw
);
664 r300
->dirty_state
|= R300_NEW_VERTEX_SHADER
;
666 draw_bind_vertex_shader(r300
->draw
,
667 (struct draw_vertex_shader
*)shader
);
671 static void r300_delete_vs_state(struct pipe_context
* pipe
, void* shader
)
673 struct r300_context
* r300
= r300_context(pipe
);
675 if (r300_screen(pipe
->screen
)->caps
->has_tcl
) {
676 struct r300_vertex_shader
* vs
= (struct r300_vertex_shader
*)shader
;
678 rc_constants_destroy(&vs
->code
.constants
);
679 draw_delete_vertex_shader(r300
->draw
, vs
->draw
);
680 FREE(vs
->state
.tokens
);
683 draw_delete_vertex_shader(r300
->draw
,
684 (struct draw_vertex_shader
*)shader
);
688 void r300_init_state_functions(struct r300_context
* r300
)
690 r300
->context
.create_blend_state
= r300_create_blend_state
;
691 r300
->context
.bind_blend_state
= r300_bind_blend_state
;
692 r300
->context
.delete_blend_state
= r300_delete_blend_state
;
694 r300
->context
.set_blend_color
= r300_set_blend_color
;
696 r300
->context
.set_clip_state
= r300_set_clip_state
;
698 r300
->context
.set_constant_buffer
= r300_set_constant_buffer
;
700 r300
->context
.create_depth_stencil_alpha_state
= r300_create_dsa_state
;
701 r300
->context
.bind_depth_stencil_alpha_state
= r300_bind_dsa_state
;
702 r300
->context
.delete_depth_stencil_alpha_state
= r300_delete_dsa_state
;
704 r300
->context
.set_edgeflags
= r300_set_edgeflags
;
706 r300
->context
.set_framebuffer_state
= r300_set_framebuffer_state
;
708 r300
->context
.create_fs_state
= r300_create_fs_state
;
709 r300
->context
.bind_fs_state
= r300_bind_fs_state
;
710 r300
->context
.delete_fs_state
= r300_delete_fs_state
;
712 r300
->context
.set_polygon_stipple
= r300_set_polygon_stipple
;
714 r300
->context
.create_rasterizer_state
= r300_create_rs_state
;
715 r300
->context
.bind_rasterizer_state
= r300_bind_rs_state
;
716 r300
->context
.delete_rasterizer_state
= r300_delete_rs_state
;
718 r300
->context
.create_sampler_state
= r300_create_sampler_state
;
719 r300
->context
.bind_sampler_states
= r300_bind_sampler_states
;
720 r300
->context
.delete_sampler_state
= r300_delete_sampler_state
;
722 r300
->context
.set_sampler_textures
= r300_set_sampler_textures
;
724 r300
->context
.set_scissor_state
= r300_set_scissor_state
;
726 r300
->context
.set_viewport_state
= r300_set_viewport_state
;
728 r300
->context
.set_vertex_buffers
= r300_set_vertex_buffers
;
729 r300
->context
.set_vertex_elements
= r300_set_vertex_elements
;
731 r300
->context
.create_vs_state
= r300_create_vs_state
;
732 r300
->context
.bind_vs_state
= r300_bind_vs_state
;
733 r300
->context
.delete_vs_state
= r300_delete_vs_state
;