2 * Copyright 2008 Corbin Simpson <MostAwesomeDude@gmail.com>
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * on the rights to use, copy, modify, merge, publish, distribute, sub
8 * license, and/or sell copies of the Software, and to permit persons to whom
9 * the Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
19 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
20 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
21 * USE OR OTHER DEALINGS IN THE SOFTWARE. */
23 #include "draw/draw_context.h"
25 #include "util/u_math.h"
26 #include "util/u_memory.h"
28 #include "r300_context.h"
30 #include "r300_screen.h"
31 #include "r300_state_derived.h"
32 #include "r300_state_inlines.h"
35 /* r300_state_derived: Various bits of state which are dependent upon
36 * currently bound CSO data. */
38 struct r300_shader_key
{
39 struct r300_vertex_shader
* vs
;
40 struct r300_fragment_shader
* fs
;
43 struct r300_shader_derived_value
{
44 struct r300_vertex_format
* vformat
;
45 struct r300_rs_block
* rs_block
;
48 unsigned r300_shader_key_hash(void* key
) {
49 struct r300_shader_key
* shader_key
= (struct r300_shader_key
*)key
;
50 unsigned vs
= (intptr_t)shader_key
->vs
;
51 unsigned fs
= (intptr_t)shader_key
->fs
;
53 return (vs
<< 16) | (fs
& 0xffff);
56 int r300_shader_key_compare(void* key1
, void* key2
) {
57 struct r300_shader_key
* shader_key1
= (struct r300_shader_key
*)key1
;
58 struct r300_shader_key
* shader_key2
= (struct r300_shader_key
*)key2
;
60 return (shader_key1
->vs
== shader_key2
->vs
) &&
61 (shader_key1
->fs
== shader_key2
->fs
);
64 /* Set up the vs_output_tab and routes. */
65 static void r300_vs_output_tab_routes(struct r300_context
* r300
,
68 struct vertex_info
* vinfo
= &r300
->vertex_info
->vinfo
;
69 boolean pos
= FALSE
, psize
= FALSE
, fog
= FALSE
;
70 int i
, texs
= 0, cols
= 0;
71 struct tgsi_shader_info
* info
= &r300
->fs
->info
;
73 /* XXX One day we should figure out how to handle a different number of
74 * VS outputs and FS inputs, as well as a different number of vertex streams
75 * and VS inputs. It's definitely one of the sources of hardlocks. */
77 for (i
= 0; i
< info
->num_inputs
; i
++) {
78 switch (info
->input_semantic_name
[i
]) {
79 case TGSI_SEMANTIC_POSITION
:
83 case TGSI_SEMANTIC_COLOR
:
84 vs_output_tab
[i
] = 2 + cols
;
87 case TGSI_SEMANTIC_PSIZE
:
88 assert(psize
== FALSE
);
90 vs_output_tab
[i
] = 15;
92 case TGSI_SEMANTIC_FOG
:
96 case TGSI_SEMANTIC_GENERIC
:
97 vs_output_tab
[i
] = 6 + texs
;
101 debug_printf("r300: Unknown vertex input %d\n",
102 info
->input_semantic_name
[i
]);
110 /* Do the actual vertex_info setup.
112 * vertex_info has four uints of hardware-specific data in it.
113 * vinfo.hwfmt[0] is R300_VAP_VTX_STATE_CNTL
114 * vinfo.hwfmt[1] is R300_VAP_VSM_VTX_ASSM
115 * vinfo.hwfmt[2] is R300_VAP_OUTPUT_VTX_FMT_0
116 * vinfo.hwfmt[3] is R300_VAP_OUTPUT_VTX_FMT_1 */
118 vinfo
->hwfmt
[0] = 0x5555; /* XXX this is classic Mesa bonghits */
120 /* We need to add vertex position attribute only for SW TCL case,
121 * for HW TCL case it could be generated by vertex shader */
123 /* Make room for the position attribute
124 * at the beginning of the vs_output_tab. */
125 for (i
= 15; i
> 0; i
--) {
126 vs_output_tab
[i
] = vs_output_tab
[i
-1];
128 vs_output_tab
[0] = 0;
133 draw_emit_vertex_attr(vinfo
, EMIT_4F
, INTERP_PERSPECTIVE
,
134 draw_find_vs_output(r300
->draw
, TGSI_SEMANTIC_POSITION
, 0));
136 vinfo
->hwfmt
[1] |= R300_INPUT_CNTL_POS
;
137 vinfo
->hwfmt
[2] |= R300_VAP_OUTPUT_VTX_FMT_0__POS_PRESENT
;
142 draw_emit_vertex_attr(vinfo
, EMIT_1F_PSIZE
, INTERP_POS
,
143 draw_find_vs_output(r300
->draw
, TGSI_SEMANTIC_PSIZE
, 0));
145 vinfo
->hwfmt
[2] |= R300_VAP_OUTPUT_VTX_FMT_0__PT_SIZE_PRESENT
;
149 for (i
= 0; i
< cols
; i
++) {
151 draw_emit_vertex_attr(vinfo
, EMIT_4F
, INTERP_LINEAR
,
152 draw_find_vs_output(r300
->draw
, TGSI_SEMANTIC_COLOR
, i
));
154 vinfo
->hwfmt
[1] |= R300_INPUT_CNTL_COLOR
;
155 vinfo
->hwfmt
[2] |= (R300_VAP_OUTPUT_VTX_FMT_0__COLOR_0_PRESENT
<< i
);
158 /* Init i right here, increment it if fog is enabled.
159 * This gets around a double-increment problem. */
162 /* Fog. This is a special-cased texcoord. */
166 draw_emit_vertex_attr(vinfo
, EMIT_4F
, INTERP_PERSPECTIVE
,
167 draw_find_vs_output(r300
->draw
, TGSI_SEMANTIC_FOG
, 0));
169 vinfo
->hwfmt
[1] |= (R300_INPUT_CNTL_TC0
<< i
);
170 vinfo
->hwfmt
[3] |= (4 << (3 * i
));
174 for (; i
< texs
; i
++) {
176 draw_emit_vertex_attr(vinfo
, EMIT_4F
, INTERP_PERSPECTIVE
,
177 draw_find_vs_output(r300
->draw
, TGSI_SEMANTIC_GENERIC
, i
));
179 vinfo
->hwfmt
[1] |= (R300_INPUT_CNTL_TC0
<< i
);
180 vinfo
->hwfmt
[3] |= (4 << (3 * i
));
183 draw_compute_vertex_size(vinfo
);
186 /* Update the PSC tables. */
187 static void r300_vertex_psc(struct r300_context
* r300
)
189 struct r300_vertex_info
*vformat
= r300
->vertex_info
;
190 uint16_t type
, swizzle
;
191 enum pipe_format format
;
194 /* Vertex shaders have no semantics on their inputs,
195 * so PSC should just route stuff based on the vertex elements,
196 * and not on attrib information. */
197 DBG(r300
, DBG_DRAW
, "r300: vs expects %d attribs, routing %d elements"
199 r300
->vs
->info
.num_inputs
,
200 r300
->vertex_element_count
);
202 for (i
= 0; i
< r300
->vertex_element_count
; i
++) {
203 format
= r300
->vertex_element
[i
].src_format
;
205 type
= r300_translate_vertex_data_type(format
) |
206 (i
<< R300_DST_VEC_LOC_SHIFT
);
207 swizzle
= r300_translate_vertex_data_swizzle(format
);
210 vformat
->vap_prog_stream_cntl
[i
>> 1] |= type
<< 16;
211 vformat
->vap_prog_stream_cntl_ext
[i
>> 1] |= swizzle
<< 16;
213 vformat
->vap_prog_stream_cntl
[i
>> 1] |= type
;
214 vformat
->vap_prog_stream_cntl_ext
[i
>> 1] |= swizzle
;
221 /* Set the last vector in the PSC. */
225 vformat
->vap_prog_stream_cntl
[i
>> 1] |=
226 (R300_LAST_VEC
<< (i
& 1 ? 16 : 0));
229 /* Update the PSC tables for SW TCL, using Draw. */
230 static void r300_swtcl_vertex_psc(struct r300_context
* r300
,
233 struct r300_vertex_info
*vformat
= r300
->vertex_info
;
234 struct vertex_info
* vinfo
= &vformat
->vinfo
;
235 uint16_t type
, swizzle
;
236 enum pipe_format format
;
237 unsigned i
, attrib_count
;
239 /* For each Draw attribute, route it to the fragment shader according
240 * to the vs_output_tab. */
241 attrib_count
= vinfo
->num_attribs
;
242 DBG(r300
, DBG_DRAW
, "r300: attrib count: %d\n", attrib_count
);
243 for (i
= 0; i
< attrib_count
; i
++) {
244 DBG(r300
, DBG_DRAW
, "r300: attrib: offset %d, interp %d, size %d,"
245 " vs_output_tab %d\n", vinfo
->attrib
[i
].src_index
,
246 vinfo
->attrib
[i
].interp_mode
, vinfo
->attrib
[i
].emit
,
250 for (i
= 0; i
< attrib_count
; i
++) {
251 /* Make sure we have a proper destination for our attribute. */
252 assert(vs_output_tab
[i
] != -1);
254 format
= draw_translate_vinfo_format(vinfo
->attrib
[i
].emit
);
256 /* Obtain the type of data in this attribute. */
257 type
= r300_translate_vertex_data_type(format
) |
258 vs_output_tab
[i
] << R300_DST_VEC_LOC_SHIFT
;
260 /* Obtain the swizzle for this attribute. Note that the default
261 * swizzle in the hardware is not XYZW! */
262 swizzle
= r300_translate_vertex_data_swizzle(format
);
264 /* Add the attribute to the PSC table. */
266 vformat
->vap_prog_stream_cntl
[i
>> 1] |= type
<< 16;
267 vformat
->vap_prog_stream_cntl_ext
[i
>> 1] |= swizzle
<< 16;
269 vformat
->vap_prog_stream_cntl
[i
>> 1] |= type
;
270 vformat
->vap_prog_stream_cntl_ext
[i
>> 1] |= swizzle
;
274 /* Set the last vector in the PSC. */
278 vformat
->vap_prog_stream_cntl
[i
>> 1] |=
279 (R300_LAST_VEC
<< (i
& 1 ? 16 : 0));
282 /* Set up the RS block. This is the part of the chipset that actually does
283 * the rasterization of vertices into fragments. This is also the part of the
284 * chipset that locks up if any part of it is even slightly wrong. */
285 static void r300_update_rs_block(struct r300_context
* r300
)
287 struct r300_rs_block
* rs
= r300
->rs_block
;
288 struct tgsi_shader_info
* info
= &r300
->fs
->info
;
289 int col_count
= 0, fp_offset
= 0, i
, tex_count
= 0;
292 if (r300_screen(r300
->context
.screen
)->caps
->is_r500
) {
293 for (i
= 0; i
< info
->num_inputs
; i
++) {
294 switch (info
->input_semantic_name
[i
]) {
295 case TGSI_SEMANTIC_COLOR
:
297 R500_RS_COL_PTR(col_count
) |
298 R500_RS_COL_FMT(R300_RS_COL_FMT_RGBA
);
301 case TGSI_SEMANTIC_GENERIC
:
303 R500_RS_SEL_S(rs_tex_comp
) |
304 R500_RS_SEL_T(rs_tex_comp
+ 1) |
305 R500_RS_SEL_R(rs_tex_comp
+ 2) |
306 R500_RS_SEL_Q(rs_tex_comp
+ 3);
315 /* Rasterize at least one color, or bad things happen. */
316 if ((col_count
== 0) && (tex_count
== 0)) {
317 rs
->ip
[0] |= R500_RS_COL_FMT(R300_RS_COL_FMT_0001
);
321 for (i
= 0; i
< col_count
; i
++) {
322 rs
->inst
[i
] |= R500_RS_INST_COL_ID(i
) |
323 R500_RS_INST_COL_CN_WRITE
| R500_RS_INST_COL_ADDR(fp_offset
);
327 for (i
= 0; i
< tex_count
; i
++) {
328 rs
->inst
[i
] |= R500_RS_INST_TEX_ID(i
) |
329 R500_RS_INST_TEX_CN_WRITE
| R500_RS_INST_TEX_ADDR(fp_offset
);
334 for (i
= 0; i
< info
->num_inputs
; i
++) {
335 switch (info
->input_semantic_name
[i
]) {
336 case TGSI_SEMANTIC_COLOR
:
338 R300_RS_COL_PTR(col_count
) |
339 R300_RS_COL_FMT(R300_RS_COL_FMT_RGBA
);
342 case TGSI_SEMANTIC_GENERIC
:
344 R300_RS_TEX_PTR(rs_tex_comp
) |
345 R300_RS_SEL_S(R300_RS_SEL_C0
) |
346 R300_RS_SEL_T(R300_RS_SEL_C1
) |
347 R300_RS_SEL_R(R300_RS_SEL_C2
) |
348 R300_RS_SEL_Q(R300_RS_SEL_C3
);
357 /* Rasterize at least one color, or bad things happen. */
358 if (col_count
== 0) {
359 rs
->ip
[0] |= R300_RS_COL_FMT(R300_RS_COL_FMT_0001
);
363 if (tex_count
== 0) {
365 R300_RS_SEL_S(R300_RS_SEL_K0
) |
366 R300_RS_SEL_T(R300_RS_SEL_K0
) |
367 R300_RS_SEL_R(R300_RS_SEL_K0
) |
368 R300_RS_SEL_Q(R300_RS_SEL_K1
);
371 for (i
= 0; i
< col_count
; i
++) {
372 rs
->inst
[i
] |= R300_RS_INST_COL_ID(i
) |
373 R300_RS_INST_COL_CN_WRITE
| R300_RS_INST_COL_ADDR(fp_offset
);
377 for (i
= 0; i
< tex_count
; i
++) {
378 rs
->inst
[i
] |= R300_RS_INST_TEX_ID(i
) |
379 R300_RS_INST_TEX_CN_WRITE
| R300_RS_INST_TEX_ADDR(fp_offset
);
384 rs
->count
= (rs_tex_comp
) | (col_count
<< R300_IC_COUNT_SHIFT
) |
387 rs
->inst_count
= MAX3(col_count
- 1, tex_count
- 1, 0);
390 /* Update the vertex format. */
391 static void r300_update_derived_shader_state(struct r300_context
* r300
)
393 struct r300_screen
* r300screen
= r300_screen(r300
->context
.screen
);
394 int vs_output_tab
[16];
399 struct r300_shader_key* key;
400 struct r300_shader_derived_value* value;
401 key = CALLOC_STRUCT(r300_shader_key);
405 value = (struct r300_shader_derived_value*)
406 util_hash_table_get(r300->shader_hash_table, (void*)key);
408 //vformat = value->vformat;
409 rs_block = value->rs_block;
413 rs_block = CALLOC_STRUCT(r300_rs_block);
414 value = CALLOC_STRUCT(r300_shader_derived_value);
416 r300_update_rs_block(r300, rs_block);
418 //value->vformat = vformat;
419 value->rs_block = rs_block;
420 util_hash_table_set(r300->shader_hash_table,
421 (void*)key, (void*)value);
424 /* Reset structures */
425 memset(r300
->rs_block
, 0, sizeof(struct r300_rs_block
));
426 memset(r300
->vertex_info
, 0, sizeof(struct r300_vertex_info
));
428 for (i
= 0; i
< 16; i
++) {
429 vs_output_tab
[i
] = -1;
433 r300_vs_output_tab_routes(r300
, vs_output_tab
);
435 if (r300screen
->caps
->has_tcl
) {
436 r300_vertex_psc(r300
);
438 r300_swtcl_vertex_psc(r300
, vs_output_tab
);
441 r300_update_rs_block(r300
);
443 r300
->dirty_state
|= R300_NEW_RS_BLOCK
;
446 static void r300_update_ztop(struct r300_context
* r300
)
448 r300
->ztop_state
.z_buffer_top
= R300_ZTOP_ENABLE
;
450 /* This is important enough that I felt it warranted a comment.
452 * According to the docs, these are the conditions where ZTOP must be
454 * 1) Alpha testing enabled
455 * 2) Texture kill instructions in fragment shader
456 * 3) Chroma key culling enabled
457 * 4) W-buffering enabled
459 * The docs claim that for the first three cases, if no ZS writes happen,
460 * then ZTOP can be used.
462 * Additionally, the following conditions require disabled ZTOP:
463 * ~) Depth writes in fragment shader
464 * ~) Outstanding occlusion queries
468 if (r300
->dsa_state
->alpha_function
) {
469 r300
->ztop_state
.z_buffer_top
= R300_ZTOP_DISABLE
;
470 } else if (r300
->fs
->info
.uses_kill
) {
471 r300
->ztop_state
.z_buffer_top
= R300_ZTOP_DISABLE
;
472 } else if (r300_fragment_shader_writes_depth(r300
->fs
)) {
473 r300
->ztop_state
.z_buffer_top
= R300_ZTOP_DISABLE
;
474 } else if (r300
->query_current
) {
475 r300
->ztop_state
.z_buffer_top
= R300_ZTOP_DISABLE
;
479 void r300_update_derived_state(struct r300_context
* r300
)
481 if (r300
->dirty_state
&
482 (R300_NEW_FRAGMENT_SHADER
| R300_NEW_VERTEX_SHADER
|
483 R300_NEW_VERTEX_FORMAT
)) {
484 r300_update_derived_shader_state(r300
);
487 if (r300
->dirty_state
&
488 (R300_NEW_DSA
| R300_NEW_FRAGMENT_SHADER
| R300_NEW_QUERY
)) {
489 r300_update_ztop(r300
);