r300g,llvmpipe: fix some more merge problems
[mesa.git] / src / gallium / drivers / r300 / r300_state_derived.c
1 /*
2 * Copyright 2008 Corbin Simpson <MostAwesomeDude@gmail.com>
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * on the rights to use, copy, modify, merge, publish, distribute, sub
8 * license, and/or sell copies of the Software, and to permit persons to whom
9 * the Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
19 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
20 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
21 * USE OR OTHER DEALINGS IN THE SOFTWARE. */
22
23 #include "draw/draw_context.h"
24
25 #include "util/u_math.h"
26 #include "util/u_memory.h"
27
28 #include "r300_context.h"
29 #include "r300_fs.h"
30 #include "r300_screen.h"
31 #include "r300_state_derived.h"
32 #include "r300_state_inlines.h"
33 #include "r300_vs.h"
34
35 /* r300_state_derived: Various bits of state which are dependent upon
36 * currently bound CSO data. */
37
38 struct r300_shader_key {
39 struct r300_vertex_shader* vs;
40 struct r300_fragment_shader* fs;
41 };
42
43 struct r300_shader_derived_value {
44 struct r300_vertex_format* vformat;
45 struct r300_rs_block* rs_block;
46 };
47
48 unsigned r300_shader_key_hash(void* key) {
49 struct r300_shader_key* shader_key = (struct r300_shader_key*)key;
50 unsigned vs = (intptr_t)shader_key->vs;
51 unsigned fs = (intptr_t)shader_key->fs;
52
53 return (vs << 16) | (fs & 0xffff);
54 }
55
56 int r300_shader_key_compare(void* key1, void* key2) {
57 struct r300_shader_key* shader_key1 = (struct r300_shader_key*)key1;
58 struct r300_shader_key* shader_key2 = (struct r300_shader_key*)key2;
59
60 return (shader_key1->vs == shader_key2->vs) &&
61 (shader_key1->fs == shader_key2->fs);
62 }
63
64 /* Set up the vs_output_tab and routes. */
65 static void r300_vs_output_tab_routes(struct r300_context* r300,
66 int* vs_output_tab)
67 {
68 struct vertex_info* vinfo = &r300->vertex_info->vinfo;
69 boolean pos = FALSE, psize = FALSE, fog = FALSE;
70 int i, texs = 0, cols = 0;
71 struct tgsi_shader_info* info = &r300->fs->info;
72
73 /* XXX One day we should figure out how to handle a different number of
74 * VS outputs and FS inputs, as well as a different number of vertex streams
75 * and VS inputs. It's definitely one of the sources of hardlocks. */
76
77 for (i = 0; i < info->num_inputs; i++) {
78 switch (info->input_semantic_name[i]) {
79 case TGSI_SEMANTIC_POSITION:
80 pos = TRUE;
81 vs_output_tab[i] = 0;
82 break;
83 case TGSI_SEMANTIC_COLOR:
84 vs_output_tab[i] = 2 + cols;
85 cols++;
86 break;
87 case TGSI_SEMANTIC_PSIZE:
88 assert(psize == FALSE);
89 psize = TRUE;
90 vs_output_tab[i] = 15;
91 break;
92 case TGSI_SEMANTIC_FOG:
93 assert(fog == FALSE);
94 fog = TRUE;
95 /* Fall through */
96 case TGSI_SEMANTIC_GENERIC:
97 vs_output_tab[i] = 6 + texs;
98 texs++;
99 break;
100 default:
101 debug_printf("r300: Unknown vertex input %d\n",
102 info->input_semantic_name[i]);
103 break;
104 }
105 }
106
107 /* XXX magic */
108 assert(texs <= 8);
109
110 /* Do the actual vertex_info setup.
111 *
112 * vertex_info has four uints of hardware-specific data in it.
113 * vinfo.hwfmt[0] is R300_VAP_VTX_STATE_CNTL
114 * vinfo.hwfmt[1] is R300_VAP_VSM_VTX_ASSM
115 * vinfo.hwfmt[2] is R300_VAP_OUTPUT_VTX_FMT_0
116 * vinfo.hwfmt[3] is R300_VAP_OUTPUT_VTX_FMT_1 */
117
118 vinfo->hwfmt[0] = 0x5555; /* XXX this is classic Mesa bonghits */
119
120 /* We need to add vertex position attribute only for SW TCL case,
121 * for HW TCL case it could be generated by vertex shader */
122 if (!pos) {
123 /* Make room for the position attribute
124 * at the beginning of the vs_output_tab. */
125 for (i = 15; i > 0; i--) {
126 vs_output_tab[i] = vs_output_tab[i-1];
127 }
128 vs_output_tab[0] = 0;
129 }
130
131 /* Position. */
132 if (r300->draw) {
133 draw_emit_vertex_attr(vinfo, EMIT_4F, INTERP_PERSPECTIVE,
134 draw_find_vs_output(r300->draw, TGSI_SEMANTIC_POSITION, 0));
135 }
136 vinfo->hwfmt[1] |= R300_INPUT_CNTL_POS;
137 vinfo->hwfmt[2] |= R300_VAP_OUTPUT_VTX_FMT_0__POS_PRESENT;
138
139 /* Point size. */
140 if (psize) {
141 if (r300->draw) {
142 draw_emit_vertex_attr(vinfo, EMIT_1F_PSIZE, INTERP_POS,
143 draw_find_vs_output(r300->draw, TGSI_SEMANTIC_PSIZE, 0));
144 }
145 vinfo->hwfmt[2] |= R300_VAP_OUTPUT_VTX_FMT_0__PT_SIZE_PRESENT;
146 }
147
148 /* Colors. */
149 for (i = 0; i < cols; i++) {
150 if (r300->draw) {
151 draw_emit_vertex_attr(vinfo, EMIT_4F, INTERP_LINEAR,
152 draw_find_vs_output(r300->draw, TGSI_SEMANTIC_COLOR, i));
153 }
154 vinfo->hwfmt[1] |= R300_INPUT_CNTL_COLOR;
155 vinfo->hwfmt[2] |= (R300_VAP_OUTPUT_VTX_FMT_0__COLOR_0_PRESENT << i);
156 }
157
158 /* Init i right here, increment it if fog is enabled.
159 * This gets around a double-increment problem. */
160 i = 0;
161
162 /* Fog. This is a special-cased texcoord. */
163 if (fog) {
164 i++;
165 if (r300->draw) {
166 draw_emit_vertex_attr(vinfo, EMIT_4F, INTERP_PERSPECTIVE,
167 draw_find_vs_output(r300->draw, TGSI_SEMANTIC_FOG, 0));
168 }
169 vinfo->hwfmt[1] |= (R300_INPUT_CNTL_TC0 << i);
170 vinfo->hwfmt[3] |= (4 << (3 * i));
171 }
172
173 /* Texcoords. */
174 for (; i < texs; i++) {
175 if (r300->draw) {
176 draw_emit_vertex_attr(vinfo, EMIT_4F, INTERP_PERSPECTIVE,
177 draw_find_vs_output(r300->draw, TGSI_SEMANTIC_GENERIC, i));
178 }
179 vinfo->hwfmt[1] |= (R300_INPUT_CNTL_TC0 << i);
180 vinfo->hwfmt[3] |= (4 << (3 * i));
181 }
182
183 draw_compute_vertex_size(vinfo);
184 }
185
186 /* Update the PSC tables. */
187 static void r300_vertex_psc(struct r300_context* r300)
188 {
189 struct r300_vertex_info *vformat = r300->vertex_info;
190 uint16_t type, swizzle;
191 enum pipe_format format;
192 unsigned i;
193
194 /* Vertex shaders have no semantics on their inputs,
195 * so PSC should just route stuff based on the vertex elements,
196 * and not on attrib information. */
197 DBG(r300, DBG_DRAW, "r300: vs expects %d attribs, routing %d elements"
198 " in psc\n",
199 r300->vs->info.num_inputs,
200 r300->vertex_element_count);
201
202 for (i = 0; i < r300->vertex_element_count; i++) {
203 format = r300->vertex_element[i].src_format;
204
205 type = r300_translate_vertex_data_type(format) |
206 (i << R300_DST_VEC_LOC_SHIFT);
207 swizzle = r300_translate_vertex_data_swizzle(format);
208
209 if (i % 2) {
210 vformat->vap_prog_stream_cntl[i >> 1] |= type << 16;
211 vformat->vap_prog_stream_cntl_ext[i >> 1] |= swizzle << 16;
212 } else {
213 vformat->vap_prog_stream_cntl[i >> 1] |= type;
214 vformat->vap_prog_stream_cntl_ext[i >> 1] |= swizzle;
215 }
216 }
217
218
219 assert(i <= 15);
220
221 /* Set the last vector in the PSC. */
222 if (i) {
223 i -= 1;
224 }
225 vformat->vap_prog_stream_cntl[i >> 1] |=
226 (R300_LAST_VEC << (i & 1 ? 16 : 0));
227 }
228
229 /* Update the PSC tables for SW TCL, using Draw. */
230 static void r300_swtcl_vertex_psc(struct r300_context* r300,
231 int* vs_output_tab)
232 {
233 struct r300_vertex_info *vformat = r300->vertex_info;
234 struct vertex_info* vinfo = &vformat->vinfo;
235 uint16_t type, swizzle;
236 enum pipe_format format;
237 unsigned i, attrib_count;
238
239 /* For each Draw attribute, route it to the fragment shader according
240 * to the vs_output_tab. */
241 attrib_count = vinfo->num_attribs;
242 DBG(r300, DBG_DRAW, "r300: attrib count: %d\n", attrib_count);
243 for (i = 0; i < attrib_count; i++) {
244 DBG(r300, DBG_DRAW, "r300: attrib: offset %d, interp %d, size %d,"
245 " vs_output_tab %d\n", vinfo->attrib[i].src_index,
246 vinfo->attrib[i].interp_mode, vinfo->attrib[i].emit,
247 vs_output_tab[i]);
248 }
249
250 for (i = 0; i < attrib_count; i++) {
251 /* Make sure we have a proper destination for our attribute. */
252 assert(vs_output_tab[i] != -1);
253
254 format = draw_translate_vinfo_format(vinfo->attrib[i].emit);
255
256 /* Obtain the type of data in this attribute. */
257 type = r300_translate_vertex_data_type(format) |
258 vs_output_tab[i] << R300_DST_VEC_LOC_SHIFT;
259
260 /* Obtain the swizzle for this attribute. Note that the default
261 * swizzle in the hardware is not XYZW! */
262 swizzle = r300_translate_vertex_data_swizzle(format);
263
264 /* Add the attribute to the PSC table. */
265 if (i & 1) {
266 vformat->vap_prog_stream_cntl[i >> 1] |= type << 16;
267 vformat->vap_prog_stream_cntl_ext[i >> 1] |= swizzle << 16;
268 } else {
269 vformat->vap_prog_stream_cntl[i >> 1] |= type;
270 vformat->vap_prog_stream_cntl_ext[i >> 1] |= swizzle;
271 }
272 }
273
274 /* Set the last vector in the PSC. */
275 if (i) {
276 i -= 1;
277 }
278 vformat->vap_prog_stream_cntl[i >> 1] |=
279 (R300_LAST_VEC << (i & 1 ? 16 : 0));
280 }
281
282 /* Set up the RS block. This is the part of the chipset that actually does
283 * the rasterization of vertices into fragments. This is also the part of the
284 * chipset that locks up if any part of it is even slightly wrong. */
285 static void r300_update_rs_block(struct r300_context* r300)
286 {
287 struct r300_rs_block* rs = r300->rs_block;
288 struct tgsi_shader_info* info = &r300->fs->info;
289 int col_count = 0, fp_offset = 0, i, tex_count = 0;
290 int rs_tex_comp = 0;
291
292 if (r300_screen(r300->context.screen)->caps->is_r500) {
293 for (i = 0; i < info->num_inputs; i++) {
294 switch (info->input_semantic_name[i]) {
295 case TGSI_SEMANTIC_COLOR:
296 rs->ip[col_count] |=
297 R500_RS_COL_PTR(col_count) |
298 R500_RS_COL_FMT(R300_RS_COL_FMT_RGBA);
299 col_count++;
300 break;
301 case TGSI_SEMANTIC_GENERIC:
302 rs->ip[tex_count] |=
303 R500_RS_SEL_S(rs_tex_comp) |
304 R500_RS_SEL_T(rs_tex_comp + 1) |
305 R500_RS_SEL_R(rs_tex_comp + 2) |
306 R500_RS_SEL_Q(rs_tex_comp + 3);
307 tex_count++;
308 rs_tex_comp += 4;
309 break;
310 default:
311 break;
312 }
313 }
314
315 /* Rasterize at least one color, or bad things happen. */
316 if ((col_count == 0) && (tex_count == 0)) {
317 rs->ip[0] |= R500_RS_COL_FMT(R300_RS_COL_FMT_0001);
318 col_count++;
319 }
320
321 for (i = 0; i < col_count; i++) {
322 rs->inst[i] |= R500_RS_INST_COL_ID(i) |
323 R500_RS_INST_COL_CN_WRITE | R500_RS_INST_COL_ADDR(fp_offset);
324 fp_offset++;
325 }
326
327 for (i = 0; i < tex_count; i++) {
328 rs->inst[i] |= R500_RS_INST_TEX_ID(i) |
329 R500_RS_INST_TEX_CN_WRITE | R500_RS_INST_TEX_ADDR(fp_offset);
330 fp_offset++;
331 }
332
333 } else {
334 for (i = 0; i < info->num_inputs; i++) {
335 switch (info->input_semantic_name[i]) {
336 case TGSI_SEMANTIC_COLOR:
337 rs->ip[col_count] |=
338 R300_RS_COL_PTR(col_count) |
339 R300_RS_COL_FMT(R300_RS_COL_FMT_RGBA);
340 col_count++;
341 break;
342 case TGSI_SEMANTIC_GENERIC:
343 rs->ip[tex_count] |=
344 R300_RS_TEX_PTR(rs_tex_comp) |
345 R300_RS_SEL_S(R300_RS_SEL_C0) |
346 R300_RS_SEL_T(R300_RS_SEL_C1) |
347 R300_RS_SEL_R(R300_RS_SEL_C2) |
348 R300_RS_SEL_Q(R300_RS_SEL_C3);
349 tex_count++;
350 rs_tex_comp+=4;
351 break;
352 default:
353 break;
354 }
355 }
356
357 /* Rasterize at least one color, or bad things happen. */
358 if (col_count == 0) {
359 rs->ip[0] |= R300_RS_COL_FMT(R300_RS_COL_FMT_0001);
360 col_count++;
361 }
362
363 if (tex_count == 0) {
364 rs->ip[0] |=
365 R300_RS_SEL_S(R300_RS_SEL_K0) |
366 R300_RS_SEL_T(R300_RS_SEL_K0) |
367 R300_RS_SEL_R(R300_RS_SEL_K0) |
368 R300_RS_SEL_Q(R300_RS_SEL_K1);
369 }
370
371 for (i = 0; i < col_count; i++) {
372 rs->inst[i] |= R300_RS_INST_COL_ID(i) |
373 R300_RS_INST_COL_CN_WRITE | R300_RS_INST_COL_ADDR(fp_offset);
374 fp_offset++;
375 }
376
377 for (i = 0; i < tex_count; i++) {
378 rs->inst[i] |= R300_RS_INST_TEX_ID(i) |
379 R300_RS_INST_TEX_CN_WRITE | R300_RS_INST_TEX_ADDR(fp_offset);
380 fp_offset++;
381 }
382 }
383
384 rs->count = (rs_tex_comp) | (col_count << R300_IC_COUNT_SHIFT) |
385 R300_HIRES_EN;
386
387 rs->inst_count = MAX3(col_count - 1, tex_count - 1, 0);
388 }
389
390 /* Update the vertex format. */
391 static void r300_update_derived_shader_state(struct r300_context* r300)
392 {
393 struct r300_screen* r300screen = r300_screen(r300->context.screen);
394 int vs_output_tab[16];
395 int i;
396
397
398 /*
399 struct r300_shader_key* key;
400 struct r300_shader_derived_value* value;
401 key = CALLOC_STRUCT(r300_shader_key);
402 key->vs = r300->vs;
403 key->fs = r300->fs;
404
405 value = (struct r300_shader_derived_value*)
406 util_hash_table_get(r300->shader_hash_table, (void*)key);
407 if (value) {
408 //vformat = value->vformat;
409 rs_block = value->rs_block;
410
411 FREE(key);
412 } else {
413 rs_block = CALLOC_STRUCT(r300_rs_block);
414 value = CALLOC_STRUCT(r300_shader_derived_value);
415
416 r300_update_rs_block(r300, rs_block);
417
418 //value->vformat = vformat;
419 value->rs_block = rs_block;
420 util_hash_table_set(r300->shader_hash_table,
421 (void*)key, (void*)value);
422 } */
423
424 /* Reset structures */
425 memset(r300->rs_block, 0, sizeof(struct r300_rs_block));
426 memset(r300->vertex_info, 0, sizeof(struct r300_vertex_info));
427
428 for (i = 0; i < 16; i++) {
429 vs_output_tab[i] = -1;
430 }
431
432 /* Update states */
433 r300_vs_output_tab_routes(r300, vs_output_tab);
434
435 if (r300screen->caps->has_tcl) {
436 r300_vertex_psc(r300);
437 } else {
438 r300_swtcl_vertex_psc(r300, vs_output_tab);
439 }
440
441 r300_update_rs_block(r300);
442
443 r300->dirty_state |= R300_NEW_RS_BLOCK;
444 }
445
446 static void r300_update_ztop(struct r300_context* r300)
447 {
448 r300->ztop_state.z_buffer_top = R300_ZTOP_ENABLE;
449
450 /* This is important enough that I felt it warranted a comment.
451 *
452 * According to the docs, these are the conditions where ZTOP must be
453 * disabled:
454 * 1) Alpha testing enabled
455 * 2) Texture kill instructions in fragment shader
456 * 3) Chroma key culling enabled
457 * 4) W-buffering enabled
458 *
459 * The docs claim that for the first three cases, if no ZS writes happen,
460 * then ZTOP can be used.
461 *
462 * Additionally, the following conditions require disabled ZTOP:
463 * ~) Depth writes in fragment shader
464 * ~) Outstanding occlusion queries
465 *
466 * ~C.
467 */
468 if (r300->dsa_state->alpha_function) {
469 r300->ztop_state.z_buffer_top = R300_ZTOP_DISABLE;
470 } else if (r300->fs->info.uses_kill) {
471 r300->ztop_state.z_buffer_top = R300_ZTOP_DISABLE;
472 } else if (r300_fragment_shader_writes_depth(r300->fs)) {
473 r300->ztop_state.z_buffer_top = R300_ZTOP_DISABLE;
474 } else if (r300->query_current) {
475 r300->ztop_state.z_buffer_top = R300_ZTOP_DISABLE;
476 }
477 }
478
479 void r300_update_derived_state(struct r300_context* r300)
480 {
481 if (r300->dirty_state &
482 (R300_NEW_FRAGMENT_SHADER | R300_NEW_VERTEX_SHADER |
483 R300_NEW_VERTEX_FORMAT)) {
484 r300_update_derived_shader_state(r300);
485 }
486
487 if (r300->dirty_state &
488 (R300_NEW_DSA | R300_NEW_FRAGMENT_SHADER | R300_NEW_QUERY)) {
489 r300_update_ztop(r300);
490 }
491 }