2 * Copyright 2008 Corbin Simpson <MostAwesomeDude@gmail.com>
3 * Copyright 2009 Marek Olšák <maraeo@gmail.com>
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * on the rights to use, copy, modify, merge, publish, distribute, sub
9 * license, and/or sell copies of the Software, and to permit persons to whom
10 * the Software is furnished to do so, subject to the following conditions:
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
20 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
21 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
22 * USE OR OTHER DEALINGS IN THE SOFTWARE. */
24 #include "draw/draw_context.h"
26 #include "util/u_math.h"
27 #include "util/u_memory.h"
29 #include "r300_context.h"
31 #include "r300_screen.h"
32 #include "r300_shader_semantics.h"
33 #include "r300_state_derived.h"
34 #include "r300_state_inlines.h"
37 /* r300_state_derived: Various bits of state which are dependent upon
38 * currently bound CSO data. */
40 static void r300_draw_emit_attrib(struct r300_context
* r300
,
41 enum attrib_emit emit
,
42 enum interp_mode interp
,
45 struct r300_vertex_shader
* vs
= r300
->vs_state
.state
;
46 struct tgsi_shader_info
* info
= &vs
->info
;
49 output
= draw_find_shader_output(r300
->draw
,
50 info
->output_semantic_name
[index
],
51 info
->output_semantic_index
[index
]);
52 draw_emit_vertex_attr(&r300
->vertex_info
, emit
, interp
, output
);
55 static void r300_draw_emit_all_attribs(struct r300_context
* r300
)
57 struct r300_vertex_shader
* vs
= r300
->vs_state
.state
;
58 struct r300_shader_semantics
* vs_outputs
= &vs
->outputs
;
62 if (vs_outputs
->pos
!= ATTR_UNUSED
) {
63 r300_draw_emit_attrib(r300
, EMIT_4F
, INTERP_PERSPECTIVE
,
70 if (vs_outputs
->psize
!= ATTR_UNUSED
) {
71 r300_draw_emit_attrib(r300
, EMIT_1F_PSIZE
, INTERP_POS
,
76 for (i
= 0; i
< ATTR_COLOR_COUNT
; i
++) {
77 if (vs_outputs
->color
[i
] != ATTR_UNUSED
) {
78 r300_draw_emit_attrib(r300
, EMIT_4F
, INTERP_LINEAR
,
79 vs_outputs
->color
[i
]);
83 /* XXX Back-face colors. */
85 /* Texture coordinates. */
87 for (i
= 0; i
< ATTR_GENERIC_COUNT
; i
++) {
88 if (vs_outputs
->generic
[i
] != ATTR_UNUSED
) {
89 r300_draw_emit_attrib(r300
, EMIT_4F
, INTERP_PERSPECTIVE
,
90 vs_outputs
->generic
[i
]);
95 /* Fog coordinates. */
96 if (vs_outputs
->fog
!= ATTR_UNUSED
) {
97 r300_draw_emit_attrib(r300
, EMIT_4F
, INTERP_PERSPECTIVE
,
103 assert(gen_count
<= 8);
106 /* Update the PSC tables. */
107 /* XXX move this function into r300_state.c after TCL-bypass gets removed
108 * XXX because this one is dependent only on vertex elements. */
109 static void r300_vertex_psc(struct r300_context
* r300
)
111 struct r300_vertex_shader
* vs
= r300
->vs_state
.state
;
112 struct r300_vertex_stream_state
*vformat
=
113 (struct r300_vertex_stream_state
*)r300
->vertex_stream_state
.state
;
114 uint16_t type
, swizzle
;
115 enum pipe_format format
;
117 int identity
[16] = {0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15};
120 memset(vformat
, 0, sizeof(struct r300_vertex_stream_state
));
122 stream_tab
= identity
;
124 /* Vertex shaders have no semantics on their inputs,
125 * so PSC should just route stuff based on the vertex elements,
126 * and not on attrib information. */
127 DBG(r300
, DBG_DRAW
, "r300: vs expects %d attribs, routing %d elements"
130 r300
->velems
->count
);
132 for (i
= 0; i
< r300
->velems
->count
; i
++) {
133 format
= r300
->velems
->velem
[i
].src_format
;
135 type
= r300_translate_vertex_data_type(format
) |
136 (stream_tab
[i
] << R300_DST_VEC_LOC_SHIFT
);
137 swizzle
= r300_translate_vertex_data_swizzle(format
);
140 vformat
->vap_prog_stream_cntl
[i
>> 1] |= type
<< 16;
141 vformat
->vap_prog_stream_cntl_ext
[i
>> 1] |= swizzle
<< 16;
143 vformat
->vap_prog_stream_cntl
[i
>> 1] |= type
;
144 vformat
->vap_prog_stream_cntl_ext
[i
>> 1] |= swizzle
;
150 /* Set the last vector in the PSC. */
154 vformat
->vap_prog_stream_cntl
[i
>> 1] |=
155 (R300_LAST_VEC
<< (i
& 1 ? 16 : 0));
157 vformat
->count
= (i
>> 1) + 1;
158 r300
->vertex_stream_state
.size
= (1 + vformat
->count
) * 2;
161 /* Update the PSC tables for SW TCL, using Draw. */
162 static void r300_swtcl_vertex_psc(struct r300_context
* r300
)
164 struct r300_vertex_shader
* vs
= r300
->vs_state
.state
;
165 struct r300_vertex_stream_state
*vformat
=
166 (struct r300_vertex_stream_state
*)r300
->vertex_stream_state
.state
;
167 struct vertex_info
* vinfo
= &r300
->vertex_info
;
168 uint16_t type
, swizzle
;
169 enum pipe_format format
;
170 unsigned i
, attrib_count
;
171 int* vs_output_tab
= vs
->stream_loc_notcl
;
173 memset(vformat
, 0, sizeof(struct r300_vertex_stream_state
));
175 /* For each Draw attribute, route it to the fragment shader according
176 * to the vs_output_tab. */
177 attrib_count
= vinfo
->num_attribs
;
178 DBG(r300
, DBG_DRAW
, "r300: attrib count: %d\n", attrib_count
);
179 for (i
= 0; i
< attrib_count
; i
++) {
180 DBG(r300
, DBG_DRAW
, "r300: attrib: offset %d, interp %d, size %d,"
181 " vs_output_tab %d\n", vinfo
->attrib
[i
].src_index
,
182 vinfo
->attrib
[i
].interp_mode
, vinfo
->attrib
[i
].emit
,
186 for (i
= 0; i
< attrib_count
; i
++) {
187 /* Make sure we have a proper destination for our attribute. */
188 assert(vs_output_tab
[i
] != -1);
190 format
= draw_translate_vinfo_format(vinfo
->attrib
[i
].emit
);
192 /* Obtain the type of data in this attribute. */
193 type
= r300_translate_vertex_data_type(format
) |
194 vs_output_tab
[i
] << R300_DST_VEC_LOC_SHIFT
;
196 /* Obtain the swizzle for this attribute. Note that the default
197 * swizzle in the hardware is not XYZW! */
198 swizzle
= r300_translate_vertex_data_swizzle(format
);
200 /* Add the attribute to the PSC table. */
202 vformat
->vap_prog_stream_cntl
[i
>> 1] |= type
<< 16;
203 vformat
->vap_prog_stream_cntl_ext
[i
>> 1] |= swizzle
<< 16;
205 vformat
->vap_prog_stream_cntl
[i
>> 1] |= type
;
206 vformat
->vap_prog_stream_cntl_ext
[i
>> 1] |= swizzle
;
210 /* Set the last vector in the PSC. */
214 vformat
->vap_prog_stream_cntl
[i
>> 1] |=
215 (R300_LAST_VEC
<< (i
& 1 ? 16 : 0));
217 vformat
->count
= (i
>> 1) + 1;
218 r300
->vertex_stream_state
.size
= (1 + vformat
->count
) * 2;
221 static void r300_rs_col(struct r300_rs_block
* rs
, int id
, int ptr
,
222 boolean swizzle_0001
)
224 rs
->ip
[id
] |= R300_RS_COL_PTR(ptr
);
226 rs
->ip
[id
] |= R300_RS_COL_FMT(R300_RS_COL_FMT_0001
);
228 rs
->ip
[id
] |= R300_RS_COL_FMT(R300_RS_COL_FMT_RGBA
);
230 rs
->inst
[id
] |= R300_RS_INST_COL_ID(id
);
233 static void r300_rs_col_write(struct r300_rs_block
* rs
, int id
, int fp_offset
)
235 rs
->inst
[id
] |= R300_RS_INST_COL_CN_WRITE
|
236 R300_RS_INST_COL_ADDR(fp_offset
);
239 static void r300_rs_tex(struct r300_rs_block
* rs
, int id
, int ptr
,
240 boolean swizzle_X001
)
243 rs
->ip
[id
] |= R300_RS_TEX_PTR(ptr
*4) |
244 R300_RS_SEL_S(R300_RS_SEL_C0
) |
245 R300_RS_SEL_T(R300_RS_SEL_K0
) |
246 R300_RS_SEL_R(R300_RS_SEL_K0
) |
247 R300_RS_SEL_Q(R300_RS_SEL_K1
);
249 rs
->ip
[id
] |= R300_RS_TEX_PTR(ptr
*4) |
250 R300_RS_SEL_S(R300_RS_SEL_C0
) |
251 R300_RS_SEL_T(R300_RS_SEL_C1
) |
252 R300_RS_SEL_R(R300_RS_SEL_C2
) |
253 R300_RS_SEL_Q(R300_RS_SEL_C3
);
255 rs
->inst
[id
] |= R300_RS_INST_TEX_ID(id
);
258 static void r300_rs_tex_write(struct r300_rs_block
* rs
, int id
, int fp_offset
)
260 rs
->inst
[id
] |= R300_RS_INST_TEX_CN_WRITE
|
261 R300_RS_INST_TEX_ADDR(fp_offset
);
264 static void r500_rs_col(struct r300_rs_block
* rs
, int id
, int ptr
,
265 boolean swizzle_0001
)
267 rs
->ip
[id
] |= R500_RS_COL_PTR(ptr
);
269 rs
->ip
[id
] |= R500_RS_COL_FMT(R300_RS_COL_FMT_0001
);
271 rs
->ip
[id
] |= R500_RS_COL_FMT(R300_RS_COL_FMT_RGBA
);
273 rs
->inst
[id
] |= R500_RS_INST_COL_ID(id
);
276 static void r500_rs_col_write(struct r300_rs_block
* rs
, int id
, int fp_offset
)
278 rs
->inst
[id
] |= R500_RS_INST_COL_CN_WRITE
|
279 R500_RS_INST_COL_ADDR(fp_offset
);
282 static void r500_rs_tex(struct r300_rs_block
* rs
, int id
, int ptr
,
283 boolean swizzle_X001
)
285 int rs_tex_comp
= ptr
*4;
288 rs
->ip
[id
] |= R500_RS_SEL_S(rs_tex_comp
) |
289 R500_RS_SEL_T(R500_RS_IP_PTR_K0
) |
290 R500_RS_SEL_R(R500_RS_IP_PTR_K0
) |
291 R500_RS_SEL_Q(R500_RS_IP_PTR_K1
);
293 rs
->ip
[id
] |= R500_RS_SEL_S(rs_tex_comp
) |
294 R500_RS_SEL_T(rs_tex_comp
+ 1) |
295 R500_RS_SEL_R(rs_tex_comp
+ 2) |
296 R500_RS_SEL_Q(rs_tex_comp
+ 3);
298 rs
->inst
[id
] |= R500_RS_INST_TEX_ID(id
);
301 static void r500_rs_tex_write(struct r300_rs_block
* rs
, int id
, int fp_offset
)
303 rs
->inst
[id
] |= R500_RS_INST_TEX_CN_WRITE
|
304 R500_RS_INST_TEX_ADDR(fp_offset
);
307 /* Set up the RS block.
309 * This is the part of the chipset that actually does the rasterization
310 * of vertices into fragments. This is also the part of the chipset that
311 * locks up if any part of it is even slightly wrong. */
312 static void r300_update_rs_block(struct r300_context
* r300
,
313 struct r300_shader_semantics
* vs_outputs
,
314 struct r300_shader_semantics
* fs_inputs
)
316 struct r300_rs_block rs
= { { 0 } };
317 int i
, col_count
= 0, tex_count
= 0, fp_offset
= 0, count
;
318 void (*rX00_rs_col
)(struct r300_rs_block
*, int, int, boolean
);
319 void (*rX00_rs_col_write
)(struct r300_rs_block
*, int, int);
320 void (*rX00_rs_tex
)(struct r300_rs_block
*, int, int, boolean
);
321 void (*rX00_rs_tex_write
)(struct r300_rs_block
*, int, int);
322 boolean any_bcolor_used
= vs_outputs
->bcolor
[0] != ATTR_UNUSED
||
323 vs_outputs
->bcolor
[1] != ATTR_UNUSED
;
325 if (r300_screen(r300
->context
.screen
)->caps
->is_r500
) {
326 rX00_rs_col
= r500_rs_col
;
327 rX00_rs_col_write
= r500_rs_col_write
;
328 rX00_rs_tex
= r500_rs_tex
;
329 rX00_rs_tex_write
= r500_rs_tex_write
;
331 rX00_rs_col
= r300_rs_col
;
332 rX00_rs_col_write
= r300_rs_col_write
;
333 rX00_rs_tex
= r300_rs_tex
;
334 rX00_rs_tex_write
= r300_rs_tex_write
;
337 /* Rasterize colors. */
338 for (i
= 0; i
< ATTR_COLOR_COUNT
; i
++) {
339 if (vs_outputs
->color
[i
] != ATTR_UNUSED
|| any_bcolor_used
||
340 vs_outputs
->color
[1] != ATTR_UNUSED
) {
341 /* Always rasterize if it's written by the VS,
342 * otherwise it locks up. */
343 rX00_rs_col(&rs
, col_count
, i
, FALSE
);
345 /* Write it to the FS input register if it's used by the FS. */
346 if (fs_inputs
->color
[i
] != ATTR_UNUSED
) {
347 rX00_rs_col_write(&rs
, col_count
, fp_offset
);
352 /* Skip the FS input register, leave it uninitialized. */
353 /* If we try to set it to (0,0,0,1), it will lock up. */
354 if (fs_inputs
->color
[i
] != ATTR_UNUSED
) {
360 /* Rasterize texture coordinates. */
361 for (i
= 0; i
< ATTR_GENERIC_COUNT
; i
++) {
362 if (vs_outputs
->generic
[i
] != ATTR_UNUSED
) {
363 /* Always rasterize if it's written by the VS,
364 * otherwise it locks up. */
365 rX00_rs_tex(&rs
, tex_count
, tex_count
, FALSE
);
367 /* Write it to the FS input register if it's used by the FS. */
368 if (fs_inputs
->generic
[i
] != ATTR_UNUSED
) {
369 rX00_rs_tex_write(&rs
, tex_count
, fp_offset
);
374 /* Skip the FS input register, leave it uninitialized. */
375 /* If we try to set it to (0,0,0,1), it will lock up. */
376 if (fs_inputs
->generic
[i
] != ATTR_UNUSED
) {
382 /* Rasterize fog coordinates. */
383 if (vs_outputs
->fog
!= ATTR_UNUSED
) {
384 /* Always rasterize if it's written by the VS,
385 * otherwise it locks up. */
386 rX00_rs_tex(&rs
, tex_count
, tex_count
, TRUE
);
388 /* Write it to the FS input register if it's used by the FS. */
389 if (fs_inputs
->fog
!= ATTR_UNUSED
) {
390 rX00_rs_tex_write(&rs
, tex_count
, fp_offset
);
395 /* Skip the FS input register, leave it uninitialized. */
396 /* If we try to set it to (0,0,0,1), it will lock up. */
397 if (fs_inputs
->fog
!= ATTR_UNUSED
) {
402 /* Rasterize WPOS. */
403 /* If the FS doesn't need it, it's not written by the VS. */
404 if (fs_inputs
->wpos
!= ATTR_UNUSED
) {
405 rX00_rs_tex(&rs
, tex_count
, tex_count
, FALSE
);
406 rX00_rs_tex_write(&rs
, tex_count
, fp_offset
);
412 /* Rasterize at least one color, or bad things happen. */
413 if (col_count
== 0 && tex_count
== 0) {
414 rX00_rs_col(&rs
, 0, 0, TRUE
);
418 rs
.count
= (tex_count
*4) | (col_count
<< R300_IC_COUNT_SHIFT
) |
421 count
= MAX3(col_count
, tex_count
, 1);
422 rs
.inst_count
= count
- 1;
424 /* Now, after all that, see if we actually need to update the state. */
425 if (memcmp(r300
->rs_block_state
.state
, &rs
, sizeof(struct r300_rs_block
))) {
426 memcpy(r300
->rs_block_state
.state
, &rs
, sizeof(struct r300_rs_block
));
427 r300
->rs_block_state
.size
= 5 + count
*2;
431 /* Update the shader-dependant states. */
432 static void r300_update_derived_shader_state(struct r300_context
* r300
)
434 struct r300_vertex_shader
* vs
= r300
->vs_state
.state
;
435 struct r300_screen
* r300screen
= r300_screen(r300
->context
.screen
);
437 r300_update_rs_block(r300
, &vs
->outputs
, &r300
->fs
->inputs
);
439 if (r300screen
->caps
->has_tcl
) {
440 r300_vertex_psc(r300
);
442 memset(&r300
->vertex_info
, 0, sizeof(struct vertex_info
));
443 r300_draw_emit_all_attribs(r300
);
444 draw_compute_vertex_size(&r300
->vertex_info
);
445 r300_swtcl_vertex_psc(r300
);
449 static boolean
r300_dsa_writes_depth_stencil(struct r300_dsa_state
* dsa
)
451 /* We are interested only in the cases when a new depth or stencil value
452 * can be written and changed. */
454 /* We might optionally check for [Z func: never] and inspect the stencil
455 * state in a similar fashion, but it's not terribly important. */
456 return (dsa
->z_buffer_control
& R300_Z_WRITE_ENABLE
) ||
457 (dsa
->stencil_ref_mask
& R300_STENCILWRITEMASK_MASK
) ||
458 ((dsa
->z_buffer_control
& R500_STENCIL_REFMASK_FRONT_BACK
) &&
459 (dsa
->stencil_ref_bf
& R300_STENCILWRITEMASK_MASK
));
462 static boolean
r300_dsa_alpha_test_enabled(struct r300_dsa_state
* dsa
)
464 /* We are interested only in the cases when alpha testing can kill
466 uint32_t af
= dsa
->alpha_function
;
468 return (af
& R300_FG_ALPHA_FUNC_ENABLE
) &&
469 (af
& R300_FG_ALPHA_FUNC_ALWAYS
) != R300_FG_ALPHA_FUNC_ALWAYS
;
472 static void r300_update_ztop(struct r300_context
* r300
)
474 struct r300_ztop_state
* ztop_state
=
475 (struct r300_ztop_state
*)r300
->ztop_state
.state
;
477 /* This is important enough that I felt it warranted a comment.
479 * According to the docs, these are the conditions where ZTOP must be
481 * 1) Alpha testing enabled
482 * 2) Texture kill instructions in fragment shader
483 * 3) Chroma key culling enabled
484 * 4) W-buffering enabled
486 * The docs claim that for the first three cases, if no ZS writes happen,
487 * then ZTOP can be used.
489 * (3) will never apply since we do not support chroma-keyed operations.
490 * (4) will need to be re-examined (and this comment updated) if/when
491 * Hyper-Z becomes supported.
493 * Additionally, the following conditions require disabled ZTOP:
494 * 5) Depth writes in fragment shader
495 * 6) Outstanding occlusion queries
497 * This register causes stalls all the way from SC to CB when changed,
498 * but it is buffered on-chip so it does not hurt to write it if it has
505 if (r300_dsa_writes_depth_stencil(r300
->dsa_state
.state
) &&
506 (r300_dsa_alpha_test_enabled(r300
->dsa_state
.state
) ||/* (1) */
507 r300
->fs
->info
.uses_kill
)) { /* (2) */
508 ztop_state
->z_buffer_top
= R300_ZTOP_DISABLE
;
509 } else if (r300_fragment_shader_writes_depth(r300
->fs
)) { /* (5) */
510 ztop_state
->z_buffer_top
= R300_ZTOP_DISABLE
;
511 } else if (r300
->query_current
) { /* (6) */
512 ztop_state
->z_buffer_top
= R300_ZTOP_DISABLE
;
514 ztop_state
->z_buffer_top
= R300_ZTOP_ENABLE
;
517 r300
->ztop_state
.dirty
= TRUE
;
520 static void r300_merge_textures_and_samplers(struct r300_context
* r300
)
522 struct r300_textures_state
*state
=
523 (struct r300_textures_state
*)r300
->textures_state
.state
;
524 struct r300_texture_sampler_state
*texstate
;
525 struct r300_sampler_state
*sampler
;
526 struct r300_texture
*tex
;
527 unsigned min_level
, max_level
, i
, size
;
528 unsigned count
= MIN2(state
->texture_count
, state
->sampler_count
);
530 state
->tx_enable
= 0;
533 for (i
= 0; i
< count
; i
++) {
534 if (state
->textures
[i
] && state
->sampler_states
[i
]) {
535 state
->tx_enable
|= 1 << i
;
537 tex
= state
->textures
[i
];
538 sampler
= state
->sampler_states
[i
];
540 texstate
= &state
->regs
[i
];
541 memcpy(texstate
->format
, &tex
->state
, sizeof(uint32_t)*3);
542 texstate
->filter
[0] = sampler
->filter0
;
543 texstate
->filter
[1] = sampler
->filter1
;
544 texstate
->border_color
= sampler
->border_color
;
545 texstate
->tile_config
= R300_TXO_MACRO_TILE(tex
->macrotile
) |
546 R300_TXO_MICRO_TILE(tex
->microtile
);
548 /* to emulate 1D textures through 2D ones correctly */
549 if (tex
->tex
.target
== PIPE_TEXTURE_1D
) {
550 texstate
->filter
[0] &= ~R300_TX_WRAP_T_MASK
;
551 texstate
->filter
[0] |= R300_TX_WRAP_T(R300_TX_CLAMP_TO_EDGE
);
555 /* NPOT textures don't support mip filter, unfortunately.
556 * This prevents incorrect rendering. */
557 texstate
->filter
[0] &= ~R300_TX_MIN_FILTER_MIP_MASK
;
559 /* determine min/max levels */
560 /* the MAX_MIP level is the largest (finest) one */
561 max_level
= MIN2(sampler
->max_lod
, tex
->tex
.last_level
);
562 min_level
= MIN2(sampler
->min_lod
, max_level
);
563 texstate
->format
[0] |= R300_TX_NUM_LEVELS(max_level
);
564 texstate
->filter
[0] |= R300_TX_MAX_MIP_LEVEL(min_level
);
567 texstate
->filter
[0] |= i
<< 28;
574 r300
->textures_state
.size
= size
;
577 void r300_update_derived_state(struct r300_context
* r300
)
579 if (r300
->rs_block_state
.dirty
||
580 r300
->vertex_stream_state
.dirty
) { /* XXX put updating PSC out of this file */
581 r300_update_derived_shader_state(r300
);
584 if (r300
->textures_state
.dirty
) {
585 r300_merge_textures_and_samplers(r300
);
588 r300_update_ztop(r300
);